2 * $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $
3 * $FreeBSD: src/sys/dev/usb/ohci.c,v 1.141 2003/12/22 15:40:10 shiba Exp $
4 * $DragonFly: src/sys/bus/usb/ohci.c,v 1.9 2004/07/08 03:25:00 dillon Exp $
6 /* Also, already ported:
7 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
8 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
9 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
10 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
11 * $NetBSD: 1.144 - 1.150 ported
15 * Copyright (c) 1998 The NetBSD Foundation, Inc.
16 * All rights reserved.
18 * This code is derived from software contributed to The NetBSD Foundation
19 * by Lennart Augustsson (lennart@augustsson.net) at
20 * Carlstedt Research & Technology.
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
25 * 1. Redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution.
30 * 3. All advertising materials mentioning features or use of this software
31 * must display the following acknowledgement:
32 * This product includes software developed by the NetBSD
33 * Foundation, Inc. and its contributors.
34 * 4. Neither the name of The NetBSD Foundation nor the names of its
35 * contributors may be used to endorse or promote products derived
36 * from this software without specific prior written permission.
38 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
39 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
40 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
41 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
48 * POSSIBILITY OF SUCH DAMAGE.
52 * USB Open Host Controller driver.
54 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
55 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/malloc.h>
61 #include <sys/kernel.h>
62 #if defined(__NetBSD__) || defined(__OpenBSD__)
63 #include <sys/device.h>
64 #include <sys/select.h>
65 #elif defined(__FreeBSD__) || defined(__DragonFly__)
66 #include <sys/endian.h>
67 #include <sys/module.h>
69 #include <machine/bus_pio.h>
70 #include <machine/bus_memio.h>
71 #if defined(DIAGNOSTIC) && defined(__i386__)
72 #include <machine/cpu.h>
76 #include <sys/queue.h>
77 #include <sys/sysctl.h>
79 #include <machine/bus.h>
80 #include <machine/endian.h>
86 #include "usb_quirks.h"
91 #if defined(__FreeBSD__) || defined(__DragonFly__)
92 #include <machine/clock.h>
94 #define delay(d) DELAY(d)
97 #if defined(__OpenBSD__)
98 struct cfdriver ohci_cd = {
104 #define DPRINTF(x) if (ohcidebug) logprintf x
105 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
107 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
108 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
109 &ohcidebug, 0, "ohci debug level");
111 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
115 #define DPRINTFN(n,x)
119 * The OHCI controller is little endian, so on big endian machines
120 * the data strored in memory needs to be swapped.
122 #if defined(__OpenBSD__)
123 #if BYTE_ORDER == BIG_ENDIAN
124 #define htole32(x) (bswap32(x))
125 #define le32toh(x) (bswap32(x))
127 #define htole32(x) (x)
128 #define le32toh(x) (x)
134 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
135 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
137 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
138 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
140 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
141 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
144 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
147 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
148 ohci_softc_t *, int, int, usbd_xfer_handle,
149 ohci_soft_td_t *, ohci_soft_td_t **);
151 #if defined(__NetBSD__) || defined(__OpenBSD__)
152 Static void ohci_shutdown(void *v);
153 Static void ohci_power(int, void *);
155 Static usbd_status ohci_open(usbd_pipe_handle);
156 Static void ohci_poll(struct usbd_bus *);
157 Static void ohci_softintr(void *);
158 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
159 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
160 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
162 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
163 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
164 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
165 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
166 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
167 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
168 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
169 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
170 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
172 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
173 Static void ohci_device_isoc_enter(usbd_xfer_handle);
175 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
176 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
178 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
179 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
181 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
182 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
183 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
184 Static void ohci_root_ctrl_close(usbd_pipe_handle);
185 Static void ohci_root_ctrl_done(usbd_xfer_handle);
187 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
188 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
189 Static void ohci_root_intr_abort(usbd_xfer_handle);
190 Static void ohci_root_intr_close(usbd_pipe_handle);
191 Static void ohci_root_intr_done(usbd_xfer_handle);
193 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
194 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
195 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
196 Static void ohci_device_ctrl_close(usbd_pipe_handle);
197 Static void ohci_device_ctrl_done(usbd_xfer_handle);
199 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
200 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
201 Static void ohci_device_bulk_abort(usbd_xfer_handle);
202 Static void ohci_device_bulk_close(usbd_pipe_handle);
203 Static void ohci_device_bulk_done(usbd_xfer_handle);
205 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
206 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
207 Static void ohci_device_intr_abort(usbd_xfer_handle);
208 Static void ohci_device_intr_close(usbd_pipe_handle);
209 Static void ohci_device_intr_done(usbd_xfer_handle);
211 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
212 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
213 Static void ohci_device_isoc_abort(usbd_xfer_handle);
214 Static void ohci_device_isoc_close(usbd_pipe_handle);
215 Static void ohci_device_isoc_done(usbd_xfer_handle);
217 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
218 struct ohci_pipe *pipe, int ival);
220 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
222 Static void ohci_timeout(void *);
223 Static void ohci_timeout_task(void *);
224 Static void ohci_rhsc_able(ohci_softc_t *, int);
225 Static void ohci_rhsc_enable(void *);
227 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
228 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
230 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
231 Static void ohci_noop(usbd_pipe_handle pipe);
233 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
236 Static void ohci_dumpregs(ohci_softc_t *);
237 Static void ohci_dump_tds(ohci_soft_td_t *);
238 Static void ohci_dump_td(ohci_soft_td_t *);
239 Static void ohci_dump_ed(ohci_soft_ed_t *);
240 Static void ohci_dump_itd(ohci_soft_itd_t *);
241 Static void ohci_dump_itds(ohci_soft_itd_t *);
244 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
245 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
246 #define OWRITE1(sc, r, x) \
247 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
248 #define OWRITE2(sc, r, x) \
249 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
250 #define OWRITE4(sc, r, x) \
251 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
252 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
253 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
254 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
256 /* Reverse the bits in a value 0 .. 31 */
257 Static u_int8_t revbits[OHCI_NO_INTRS] =
258 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
259 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
260 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
261 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
264 struct usbd_pipe pipe;
269 ohci_soft_itd_t *itd;
271 /* Info needed for different pipe kinds. */
277 ohci_soft_td_t *setup, *data, *stat;
296 #define OHCI_INTR_ENDPT 1
298 Static struct usbd_bus_methods ohci_bus_methods = {
308 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
309 ohci_root_ctrl_transfer,
310 ohci_root_ctrl_start,
311 ohci_root_ctrl_abort,
312 ohci_root_ctrl_close,
317 Static struct usbd_pipe_methods ohci_root_intr_methods = {
318 ohci_root_intr_transfer,
319 ohci_root_intr_start,
320 ohci_root_intr_abort,
321 ohci_root_intr_close,
326 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
327 ohci_device_ctrl_transfer,
328 ohci_device_ctrl_start,
329 ohci_device_ctrl_abort,
330 ohci_device_ctrl_close,
332 ohci_device_ctrl_done,
335 Static struct usbd_pipe_methods ohci_device_intr_methods = {
336 ohci_device_intr_transfer,
337 ohci_device_intr_start,
338 ohci_device_intr_abort,
339 ohci_device_intr_close,
340 ohci_device_clear_toggle,
341 ohci_device_intr_done,
344 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
345 ohci_device_bulk_transfer,
346 ohci_device_bulk_start,
347 ohci_device_bulk_abort,
348 ohci_device_bulk_close,
349 ohci_device_clear_toggle,
350 ohci_device_bulk_done,
353 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
354 ohci_device_isoc_transfer,
355 ohci_device_isoc_start,
356 ohci_device_isoc_abort,
357 ohci_device_isoc_close,
359 ohci_device_isoc_done,
362 #if defined(__NetBSD__) || defined(__OpenBSD__)
364 ohci_activate(device_ptr_t self, enum devact act)
366 struct ohci_softc *sc = (struct ohci_softc *)self;
373 case DVACT_DEACTIVATE:
374 if (sc->sc_child != NULL)
375 rv = config_deactivate(sc->sc_child);
383 ohci_detach(struct ohci_softc *sc, int flags)
387 if (sc->sc_child != NULL)
388 rv = config_detach(sc->sc_child, flags);
393 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
395 #if defined(__NetBSD__) || defined(__OpenBSD__)
396 powerhook_disestablish(sc->sc_powerhook);
397 shutdownhook_disestablish(sc->sc_shutdownhook);
400 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
402 /* free data structures XXX */
409 ohci_alloc_sed(ohci_softc_t *sc)
416 if (sc->sc_freeeds == NULL) {
417 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
418 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
419 OHCI_ED_ALIGN, &dma);
422 for(i = 0; i < OHCI_SED_CHUNK; i++) {
423 offs = i * OHCI_SED_SIZE;
424 sed = KERNADDR(&dma, offs);
425 sed->physaddr = DMAADDR(&dma, offs);
426 sed->next = sc->sc_freeeds;
427 sc->sc_freeeds = sed;
430 sed = sc->sc_freeeds;
431 sc->sc_freeeds = sed->next;
432 memset(&sed->ed, 0, sizeof(ohci_ed_t));
438 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
440 sed->next = sc->sc_freeeds;
441 sc->sc_freeeds = sed;
445 ohci_alloc_std(ohci_softc_t *sc)
453 if (sc->sc_freetds == NULL) {
454 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
455 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
456 OHCI_TD_ALIGN, &dma);
460 for(i = 0; i < OHCI_STD_CHUNK; i++) {
461 offs = i * OHCI_STD_SIZE;
462 std = KERNADDR(&dma, offs);
463 std->physaddr = DMAADDR(&dma, offs);
464 std->nexttd = sc->sc_freetds;
465 sc->sc_freetds = std;
471 std = sc->sc_freetds;
472 sc->sc_freetds = std->nexttd;
473 memset(&std->td, 0, sizeof(ohci_td_t));
476 ohci_hash_add_td(sc, std);
483 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
488 ohci_hash_rem_td(sc, std);
489 std->nexttd = sc->sc_freetds;
490 sc->sc_freetds = std;
495 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
496 int alen, int rd, usbd_xfer_handle xfer,
497 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
499 ohci_soft_td_t *next, *cur;
500 ohci_physaddr_t dataphys;
504 usb_dma_t *dma = &xfer->dmabuf;
505 u_int16_t flags = xfer->flags;
507 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
513 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
514 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
515 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
518 next = ohci_alloc_std(sc);
522 dataphys = DMAADDR(dma, offset);
525 * The OHCI hardware can handle at most one 4k crossing.
526 * XXX - currently we only allocate contigous buffers, but
527 * the OHCI spec says: If during the data transfer the buffer
528 * address contained in the HC's working copy of
529 * CurrentBufferPointer crosses a 4K boundary, the upper 20
530 * bits of Buffer End are copied to the working value of
531 * CurrentBufferPointer causing the next buffer address to
532 * be the 0th byte in the same 4K page that contains the
533 * last byte of the buffer (the 4K boundary crossing may
534 * occur within a data packet transfer.)
536 * If/when dma has multiple segments, this will need to
537 * properly handle fragmenting TD's.
539 * We can describe the above using maxsegsz = 4k and nsegs = 2
542 if (OHCI_PAGE(dataphys) == OHCI_PAGE(DMAADDR(dma, offset +
543 len - 1)) || len - (OHCI_PAGE_SIZE -
544 OHCI_PAGE_OFFSET(dataphys)) <= OHCI_PAGE_SIZE) {
545 /* we can handle it in this TD */
548 /* XXX The calculation below is wrong and could
549 * result in a packet that is not a multiple of the
550 * MaxPacketSize in the case where the buffer does not
551 * start on an appropriate address (like for example in
552 * the case of an mbuf cluster). You'll get an early
555 /* must use multiple TDs, fill as much as possible. */
556 curlen = 2 * OHCI_PAGE_SIZE -
557 OHCI_PAGE_OFFSET(dataphys);
558 /* the length must be a multiple of the max size */
560 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
563 panic("ohci_alloc_std: curlen == 0");
566 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
567 "len=%d curlen=%d\n",
568 dataphys, len, curlen));
571 cur->td.td_flags = tdflags;
572 cur->td.td_cbp = htole32(dataphys);
574 cur->td.td_nexttd = htole32(next->physaddr);
575 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
577 cur->flags = OHCI_ADD_LEN;
579 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
580 dataphys, dataphys + curlen - 1));
584 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
586 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
590 if ((flags & USBD_FORCE_SHORT_XFER) &&
591 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
592 /* Force a 0 length transfer at the end. */
596 next = ohci_alloc_std(sc);
600 cur->td.td_flags = tdflags;
601 cur->td.td_cbp = 0; /* indicate 0 length packet */
603 cur->td.td_nexttd = htole32(next->physaddr);
608 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
612 return (USBD_NORMAL_COMPLETION);
621 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
622 ohci_soft_td_t *stdend)
626 for (; std != stdend; std = p) {
628 ohci_free_std(sc, std);
634 ohci_alloc_sitd(ohci_softc_t *sc)
636 ohci_soft_itd_t *sitd;
641 if (sc->sc_freeitds == NULL) {
642 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
643 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
644 OHCI_ITD_ALIGN, &dma);
648 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
649 offs = i * OHCI_SITD_SIZE;
650 sitd = KERNADDR(&dma, offs);
651 sitd->physaddr = DMAADDR(&dma, offs);
652 sitd->nextitd = sc->sc_freeitds;
653 sc->sc_freeitds = sitd;
659 sitd = sc->sc_freeitds;
660 sc->sc_freeitds = sitd->nextitd;
661 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
662 sitd->nextitd = NULL;
664 ohci_hash_add_itd(sc, sitd);
675 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
679 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
683 panic("ohci_free_sitd: sitd=%p not done", sitd);
686 /* Warn double free */
691 ohci_hash_rem_itd(sc, sitd);
692 sitd->nextitd = sc->sc_freeitds;
693 sc->sc_freeitds = sitd;
698 ohci_init(ohci_softc_t *sc)
700 ohci_soft_ed_t *sed, *psed;
705 DPRINTF(("ohci_init: start\n"));
706 #if defined(__OpenBSD__)
709 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
711 rev = OREAD4(sc, OHCI_REVISION);
712 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
713 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
715 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
716 printf("%s: unsupported OHCI revision\n",
717 USBDEVNAME(sc->sc_bus.bdev));
718 sc->sc_bus.usbrev = USBREV_UNKNOWN;
721 sc->sc_bus.usbrev = USBREV_1_0;
723 for (i = 0; i < OHCI_HASH_SIZE; i++)
724 LIST_INIT(&sc->sc_hash_tds[i]);
725 for (i = 0; i < OHCI_HASH_SIZE; i++)
726 LIST_INIT(&sc->sc_hash_itds[i]);
728 SIMPLEQ_INIT(&sc->sc_free_xfers);
730 /* XXX determine alignment by R/W */
731 /* Allocate the HCCA area. */
732 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
733 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
736 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
737 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
739 sc->sc_eintrs = OHCI_NORMAL_INTRS;
741 /* Allocate dummy ED that starts the control list. */
742 sc->sc_ctrl_head = ohci_alloc_sed(sc);
743 if (sc->sc_ctrl_head == NULL) {
747 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
749 /* Allocate dummy ED that starts the bulk list. */
750 sc->sc_bulk_head = ohci_alloc_sed(sc);
751 if (sc->sc_bulk_head == NULL) {
755 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
757 /* Allocate dummy ED that starts the isochronous list. */
758 sc->sc_isoc_head = ohci_alloc_sed(sc);
759 if (sc->sc_isoc_head == NULL) {
763 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
765 /* Allocate all the dummy EDs that make up the interrupt tree. */
766 for (i = 0; i < OHCI_NO_EDS; i++) {
767 sed = ohci_alloc_sed(sc);
770 ohci_free_sed(sc, sc->sc_eds[i]);
774 /* All ED fields are set to 0. */
776 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
778 psed = sc->sc_eds[(i-1) / 2];
780 psed= sc->sc_isoc_head;
782 sed->ed.ed_nexted = htole32(psed->physaddr);
785 * Fill HCCA interrupt table. The bit reversal is to get
786 * the tree set up properly to spread the interrupts.
788 for (i = 0; i < OHCI_NO_INTRS; i++)
789 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
790 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
793 if (ohcidebug > 15) {
794 for (i = 0; i < OHCI_NO_EDS; i++) {
796 ohci_dump_ed(sc->sc_eds[i]);
799 ohci_dump_ed(sc->sc_isoc_head);
803 err = ohci_controller_init(sc);
804 if (err != USBD_NORMAL_COMPLETION)
807 /* Set up the bus struct. */
808 sc->sc_bus.methods = &ohci_bus_methods;
809 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
811 #if defined(__NetBSD__) || defined(__OpenBSD__)
812 sc->sc_control = sc->sc_intre = 0;
813 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
814 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
817 usb_callout_init(sc->sc_tmo_rhsc);
819 return (USBD_NORMAL_COMPLETION);
822 for (i = 0; i < OHCI_NO_EDS; i++)
823 ohci_free_sed(sc, sc->sc_eds[i]);
825 ohci_free_sed(sc, sc->sc_isoc_head);
827 ohci_free_sed(sc, sc->sc_bulk_head);
829 ohci_free_sed(sc, sc->sc_ctrl_head);
831 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
836 ohci_controller_init(ohci_softc_t *sc)
839 u_int32_t s, ctl, ival, hcr, fm, per, desca;
841 /* Determine in what context we are running. */
842 ctl = OREAD4(sc, OHCI_CONTROL);
844 /* SMM active, request change */
845 DPRINTF(("ohci_init: SMM active, request owner change\n"));
846 s = OREAD4(sc, OHCI_COMMAND_STATUS);
847 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
848 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
849 usb_delay_ms(&sc->sc_bus, 1);
850 ctl = OREAD4(sc, OHCI_CONTROL);
852 if ((ctl & OHCI_IR) == 0) {
853 printf("%s: SMM does not respond, resetting\n",
854 USBDEVNAME(sc->sc_bus.bdev));
855 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
859 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
860 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
861 /* BIOS started controller. */
862 DPRINTF(("ohci_init: BIOS active\n"));
863 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
864 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
865 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
869 DPRINTF(("ohci_init: cold started\n"));
871 /* Controller was cold started. */
872 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
876 * This reset should not be necessary according to the OHCI spec, but
877 * without it some controllers do not start.
879 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
880 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
881 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
883 /* We now own the host controller and the bus has been reset. */
884 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
886 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
887 /* Nominal time for a reset is 10 us. */
888 for (i = 0; i < 10; i++) {
890 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
895 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
896 return (USBD_IOERROR);
903 /* The controller is now in SUSPEND state, we have 2ms to finish. */
905 /* Set up HC registers. */
906 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
907 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
908 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
909 /* disable all interrupts and then switch on all desired interrupts */
910 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
911 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
912 /* switch on desired functional features */
913 ctl = OREAD4(sc, OHCI_CONTROL);
914 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
915 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
916 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
917 /* And finally start it! */
918 OWRITE4(sc, OHCI_CONTROL, ctl);
921 * The controller is now OPERATIONAL. Set a some final
922 * registers that should be set earlier, but that the
923 * controller ignores when in the SUSPEND state.
925 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
926 fm |= OHCI_FSMPS(ival) | ival;
927 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
928 per = OHCI_PERIODIC(ival); /* 90% periodic */
929 OWRITE4(sc, OHCI_PERIODIC_START, per);
931 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
932 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
933 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
934 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
935 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
936 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
939 * The AMD756 requires a delay before re-reading the register,
940 * otherwise it will occasionally report 0 ports.
943 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
944 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
945 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
952 return (USBD_NORMAL_COMPLETION);
956 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
958 return (usb_allocmem(bus, size, 0, dma));
962 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
964 usb_freemem(bus, dma);
968 ohci_allocx(struct usbd_bus *bus)
970 struct ohci_softc *sc = (struct ohci_softc *)bus;
971 usbd_xfer_handle xfer;
973 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
975 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
977 if (xfer->busy_free != XFER_FREE) {
978 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
983 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
986 memset(xfer, 0, sizeof (struct ohci_xfer));
988 xfer->busy_free = XFER_BUSY;
995 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
997 struct ohci_softc *sc = (struct ohci_softc *)bus;
998 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
999 ohci_soft_itd_t *sitd;
1001 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
1002 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
1003 sitd = sitd->nextitd)
1004 ohci_free_sitd(sc, sitd);
1008 if (xfer->busy_free != XFER_BUSY) {
1009 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1013 xfer->busy_free = XFER_FREE;
1015 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1019 * Shut down the controller when the system is going down.
1022 ohci_shutdown(void *v)
1024 ohci_softc_t *sc = v;
1026 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1027 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1031 * Handle suspend/resume.
1033 * We need to switch to polling mode here, because this routine is
1034 * called from an intterupt context. This is all right since we
1035 * are almost suspended anyway.
1038 ohci_power(int why, void *v)
1040 ohci_softc_t *sc = v;
1045 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1050 if (why != PWR_RESUME) {
1051 sc->sc_bus.use_polling++;
1052 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1053 if (sc->sc_control == 0) {
1055 * Preserve register values, in case that APM BIOS
1056 * does not recover them.
1058 sc->sc_control = ctl;
1059 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1061 ctl |= OHCI_HCFS_SUSPEND;
1062 OWRITE4(sc, OHCI_CONTROL, ctl);
1063 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1064 sc->sc_bus.use_polling--;
1066 sc->sc_bus.use_polling++;
1068 /* Some broken BIOSes never initialize Controller chip */
1069 ohci_controller_init(sc);
1072 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1073 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1075 ctl = sc->sc_control;
1077 ctl = OREAD4(sc, OHCI_CONTROL);
1078 ctl |= OHCI_HCFS_RESUME;
1079 OWRITE4(sc, OHCI_CONTROL, ctl);
1080 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1081 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1082 OWRITE4(sc, OHCI_CONTROL, ctl);
1083 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1084 sc->sc_control = sc->sc_intre = 0;
1085 sc->sc_bus.use_polling--;
1092 ohci_dumpregs(ohci_softc_t *sc)
1094 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1095 OREAD4(sc, OHCI_REVISION),
1096 OREAD4(sc, OHCI_CONTROL),
1097 OREAD4(sc, OHCI_COMMAND_STATUS)));
1098 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1099 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1100 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1101 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1102 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1103 OREAD4(sc, OHCI_HCCA),
1104 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1105 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1106 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1107 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1108 OREAD4(sc, OHCI_BULK_HEAD_ED),
1109 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1110 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1111 OREAD4(sc, OHCI_DONE_HEAD),
1112 OREAD4(sc, OHCI_FM_INTERVAL),
1113 OREAD4(sc, OHCI_FM_REMAINING)));
1114 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1115 OREAD4(sc, OHCI_FM_NUMBER),
1116 OREAD4(sc, OHCI_PERIODIC_START),
1117 OREAD4(sc, OHCI_LS_THRESHOLD)));
1118 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1119 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1120 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1121 OREAD4(sc, OHCI_RH_STATUS)));
1122 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1123 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1124 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1125 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1126 le32toh(sc->sc_hcca->hcca_frame_number),
1127 le32toh(sc->sc_hcca->hcca_done_head)));
1131 Static int ohci_intr1(ohci_softc_t *);
1136 ohci_softc_t *sc = p;
1138 if (sc == NULL || sc->sc_dying)
1141 /* If we get an interrupt while polling, then just ignore it. */
1142 if (sc->sc_bus.use_polling) {
1144 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1149 return (ohci_intr1(sc));
1153 ohci_intr1(ohci_softc_t *sc)
1155 u_int32_t intrs, eintrs;
1156 ohci_physaddr_t done;
1158 DPRINTFN(14,("ohci_intr1: enter\n"));
1160 /* In case the interrupt occurs before initialization has completed. */
1161 if (sc == NULL || sc->sc_hcca == NULL) {
1163 printf("ohci_intr: sc->sc_hcca == NULL\n");
1169 done = le32toh(sc->sc_hcca->hcca_done_head);
1171 /* The LSb of done is used to inform the HC Driver that an interrupt
1172 * condition exists for both the Done list and for another event
1173 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1174 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1175 * interrupt was caused by other than the HccaDoneHead update and the
1176 * HcInterruptStatus register needs to be accessed to determine that
1177 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1178 * update interrupt is indicated and if the LSb of done is nonzero,
1179 * then an additional interrupt event is indicated and
1180 * HcInterruptStatus should be checked to determine its cause.
1183 if (done & ~OHCI_DONE_INTRS)
1185 if (done & OHCI_DONE_INTRS) {
1186 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1187 done &= ~OHCI_DONE_INTRS;
1189 sc->sc_hcca->hcca_done_head = 0;
1191 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1193 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1197 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1198 eintrs = intrs & sc->sc_eintrs;
1202 sc->sc_bus.intr_context++;
1203 sc->sc_bus.no_intrs++;
1204 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1205 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1208 if (eintrs & OHCI_SO) {
1209 sc->sc_overrun_cnt++;
1210 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1211 printf("%s: %u scheduling overruns\n",
1212 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1213 sc->sc_overrun_cnt = 0;
1218 if (eintrs & OHCI_WDH) {
1219 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1220 usb_schedsoftintr(&sc->sc_bus);
1221 eintrs &= ~OHCI_WDH;
1223 if (eintrs & OHCI_RD) {
1224 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1225 /* XXX process resume detect */
1227 if (eintrs & OHCI_UE) {
1228 printf("%s: unrecoverable error, controller halted\n",
1229 USBDEVNAME(sc->sc_bus.bdev));
1230 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1233 if (eintrs & OHCI_RHSC) {
1234 ohci_rhsc(sc, sc->sc_intrxfer);
1236 * Disable RHSC interrupt for now, because it will be
1237 * on until the port has been reset.
1239 ohci_rhsc_able(sc, 0);
1240 /* Do not allow RHSC interrupts > 1 per second */
1241 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1242 eintrs &= ~OHCI_RHSC;
1245 sc->sc_bus.intr_context--;
1248 /* Block unprocessed interrupts. XXX */
1249 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1250 sc->sc_eintrs &= ~eintrs;
1251 printf("%s: blocking intrs 0x%x\n",
1252 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1259 ohci_rhsc_able(ohci_softc_t *sc, int on)
1261 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1263 sc->sc_eintrs |= OHCI_RHSC;
1264 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1266 sc->sc_eintrs &= ~OHCI_RHSC;
1267 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1272 ohci_rhsc_enable(void *v_sc)
1274 ohci_softc_t *sc = v_sc;
1278 ohci_rhsc_able(sc, 1);
1283 char *ohci_cc_strs[] = {
1287 "DATA_TOGGLE_MISMATCH",
1289 "DEVICE_NOT_RESPONDING",
1290 "PID_CHECK_FAILURE",
1304 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1306 ohci_soft_itd_t *sitd, *sidone, **ip;
1307 ohci_soft_td_t *std, *sdone, **p;
1309 /* Reverse the done list. */
1310 for (sdone = NULL, sidone = NULL; done != 0; ) {
1311 std = ohci_hash_find_td(sc, done);
1314 done = le32toh(std->td.td_nexttd);
1316 DPRINTFN(10,("add TD %p\n", std));
1319 sitd = ohci_hash_find_itd(sc, done);
1321 sitd->dnext = sidone;
1322 done = le32toh(sitd->itd.itd_nextitd);
1324 DPRINTFN(5,("add ITD %p\n", sitd));
1327 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1330 /* sdone & sidone now hold the done lists. */
1331 /* Put them on the already processed lists. */
1332 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1335 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1341 ohci_softintr(void *v)
1343 ohci_softc_t *sc = v;
1344 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1345 ohci_soft_td_t *std, *sdone, *stdnext;
1346 usbd_xfer_handle xfer;
1347 struct ohci_pipe *opipe;
1350 DPRINTFN(10,("ohci_softintr: enter\n"));
1352 sc->sc_bus.intr_context++;
1355 sdone = sc->sc_sdone;
1356 sc->sc_sdone = NULL;
1357 sidone = sc->sc_sidone;
1358 sc->sc_sidone = NULL;
1361 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1364 if (ohcidebug > 10) {
1365 DPRINTF(("ohci_process_done: TD done:\n"));
1366 ohci_dump_tds(sdone);
1370 for (std = sdone; std; std = stdnext) {
1372 stdnext = std->dnext;
1373 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1374 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1375 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1377 * xfer == NULL: There seems to be no xfer associated
1378 * with this TD. It is tailp that happened to end up on
1380 * flags & OHCI_TD_HANDLED: The TD has already been
1381 * handled by process_done and should not be done again.
1382 * Shouldn't happen, but some chips are broken(?).
1386 if (xfer->status == USBD_CANCELLED ||
1387 xfer->status == USBD_TIMEOUT) {
1388 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1390 /* Handled by abort routine. */
1393 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1396 if (std->td.td_cbp != 0)
1397 len -= le32toh(std->td.td_be) -
1398 le32toh(std->td.td_cbp) + 1;
1399 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1401 if (std->flags & OHCI_ADD_LEN)
1402 xfer->actlen += len;
1404 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1405 if (cc == OHCI_CC_NO_ERROR) {
1406 if (std->flags & OHCI_CALL_DONE) {
1407 xfer->status = USBD_NORMAL_COMPLETION;
1409 usb_transfer_complete(xfer);
1412 ohci_free_std(sc, std);
1415 * Endpoint is halted. First unlink all the TDs
1416 * belonging to the failed transfer, and then restart
1419 ohci_soft_td_t *p, *n;
1420 opipe = (struct ohci_pipe *)xfer->pipe;
1422 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1423 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1424 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1427 /* Mark all the TDs in the done queue for the current
1430 for (p = stdnext; p; p = p->dnext) {
1431 if (p->xfer == xfer)
1432 p->flags |= OHCI_TD_HANDLED;
1436 for (p = std; p->xfer == xfer; p = n) {
1438 ohci_free_std(sc, p);
1442 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1443 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1445 if (cc == OHCI_CC_STALL)
1446 xfer->status = USBD_STALLED;
1448 xfer->status = USBD_IOERROR;
1450 usb_transfer_complete(xfer);
1456 if (ohcidebug > 10) {
1457 DPRINTF(("ohci_softintr: ITD done:\n"));
1458 ohci_dump_itds(sidone);
1462 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1464 sitdnext = sitd->dnext;
1465 sitd->flags |= OHCI_ITD_INTFIN;
1466 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1467 sitd, xfer, xfer ? xfer->hcpriv : 0));
1470 if (xfer->status == USBD_CANCELLED ||
1471 xfer->status == USBD_TIMEOUT) {
1472 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1474 /* Handled by abort routine. */
1478 if (xfer->pipe->aborting)
1479 continue; /*Ignore.*/
1482 printf("ohci_softintr: sitd=%p is done\n", sitd);
1485 opipe = (struct ohci_pipe *)xfer->pipe;
1486 if (opipe->aborting)
1489 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1490 if (cc == OHCI_CC_NO_ERROR) {
1491 /* XXX compute length for input */
1492 if (sitd->flags & OHCI_CALL_DONE) {
1493 opipe->u.iso.inuse -= xfer->nframes;
1494 /* XXX update frlengths with actual length */
1495 /* XXX xfer->actlen = actlen; */
1496 xfer->status = USBD_NORMAL_COMPLETION;
1498 usb_transfer_complete(xfer);
1503 xfer->status = USBD_IOERROR;
1505 usb_transfer_complete(xfer);
1510 #ifdef USB_USE_SOFTINTR
1511 if (sc->sc_softwake) {
1512 sc->sc_softwake = 0;
1513 wakeup(&sc->sc_softwake);
1515 #endif /* USB_USE_SOFTINTR */
1517 sc->sc_bus.intr_context--;
1518 DPRINTFN(10,("ohci_softintr: done:\n"));
1522 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1524 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1527 if (!(xfer->rqflags & URQ_REQUEST)) {
1528 panic("ohci_device_ctrl_done: not a request");
1531 xfer->hcpriv = NULL;
1535 ohci_device_intr_done(usbd_xfer_handle xfer)
1537 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1538 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1539 ohci_soft_ed_t *sed = opipe->sed;
1540 ohci_soft_td_t *data, *tail;
1543 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1544 xfer, xfer->actlen));
1546 xfer->hcpriv = NULL;
1548 if (xfer->pipe->repeat) {
1549 data = opipe->tail.td;
1550 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1552 xfer->status = USBD_NOMEM;
1557 data->td.td_flags = htole32(
1558 OHCI_TD_IN | OHCI_TD_NOCC |
1559 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1560 if (xfer->flags & USBD_SHORT_XFER_OK)
1561 data->td.td_flags |= htole32(OHCI_TD_R);
1562 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1563 data->nexttd = tail;
1564 data->td.td_nexttd = htole32(tail->physaddr);
1565 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1567 data->len = xfer->length;
1569 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1570 xfer->hcpriv = data;
1573 sed->ed.ed_tailp = htole32(tail->physaddr);
1574 opipe->tail.td = tail;
1579 ohci_device_bulk_done(usbd_xfer_handle xfer)
1581 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1582 xfer, xfer->actlen));
1584 xfer->hcpriv = NULL;
1588 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1590 usbd_pipe_handle pipe;
1595 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1596 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1597 sc, xfer, hstatus));
1600 /* Just ignore the change. */
1606 p = KERNADDR(&xfer->dmabuf, 0);
1607 m = min(sc->sc_noport, xfer->length * 8 - 1);
1608 memset(p, 0, xfer->length);
1609 for (i = 1; i <= m; i++) {
1610 /* Pick out CHANGE bits from the status reg. */
1611 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1612 p[i/8] |= 1 << (i%8);
1614 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1615 xfer->actlen = xfer->length;
1616 xfer->status = USBD_NORMAL_COMPLETION;
1618 usb_transfer_complete(xfer);
1622 ohci_root_intr_done(usbd_xfer_handle xfer)
1624 xfer->hcpriv = NULL;
1628 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1630 xfer->hcpriv = NULL;
1634 * Wait here until controller claims to have an interrupt.
1635 * Then call ohci_intr and return. Use timeout to avoid waiting
1639 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1641 int timo = xfer->timeout;
1645 xfer->status = USBD_IN_PROGRESS;
1646 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1647 usb_delay_ms(&sc->sc_bus, 1);
1650 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1651 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1658 if (xfer->status != USBD_IN_PROGRESS)
1664 DPRINTF(("ohci_waitintr: timeout\n"));
1665 xfer->status = USBD_TIMEOUT;
1666 usb_transfer_complete(xfer);
1667 /* XXX should free TD */
1671 ohci_poll(struct usbd_bus *bus)
1673 ohci_softc_t *sc = (ohci_softc_t *)bus;
1677 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1679 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1684 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1689 ohci_device_request(usbd_xfer_handle xfer)
1691 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1692 usb_device_request_t *req = &xfer->request;
1693 usbd_device_handle dev = opipe->pipe.device;
1694 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1695 int addr = dev->address;
1696 ohci_soft_td_t *setup, *stat, *next, *tail;
1697 ohci_soft_ed_t *sed;
1703 isread = req->bmRequestType & UT_READ;
1704 len = UGETW(req->wLength);
1706 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1707 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1708 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1709 UGETW(req->wIndex), len, addr,
1710 opipe->pipe.endpoint->edesc->bEndpointAddress));
1712 setup = opipe->tail.td;
1713 stat = ohci_alloc_std(sc);
1718 tail = ohci_alloc_std(sc);
1726 opipe->u.ctl.length = len;
1728 /* Update device address and length since they may have changed
1729 during the setup of the control pipe in usbd_new_device(). */
1730 /* XXX This only needs to be done once, but it's too early in open. */
1731 /* XXXX Should not touch ED here! */
1732 sed->ed.ed_flags = htole32(
1733 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1734 OHCI_ED_SET_FA(addr) |
1735 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1739 /* Set up data transaction */
1741 ohci_soft_td_t *std = stat;
1743 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1745 stat = stat->nexttd; /* point at free TD */
1748 /* Start toggle at 1 and then use the carried toggle. */
1749 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1750 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1753 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1755 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1756 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1757 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1758 setup->nexttd = next;
1759 setup->td.td_nexttd = htole32(next->physaddr);
1760 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1764 xfer->hcpriv = setup;
1766 stat->td.td_flags = htole32(
1767 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1768 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1769 stat->td.td_cbp = 0;
1770 stat->nexttd = tail;
1771 stat->td.td_nexttd = htole32(tail->physaddr);
1773 stat->flags = OHCI_CALL_DONE;
1778 if (ohcidebug > 5) {
1779 DPRINTF(("ohci_device_request:\n"));
1781 ohci_dump_tds(setup);
1785 /* Insert ED in schedule */
1787 sed->ed.ed_tailp = htole32(tail->physaddr);
1788 opipe->tail.td = tail;
1789 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1790 if (xfer->timeout && !sc->sc_bus.use_polling) {
1791 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1792 ohci_timeout, xfer);
1797 if (ohcidebug > 20) {
1799 DPRINTF(("ohci_device_request: status=%x\n",
1800 OREAD4(sc, OHCI_COMMAND_STATUS)));
1802 printf("ctrl head:\n");
1803 ohci_dump_ed(sc->sc_ctrl_head);
1806 ohci_dump_tds(setup);
1810 return (USBD_NORMAL_COMPLETION);
1813 ohci_free_std(sc, tail);
1815 ohci_free_std(sc, stat);
1821 * Add an ED to the schedule. Called at splusb().
1824 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1826 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1829 sed->next = head->next;
1830 sed->ed.ed_nexted = head->ed.ed_nexted;
1832 head->ed.ed_nexted = htole32(sed->physaddr);
1836 * Remove an ED from the schedule. Called at splusb().
1839 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1846 for (p = head; p != NULL && p->next != sed; p = p->next)
1849 panic("ohci_rem_ed: ED not found");
1850 p->next = sed->next;
1851 p->ed.ed_nexted = sed->ed.ed_nexted;
1855 * When a transfer is completed the TD is added to the done queue by
1856 * the host controller. This queue is the processed by software.
1857 * Unfortunately the queue contains the physical address of the TD
1858 * and we have no simple way to translate this back to a kernel address.
1859 * To make the translation possible (and fast) we use a hash table of
1860 * TDs currently in the schedule. The physical address is used as the
1864 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1865 /* Called at splusb() */
1867 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1869 int h = HASH(std->physaddr);
1873 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1876 /* Called at splusb() */
1878 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1882 LIST_REMOVE(std, hnext);
1886 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1889 ohci_soft_td_t *std;
1891 /* if these are present they should be masked out at an earlier
1894 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1895 USBDEVNAME(sc->sc_bus.bdev),
1896 (int) a, "\20\1HALT\2TOGGLE"));
1898 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1900 std = LIST_NEXT(std, hnext))
1901 if (std->physaddr == a)
1904 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1905 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1909 /* Called at splusb() */
1911 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1913 int h = HASH(sitd->physaddr);
1917 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1918 sitd, (u_long)sitd->physaddr));
1920 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1923 /* Called at splusb() */
1925 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1929 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1930 sitd, (u_long)sitd->physaddr));
1932 LIST_REMOVE(sitd, hnext);
1936 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1939 ohci_soft_itd_t *sitd;
1941 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1943 sitd = LIST_NEXT(sitd, hnext))
1944 if (sitd->physaddr == a)
1950 ohci_timeout(void *addr)
1952 struct ohci_xfer *oxfer = addr;
1953 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1954 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1956 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1959 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1963 /* Execute the abort in a process context. */
1964 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1965 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1969 ohci_timeout_task(void *addr)
1971 usbd_xfer_handle xfer = addr;
1974 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1977 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1983 ohci_dump_tds(ohci_soft_td_t *std)
1985 for (; std; std = std->nexttd)
1990 ohci_dump_td(ohci_soft_td_t *std)
1994 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1995 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1996 sbuf, sizeof(sbuf));
1998 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1999 "nexttd=0x%08lx be=0x%08lx\n",
2000 std, (u_long)std->physaddr, sbuf,
2001 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2002 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2003 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2004 (u_long)le32toh(std->td.td_cbp),
2005 (u_long)le32toh(std->td.td_nexttd),
2006 (u_long)le32toh(std->td.td_be));
2010 ohci_dump_itd(ohci_soft_itd_t *sitd)
2014 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2015 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2016 sitd, (u_long)sitd->physaddr,
2017 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2018 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2019 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2020 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2021 (u_long)le32toh(sitd->itd.itd_bp0),
2022 (u_long)le32toh(sitd->itd.itd_nextitd),
2023 (u_long)le32toh(sitd->itd.itd_be));
2024 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2025 printf("offs[%d]=0x%04x ", i,
2026 (u_int)le16toh(sitd->itd.itd_offset[i]));
2031 ohci_dump_itds(ohci_soft_itd_t *sitd)
2033 for (; sitd; sitd = sitd->nextitd)
2034 ohci_dump_itd(sitd);
2038 ohci_dump_ed(ohci_soft_ed_t *sed)
2040 char sbuf[128], sbuf2[128];
2042 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2043 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2044 sbuf, sizeof(sbuf));
2045 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2046 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2048 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2049 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2050 sed, (u_long)sed->physaddr,
2051 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2052 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2053 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2054 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2055 (u_long)le32toh(sed->ed.ed_headp),
2056 (u_long)le32toh(sed->ed.ed_nexted));
2061 ohci_open(usbd_pipe_handle pipe)
2063 usbd_device_handle dev = pipe->device;
2064 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2065 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2066 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2067 u_int8_t addr = dev->address;
2068 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2069 ohci_soft_ed_t *sed;
2070 ohci_soft_td_t *std;
2071 ohci_soft_itd_t *sitd;
2072 ohci_physaddr_t tdphys;
2078 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2079 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2082 return (USBD_IOERROR);
2087 if (addr == sc->sc_addr) {
2088 switch (ed->bEndpointAddress) {
2089 case USB_CONTROL_ENDPOINT:
2090 pipe->methods = &ohci_root_ctrl_methods;
2092 case UE_DIR_IN | OHCI_INTR_ENDPT:
2093 pipe->methods = &ohci_root_intr_methods;
2096 return (USBD_INVAL);
2099 sed = ohci_alloc_sed(sc);
2103 if (xfertype == UE_ISOCHRONOUS) {
2104 sitd = ohci_alloc_sitd(sc);
2107 opipe->tail.itd = sitd;
2108 opipe->aborting = 0;
2109 tdphys = sitd->physaddr;
2110 fmt = OHCI_ED_FORMAT_ISO;
2111 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2112 fmt |= OHCI_ED_DIR_IN;
2114 fmt |= OHCI_ED_DIR_OUT;
2116 std = ohci_alloc_std(sc);
2119 opipe->tail.td = std;
2120 tdphys = std->physaddr;
2121 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2123 sed->ed.ed_flags = htole32(
2124 OHCI_ED_SET_FA(addr) |
2125 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2126 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2128 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2129 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2133 pipe->methods = &ohci_device_ctrl_methods;
2134 err = usb_allocmem(&sc->sc_bus,
2135 sizeof(usb_device_request_t),
2136 0, &opipe->u.ctl.reqdma);
2140 ohci_add_ed(sed, sc->sc_ctrl_head);
2144 pipe->methods = &ohci_device_intr_methods;
2145 ival = pipe->interval;
2146 if (ival == USBD_DEFAULT_INTERVAL)
2147 ival = ed->bInterval;
2148 return (ohci_device_setintr(sc, opipe, ival));
2149 case UE_ISOCHRONOUS:
2150 pipe->methods = &ohci_device_isoc_methods;
2151 return (ohci_setup_isoc(pipe));
2153 pipe->methods = &ohci_device_bulk_methods;
2155 ohci_add_ed(sed, sc->sc_bulk_head);
2160 return (USBD_NORMAL_COMPLETION);
2164 ohci_free_std(sc, std);
2167 ohci_free_sed(sc, sed);
2169 return (USBD_NOMEM);
2174 * Close a reqular pipe.
2175 * Assumes that there are no pending transactions.
2178 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2180 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2181 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2182 ohci_soft_ed_t *sed = opipe->sed;
2187 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2188 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2189 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2190 ohci_soft_td_t *std;
2191 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2192 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2193 "tl=0x%x pipe=%p, std=%p\n", sed,
2194 (int)le32toh(sed->ed.ed_headp),
2195 (int)le32toh(sed->ed.ed_tailp),
2198 usbd_dump_pipe(&opipe->pipe);
2205 usb_delay_ms(&sc->sc_bus, 2);
2206 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2207 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2208 printf("ohci_close_pipe: pipe still not empty\n");
2211 ohci_rem_ed(sed, head);
2212 /* Make sure the host controller is not touching this ED */
2213 usb_delay_ms(&sc->sc_bus, 1);
2215 ohci_free_sed(sc, opipe->sed);
2219 * Abort a device request.
2220 * If this routine is called at splusb() it guarantees that the request
2221 * will be removed from the hardware scheduling and that the callback
2222 * for it will be called with USBD_CANCELLED status.
2223 * It's impossible to guarantee that the requested transfer will not
2224 * have happened since the hardware runs concurrently.
2225 * If the transaction has already happened we rely on the ordinary
2226 * interrupt processing to process it.
2229 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2231 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2232 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2233 ohci_soft_ed_t *sed = opipe->sed;
2234 ohci_soft_td_t *p, *n;
2235 ohci_physaddr_t headp;
2238 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2241 /* If we're dying, just do the software part. */
2243 xfer->status = status; /* make software ignore it */
2244 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2245 usb_transfer_complete(xfer);
2249 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2250 panic("ohci_abort_xfer: not in process context");
2253 * Step 1: Make interrupt routine and hardware ignore xfer.
2256 xfer->status = status; /* make software ignore it */
2257 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2259 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2260 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2263 * Step 2: Wait until we know hardware has finished any possible
2264 * use of the xfer. Also make sure the soft interrupt routine
2267 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2269 #ifdef USB_USE_SOFTINTR
2270 sc->sc_softwake = 1;
2271 #endif /* USB_USE_SOFTINTR */
2272 usb_schedsoftintr(&sc->sc_bus);
2273 #ifdef USB_USE_SOFTINTR
2274 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2275 #endif /* USB_USE_SOFTINTR */
2279 * Step 3: Remove any vestiges of the xfer from the hardware.
2280 * The complication here is that the hardware may have executed
2281 * beyond the xfer we're trying to abort. So as we're scanning
2282 * the TDs of this xfer we check if the hardware points to
2285 s = splusb(); /* XXX why? */
2290 printf("ohci_abort_xfer: hcpriv is NULL\n");
2295 if (ohcidebug > 1) {
2296 DPRINTF(("ohci_abort_xfer: sed=\n"));
2301 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2303 for (; p->xfer == xfer; p = n) {
2304 hit |= headp == p->physaddr;
2306 ohci_free_std(sc, p);
2308 /* Zap headp register if hardware pointed inside the xfer. */
2310 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2311 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2312 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2314 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2318 * Step 4: Turn on hardware again.
2320 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2323 * Step 5: Execute callback.
2325 usb_transfer_complete(xfer);
2331 * Data structures and routines to emulate the root hub.
2333 Static usb_device_descriptor_t ohci_devd = {
2334 USB_DEVICE_DESCRIPTOR_SIZE,
2335 UDESC_DEVICE, /* type */
2336 {0x00, 0x01}, /* USB version */
2337 UDCLASS_HUB, /* class */
2338 UDSUBCLASS_HUB, /* subclass */
2339 UDPROTO_FSHUB, /* protocol */
2340 64, /* max packet */
2341 {0},{0},{0x00,0x01}, /* device id */
2342 1,2,0, /* string indicies */
2343 1 /* # of configurations */
2346 Static usb_config_descriptor_t ohci_confd = {
2347 USB_CONFIG_DESCRIPTOR_SIZE,
2349 {USB_CONFIG_DESCRIPTOR_SIZE +
2350 USB_INTERFACE_DESCRIPTOR_SIZE +
2351 USB_ENDPOINT_DESCRIPTOR_SIZE},
2359 Static usb_interface_descriptor_t ohci_ifcd = {
2360 USB_INTERFACE_DESCRIPTOR_SIZE,
2371 Static usb_endpoint_descriptor_t ohci_endpd = {
2372 USB_ENDPOINT_DESCRIPTOR_SIZE,
2374 UE_DIR_IN | OHCI_INTR_ENDPT,
2376 {8, 0}, /* max packet */
2380 Static usb_hub_descriptor_t ohci_hubd = {
2381 USB_HUB_DESCRIPTOR_SIZE,
2391 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2397 p->bLength = 2 * strlen(s) + 2;
2400 p->bDescriptorType = UDESC_STRING;
2402 for (i = 0; s[i] && l > 1; i++, l -= 2)
2403 USETW2(p->bString[i], 0, s[i]);
2408 * Simulate a hardware hub by handling all the necessary requests.
2411 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2415 /* Insert last in queue. */
2416 err = usb_insert_transfer(xfer);
2420 /* Pipe isn't running, start first */
2421 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2425 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2427 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2428 usb_device_request_t *req;
2431 int s, len, value, index, l, totlen = 0;
2432 usb_port_status_t ps;
2433 usb_hub_descriptor_t hubd;
2438 return (USBD_IOERROR);
2441 if (!(xfer->rqflags & URQ_REQUEST))
2443 return (USBD_INVAL);
2445 req = &xfer->request;
2447 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2448 req->bmRequestType, req->bRequest));
2450 len = UGETW(req->wLength);
2451 value = UGETW(req->wValue);
2452 index = UGETW(req->wIndex);
2455 buf = KERNADDR(&xfer->dmabuf, 0);
2457 #define C(x,y) ((x) | ((y) << 8))
2458 switch(C(req->bRequest, req->bmRequestType)) {
2459 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2460 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2461 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2463 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2464 * for the integrated root hub.
2467 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2469 *(u_int8_t *)buf = sc->sc_conf;
2473 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2474 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2475 switch(value >> 8) {
2477 if ((value & 0xff) != 0) {
2481 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2482 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2483 memcpy(buf, &ohci_devd, l);
2486 if ((value & 0xff) != 0) {
2490 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2491 memcpy(buf, &ohci_confd, l);
2492 buf = (char *)buf + l;
2494 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2496 memcpy(buf, &ohci_ifcd, l);
2497 buf = (char *)buf + l;
2499 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2501 memcpy(buf, &ohci_endpd, l);
2506 *(u_int8_t *)buf = 0;
2508 switch (value & 0xff) {
2509 case 1: /* Vendor */
2510 totlen = ohci_str(buf, len, sc->sc_vendor);
2512 case 2: /* Product */
2513 totlen = ohci_str(buf, len, "OHCI root hub");
2522 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2524 *(u_int8_t *)buf = 0;
2528 case C(UR_GET_STATUS, UT_READ_DEVICE):
2530 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2534 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2535 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2537 USETW(((usb_status_t *)buf)->wStatus, 0);
2541 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2542 if (value >= USB_MAX_DEVICES) {
2546 sc->sc_addr = value;
2548 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2549 if (value != 0 && value != 1) {
2553 sc->sc_conf = value;
2555 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2557 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2558 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2559 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2562 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2564 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2567 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2569 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2570 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2571 "port=%d feature=%d\n",
2573 if (index < 1 || index > sc->sc_noport) {
2577 port = OHCI_RH_PORT_STATUS(index);
2579 case UHF_PORT_ENABLE:
2580 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2582 case UHF_PORT_SUSPEND:
2583 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2585 case UHF_PORT_POWER:
2586 /* Yes, writing to the LOW_SPEED bit clears power. */
2587 OWRITE4(sc, port, UPS_LOW_SPEED);
2589 case UHF_C_PORT_CONNECTION:
2590 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2592 case UHF_C_PORT_ENABLE:
2593 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2595 case UHF_C_PORT_SUSPEND:
2596 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2598 case UHF_C_PORT_OVER_CURRENT:
2599 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2601 case UHF_C_PORT_RESET:
2602 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2609 case UHF_C_PORT_CONNECTION:
2610 case UHF_C_PORT_ENABLE:
2611 case UHF_C_PORT_SUSPEND:
2612 case UHF_C_PORT_OVER_CURRENT:
2613 case UHF_C_PORT_RESET:
2614 /* Enable RHSC interrupt if condition is cleared. */
2615 if ((OREAD4(sc, port) >> 16) == 0)
2616 ohci_rhsc_able(sc, 1);
2622 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2623 if ((value & 0xff) != 0) {
2627 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2629 hubd.bNbrPorts = sc->sc_noport;
2630 USETW(hubd.wHubCharacteristics,
2631 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2632 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2633 /* XXX overcurrent */
2635 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2636 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2637 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2638 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2639 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2640 l = min(len, hubd.bDescLength);
2642 memcpy(buf, &hubd, l);
2644 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2649 memset(buf, 0, len); /* ? XXX */
2652 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2653 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2655 if (index < 1 || index > sc->sc_noport) {
2663 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2664 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2666 USETW(ps.wPortStatus, v);
2667 USETW(ps.wPortChange, v >> 16);
2668 l = min(len, sizeof ps);
2669 memcpy(buf, &ps, l);
2672 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2675 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2677 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2678 if (index < 1 || index > sc->sc_noport) {
2682 port = OHCI_RH_PORT_STATUS(index);
2684 case UHF_PORT_ENABLE:
2685 OWRITE4(sc, port, UPS_PORT_ENABLED);
2687 case UHF_PORT_SUSPEND:
2688 OWRITE4(sc, port, UPS_SUSPEND);
2690 case UHF_PORT_RESET:
2691 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2693 OWRITE4(sc, port, UPS_RESET);
2694 for (i = 0; i < 5; i++) {
2695 usb_delay_ms(&sc->sc_bus,
2696 USB_PORT_ROOT_RESET_DELAY);
2701 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2704 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2705 index, OREAD4(sc, port)));
2707 case UHF_PORT_POWER:
2708 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2710 OWRITE4(sc, port, UPS_PORT_POWER);
2721 xfer->actlen = totlen;
2722 err = USBD_NORMAL_COMPLETION;
2726 usb_transfer_complete(xfer);
2728 return (USBD_IN_PROGRESS);
2731 /* Abort a root control request. */
2733 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2735 /* Nothing to do, all transfers are synchronous. */
2738 /* Close the root pipe. */
2740 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2742 DPRINTF(("ohci_root_ctrl_close\n"));
2743 /* Nothing to do. */
2747 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2751 /* Insert last in queue. */
2752 err = usb_insert_transfer(xfer);
2756 /* Pipe isn't running, start first */
2757 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2761 ohci_root_intr_start(usbd_xfer_handle xfer)
2763 usbd_pipe_handle pipe = xfer->pipe;
2764 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2767 return (USBD_IOERROR);
2769 sc->sc_intrxfer = xfer;
2771 return (USBD_IN_PROGRESS);
2774 /* Abort a root interrupt request. */
2776 ohci_root_intr_abort(usbd_xfer_handle xfer)
2780 if (xfer->pipe->intrxfer == xfer) {
2781 DPRINTF(("ohci_root_intr_abort: remove\n"));
2782 xfer->pipe->intrxfer = NULL;
2784 xfer->status = USBD_CANCELLED;
2786 usb_transfer_complete(xfer);
2790 /* Close the root pipe. */
2792 ohci_root_intr_close(usbd_pipe_handle pipe)
2794 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2796 DPRINTF(("ohci_root_intr_close\n"));
2798 sc->sc_intrxfer = NULL;
2801 /************************/
2804 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2808 /* Insert last in queue. */
2809 err = usb_insert_transfer(xfer);
2813 /* Pipe isn't running, start first */
2814 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2818 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2820 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2824 return (USBD_IOERROR);
2827 if (!(xfer->rqflags & URQ_REQUEST)) {
2829 printf("ohci_device_ctrl_transfer: not a request\n");
2830 return (USBD_INVAL);
2834 err = ohci_device_request(xfer);
2838 if (sc->sc_bus.use_polling)
2839 ohci_waitintr(sc, xfer);
2840 return (USBD_IN_PROGRESS);
2843 /* Abort a device control request. */
2845 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2847 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2848 ohci_abort_xfer(xfer, USBD_CANCELLED);
2851 /* Close a device control pipe. */
2853 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2855 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2856 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2858 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2859 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2860 ohci_free_std(sc, opipe->tail.td);
2863 /************************/
2866 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2868 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2870 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2874 ohci_noop(usbd_pipe_handle pipe)
2879 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2883 /* Insert last in queue. */
2884 err = usb_insert_transfer(xfer);
2888 /* Pipe isn't running, start first */
2889 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2893 ohci_device_bulk_start(usbd_xfer_handle xfer)
2895 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2896 usbd_device_handle dev = opipe->pipe.device;
2897 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2898 int addr = dev->address;
2899 ohci_soft_td_t *data, *tail, *tdp;
2900 ohci_soft_ed_t *sed;
2901 int s, len, isread, endpt;
2905 return (USBD_IOERROR);
2908 if (xfer->rqflags & URQ_REQUEST) {
2910 printf("ohci_device_bulk_start: a request\n");
2911 return (USBD_INVAL);
2916 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2917 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2920 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2921 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2924 opipe->u.bulk.isread = isread;
2925 opipe->u.bulk.length = len;
2927 /* Update device address */
2928 sed->ed.ed_flags = htole32(
2929 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2930 OHCI_ED_SET_FA(addr));
2932 /* Allocate a chain of new TDs (including a new tail). */
2933 data = opipe->tail.td;
2934 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2936 /* We want interrupt at the end of the transfer. */
2937 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2938 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2939 tail->flags |= OHCI_CALL_DONE;
2940 tail = tail->nexttd; /* point at sentinel */
2945 xfer->hcpriv = data;
2947 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2948 "td_cbp=0x%08x td_be=0x%08x\n",
2949 (int)le32toh(sed->ed.ed_flags),
2950 (int)le32toh(data->td.td_flags),
2951 (int)le32toh(data->td.td_cbp),
2952 (int)le32toh(data->td.td_be)));
2955 if (ohcidebug > 5) {
2957 ohci_dump_tds(data);
2961 /* Insert ED in schedule */
2963 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2966 sed->ed.ed_tailp = htole32(tail->physaddr);
2967 opipe->tail.td = tail;
2968 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2969 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2970 if (xfer->timeout && !sc->sc_bus.use_polling) {
2971 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2972 ohci_timeout, xfer);
2976 /* This goes wrong if we are too slow. */
2977 if (ohcidebug > 10) {
2979 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2980 OREAD4(sc, OHCI_COMMAND_STATUS)));
2982 ohci_dump_tds(data);
2988 return (USBD_IN_PROGRESS);
2992 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2994 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2995 ohci_abort_xfer(xfer, USBD_CANCELLED);
2999 * Close a device bulk pipe.
3002 ohci_device_bulk_close(usbd_pipe_handle pipe)
3004 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3005 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3007 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3008 ohci_close_pipe(pipe, sc->sc_bulk_head);
3009 ohci_free_std(sc, opipe->tail.td);
3012 /************************/
3015 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3019 /* Insert last in queue. */
3020 err = usb_insert_transfer(xfer);
3024 /* Pipe isn't running, start first */
3025 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3029 ohci_device_intr_start(usbd_xfer_handle xfer)
3031 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3032 usbd_device_handle dev = opipe->pipe.device;
3033 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3034 ohci_soft_ed_t *sed = opipe->sed;
3035 ohci_soft_td_t *data, *tail;
3040 return (USBD_IOERROR);
3042 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3043 "flags=%d priv=%p\n",
3044 xfer, xfer->length, xfer->flags, xfer->priv));
3047 if (xfer->rqflags & URQ_REQUEST)
3048 panic("ohci_device_intr_transfer: a request");
3053 data = opipe->tail.td;
3054 tail = ohci_alloc_std(sc);
3056 return (USBD_NOMEM);
3059 data->td.td_flags = htole32(
3060 OHCI_TD_IN | OHCI_TD_NOCC |
3061 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3062 if (xfer->flags & USBD_SHORT_XFER_OK)
3063 data->td.td_flags |= htole32(OHCI_TD_R);
3064 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3065 data->nexttd = tail;
3066 data->td.td_nexttd = htole32(tail->physaddr);
3067 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3070 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3071 xfer->hcpriv = data;
3074 if (ohcidebug > 5) {
3075 DPRINTF(("ohci_device_intr_transfer:\n"));
3077 ohci_dump_tds(data);
3081 /* Insert ED in schedule */
3083 sed->ed.ed_tailp = htole32(tail->physaddr);
3084 opipe->tail.td = tail;
3085 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3089 * This goes horribly wrong, printing thousands of descriptors,
3090 * because false references are followed due to the fact that the
3093 if (ohcidebug > 5) {
3094 usb_delay_ms(&sc->sc_bus, 5);
3095 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3096 OREAD4(sc, OHCI_COMMAND_STATUS)));
3098 ohci_dump_tds(data);
3103 return (USBD_IN_PROGRESS);
3106 /* Abort a device control request. */
3108 ohci_device_intr_abort(usbd_xfer_handle xfer)
3110 if (xfer->pipe->intrxfer == xfer) {
3111 DPRINTF(("ohci_device_intr_abort: remove\n"));
3112 xfer->pipe->intrxfer = NULL;
3114 ohci_abort_xfer(xfer, USBD_CANCELLED);
3117 /* Close a device interrupt pipe. */
3119 ohci_device_intr_close(usbd_pipe_handle pipe)
3121 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3122 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3123 int nslots = opipe->u.intr.nslots;
3124 int pos = opipe->u.intr.pos;
3126 ohci_soft_ed_t *p, *sed = opipe->sed;
3129 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3130 pipe, nslots, pos));
3132 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3133 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3134 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3135 usb_delay_ms(&sc->sc_bus, 2);
3137 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3138 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3139 panic("%s: Intr pipe %p still has TDs queued",
3140 USBDEVNAME(sc->sc_bus.bdev), pipe);
3143 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3147 panic("ohci_device_intr_close: ED not found");
3149 p->next = sed->next;
3150 p->ed.ed_nexted = sed->ed.ed_nexted;
3153 for (j = 0; j < nslots; j++)
3154 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3156 ohci_free_std(sc, opipe->tail.td);
3157 ohci_free_sed(sc, opipe->sed);
3161 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3164 u_int npoll, slow, shigh, nslots;
3166 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3168 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3170 printf("ohci_setintr: 0 interval\n");
3171 return (USBD_INVAL);
3174 npoll = OHCI_NO_INTRS;
3175 while (npoll > ival)
3177 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3180 * We now know which level in the tree the ED must go into.
3181 * Figure out which slot has most bandwidth left over.
3187 * 8 7 8 9 10 11 12 13 14
3188 * N (N-1) .. (N-1+N-1)
3191 shigh = slow + npoll;
3192 nslots = OHCI_NO_INTRS / npoll;
3193 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3195 for (j = 0; j < nslots; j++)
3196 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3202 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3203 best, slow, shigh, bestbw));
3206 hsed = sc->sc_eds[best];
3207 sed->next = hsed->next;
3208 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3210 hsed->ed.ed_nexted = htole32(sed->physaddr);
3213 for (j = 0; j < nslots; j++)
3214 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3215 opipe->u.intr.nslots = nslots;
3216 opipe->u.intr.pos = best;
3218 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3219 return (USBD_NORMAL_COMPLETION);
3222 /***********************/
3225 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3229 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3231 /* Put it on our queue, */
3232 err = usb_insert_transfer(xfer);
3234 /* bail out on error, */
3235 if (err && err != USBD_IN_PROGRESS)
3238 /* XXX should check inuse here */
3240 /* insert into schedule, */
3241 ohci_device_isoc_enter(xfer);
3243 /* and start if the pipe wasn't running */
3245 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3251 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3253 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3254 usbd_device_handle dev = opipe->pipe.device;
3255 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3256 ohci_soft_ed_t *sed = opipe->sed;
3257 struct iso *iso = &opipe->u.iso;
3258 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3259 ohci_soft_itd_t *sitd, *nsitd;
3260 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3261 int i, ncur, nframes;
3264 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3266 iso->inuse, iso->next, xfer, xfer->nframes));
3271 if (iso->next == -1) {
3272 /* Not in use yet, schedule it a few frames ahead. */
3273 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3274 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3279 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3280 sitd = sitd->nextitd)
3281 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3284 sitd = ohci_alloc_sitd(sc);
3286 panic("cant alloc isoc");
3287 opipe->tail.itd = sitd;
3288 tdphys = sitd->physaddr;
3289 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3291 sed->ed.ed_tailp = htole32(tdphys);
3292 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3296 sitd = opipe->tail.itd;
3297 buf = DMAADDR(&xfer->dmabuf, 0);
3298 bp0 = OHCI_PAGE(buf);
3299 offs = OHCI_PAGE_OFFSET(buf);
3300 nframes = xfer->nframes;
3301 xfer->hcpriv = sitd;
3302 for (i = ncur = 0; i < nframes; i++, ncur++) {
3303 noffs = offs + xfer->frlengths[i];
3304 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3305 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3307 /* Allocate next ITD */
3308 nsitd = ohci_alloc_sitd(sc);
3309 if (nsitd == NULL) {
3311 printf("%s: isoc TD alloc failed\n",
3312 USBDEVNAME(sc->sc_bus.bdev));
3316 /* Fill current ITD */
3317 sitd->itd.itd_flags = htole32(
3319 OHCI_ITD_SET_SF(iso->next) |
3320 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3321 OHCI_ITD_SET_FC(ncur));
3322 sitd->itd.itd_bp0 = htole32(bp0);
3323 sitd->nextitd = nsitd;
3324 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3325 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3327 sitd->flags = OHCI_ITD_ACTIVE;
3330 iso->next = iso->next + ncur;
3331 bp0 = OHCI_PAGE(buf + offs);
3334 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3337 nsitd = ohci_alloc_sitd(sc);
3338 if (nsitd == NULL) {
3340 printf("%s: isoc TD alloc failed\n",
3341 USBDEVNAME(sc->sc_bus.bdev));
3344 /* Fixup last used ITD */
3345 sitd->itd.itd_flags = htole32(
3347 OHCI_ITD_SET_SF(iso->next) |
3348 OHCI_ITD_SET_DI(0) |
3349 OHCI_ITD_SET_FC(ncur));
3350 sitd->itd.itd_bp0 = htole32(bp0);
3351 sitd->nextitd = nsitd;
3352 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3353 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3355 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3357 iso->next = iso->next + ncur;
3358 iso->inuse += nframes;
3360 xfer->actlen = offs; /* XXX pretend we did it all */
3362 xfer->status = USBD_IN_PROGRESS;
3364 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3367 if (ohcidebug > 5) {
3368 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3369 le32toh(sc->sc_hcca->hcca_frame_number)));
3370 ohci_dump_itds(xfer->hcpriv);
3376 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3377 opipe->tail.itd = nsitd;
3378 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3382 if (ohcidebug > 5) {
3384 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3385 le32toh(sc->sc_hcca->hcca_frame_number)));
3386 ohci_dump_itds(xfer->hcpriv);
3393 ohci_device_isoc_start(usbd_xfer_handle xfer)
3395 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3396 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3397 ohci_soft_ed_t *sed;
3400 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3403 return (USBD_IOERROR);
3406 if (xfer->status != USBD_IN_PROGRESS)
3407 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3410 /* XXX anything to do? */
3413 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3414 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3417 return (USBD_IN_PROGRESS);
3421 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3423 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3424 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3425 ohci_soft_ed_t *sed;
3426 ohci_soft_itd_t *sitd, *tmp_sitd;
3427 int s,undone,num_sitds;
3430 opipe->aborting = 1;
3432 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3434 /* Transfer is already done. */
3435 if (xfer->status != USBD_NOT_STARTED &&
3436 xfer->status != USBD_IN_PROGRESS) {
3438 printf("ohci_device_isoc_abort: early return\n");
3442 /* Give xfer the requested abort code. */
3443 xfer->status = USBD_CANCELLED;
3446 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3449 sitd = xfer->hcpriv;
3453 printf("ohci_device_isoc_abort: hcpriv==0\n");
3457 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3460 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3468 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3469 * take a usb 1ms cycle. Conservatively wait for it to drain.
3470 * Even with DMA done, it can take awhile for the "batch"
3471 * delivery of completion interrupts to occur thru the controller.
3475 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3478 tmp_sitd = xfer->hcpriv;
3479 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3480 tmp_sitd = tmp_sitd->nextitd) {
3481 if (OHCI_CC_NO_ERROR ==
3482 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3483 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3484 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3487 } while( undone != 0 );
3493 usb_transfer_complete(xfer);
3497 * Only if there is a `next' sitd in next xfer...
3498 * unlink this xfer's sitds.
3500 sed->ed.ed_headp = htole32(sitd->physaddr);
3502 sed->ed.ed_headp = 0;
3504 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3510 ohci_device_isoc_done(usbd_xfer_handle xfer)
3512 /* This null routine corresponds to non-isoc "done()" routines
3513 * that free the stds associated with an xfer after a completed
3514 * xfer interrupt. However, in the case of isoc transfers, the
3515 * sitds associated with the transfer have already been processed
3516 * and reallocated for the next iteration by
3517 * "ohci_device_isoc_transfer()".
3519 * Routine "usb_transfer_complete()" is called at the end of every
3520 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3521 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3522 * pipeline by setting up the next transfer iteration) and 2) then
3523 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3524 * working for the ohci usb because this routine was trashing the
3525 * xfer set up for the next iteration (thus, only the first
3526 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3527 * this could all be re-factored, but that's another pass...
3532 ohci_setup_isoc(usbd_pipe_handle pipe)
3534 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3535 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3536 struct iso *iso = &opipe->u.iso;
3543 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3546 return (USBD_NORMAL_COMPLETION);
3550 ohci_device_isoc_close(usbd_pipe_handle pipe)
3552 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3553 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3554 ohci_soft_ed_t *sed;
3556 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3559 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3561 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3563 /* up to NISOREQs xfers still outstanding. */
3566 opipe->tail.itd->isdone = 1;
3568 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/