2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 Andrew Moore, Talke Studio
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93
35 * $FreeBSD: src/sys/amd64/include/ieeefp.h,v 1.11 2003/11/08 04:39:22 peter Exp $
38 #ifndef _CPU_IEEEFP_H_
39 #define _CPU_IEEEFP_H_
42 * IEEE floating point type, constant and function definitions.
43 * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
50 FP_RN=0, /* round to nearest */
51 FP_RM, /* round down towards minus infinity */
52 FP_RP, /* round up towards plus infinity */
57 * Precision (i.e., rounding precision) modes.
60 FP_PS=0, /* 24 bit (single-precision) */
61 FP_PRS, /* reserved */
62 FP_PD, /* 53 bit (double-precision) */
63 FP_PE /* 64 bit (extended-precision) */
66 #define fp_except_t int
69 * Exception bit masks.
71 #define FP_X_INV 0x01 /* invalid operation */
72 #define FP_X_DNML 0x02 /* denormal */
73 #define FP_X_DZ 0x04 /* zero divide */
74 #define FP_X_OFL 0x08 /* overflow */
75 #define FP_X_UFL 0x10 /* underflow */
76 #define FP_X_IMP 0x20 /* (im)precision */
77 #define FP_X_STK 0x40 /* stack fault */
80 * FPU control word bit-field masks.
82 #define FP_MSKS_FLD 0x3f /* exception masks field */
83 #define FP_PRC_FLD 0x300 /* precision control field */
84 #define FP_RND_FLD 0xc00 /* rounding control field */
87 * FPU status word bit-field masks.
89 #define FP_STKY_FLD 0x3f /* sticky flags field */
92 * SSE mxcsr register bit-field masks.
94 #define SSE_STKY_FLD 0x3f /* exception flags */
95 #define SSE_DAZ_FLD 0x40 /* Denormals are zero */
96 #define SSE_MSKS_FLD 0x1f80 /* exception masks field */
97 #define SSE_RND_FLD 0x6000 /* rounding control */
98 #define SSE_FZ_FLD 0x8000 /* flush to zero on underflow */
101 * FPU control word bit-field offsets (shift counts).
103 #define FP_MSKS_OFF 0 /* exception masks offset */
104 #define FP_PRC_OFF 8 /* precision control offset */
105 #define FP_RND_OFF 10 /* rounding control offset */
108 * FPU status word bit-field offsets (shift counts).
110 #define FP_STKY_OFF 0 /* sticky flags offset */
113 * SSE mxcsr register bit-field offsets (shift counts).
115 #define SSE_STKY_OFF 0 /* exception flags offset */
116 #define SSE_DAZ_OFF 6 /* DAZ exception mask offset */
117 #define SSE_MSKS_OFF 7 /* other exception masks offset */
118 #define SSE_RND_OFF 13 /* rounding control offset */
119 #define SSE_FZ_OFF 15 /* flush to zero offset */
121 #if defined(__GNUC__) && !defined(__cplusplus)
123 #define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr)))
124 #define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr)))
125 #define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
126 #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
127 #define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
128 #define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
129 #define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr)))
132 * Load the control word. Be careful not to trap if there is a currently
133 * unmasked exception (ones that will become freshly unmasked are not a
134 * problem). This case must be handled by a save/restore of the
135 * environment or even of the full x87 state. Accessing the environment
136 * is very inefficient, so only do it when necessary.
139 __fnldcw(unsigned short _cw, unsigned short _newcw)
147 if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
149 if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
160 * General notes about conflicting SSE vs FP status bits.
161 * This code assumes that software will not fiddle with the control
162 * bits of the SSE and x87 in such a way to get them out of sync and
163 * still expect this to work. Break this at your peril.
164 * Because I based this on the i386 port, the x87 state is used for
165 * the fpget*() functions, and is shadowed into the SSE state for
166 * the fpset*() functions. For dual source fpget*() functions, I
167 * merge the two together. I think.
170 static __inline fp_rnd_t
176 return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF));
179 static __inline fp_rnd_t
180 __fpsetround(fp_rnd_t _m)
184 unsigned short _cw, _newcw;
187 _p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF);
188 _newcw = _cw & ~FP_RND_FLD;
189 _newcw |= (_m << FP_RND_OFF) & FP_RND_FLD;
190 __fnldcw(_cw, _newcw);
192 _mxcsr &= ~SSE_RND_FLD;
193 _mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD;
199 * Get or set the rounding precision for x87 arithmetic operations.
200 * There is no equivalent SSE mode or control.
203 static __inline fp_prec_t
209 return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF));
212 static __inline fp_prec_t
213 __fpsetprec(fp_prec_t _m)
216 unsigned short _cw, _newcw;
219 _p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF);
220 _newcw = _cw & ~FP_PRC_FLD;
221 _newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD;
222 __fnldcw(_cw, _newcw);
227 * Get or set the exception mask.
228 * Note that the x87 mask bits are inverted by the API -- a mask bit of 1
229 * means disable for x87 and SSE, but for fp*mask() it means enable.
232 static __inline fp_except_t
238 return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF);
241 static __inline fp_except_t
242 __fpsetmask(fp_except_t _m)
246 unsigned short _cw, _newcw;
249 _p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF;
250 _newcw = _cw & ~FP_MSKS_FLD;
251 _newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD;
252 __fnldcw(_cw, _newcw);
254 /* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */
255 _mxcsr &= ~SSE_MSKS_FLD;
256 _mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD;
261 static __inline fp_except_t
264 unsigned _ex, _mxcsr;
268 _ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF;
270 _ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF;
271 return ((fp_except_t)_ex);
274 #endif /* __GNUC__ && !__cplusplus */
276 #if !defined(__IEEEFP_NOINLINES__) && !defined(__cplusplus) && defined(__GNUC__)
278 #define fpgetmask() __fpgetmask()
279 #define fpgetprec() __fpgetprec()
280 #define fpgetround() __fpgetround()
281 #define fpgetsticky() __fpgetsticky()
282 #define fpsetmask(m) __fpsetmask(m)
283 #define fpsetprec(m) __fpsetprec(m)
284 #define fpsetround(m) __fpsetround(m)
286 /* Suppress prototypes in the MI header. */
287 #define _IEEEFP_INLINED_ 1
289 #else /* !__IEEEFP_NOINLINES__ && !__cplusplus && __GNUC__ */
291 /* Augment the userland declarations. */
293 fp_prec_t fpgetprec(void);
294 fp_prec_t fpsetprec(fp_prec_t);
297 #endif /* !__IEEEFP_NOINLINES__ && !__cplusplus && __GNUC__ */
299 #endif /* !_CPU_IEEEFP_H_ */