1 /* $NetBSD: est.c,v 1.25 2006/06/18 16:39:56 nonaka Exp $ */
3 * Copyright (c) 2003 Michael Eriksson.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * Copyright (c) 2004 The NetBSD Foundation, Inc.
30 * All rights reserved.
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 * 3. All advertising materials mentioning features or use of this software
41 * must display the following acknowledgement:
42 * This product includes software developed by the NetBSD
43 * Foundation, Inc. and its contributors.
44 * 4. Neither the name of The NetBSD Foundation nor the names of its
45 * contributors may be used to endorse or promote products derived
46 * from this software without specific prior written permission.
48 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
49 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
50 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
51 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
52 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
53 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
54 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
55 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
56 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
57 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
58 * POSSIBILITY OF SUCH DAMAGE.
62 * This is a driver for Intel's Enhanced SpeedStep Technology (EST),
63 * as implemented in Pentium M processors.
65 * Reference documentation:
67 * - IA-32 Intel Architecture Software Developer's Manual, Volume 3:
68 * System Programming Guide.
69 * Section 13.14, Enhanced Intel SpeedStep technology.
70 * Table B-2, MSRs in Pentium M Processors.
71 * http://www.intel.com/design/pentium4/manuals/253668.htm
73 * - Intel Pentium M Processor Datasheet.
74 * Table 5, Voltage and Current Specifications.
75 * http://www.intel.com/design/mobile/datashts/252612.htm
77 * - Intel Pentium M Processor on 90 nm Process with 2-MB L2 Cache Datasheet
78 * Table 3-4, 3-5, 3-6, Voltage and Current Specifications.
79 * http://www.intel.com/design/mobile/datashts/302189.htm
81 * - Linux cpufreq patches, speedstep-centrino.c.
82 * Encoding of MSR_PERF_CTL and MSR_PERF_STATUS.
83 * http://www.codemonkey.org.uk/projects/cpufreq/cpufreq-2.4.22-pre6-1.gz
85 * ACPI objects: _PCT is MSR location, _PSS is freq/voltage, _PPC is caps.
87 * $NetBSD: est.c,v 1.25 2006/06/18 16:39:56 nonaka Exp $
90 #include <sys/param.h>
91 #include <sys/systm.h>
92 #include <sys/malloc.h>
93 #include <sys/kernel.h>
94 #include <sys/module.h>
95 #include <sys/sysctl.h>
97 #include <machine/cpu.h>
98 #include <machine/md_var.h>
99 #include <machine/specialreg.h>
107 /* Ultra Low Voltage Intel Pentium M processor 900 MHz */
108 static const struct fq_info pentium_m_900[] = {
114 /* Ultra Low Voltage Intel Pentium M processor 1.00 GHz */
115 static const struct fq_info pentium_m_1000[] = {
122 /* Low Voltage Intel Pentium M processor 1.10 GHz */
123 static const struct fq_info pentium_m_1100[] = {
131 /* Low Voltage Intel Pentium M processor 1.20 GHz */
132 static const struct fq_info pentium_m_1200[] = {
141 /* Low Voltage Intel Pentium M processor 1.30 GHz */
142 static const struct fq_info pentium_m_1300_lv[] = {
152 /* Intel Pentium M processor 1.30 GHz */
153 static const struct fq_info pentium_m_1300[] = {
161 /* Intel Pentium M processor 1.40 GHz */
162 static const struct fq_info pentium_m_1400[] = {
170 /* Intel Pentium M processor 1.50 GHz */
171 static const struct fq_info pentium_m_1500[] = {
180 /* Intel Pentium M processor 1.60 GHz */
181 static const struct fq_info pentium_m_1600[] = {
190 /* Intel Pentium M processor 1.70 GHz */
191 static const struct fq_info pentium_m_1700[] = {
200 /* Intel Pentium M processor 723 Ultra Low Voltage 1.0 GHz */
201 static const struct fq_info pentium_m_n723[] = {
208 /* Intel Pentium M processor 733 Ultra Low Voltage 1.1 GHz */
209 static const struct fq_info pentium_m_n733[] = {
217 /* Intel Pentium M processor 753 Ultra Low Voltage 1.2 GHz */
218 static const struct fq_info pentium_m_n753[] = {
227 /* Intel Pentium M processor 773 Ultra Low Voltage 1.3 GHz */
228 static const struct fq_info pentium_m_n773[] = {
238 /* Intel Pentium M processor 738 Low Voltage 1.4 GHz */
239 static const struct fq_info pentium_m_n738[] = {
250 /* Intel Pentium M processor 758 Low Voltage 1.5 GHz */
251 static const struct fq_info pentium_m_n758[] = {
263 /* Intel Pentium M processor 778 Low Voltage 1.6 GHz */
264 static const struct fq_info pentium_m_n778[] = {
277 /* Intel Pentium M processor 710 1.4 GHz */
278 static const struct fq_info pentium_m_n710[] = {
286 /* Intel Pentium M processor 715 1.5 GHz */
287 static const struct fq_info pentium_m_n715[] = {
295 /* Intel Pentium M processor 725 1.6 GHz */
296 static const struct fq_info pentium_m_n725[] = {
305 /* Intel Pentium M processor 730 1.6 GHz */
306 static const struct fq_info pentium_m_n730[] = {
314 /* Intel Pentium M processor 735 1.7 GHz */
315 static const struct fq_info pentium_m_n735[] = {
324 /* Intel Pentium M processor 740 1.73 GHz */
325 static const struct fq_info pentium_m_n740[] = {
332 /* Intel Pentium M processor 740 1.73 GHz (988-1308mV version?) */
333 static const struct fq_info pentium_m_n740_2[] = {
340 /* Intel Pentium M processor 745 1.8 GHz */
341 static const struct fq_info pentium_m_n745[] = {
351 /* Intel Pentium M processor 750 1.86 GHz */
352 /* values extracted from \_PR\NPSS (via _PSS) SDST ACPI table */
353 static const struct fq_info pentium_m_n750[] = {
361 static const struct fq_info pentium_m_n750_2[] = {
369 /* Intel Pentium M processor 755 2.0 GHz */
370 static const struct fq_info pentium_m_n755[] = {
381 /* Intel Pentium M processor 760 2.0 GHz */
382 static const struct fq_info pentium_m_n760[] = {
390 /* Intel Pentium M processor 760 2.0 GHz */
391 static const struct fq_info pentium_m_n760_2[] = {
399 /* Intel Pentium M processor 765 2.1 GHz */
400 static const struct fq_info pentium_m_n765[] = {
411 /* Intel Pentium M processor 770 2.13 GHz */
412 static const struct fq_info pentium_m_n770[] = {
423 /* Intel Pentium M processor 770 2.13 GHz */
424 static const struct fq_info pentium_m_n770_2[] = {
433 /* Intel Pentium Core Duo T2300 */
434 static const struct fq_info pentium_core_duo_t2300[] = {
445 static const struct fq_info pentium_core2_duo_t7500[] = {
453 const char *brand_tag;
456 const struct fq_info *table;
457 const int fsbmult; /* in multiples of 133 MHz */
460 #define ENTRY(s, i, v, f) { s, i, sizeof(v) / sizeof((v)[0]), v, f }
461 static const struct fqlist pentium_m[] = { /* Banias */
462 ENTRY(" 900", 0x0695, pentium_m_900, 3),
463 ENTRY("1000", 0x0695, pentium_m_1000, 3),
464 ENTRY("1100", 0x0695, pentium_m_1100, 3),
465 ENTRY("1200", 0x0695, pentium_m_1200, 3),
466 ENTRY("1300", 0x0695, pentium_m_1300, 3),
467 ENTRY("1300", 0x0695, pentium_m_1300_lv, 3),
468 ENTRY("1400", 0x0695, pentium_m_1400, 3),
469 ENTRY("1500", 0x0695, pentium_m_1500, 3),
470 ENTRY("1600", 0x0695, pentium_m_1600, 3),
471 ENTRY("1700", 0x0695, pentium_m_1700, 3),
474 static const struct fqlist pentium_m_dothan[] = {
476 /* low voltage CPUs */
477 ENTRY("1.00", 0x06d8, pentium_m_n723, 3),
478 ENTRY("1.10", 0x06d6, pentium_m_n733, 3),
479 ENTRY("1.20", 0x06d8, pentium_m_n753, 3),
480 ENTRY("1.30", 0, pentium_m_n773, 3), /* does this exist? */
482 /* ultra low voltage CPUs */
483 ENTRY("1.40", 0x06d6, pentium_m_n738, 3),
484 ENTRY("1.50", 0x06d8, pentium_m_n758, 3),
485 ENTRY("1.60", 0x06d8, pentium_m_n778, 3),
487 /* 'regular' 400 MHz FSB CPUs */
488 ENTRY("1.40", 0x06d6, pentium_m_n710, 3),
489 ENTRY("1.50", 0x06d6, pentium_m_n715, 3),
490 ENTRY("1.50", 0x06d8, pentium_m_n715, 3),
491 ENTRY("1.60", 0x06d6, pentium_m_n725, 3),
492 ENTRY("1.70", 0x06d6, pentium_m_n735, 3),
493 ENTRY("1.80", 0x06d6, pentium_m_n745, 3),
494 ENTRY("2.00", 0x06d6, pentium_m_n755, 3),
495 ENTRY("2.10", 0x06d6, pentium_m_n765, 3),
497 /* 533 MHz FSB CPUs */
498 ENTRY("1.60", 0x06d8, pentium_m_n730, 4),
499 ENTRY("1.73", 0x06d8, pentium_m_n740, 4),
500 ENTRY("1.73", 0x06d8, pentium_m_n740_2, 4),
501 ENTRY("1.86", 0x06d8, pentium_m_n750, 4),
502 ENTRY("1.86", 0x06d8, pentium_m_n750_2, 4),
503 ENTRY("2.00", 0x06d8, pentium_m_n760, 4),
504 ENTRY("2.00", 0x06d8, pentium_m_n760_2, 4),
505 ENTRY("2.13", 0x06d8, pentium_m_n770, 4),
506 ENTRY("2.13", 0x06d8, pentium_m_n770_2, 4),
511 static const struct fqlist pentium_yonah[] = {
513 /* 666 MHz FSB CPUs */
514 ENTRY("1.66", 0x06e8, pentium_core_duo_t2300, 5 ),
517 static const struct fqlist pentium_merom[] = {
519 /* 800 MHz FSB CPUs */
520 ENTRY("2.20", 0x06fa, pentium_core2_duo_t7500, 6 ),
526 const char *brand_prefix;
527 const char *brand_suffix;
529 const struct fqlist *list;
532 static const struct est_cpu est_cpus[] = {
534 "Intel(R) Pentium(R) M processor ", "MHz",
539 "Intel(R) Pentium(R) M processor ", "GHz",
540 NELEM(pentium_m_dothan),
544 "Genuine Intel(R) CPU T2300 @ ", "GHz",
545 NELEM(pentium_yonah),
549 "Intel(R) Core(TM)2 Duo CPU T7500 @ ", "GHz",
550 NELEM(pentium_merom),
555 #define NESTCPUS (NELEM(est_cpus))
557 #define MSR2MV(msr) (((int) (msr) & 0xff) * 16 + 700)
558 #define MSR2MHZ(msr) (((((int) (msr) >> 8) & 0xff) * 100 * fsbmult + 1)/ 3)
559 #define MV2MSR(mv) ((((int) (mv) - 700) >> 4) & 0xff)
560 #define MHZ2MSR(mhz) (((3 * (mhz + 30) / (100 * fsbmult)) & 0xff) << 8)
561 /* XXX 30 is slop to deal with the 33.333 MHz roundoff values */
564 * Names and numbers from IA-32 System Programming Guide
565 * (not found in <machine/specialregs.h>
567 #define MSR_PERF_STATUS 0x198
568 #define MSR_PERF_CTL 0x199
570 static const struct fqlist *est_fqlist; /* not NULL if functional */
573 static const char est_desc[] = "Enhanced SpeedStep";
575 static char freqs_available[80];
578 est_sysctl_helper(SYSCTL_HANDLER_ARGS)
581 int fq, oldfq, err = 0;
584 if (est_fqlist == NULL)
587 oldfq = MSR2MHZ(rdmsr(MSR_PERF_CTL));
589 if (req->newptr != NULL) {
590 err = SYSCTL_IN(req, &fq, sizeof(fq));
595 for (i = est_fqlist->tablec - 1; i > 0; i--) {
596 if (est_fqlist->table[i].mhz >= fq)
599 fq = est_fqlist->table[i].mhz;
600 msr = (rdmsr(MSR_PERF_CTL) & ~0xffffULL) |
601 MV2MSR(est_fqlist->table[i].mv) |
602 MHZ2MSR(est_fqlist->table[i].mhz);
603 wrmsr(MSR_PERF_CTL, msr);
606 err = SYSCTL_OUT(req, &oldfq, sizeof(oldfq));
613 * Look for a CPU matching hw.model
615 static const struct fqlist *
616 findcpu(const char *hwmodel, int mv)
618 const struct est_cpu *ccpu;
619 const struct fqlist *fql;
625 for (ccpu = est_cpus; ccpu < est_cpus + NESTCPUS; ++ccpu) {
626 len = strlen(ccpu->brand_prefix);
627 if (strncmp(ccpu->brand_prefix, hwmodel, len) != 0)
630 for (i = 0; i < ccpu->listc; i++) {
631 fql = &ccpu->list[i];
632 len = strlen(fql->brand_tag);
633 if (strncmp(fql->brand_tag, tag, len) != 0 ||
634 strcmp(ccpu->brand_suffix, tag + len))
637 if (fql->cpu_id == 0 || fql->cpu_id == cpu_id) {
638 /* verify operating point is in table, because
639 CPUID + brand_tag still isn't unique. */
640 for (k = fql->tablec - 1; k >= 0; k--) {
641 if (fql->table[k].mv == mv)
651 static struct sysctl_ctx_list machdep_est_ctx;
657 int mib[] = { CTL_HW, HW_MODEL };
658 size_t modellen = sizeof(hwmodel);
659 struct sysctl_oid *oid, *leaf;
662 size_t len, freq_len;
666 if ((cpu_feature2 & CPUID2_EST) == 0) {
667 kprintf("Enhanced SpeedStep unsupported on this hardware.\n");
671 modellen = sizeof(hwmodel);
672 err = kernel_sysctl(mib, 2, hwmodel, &modellen, NULL, 0, NULL);
674 kprintf("kernel_sysctl hw.model failed\n");
678 msr = rdmsr(MSR_PERF_STATUS);
680 kprintf("%s (%d mV) ", est_desc, mv);
682 est_fqlist = findcpu(hwmodel, mv);
683 if (est_fqlist == NULL) {
684 kprintf(" - unknown CPU or operating point"
685 "(cpu_id:%#x, msr:%#jx).\n", cpu_id, (intmax_t)msr);
690 * OK, tell the user the available frequencies.
692 fsbmult = est_fqlist->fsbmult;
693 kprintf("%d MHz\n", MSR2MHZ(msr));
695 freq_len = est_fqlist->tablec * (sizeof("9999 ")-1) + 1;
696 if (freq_len >= sizeof(freqs_available)) {
697 kprintf("increase the size of freqs_available[]\n");
700 freqs_available[0] = '\0';
702 for (i = 0; i < est_fqlist->tablec; i++) {
703 len += ksnprintf(freqs_available + len, freq_len - len, "%d%s",
704 est_fqlist->table[i].mhz,
705 i < est_fqlist->tablec - 1 ? " " : "");
707 kprintf("%s frequencies available (MHz): %s\n", est_desc,
711 * Setup the sysctl sub-tree machdep.est.*
713 oid = SYSCTL_ADD_NODE(&machdep_est_ctx,
714 SYSCTL_STATIC_CHILDREN(_machdep), OID_AUTO, "est",
715 CTLFLAG_RD, NULL, "");
718 oid = SYSCTL_ADD_NODE(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
719 OID_AUTO, "frequency", CTLFLAG_RD, NULL, "");
722 leaf = SYSCTL_ADD_PROC(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
723 OID_AUTO, "target", CTLTYPE_INT | CTLFLAG_RW, NULL, 0,
724 est_sysctl_helper, "I",
725 "Target CPU frequency for Enhanced SpeedStep");
728 leaf = SYSCTL_ADD_PROC(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
729 OID_AUTO, "current", CTLTYPE_INT | CTLFLAG_RD, NULL, 0,
730 est_sysctl_helper, "I",
731 "Current CPU frequency for Enhanced SpeedStep");
734 leaf = SYSCTL_ADD_STRING(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
735 OID_AUTO, "available", CTLFLAG_RD, freqs_available,
736 sizeof(freqs_available),
737 "CPU frequencies supported by Enhanced SpeedStep");
745 est_modevh(struct module *m __unused, int what, void *arg __unused)
751 error = sysctl_ctx_init(&machdep_est_ctx);
757 error = sysctl_ctx_free(&machdep_est_ctx);
766 static moduledata_t est_mod = {
772 DECLARE_MODULE(est, est_mod, SI_BOOT2_KLD, SI_ORDER_ANY);