2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.66 2004/09/17 00:18:07 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
68 #include <sys/reboot.h>
70 #include <sys/msgbuf.h>
71 #include <sys/sysent.h>
72 #include <sys/sysctl.h>
73 #include <sys/vmmeter.h>
75 #include <sys/upcall.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
95 #include <machine/cpu.h>
96 #include <machine/reg.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/ipl.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
108 #include <machine/perfmon.h>
110 #include <machine/cputypes.h>
113 #include <bus/isa/i386/isa_device.h>
115 #include <i386/isa/intr_machdep.h>
116 #include <bus/isa/rtc.h>
117 #include <machine/vm86.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 extern void init386 (int first);
123 extern void dblfault_handler (void);
125 extern void printcpuinfo(void); /* XXX header file */
126 extern void finishidentcpu(void);
127 extern void panicifcpuunsupported(void);
128 extern void initializecpu(void);
130 static void cpu_startup (void *);
131 #ifndef CPU_DISABLE_SSE
132 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
133 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
134 #endif /* CPU_DISABLE_SSE */
136 extern void ffs_rawread_setup(void);
137 #endif /* DIRECTIO */
138 static void init_locks(void);
140 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142 int _udatasel, _ucodesel;
145 #if defined(SWTCH_OPTIM_STATS)
146 extern int swtch_optim_stats;
147 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
148 CTLFLAG_RD, &swtch_optim_stats, 0, "");
149 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
150 CTLFLAG_RD, &tlb_flush_count, 0, "");
154 static int ispc98 = 1;
156 static int ispc98 = 0;
158 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
164 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
174 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - vmstats.v_wire_count), req);
181 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
185 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
192 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
196 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
213 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
216 static int msgbuf_clear;
219 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
233 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
238 vm_paddr_t Maxmem = 0;
241 vm_paddr_t phys_avail[10];
243 /* must be 2 less so 0 0 can signal end of chunks */
244 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
246 static vm_offset_t buffer_sva, buffer_eva;
247 vm_offset_t clean_sva, clean_eva;
248 static vm_offset_t pager_sva, pager_eva;
249 static struct trapframe proc0_tf;
261 if (boothowto & RB_VERBOSE)
265 * Good {morning,afternoon,evening,night}.
267 printf("%s", version);
270 panicifcpuunsupported();
274 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
276 * Display any holes after the first chunk of extended memory.
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
283 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
285 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
286 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
292 * Allocate space for system data structures.
293 * The first available kernel virtual address is in "v".
294 * As pages of kernel virtual memory are allocated, "v" is incremented.
295 * As pages of memory are allocated and cleared,
296 * "firstaddr" is incremented.
297 * An index into the kernel page table corresponding to the
298 * virtual memory address maintained in "v" is kept in "mapaddr".
302 * Make two passes. The first pass calculates how much memory is
303 * needed and allocates it. The second pass assigns virtual
304 * addresses to the various data structures.
308 v = (caddr_t)firstaddr;
310 #define valloc(name, type, num) \
311 (name) = (type *)v; v = (caddr_t)((name)+(num))
312 #define valloclim(name, type, num, lim) \
313 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
316 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
317 * For the first 64MB of ram nominally allocate sufficient buffers to
318 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
319 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
320 * the buffer cache we limit the eventual kva reservation to
323 * factor represents the 1/4 x ram conversion.
326 int factor = 4 * BKVASIZE / 1024;
327 int kbytes = physmem * (PAGE_SIZE / 1024);
331 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
333 nbuf += (kbytes - 65536) * 2 / (factor * 5);
334 if (maxbcache && nbuf > maxbcache / BKVASIZE)
335 nbuf = maxbcache / BKVASIZE;
339 * Do not allow the buffer_map to be more then 1/2 the size of the
342 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
344 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
346 printf("Warning: nbufs capped at %d\n", nbuf);
349 nswbuf = max(min(nbuf/4, 256), 16);
351 if (nswbuf < NSWBUF_MIN)
358 valloc(swbuf, struct buf, nswbuf);
359 valloc(buf, struct buf, nbuf);
363 * End of first pass, size has been calculated so allocate memory
365 if (firstaddr == 0) {
366 size = (vm_size_t)(v - firstaddr);
367 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
369 panic("startup: no room for tables");
374 * End of second pass, addresses have been assigned
376 if ((vm_size_t)(v - firstaddr) != size)
377 panic("startup: table size inconsistency");
379 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
380 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
381 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
383 buffer_map->system_map = 1;
384 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
385 (nswbuf*MAXPHYS) + pager_map_size);
386 pager_map->system_map = 1;
387 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
388 (16*(ARG_MAX+(PAGE_SIZE*3))));
390 #if defined(USERCONFIG)
392 cninit(); /* the preferred console may have changed */
395 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
396 ptoa(vmstats.v_free_count) / 1024);
399 * Set up buffers, so they can be used to read disk labels.
402 vm_pager_bufferinit();
406 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
408 mp_start(); /* fire up the APs and APICs */
415 * Send an interrupt to process.
417 * Stack is set up to allow sigcode stored
418 * at top to call routine, followed by kcall
419 * to sigreturn routine below. After sigreturn
420 * resets the signal mask, the stack, and the
421 * frame pointer, it returns to the user
425 sendsig(catcher, sig, mask, code)
431 struct proc *p = curproc;
432 struct trapframe *regs;
433 struct sigacts *psp = p->p_sigacts;
434 struct sigframe sf, *sfp;
437 regs = p->p_md.md_regs;
438 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
440 /* save user context */
441 bzero(&sf, sizeof(struct sigframe));
442 sf.sf_uc.uc_sigmask = *mask;
443 sf.sf_uc.uc_stack = p->p_sigstk;
444 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
445 sf.sf_uc.uc_mcontext.mc_gs = rgs();
446 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
448 /* Allocate and validate space for the signal handler context. */
449 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
450 SIGISMEMBER(psp->ps_sigonstack, sig)) {
451 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
452 p->p_sigstk.ss_size - sizeof(struct sigframe));
453 p->p_sigstk.ss_flags |= SS_ONSTACK;
456 sfp = (struct sigframe *)regs->tf_esp - 1;
458 /* Translate the signal is appropriate */
459 if (p->p_sysent->sv_sigtbl) {
460 if (sig <= p->p_sysent->sv_sigsize)
461 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
464 /* Build the argument list for the signal handler. */
466 sf.sf_ucontext = (register_t)&sfp->sf_uc;
467 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
468 /* Signal handler installed with SA_SIGINFO. */
469 sf.sf_siginfo = (register_t)&sfp->sf_si;
470 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
472 /* fill siginfo structure */
473 sf.sf_si.si_signo = sig;
474 sf.sf_si.si_code = code;
475 sf.sf_si.si_addr = (void*)regs->tf_err;
478 /* Old FreeBSD-style arguments. */
479 sf.sf_siginfo = code;
480 sf.sf_addr = regs->tf_err;
481 sf.sf_ahu.sf_handler = catcher;
485 * If we're a vm86 process, we want to save the segment registers.
486 * We also change eflags to be our emulated eflags, not the actual
489 if (regs->tf_eflags & PSL_VM) {
490 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
491 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
493 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
494 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
495 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
496 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
498 if (vm86->vm86_has_vme == 0)
499 sf.sf_uc.uc_mcontext.mc_eflags =
500 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
501 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
504 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
505 * syscalls made by the signal handler. This just avoids
506 * wasting time for our lazy fixup of such faults. PSL_NT
507 * does nothing in vm86 mode, but vm86 programs can set it
508 * almost legitimately in probes for old cpu types.
510 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
514 * Copy the sigframe out to the user's stack.
516 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
518 * Something is wrong with the stack pointer.
519 * ...Kill the process.
524 regs->tf_esp = (int)sfp;
525 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
526 regs->tf_eflags &= ~PSL_T;
527 regs->tf_cs = _ucodesel;
528 regs->tf_ds = _udatasel;
529 regs->tf_es = _udatasel;
530 regs->tf_fs = _udatasel;
531 regs->tf_ss = _udatasel;
535 * sigreturn(ucontext_t *sigcntxp)
537 * System call to cleanup state after a signal
538 * has been taken. Reset signal mask and
539 * stack state from context left by sendsig (above).
540 * Return to previous pc and psl as specified by
541 * context left by sendsig. Check carefully to
542 * make sure that the user has not modified the
543 * state to gain improper privileges.
545 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
546 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
549 sigreturn(struct sigreturn_args *uap)
551 struct proc *p = curproc;
552 struct trapframe *regs;
558 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
561 regs = p->p_md.md_regs;
562 eflags = ucp->uc_mcontext.mc_eflags;
564 if (eflags & PSL_VM) {
565 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
566 struct vm86_kernel *vm86;
569 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
570 * set up the vm86 area, and we can't enter vm86 mode.
572 if (p->p_thread->td_pcb->pcb_ext == 0)
574 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
575 if (vm86->vm86_inited == 0)
578 /* go back to user mode if both flags are set */
579 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
580 trapsignal(p, SIGBUS, 0);
582 if (vm86->vm86_has_vme) {
583 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
584 (eflags & VME_USERCHANGE) | PSL_VM;
586 vm86->vm86_eflags = eflags; /* save VIF, VIP */
587 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
589 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
590 tf->tf_eflags = eflags;
591 tf->tf_vm86_ds = tf->tf_ds;
592 tf->tf_vm86_es = tf->tf_es;
593 tf->tf_vm86_fs = tf->tf_fs;
594 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
595 tf->tf_ds = _udatasel;
596 tf->tf_es = _udatasel;
597 tf->tf_fs = _udatasel;
600 * Don't allow users to change privileged or reserved flags.
603 * XXX do allow users to change the privileged flag PSL_RF.
604 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
605 * should sometimes set it there too. tf_eflags is kept in
606 * the signal context during signal handling and there is no
607 * other place to remember it, so the PSL_RF bit may be
608 * corrupted by the signal handler without us knowing.
609 * Corruption of the PSL_RF bit at worst causes one more or
610 * one less debugger trap, so allowing it is fairly harmless.
612 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
613 printf("sigreturn: eflags = 0x%x\n", eflags);
618 * Don't allow users to load a valid privileged %cs. Let the
619 * hardware check for invalid selectors, excess privilege in
620 * other selectors, invalid %eip's and invalid %esp's.
622 cs = ucp->uc_mcontext.mc_cs;
623 if (!CS_SECURE(cs)) {
624 printf("sigreturn: cs = 0x%x\n", cs);
625 trapsignal(p, SIGBUS, T_PROTFLT);
628 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
631 if (ucp->uc_mcontext.mc_onstack & 1)
632 p->p_sigstk.ss_flags |= SS_ONSTACK;
634 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
636 p->p_sigmask = ucp->uc_sigmask;
637 SIG_CANTMASK(p->p_sigmask);
642 * Stack frame on entry to function. %eax will contain the function vector,
643 * %ecx will contain the function data. flags, ecx, and eax will have
644 * already been pushed on the stack.
655 sendupcall(struct vmupcall *vu, int morepending)
657 struct proc *p = curproc;
658 struct trapframe *regs;
659 struct upcall upcall;
660 struct upc_frame upc_frame;
664 * Get the upcall data structure
666 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
667 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
670 printf("bad upcall address\n");
675 * If the data structure is already marked pending or has a critical
676 * section count, mark the data structure as pending and return
677 * without doing an upcall. vu_pending is left set.
679 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
680 if (upcall.upc_pending < vu->vu_pending) {
681 upcall.upc_pending = vu->vu_pending;
682 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
683 sizeof(upcall.upc_pending));
689 * We can run this upcall now, clear vu_pending.
691 * Bump our critical section count and set or clear the
692 * user pending flag depending on whether more upcalls are
693 * pending. The user will be responsible for calling
694 * upc_dispatch(-1) to process remaining upcalls.
697 upcall.upc_pending = morepending;
698 crit_count += TDPRI_CRIT;
699 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
700 sizeof(upcall.upc_pending));
701 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
705 * Construct a stack frame and issue the upcall
707 regs = p->p_md.md_regs;
708 upc_frame.eax = regs->tf_eax;
709 upc_frame.ecx = regs->tf_ecx;
710 upc_frame.edx = regs->tf_edx;
711 upc_frame.flags = regs->tf_eflags;
712 upc_frame.oldip = regs->tf_eip;
713 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
714 sizeof(upc_frame)) != 0) {
715 printf("bad stack on upcall\n");
717 regs->tf_eax = (register_t)vu->vu_func;
718 regs->tf_ecx = (register_t)vu->vu_data;
719 regs->tf_edx = (register_t)p->p_upcall;
720 regs->tf_eip = (register_t)vu->vu_ctx;
721 regs->tf_esp -= sizeof(upc_frame);
726 * fetchupcall occurs in the context of a system call, which means that
727 * we have to return EJUSTRETURN in order to prevent eax and edx from
728 * being overwritten by the syscall return value.
730 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
731 * and the function pointer in %eax.
734 fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
736 struct upc_frame upc_frame;
738 struct trapframe *regs;
740 struct upcall upcall;
744 regs = p->p_md.md_regs;
746 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
750 * This jumps us to the next ready context.
753 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
756 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
757 crit_count += TDPRI_CRIT;
759 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
760 regs->tf_eax = (register_t)vu->vu_func;
761 regs->tf_ecx = (register_t)vu->vu_data;
762 regs->tf_edx = (register_t)p->p_upcall;
763 regs->tf_eip = (register_t)vu->vu_ctx;
764 regs->tf_esp = (register_t)rsp;
767 * This returns us to the originally interrupted code.
769 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
770 regs->tf_eax = upc_frame.eax;
771 regs->tf_ecx = upc_frame.ecx;
772 regs->tf_edx = upc_frame.edx;
773 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
774 (upc_frame.flags & PSL_USERCHANGE);
775 regs->tf_eip = upc_frame.oldip;
776 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
785 * Machine dependent boot() routine
787 * I haven't seen anything to put here yet
788 * Possibly some stuff might be grafted back here from boot()
796 * Shutdown the CPU as much as possible
806 * cpu_idle() represents the idle LWKT. You cannot return from this function
807 * (unless you want to blow things up!). Instead we look for runnable threads
808 * and loop or halt as appropriate. Giant is not held on entry to the thread.
810 * The main loop is entered with a critical section held, we must release
811 * the critical section before doing anything else. lwkt_switch() will
812 * check for pending interrupts due to entering and exiting its own
815 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
816 * to wake a HLTed cpu up. However, there are cases where the idlethread
817 * will be entered with the possibility that no IPI will occur and in such
818 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
820 static int cpu_idle_hlt = 1;
821 static int cpu_idle_hltcnt;
822 static int cpu_idle_spincnt;
823 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
824 &cpu_idle_hlt, 0, "Idle loop HLT enable");
825 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
826 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
827 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
828 &cpu_idle_spincnt, 0, "Idle loop entry spins");
831 cpu_idle_default_hook(void)
834 * We must guarentee that hlt is exactly the instruction
837 __asm __volatile("sti; hlt");
840 /* Other subsystems (e.g., ACPI) can hook this later. */
841 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
846 struct thread *td = curthread;
849 KKASSERT(td->td_pri < TDPRI_CRIT);
852 * See if there are any LWKTs ready to go.
857 * If we are going to halt call splz unconditionally after
858 * CLIing to catch any interrupt races. Note that we are
859 * at SPL0 and interrupts are enabled.
861 if (cpu_idle_hlt && !lwkt_runnable() &&
862 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
863 __asm __volatile("cli");
868 td->td_flags &= ~TDF_IDLE_NOHLT;
870 __asm __volatile("sti");
877 * Clear registers on exec
880 setregs(p, entry, stack, ps_strings)
886 struct trapframe *regs = p->p_md.md_regs;
887 struct pcb *pcb = p->p_thread->td_pcb;
889 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
890 pcb->pcb_gs = _udatasel;
893 /* was i386_user_cleanup() in NetBSD */
896 bzero((char *)regs, sizeof(struct trapframe));
897 regs->tf_eip = entry;
898 regs->tf_esp = stack;
899 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
900 regs->tf_ss = _udatasel;
901 regs->tf_ds = _udatasel;
902 regs->tf_es = _udatasel;
903 regs->tf_fs = _udatasel;
904 regs->tf_cs = _ucodesel;
906 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
907 regs->tf_ebx = ps_strings;
910 * Reset the hardware debug registers if they were in use.
911 * They won't have any meaning for the newly exec'd process.
913 if (pcb->pcb_flags & PCB_DBREGS) {
920 if (pcb == curthread->td_pcb) {
922 * Clear the debug registers on the running
923 * CPU, otherwise they will end up affecting
924 * the next process we switch to.
928 pcb->pcb_flags &= ~PCB_DBREGS;
932 * Initialize the math emulator (if any) for the current process.
933 * Actually, just clear the bit that says that the emulator has
934 * been initialized. Initialization is delayed until the process
935 * traps to the emulator (if it is done at all) mainly because
936 * emulators don't provide an entry point for initialization.
938 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
941 * note: do not set CR0_TS here. npxinit() must do it after clearing
942 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
946 load_cr0(rcr0() | CR0_MP);
949 /* Initialize the npx (if any) for the current process. */
950 npxinit(__INITIAL_NPXCW__);
955 * note: linux emulator needs edx to be 0x0 on entry, which is
956 * handled in execve simply by setting the 64 bit syscall
967 cr0 |= CR0_NE; /* Done by npxinit() */
968 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
970 if (cpu_class != CPUCLASS_386)
972 cr0 |= CR0_WP | CR0_AM;
978 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
981 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
983 if (!error && req->newptr)
988 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
989 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
991 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
992 CTLFLAG_RW, &disable_rtc_set, 0, "");
994 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
995 CTLFLAG_RD, &bootinfo, bootinfo, "");
997 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
998 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1000 extern u_long bootdev; /* not a dev_t - encoding is different */
1001 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1002 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1005 * Initialize 386 and configure to run kernel
1009 * Initialize segments & interrupt table
1013 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1014 static struct gate_descriptor idt0[NIDT];
1015 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1016 union descriptor ldt[NLDT]; /* local descriptor table */
1018 /* table descriptors - used to load tables by cpu */
1019 struct region_descriptor r_gdt, r_idt;
1021 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1022 extern int has_f00f_bug;
1025 static struct i386tss dblfault_tss;
1026 static char dblfault_stack[PAGE_SIZE];
1028 extern struct user *proc0paddr;
1031 /* software prototypes -- in more palatable form */
1032 struct soft_segment_descriptor gdt_segs[] = {
1033 /* GNULL_SEL 0 Null Descriptor */
1034 { 0x0, /* segment base address */
1036 0, /* segment type */
1037 0, /* segment descriptor priority level */
1038 0, /* segment descriptor present */
1040 0, /* default 32 vs 16 bit size */
1041 0 /* limit granularity (byte/page units)*/ },
1042 /* GCODE_SEL 1 Code Descriptor for kernel */
1043 { 0x0, /* segment base address */
1044 0xfffff, /* length - all address space */
1045 SDT_MEMERA, /* segment type */
1046 0, /* segment descriptor priority level */
1047 1, /* segment descriptor present */
1049 1, /* default 32 vs 16 bit size */
1050 1 /* limit granularity (byte/page units)*/ },
1051 /* GDATA_SEL 2 Data Descriptor for kernel */
1052 { 0x0, /* segment base address */
1053 0xfffff, /* length - all address space */
1054 SDT_MEMRWA, /* segment type */
1055 0, /* segment descriptor priority level */
1056 1, /* segment descriptor present */
1058 1, /* default 32 vs 16 bit size */
1059 1 /* limit granularity (byte/page units)*/ },
1060 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1061 { 0x0, /* segment base address */
1062 0xfffff, /* length - all address space */
1063 SDT_MEMRWA, /* segment type */
1064 0, /* segment descriptor priority level */
1065 1, /* segment descriptor present */
1067 1, /* default 32 vs 16 bit size */
1068 1 /* limit granularity (byte/page units)*/ },
1069 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1071 0x0, /* segment base address */
1072 sizeof(struct i386tss)-1,/* length - all address space */
1073 SDT_SYS386TSS, /* segment type */
1074 0, /* segment descriptor priority level */
1075 1, /* segment descriptor present */
1077 0, /* unused - default 32 vs 16 bit size */
1078 0 /* limit granularity (byte/page units)*/ },
1079 /* GLDT_SEL 5 LDT Descriptor */
1080 { (int) ldt, /* segment base address */
1081 sizeof(ldt)-1, /* length - all address space */
1082 SDT_SYSLDT, /* segment type */
1083 SEL_UPL, /* segment descriptor priority level */
1084 1, /* segment descriptor present */
1086 0, /* unused - default 32 vs 16 bit size */
1087 0 /* limit granularity (byte/page units)*/ },
1088 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1089 { (int) ldt, /* segment base address */
1090 (512 * sizeof(union descriptor)-1), /* length */
1091 SDT_SYSLDT, /* segment type */
1092 0, /* segment descriptor priority level */
1093 1, /* segment descriptor present */
1095 0, /* unused - default 32 vs 16 bit size */
1096 0 /* limit granularity (byte/page units)*/ },
1097 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1098 { 0x0, /* segment base address */
1099 0x0, /* length - all address space */
1100 0, /* segment type */
1101 0, /* segment descriptor priority level */
1102 0, /* segment descriptor present */
1104 0, /* default 32 vs 16 bit size */
1105 0 /* limit granularity (byte/page units)*/ },
1106 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1107 { 0x400, /* segment base address */
1108 0xfffff, /* length */
1109 SDT_MEMRWA, /* segment type */
1110 0, /* segment descriptor priority level */
1111 1, /* segment descriptor present */
1113 1, /* default 32 vs 16 bit size */
1114 1 /* limit granularity (byte/page units)*/ },
1115 /* GPANIC_SEL 9 Panic Tss Descriptor */
1116 { (int) &dblfault_tss, /* segment base address */
1117 sizeof(struct i386tss)-1,/* length - all address space */
1118 SDT_SYS386TSS, /* segment type */
1119 0, /* segment descriptor priority level */
1120 1, /* segment descriptor present */
1122 0, /* unused - default 32 vs 16 bit size */
1123 0 /* limit granularity (byte/page units)*/ },
1124 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1125 { 0, /* segment base address (overwritten) */
1126 0xfffff, /* length */
1127 SDT_MEMERA, /* segment type */
1128 0, /* segment descriptor priority level */
1129 1, /* segment descriptor present */
1131 0, /* default 32 vs 16 bit size */
1132 1 /* limit granularity (byte/page units)*/ },
1133 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1134 { 0, /* segment base address (overwritten) */
1135 0xfffff, /* length */
1136 SDT_MEMERA, /* segment type */
1137 0, /* segment descriptor priority level */
1138 1, /* segment descriptor present */
1140 0, /* default 32 vs 16 bit size */
1141 1 /* limit granularity (byte/page units)*/ },
1142 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1143 { 0, /* segment base address (overwritten) */
1144 0xfffff, /* length */
1145 SDT_MEMRWA, /* segment type */
1146 0, /* segment descriptor priority level */
1147 1, /* segment descriptor present */
1149 1, /* default 32 vs 16 bit size */
1150 1 /* limit granularity (byte/page units)*/ },
1151 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1152 { 0, /* segment base address (overwritten) */
1153 0xfffff, /* length */
1154 SDT_MEMRWA, /* segment type */
1155 0, /* segment descriptor priority level */
1156 1, /* segment descriptor present */
1158 0, /* default 32 vs 16 bit size */
1159 1 /* limit granularity (byte/page units)*/ },
1160 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1161 { 0, /* segment base address (overwritten) */
1162 0xfffff, /* length */
1163 SDT_MEMRWA, /* segment type */
1164 0, /* segment descriptor priority level */
1165 1, /* segment descriptor present */
1167 0, /* default 32 vs 16 bit size */
1168 1 /* limit granularity (byte/page units)*/ },
1171 static struct soft_segment_descriptor ldt_segs[] = {
1172 /* Null Descriptor - overwritten by call gate */
1173 { 0x0, /* segment base address */
1174 0x0, /* length - all address space */
1175 0, /* segment type */
1176 0, /* segment descriptor priority level */
1177 0, /* segment descriptor present */
1179 0, /* default 32 vs 16 bit size */
1180 0 /* limit granularity (byte/page units)*/ },
1181 /* Null Descriptor - overwritten by call gate */
1182 { 0x0, /* segment base address */
1183 0x0, /* length - all address space */
1184 0, /* segment type */
1185 0, /* segment descriptor priority level */
1186 0, /* segment descriptor present */
1188 0, /* default 32 vs 16 bit size */
1189 0 /* limit granularity (byte/page units)*/ },
1190 /* Null Descriptor - overwritten by call gate */
1191 { 0x0, /* segment base address */
1192 0x0, /* length - all address space */
1193 0, /* segment type */
1194 0, /* segment descriptor priority level */
1195 0, /* segment descriptor present */
1197 0, /* default 32 vs 16 bit size */
1198 0 /* limit granularity (byte/page units)*/ },
1199 /* Code Descriptor for user */
1200 { 0x0, /* segment base address */
1201 0xfffff, /* length - all address space */
1202 SDT_MEMERA, /* segment type */
1203 SEL_UPL, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1206 1, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208 /* Null Descriptor - overwritten by call gate */
1209 { 0x0, /* segment base address */
1210 0x0, /* length - all address space */
1211 0, /* segment type */
1212 0, /* segment descriptor priority level */
1213 0, /* segment descriptor present */
1215 0, /* default 32 vs 16 bit size */
1216 0 /* limit granularity (byte/page units)*/ },
1217 /* Data Descriptor for user */
1218 { 0x0, /* segment base address */
1219 0xfffff, /* length - all address space */
1220 SDT_MEMRWA, /* segment type */
1221 SEL_UPL, /* segment descriptor priority level */
1222 1, /* segment descriptor present */
1224 1, /* default 32 vs 16 bit size */
1225 1 /* limit granularity (byte/page units)*/ },
1229 setidt(idx, func, typ, dpl, selec)
1236 struct gate_descriptor *ip;
1239 ip->gd_looffset = (int)func;
1240 ip->gd_selector = selec;
1246 ip->gd_hioffset = ((int)func)>>16 ;
1249 #define IDTVEC(name) __CONCAT(X,name)
1252 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1253 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1254 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1255 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1256 IDTVEC(xmm), IDTVEC(syscall),
1259 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall),
1260 IDTVEC(int0x82_syscall);
1262 #ifdef DEBUG_INTERRUPTS
1263 extern inthand_t *Xrsvdary[256];
1268 struct segment_descriptor *sd;
1269 struct soft_segment_descriptor *ssd;
1271 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1272 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1273 ssd->ssd_type = sd->sd_type;
1274 ssd->ssd_dpl = sd->sd_dpl;
1275 ssd->ssd_p = sd->sd_p;
1276 ssd->ssd_def32 = sd->sd_def32;
1277 ssd->ssd_gran = sd->sd_gran;
1280 #define PHYSMAP_SIZE (2 * 8)
1283 * Populate the (physmap) array with base/bound pairs describing the
1284 * available physical memory in the system, then test this memory and
1285 * build the phys_avail array describing the actually-available memory.
1287 * If we cannot accurately determine the physical memory map, then use
1288 * value from the 0xE801 call, and failing that, the RTC.
1290 * Total memory size may be set by the kernel environment variable
1291 * hw.physmem or the compile-time define MAXMEM.
1294 getmemsize(int first)
1296 int i, physmap_idx, pa_indx;
1298 u_int basemem, extmem;
1299 struct vm86frame vmf;
1300 struct vm86context vmc;
1301 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1311 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1312 bzero(&vmf, sizeof(struct vm86frame));
1313 bzero(physmap, sizeof(physmap));
1317 * Some newer BIOSes has broken INT 12H implementation which cause
1318 * kernel panic immediately. In this case, we need to scan SMAP
1319 * with INT 15:E820 first, then determine base memory size.
1321 if (hasbrokenint12) {
1326 * Perform "base memory" related probes & setup. If we get a crazy
1327 * value give the bios some scribble space just in case.
1329 vm86_intcall(0x12, &vmf);
1330 basemem = vmf.vmf_ax;
1331 if (basemem > 640) {
1332 printf("Preposterous BIOS basemem of %uK, "
1333 "truncating to < 640K\n", basemem);
1338 * XXX if biosbasemem is now < 640, there is a `hole'
1339 * between the end of base memory and the start of
1340 * ISA memory. The hole may be empty or it may
1341 * contain BIOS code or data. Map it read/write so
1342 * that the BIOS can write to it. (Memory from 0 to
1343 * the physical end of the kernel is mapped read-only
1344 * to begin with and then parts of it are remapped.
1345 * The parts that aren't remapped form holes that
1346 * remain read-only and are unused by the kernel.
1347 * The base memory area is below the physical end of
1348 * the kernel and right now forms a read-only hole.
1349 * The part of it from PAGE_SIZE to
1350 * (trunc_page(biosbasemem * 1024) - 1) will be
1351 * remapped and used by the kernel later.)
1353 * This code is similar to the code used in
1354 * pmap_mapdev, but since no memory needs to be
1355 * allocated we simply change the mapping.
1357 for (pa = trunc_page(basemem * 1024);
1358 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1359 pte = vtopte(pa + KERNBASE);
1360 *pte = pa | PG_RW | PG_V;
1364 * if basemem != 640, map pages r/w into vm86 page table so
1365 * that the bios can scribble on it.
1368 for (i = basemem / 4; i < 160; i++)
1369 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1373 * map page 1 R/W into the kernel page table so we can use it
1374 * as a buffer. The kernel will unmap this page later.
1376 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1377 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1380 * get memory map with INT 15:E820
1382 #define SMAPSIZ sizeof(*smap)
1383 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1386 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1387 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1392 vmf.vmf_eax = 0xE820;
1393 vmf.vmf_edx = SMAP_SIG;
1394 vmf.vmf_ecx = SMAPSIZ;
1395 i = vm86_datacall(0x15, &vmf, &vmc);
1396 if (i || vmf.vmf_eax != SMAP_SIG)
1398 if (boothowto & RB_VERBOSE)
1399 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1401 *(u_int32_t *)((char *)&smap->base + 4),
1402 (u_int32_t)smap->base,
1403 *(u_int32_t *)((char *)&smap->length + 4),
1404 (u_int32_t)smap->length);
1406 if (smap->type != 0x01)
1409 if (smap->length == 0)
1412 if (smap->base >= 0xffffffff) {
1413 printf("%uK of memory above 4GB ignored\n",
1414 (u_int)(smap->length / 1024));
1418 for (i = 0; i <= physmap_idx; i += 2) {
1419 if (smap->base < physmap[i + 1]) {
1420 if (boothowto & RB_VERBOSE)
1422 "Overlapping or non-montonic memory region, ignoring second region\n");
1427 if (smap->base == physmap[physmap_idx + 1]) {
1428 physmap[physmap_idx + 1] += smap->length;
1433 if (physmap_idx == PHYSMAP_SIZE) {
1435 "Too many segments in the physical address map, giving up\n");
1438 physmap[physmap_idx] = smap->base;
1439 physmap[physmap_idx + 1] = smap->base + smap->length;
1441 ; /* fix GCC3.x warning */
1442 } while (vmf.vmf_ebx != 0);
1445 * Perform "base memory" related probes & setup based on SMAP
1448 for (i = 0; i <= physmap_idx; i += 2) {
1449 if (physmap[i] == 0x00000000) {
1450 basemem = physmap[i + 1] / 1024;
1459 if (basemem > 640) {
1460 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1465 for (pa = trunc_page(basemem * 1024);
1466 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1467 pte = vtopte(pa + KERNBASE);
1468 *pte = pa | PG_RW | PG_V;
1472 for (i = basemem / 4; i < 160; i++)
1473 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1476 if (physmap[1] != 0)
1480 * If we failed above, try memory map with INT 15:E801
1482 vmf.vmf_ax = 0xE801;
1483 if (vm86_intcall(0x15, &vmf) == 0) {
1484 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1488 vm86_intcall(0x15, &vmf);
1489 extmem = vmf.vmf_ax;
1492 * Prefer the RTC value for extended memory.
1494 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1499 * Special hack for chipsets that still remap the 384k hole when
1500 * there's 16MB of memory - this really confuses people that
1501 * are trying to use bus mastering ISA controllers with the
1502 * "16MB limit"; they only have 16MB, but the remapping puts
1503 * them beyond the limit.
1505 * If extended memory is between 15-16MB (16-17MB phys address range),
1508 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1512 physmap[1] = basemem * 1024;
1514 physmap[physmap_idx] = 0x100000;
1515 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1519 * Now, physmap contains a map of physical memory.
1523 /* make hole for AP bootstrap code YYY */
1524 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1526 /* look for the MP hardware - needed for apic addresses */
1531 * Maxmem isn't the "maximum memory", it's one larger than the
1532 * highest page of the physical address space. It should be
1533 * called something like "Maxphyspage". We may adjust this
1534 * based on ``hw.physmem'' and the results of the memory test.
1536 Maxmem = atop(physmap[physmap_idx + 1]);
1539 Maxmem = MAXMEM / 4;
1543 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1544 * for the appropriate modifiers. This overrides MAXMEM.
1546 if ((cp = getenv("hw.physmem")) != NULL) {
1547 u_int64_t AllowMem, sanity;
1550 sanity = AllowMem = strtouq(cp, &ep, 0);
1551 if ((ep != cp) && (*ep != 0)) {
1564 AllowMem = sanity = 0;
1566 if (AllowMem < sanity)
1570 printf("Ignoring invalid memory size of '%s'\n", cp);
1572 Maxmem = atop(AllowMem);
1575 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1576 (boothowto & RB_VERBOSE))
1577 printf("Physical memory use set to %lluK\n", Maxmem * 4);
1580 * If Maxmem has been increased beyond what the system has detected,
1581 * extend the last memory segment to the new limit.
1583 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1584 physmap[physmap_idx + 1] = ptoa(Maxmem);
1586 /* call pmap initialization to make new kernel address space */
1587 pmap_bootstrap(first, 0);
1590 * Size up each available chunk of physical memory.
1592 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1594 phys_avail[pa_indx++] = physmap[0];
1595 phys_avail[pa_indx] = physmap[0];
1599 * physmap is in bytes, so when converting to page boundaries,
1600 * round up the start address and round down the end address.
1602 for (i = 0; i <= physmap_idx; i += 2) {
1606 if (physmap[i + 1] < end)
1607 end = trunc_page(physmap[i + 1]);
1608 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1613 int *ptr = (int *)CADDR1;
1617 * block out kernel memory as not available.
1619 if (pa >= 0x100000 && pa < first)
1625 * map page into kernel: valid, read/write,non-cacheable
1627 *pte = pa | PG_V | PG_RW | PG_N;
1632 * Test for alternating 1's and 0's
1634 *(volatile int *)ptr = 0xaaaaaaaa;
1635 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1639 * Test for alternating 0's and 1's
1641 *(volatile int *)ptr = 0x55555555;
1642 if (*(volatile int *)ptr != 0x55555555) {
1648 *(volatile int *)ptr = 0xffffffff;
1649 if (*(volatile int *)ptr != 0xffffffff) {
1655 *(volatile int *)ptr = 0x0;
1656 if (*(volatile int *)ptr != 0x0) {
1660 * Restore original value.
1665 * Adjust array of valid/good pages.
1667 if (page_bad == TRUE) {
1671 * If this good page is a continuation of the
1672 * previous set of good pages, then just increase
1673 * the end pointer. Otherwise start a new chunk.
1674 * Note that "end" points one higher than end,
1675 * making the range >= start and < end.
1676 * If we're also doing a speculative memory
1677 * test and we at or past the end, bump up Maxmem
1678 * so that we keep going. The first bad page
1679 * will terminate the loop.
1681 if (phys_avail[pa_indx] == pa) {
1682 phys_avail[pa_indx] += PAGE_SIZE;
1685 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1686 printf("Too many holes in the physical address space, giving up\n");
1690 phys_avail[pa_indx++] = pa; /* start */
1691 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1701 * The last chunk must contain at least one page plus the message
1702 * buffer to avoid complicating other code (message buffer address
1703 * calculation, etc.).
1705 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1706 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1707 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1708 phys_avail[pa_indx--] = 0;
1709 phys_avail[pa_indx--] = 0;
1712 Maxmem = atop(phys_avail[pa_indx]);
1714 /* Trim off space for the message buffer. */
1715 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1717 avail_end = phys_avail[pa_indx];
1729 * 7 Device Not Available (x87)
1731 * 9 Coprocessor Segment overrun (unsupported, reserved)
1733 * 11 Segment not present
1735 * 13 General Protection
1738 * 16 x87 FP Exception pending
1739 * 17 Alignment Check
1741 * 19 SIMD floating point
1743 * 32-255 INTn/external sources
1748 struct gate_descriptor *gdp;
1749 int gsel_tss, metadata_missing, off, x;
1750 struct mdglobaldata *gd;
1753 * Prevent lowering of the ipl if we call tsleep() early.
1755 gd = &CPU_prvspace[0].mdglobaldata;
1756 bzero(gd, sizeof(*gd));
1758 gd->mi.gd_curthread = &thread0;
1760 atdevbase = ISA_HOLE_START + KERNBASE;
1762 metadata_missing = 0;
1763 if (bootinfo.bi_modulep) {
1764 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1765 preload_bootstrap_relocate(KERNBASE);
1767 metadata_missing = 1;
1769 if (bootinfo.bi_envp)
1770 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1773 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1778 /* Init basic tunables, hz etc */
1782 * make gdt memory segments, the code segment goes up to end of the
1783 * page with etext in it, the data segment goes to the end of
1787 * XXX text protection is temporarily (?) disabled. The limit was
1788 * i386_btop(round_page(etext)) - 1.
1790 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1791 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1793 gdt_segs[GPRIV_SEL].ssd_limit =
1794 atop(sizeof(struct privatespace) - 1);
1795 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1796 gdt_segs[GPROC0_SEL].ssd_base =
1797 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1799 gd->mi.gd_prvspace = &CPU_prvspace[0];
1802 * Note: on both UP and SMP curthread must be set non-NULL
1803 * early in the boot sequence because the system assumes
1804 * that 'curthread' is never NULL.
1807 for (x = 0; x < NGDT; x++) {
1809 /* avoid overwriting db entries with APM ones */
1810 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1813 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1816 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1817 r_gdt.rd_base = (int) gdt;
1820 mi_gdinit(&gd->mi, 0);
1822 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
1823 lwkt_set_comm(&thread0, "thread0");
1824 proc0.p_addr = (void *)thread0.td_kstack;
1825 proc0.p_thread = &thread0;
1826 varsymset_init(&proc0.p_varsymset, NULL);
1827 thread0.td_flags |= TDF_RUNNING;
1828 thread0.td_proc = &proc0;
1829 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1830 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1832 /* make ldt memory segments */
1834 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1835 * should be spelled ...MAX_USER...
1837 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1838 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1839 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1840 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1842 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1844 gd->gd_currentldt = _default_ldt;
1845 /* spinlocks and the BGL */
1849 for (x = 0; x < NIDT; x++) {
1850 #ifdef DEBUG_INTERRUPTS
1851 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1853 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1856 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1857 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1858 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1859 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1860 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1861 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1862 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1863 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1864 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1865 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1866 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1867 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1868 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1869 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1870 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1871 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1872 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1873 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1874 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1875 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1876 setidt(0x80, &IDTVEC(int0x80_syscall),
1877 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1878 setidt(0x81, &IDTVEC(int0x81_syscall),
1879 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1880 setidt(0x82, &IDTVEC(int0x82_syscall),
1881 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1883 r_idt.rd_limit = sizeof(idt0) - 1;
1884 r_idt.rd_base = (int) idt;
1888 * Initialize the console before we print anything out.
1892 if (metadata_missing)
1893 printf("WARNING: loader(8) metadata is missing!\n");
1902 if (boothowto & RB_KDB)
1903 Debugger("Boot flags requested debugger");
1906 finishidentcpu(); /* Final stage of CPU initialization */
1907 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1909 initializecpu(); /* Initialize CPU registers */
1912 * make an initial tss so cpu can get interrupt stack on syscall!
1913 * The 16 bytes is to save room for a VM86 context.
1915 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1916 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1917 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1918 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1919 gd->gd_common_tssd = *gd->gd_tss_gdt;
1920 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1923 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1924 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1925 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1926 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1927 dblfault_tss.tss_cr3 = (int)IdlePTD;
1928 dblfault_tss.tss_eip = (int) dblfault_handler;
1929 dblfault_tss.tss_eflags = PSL_KERNEL;
1930 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1931 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1932 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1933 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1934 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1938 init_param2(physmem);
1940 /* now running on new page tables, configured,and u/iom is accessible */
1942 /* Map the message buffer. */
1943 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1944 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1946 msgbufinit(msgbufp, MSGBUF_SIZE);
1948 /* make a call gate to reenter kernel with */
1949 gdp = &ldt[LSYS5CALLS_SEL].gd;
1951 x = (int) &IDTVEC(syscall);
1952 gdp->gd_looffset = x++;
1953 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1955 gdp->gd_type = SDT_SYS386CGT;
1956 gdp->gd_dpl = SEL_UPL;
1958 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1960 /* XXX does this work? */
1961 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1962 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1964 /* transfer to user mode */
1966 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1967 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1969 /* setup proc 0's pcb */
1970 thread0.td_pcb->pcb_flags = 0;
1971 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
1972 thread0.td_pcb->pcb_ext = 0;
1973 proc0.p_md.md_regs = &proc0_tf;
1977 * Initialize machine-dependant portions of the global data structure.
1978 * Note that the global data area and cpu0's idlestack in the private
1979 * data space were allocated in locore.
1981 * Note: the idlethread's cpl is 0
1983 * WARNING! Called from early boot, 'mycpu' may not work yet.
1986 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1989 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1991 lwkt_init_thread(&gd->mi.gd_idlethread,
1992 gd->mi.gd_prvspace->idlestack,
1993 sizeof(gd->mi.gd_prvspace->idlestack), 0, &gd->mi);
1994 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1995 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1996 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1997 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2001 globaldata_find(int cpu)
2003 KKASSERT(cpu >= 0 && cpu < ncpus);
2004 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2007 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2008 static void f00f_hack(void *unused);
2009 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2012 f00f_hack(void *unused)
2014 struct gate_descriptor *new_idt;
2020 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2022 r_idt.rd_limit = sizeof(idt0) - 1;
2024 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2026 panic("kmem_alloc returned 0");
2027 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2028 panic("kmem_alloc returned non-page-aligned memory");
2029 /* Put the first seven entries in the lower page */
2030 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2031 bcopy(idt, new_idt, sizeof(idt0));
2032 r_idt.rd_base = (int)new_idt;
2035 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2036 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2037 panic("vm_map_protect failed");
2040 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2043 ptrace_set_pc(p, addr)
2047 p->p_md.md_regs->tf_eip = addr;
2052 ptrace_single_step(p)
2055 p->p_md.md_regs->tf_eflags |= PSL_T;
2059 int ptrace_read_u_check(p, addr, len)
2066 if ((vm_offset_t) (addr + len) < addr)
2068 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2071 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2073 if ((vm_offset_t) addr < gap)
2075 if ((vm_offset_t) (addr + len) <=
2076 (vm_offset_t) (gap + sizeof(struct trapframe)))
2081 int ptrace_write_u(p, off, data)
2086 struct trapframe frame_copy;
2088 struct trapframe *tp;
2091 * Privileged kernel state is scattered all over the user area.
2092 * Only allow write access to parts of regs and to fpregs.
2094 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2095 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2096 tp = p->p_md.md_regs;
2098 *(int *)((char *)&frame_copy + (off - min)) = data;
2099 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2100 !CS_SECURE(frame_copy.tf_cs))
2102 *(int*)((char *)p->p_addr + off) = data;
2107 * The PCB is at the end of the user area YYY
2109 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2110 min += offsetof(struct pcb, pcb_save);
2111 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2112 *(int*)((char *)p->p_addr + off) = data;
2124 struct trapframe *tp;
2126 tp = p->p_md.md_regs;
2127 regs->r_fs = tp->tf_fs;
2128 regs->r_es = tp->tf_es;
2129 regs->r_ds = tp->tf_ds;
2130 regs->r_edi = tp->tf_edi;
2131 regs->r_esi = tp->tf_esi;
2132 regs->r_ebp = tp->tf_ebp;
2133 regs->r_ebx = tp->tf_ebx;
2134 regs->r_edx = tp->tf_edx;
2135 regs->r_ecx = tp->tf_ecx;
2136 regs->r_eax = tp->tf_eax;
2137 regs->r_eip = tp->tf_eip;
2138 regs->r_cs = tp->tf_cs;
2139 regs->r_eflags = tp->tf_eflags;
2140 regs->r_esp = tp->tf_esp;
2141 regs->r_ss = tp->tf_ss;
2142 pcb = p->p_thread->td_pcb;
2143 regs->r_gs = pcb->pcb_gs;
2153 struct trapframe *tp;
2155 tp = p->p_md.md_regs;
2156 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2157 !CS_SECURE(regs->r_cs))
2159 tp->tf_fs = regs->r_fs;
2160 tp->tf_es = regs->r_es;
2161 tp->tf_ds = regs->r_ds;
2162 tp->tf_edi = regs->r_edi;
2163 tp->tf_esi = regs->r_esi;
2164 tp->tf_ebp = regs->r_ebp;
2165 tp->tf_ebx = regs->r_ebx;
2166 tp->tf_edx = regs->r_edx;
2167 tp->tf_ecx = regs->r_ecx;
2168 tp->tf_eax = regs->r_eax;
2169 tp->tf_eip = regs->r_eip;
2170 tp->tf_cs = regs->r_cs;
2171 tp->tf_eflags = regs->r_eflags;
2172 tp->tf_esp = regs->r_esp;
2173 tp->tf_ss = regs->r_ss;
2174 pcb = p->p_thread->td_pcb;
2175 pcb->pcb_gs = regs->r_gs;
2179 #ifndef CPU_DISABLE_SSE
2181 fill_fpregs_xmm(sv_xmm, sv_87)
2182 struct savexmm *sv_xmm;
2183 struct save87 *sv_87;
2185 struct env87 *penv_87 = &sv_87->sv_env;
2186 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2189 /* FPU control/status */
2190 penv_87->en_cw = penv_xmm->en_cw;
2191 penv_87->en_sw = penv_xmm->en_sw;
2192 penv_87->en_tw = penv_xmm->en_tw;
2193 penv_87->en_fip = penv_xmm->en_fip;
2194 penv_87->en_fcs = penv_xmm->en_fcs;
2195 penv_87->en_opcode = penv_xmm->en_opcode;
2196 penv_87->en_foo = penv_xmm->en_foo;
2197 penv_87->en_fos = penv_xmm->en_fos;
2200 for (i = 0; i < 8; ++i)
2201 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2203 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2207 set_fpregs_xmm(sv_87, sv_xmm)
2208 struct save87 *sv_87;
2209 struct savexmm *sv_xmm;
2211 struct env87 *penv_87 = &sv_87->sv_env;
2212 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2215 /* FPU control/status */
2216 penv_xmm->en_cw = penv_87->en_cw;
2217 penv_xmm->en_sw = penv_87->en_sw;
2218 penv_xmm->en_tw = penv_87->en_tw;
2219 penv_xmm->en_fip = penv_87->en_fip;
2220 penv_xmm->en_fcs = penv_87->en_fcs;
2221 penv_xmm->en_opcode = penv_87->en_opcode;
2222 penv_xmm->en_foo = penv_87->en_foo;
2223 penv_xmm->en_fos = penv_87->en_fos;
2226 for (i = 0; i < 8; ++i)
2227 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2229 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2231 #endif /* CPU_DISABLE_SSE */
2234 fill_fpregs(p, fpregs)
2236 struct fpreg *fpregs;
2238 #ifndef CPU_DISABLE_SSE
2240 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
2241 (struct save87 *)fpregs);
2244 #endif /* CPU_DISABLE_SSE */
2245 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2250 set_fpregs(p, fpregs)
2252 struct fpreg *fpregs;
2254 #ifndef CPU_DISABLE_SSE
2256 set_fpregs_xmm((struct save87 *)fpregs,
2257 &p->p_thread->td_pcb->pcb_save.sv_xmm);
2260 #endif /* CPU_DISABLE_SSE */
2261 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2266 fill_dbregs(p, dbregs)
2268 struct dbreg *dbregs;
2273 dbregs->dr0 = rdr0();
2274 dbregs->dr1 = rdr1();
2275 dbregs->dr2 = rdr2();
2276 dbregs->dr3 = rdr3();
2277 dbregs->dr4 = rdr4();
2278 dbregs->dr5 = rdr5();
2279 dbregs->dr6 = rdr6();
2280 dbregs->dr7 = rdr7();
2283 pcb = p->p_thread->td_pcb;
2284 dbregs->dr0 = pcb->pcb_dr0;
2285 dbregs->dr1 = pcb->pcb_dr1;
2286 dbregs->dr2 = pcb->pcb_dr2;
2287 dbregs->dr3 = pcb->pcb_dr3;
2290 dbregs->dr6 = pcb->pcb_dr6;
2291 dbregs->dr7 = pcb->pcb_dr7;
2297 set_dbregs(p, dbregs)
2299 struct dbreg *dbregs;
2303 u_int32_t mask1, mask2;
2306 load_dr0(dbregs->dr0);
2307 load_dr1(dbregs->dr1);
2308 load_dr2(dbregs->dr2);
2309 load_dr3(dbregs->dr3);
2310 load_dr4(dbregs->dr4);
2311 load_dr5(dbregs->dr5);
2312 load_dr6(dbregs->dr6);
2313 load_dr7(dbregs->dr7);
2317 * Don't let an illegal value for dr7 get set. Specifically,
2318 * check for undefined settings. Setting these bit patterns
2319 * result in undefined behaviour and can lead to an unexpected
2322 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2323 i++, mask1 <<= 2, mask2 <<= 2)
2324 if ((dbregs->dr7 & mask1) == mask2)
2327 pcb = p->p_thread->td_pcb;
2330 * Don't let a process set a breakpoint that is not within the
2331 * process's address space. If a process could do this, it
2332 * could halt the system by setting a breakpoint in the kernel
2333 * (if ddb was enabled). Thus, we need to check to make sure
2334 * that no breakpoints are being enabled for addresses outside
2335 * process's address space, unless, perhaps, we were called by
2338 * XXX - what about when the watched area of the user's
2339 * address space is written into from within the kernel
2340 * ... wouldn't that still cause a breakpoint to be generated
2341 * from within kernel mode?
2344 if (suser_cred(p->p_ucred, 0) != 0) {
2345 if (dbregs->dr7 & 0x3) {
2346 /* dr0 is enabled */
2347 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2351 if (dbregs->dr7 & (0x3<<2)) {
2352 /* dr1 is enabled */
2353 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2357 if (dbregs->dr7 & (0x3<<4)) {
2358 /* dr2 is enabled */
2359 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2363 if (dbregs->dr7 & (0x3<<6)) {
2364 /* dr3 is enabled */
2365 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2370 pcb->pcb_dr0 = dbregs->dr0;
2371 pcb->pcb_dr1 = dbregs->dr1;
2372 pcb->pcb_dr2 = dbregs->dr2;
2373 pcb->pcb_dr3 = dbregs->dr3;
2374 pcb->pcb_dr6 = dbregs->dr6;
2375 pcb->pcb_dr7 = dbregs->dr7;
2377 pcb->pcb_flags |= PCB_DBREGS;
2384 * Return > 0 if a hardware breakpoint has been hit, and the
2385 * breakpoint was in user space. Return 0, otherwise.
2388 user_dbreg_trap(void)
2390 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2391 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2392 int nbp; /* number of breakpoints that triggered */
2393 caddr_t addr[4]; /* breakpoint addresses */
2397 if ((dr7 & 0x000000ff) == 0) {
2399 * all GE and LE bits in the dr7 register are zero,
2400 * thus the trap couldn't have been caused by the
2401 * hardware debug registers
2408 bp = dr6 & 0x0000000f;
2412 * None of the breakpoint bits are set meaning this
2413 * trap was not caused by any of the debug registers
2419 * at least one of the breakpoints were hit, check to see
2420 * which ones and if any of them are user space addresses
2424 addr[nbp++] = (caddr_t)rdr0();
2427 addr[nbp++] = (caddr_t)rdr1();
2430 addr[nbp++] = (caddr_t)rdr2();
2433 addr[nbp++] = (caddr_t)rdr3();
2436 for (i=0; i<nbp; i++) {
2438 (caddr_t)VM_MAXUSER_ADDRESS) {
2440 * addr[i] is in user space
2447 * None of the breakpoints are in user space.
2455 Debugger(const char *msg)
2457 printf("Debugger(\"%s\") called.\n", msg);
2461 #include <machine/apicvar.h>
2464 * Provide stub functions so that the MADT APIC enumerator in the acpi
2465 * kernel module will link against a kernel without 'option APIC_IO'.
2467 * XXX - This is a gross hack.
2470 apic_register_enumerator(struct apic_enumerator *enumerator)
2475 ioapic_create(uintptr_t addr, int32_t id, int intbase)
2481 ioapic_disable_pin(void *cookie, u_int pin)
2487 ioapic_enable_mixed_mode(void)
2492 ioapic_get_vector(void *cookie, u_int pin)
2498 ioapic_register(void *cookie)
2503 ioapic_remap_vector(void *cookie, u_int pin, int vector)
2509 ioapic_set_extint(void *cookie, u_int pin)
2515 ioapic_set_nmi(void *cookie, u_int pin)
2521 ioapic_set_polarity(void *cookie, u_int pin, char activehi)
2527 ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger)
2533 lapic_create(u_int apic_id, int boot_cpu)
2538 lapic_init(uintptr_t addr)
2543 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
2549 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi)
2555 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger)
2560 #include <sys/disklabel.h>
2563 * Determine the size of the transfer, and make sure it is
2564 * within the boundaries of the partition. Adjust transfer
2565 * if needed, and signal errors or early completion.
2568 bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2570 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2571 int labelsect = lp->d_partitions[0].p_offset;
2572 int maxsz = p->p_size,
2573 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2575 /* overwriting disk label ? */
2576 /* XXX should also protect bootstrap in first 8K */
2577 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2578 #if LABELSECTOR != 0
2579 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2581 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2582 bp->b_error = EROFS;
2586 #if defined(DOSBBSECTOR) && defined(notyet)
2587 /* overwriting master boot record? */
2588 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2589 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2590 bp->b_error = EROFS;
2595 /* beyond partition? */
2596 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2597 /* if exactly at end of disk, return an EOF */
2598 if (bp->b_blkno == maxsz) {
2599 bp->b_resid = bp->b_bcount;
2602 /* or truncate if part of it fits */
2603 sz = maxsz - bp->b_blkno;
2605 bp->b_error = EINVAL;
2608 bp->b_bcount = sz << DEV_BSHIFT;
2611 bp->b_pblkno = bp->b_blkno + p->p_offset;
2615 bp->b_flags |= B_ERROR;
2622 * Provide inb() and outb() as functions. They are normally only
2623 * available as macros calling inlined functions, thus cannot be
2624 * called inside DDB.
2626 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2632 /* silence compiler warnings */
2634 void outb(u_int, u_char);
2641 * We use %%dx and not %1 here because i/o is done at %dx and not at
2642 * %edx, while gcc generates inferior code (movw instead of movl)
2643 * if we tell it to load (u_short) port.
2645 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2650 outb(u_int port, u_char data)
2654 * Use an unnecessary assignment to help gcc's register allocator.
2655 * This make a large difference for gcc-1.40 and a tiny difference
2656 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2657 * best results. gcc-2.6.0 can't handle this.
2660 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2667 #include "opt_cpu.h"
2671 * initialize all the SMP locks
2674 /* critical region around IO APIC, apic_imen */
2675 struct spinlock imen_spinlock;
2677 /* Make FAST_INTR() routines sequential */
2678 struct spinlock fast_intr_spinlock;
2680 /* critical region for old style disable_intr/enable_intr */
2681 struct spinlock mpintr_spinlock;
2683 /* critical region around INTR() routines */
2684 struct spinlock intr_spinlock;
2686 /* lock region used by kernel profiling */
2687 struct spinlock mcount_spinlock;
2689 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2690 struct spinlock com_spinlock;
2692 /* locks kernel printfs */
2693 struct spinlock cons_spinlock;
2695 /* lock regions around the clock hardware */
2696 struct spinlock clock_spinlock;
2698 /* lock around the MP rendezvous */
2699 struct spinlock smp_rv_spinlock;
2705 * mp_lock = 0; BSP already owns the MP lock
2708 * Get the initial mp_lock with a count of 1 for the BSP.
2709 * This uses a LOGICAL cpu ID, ie BSP == 0.
2712 cpu_get_initial_mplock();
2715 spin_lock_init(&mcount_spinlock);
2716 spin_lock_init(&fast_intr_spinlock);
2717 spin_lock_init(&intr_spinlock);
2718 spin_lock_init(&mpintr_spinlock);
2719 spin_lock_init(&imen_spinlock);
2720 spin_lock_init(&smp_rv_spinlock);
2721 spin_lock_init(&com_spinlock);
2722 spin_lock_init(&clock_spinlock);
2723 spin_lock_init(&cons_spinlock);
2725 /* our token pool needs to work early */
2726 lwkt_token_pool_init();