1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */
2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */
3 /* $DragonFly: src/sys/dev/netif/txp/if_txp.c,v 1.36 2006/08/01 18:10:40 swildner Exp $ */
7 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and
8 * Aaron Campbell <aaron@monkey.org>. All rights reserved.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Jason L. Wright,
21 * Theo de Raadt and Aaron Campbell.
22 * 4. Neither the name of the author nor the names of any co-contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36 * THE POSSIBILITY OF SUCH DAMAGE.
40 * Driver for 3c990 (Typhoon) Ethernet ASIC
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/serialize.h>
51 #include <sys/thread2.h>
54 #include <net/ifq_var.h>
55 #include <net/if_arp.h>
56 #include <net/ethernet.h>
57 #include <net/if_dl.h>
58 #include <net/if_types.h>
59 #include <net/vlan/if_vlan_var.h>
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_ether.h>
66 #include <sys/in_cksum.h>
68 #include <net/if_media.h>
72 #include <vm/vm.h> /* for vtophys */
73 #include <vm/pmap.h> /* for vtophys */
74 #include <machine/bus_pio.h>
75 #include <machine/bus_memio.h>
76 #include <machine/bus.h>
77 #include <machine/resource.h>
81 #include "../mii_layer/mii.h"
82 #include "../mii_layer/miivar.h"
84 #include <bus/pci/pcidevs.h>
85 #include <bus/pci/pcireg.h>
86 #include <bus/pci/pcivar.h>
88 #define TXP_USEIOSPACE
89 #define __STRICT_ALIGNMENT
91 #include "if_txpreg.h"
95 * Various supported device vendors/types and their names.
97 static struct txp_type txp_devs[] = {
98 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95,
99 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" },
100 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97,
101 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" },
102 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B,
103 "3Com 3cR990B-TXM Etherlink with 3XP Processor" },
104 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95,
105 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" },
106 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97,
107 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" },
108 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR,
109 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" },
113 static int txp_probe (device_t);
114 static int txp_attach (device_t);
115 static int txp_detach (device_t);
116 static void txp_intr (void *);
117 static void txp_tick (void *);
118 static int txp_shutdown (device_t);
119 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *);
120 static void txp_start (struct ifnet *);
121 static void txp_stop (struct txp_softc *);
122 static void txp_init (void *);
123 static void txp_watchdog (struct ifnet *);
125 static void txp_release_resources (device_t);
126 static int txp_chip_init (struct txp_softc *);
127 static int txp_reset_adapter (struct txp_softc *);
128 static int txp_download_fw (struct txp_softc *);
129 static int txp_download_fw_wait (struct txp_softc *);
130 static int txp_download_fw_section (struct txp_softc *,
131 struct txp_fw_section_header *, int);
132 static int txp_alloc_rings (struct txp_softc *);
133 static int txp_rxring_fill (struct txp_softc *);
134 static void txp_rxring_empty (struct txp_softc *);
135 static void txp_set_filter (struct txp_softc *);
137 static int txp_cmd_desc_numfree (struct txp_softc *);
138 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t,
139 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int);
140 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t,
141 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t,
142 struct txp_rsp_desc **, int);
143 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t,
144 struct txp_rsp_desc **);
145 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *,
146 struct txp_rsp_desc *);
147 static void txp_capabilities (struct txp_softc *);
149 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *);
150 static int txp_ifmedia_upd (struct ifnet *);
152 static void txp_show_descriptor (void *);
154 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *);
155 static void txp_rxbuf_reclaim (struct txp_softc *);
156 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *);
158 #ifdef TXP_USEIOSPACE
159 #define TXP_RES SYS_RES_IOPORT
160 #define TXP_RID TXP_PCI_LOIO
162 #define TXP_RES SYS_RES_MEMORY
163 #define TXP_RID TXP_PCI_LOMEM
166 static device_method_t txp_methods[] = {
167 /* Device interface */
168 DEVMETHOD(device_probe, txp_probe),
169 DEVMETHOD(device_attach, txp_attach),
170 DEVMETHOD(device_detach, txp_detach),
171 DEVMETHOD(device_shutdown, txp_shutdown),
175 static driver_t txp_driver = {
178 sizeof(struct txp_softc)
181 static devclass_t txp_devclass;
183 DECLARE_DUMMY_MODULE(if_txp);
184 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, 0, 0);
187 txp_probe(device_t dev)
192 vid = pci_get_vendor(dev);
193 did = pci_get_device(dev);
195 for (t = txp_devs; t->txp_name != NULL; ++t) {
196 if ((vid == t->txp_vid) && (did == t->txp_did)) {
197 device_set_desc(dev, t->txp_name);
206 txp_attach(device_t dev)
208 struct txp_softc *sc;
212 uint8_t enaddr[ETHER_ADDR_LEN];
215 sc = device_get_softc(dev);
216 callout_init(&sc->txp_stat_timer);
218 ifp = &sc->sc_arpcom.ac_if;
219 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
221 pci_enable_busmaster(dev);
224 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE);
226 if (sc->sc_res == NULL) {
227 device_printf(dev, "couldn't map ports/memory\n");
231 sc->sc_bt = rman_get_bustag(sc->sc_res);
232 sc->sc_bh = rman_get_bushandle(sc->sc_res);
234 /* Allocate interrupt */
236 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
237 RF_SHAREABLE | RF_ACTIVE);
239 if (sc->sc_irq == NULL) {
240 device_printf(dev, "couldn't map interrupt\n");
245 if (txp_chip_init(sc)) {
250 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF,
251 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
252 error = txp_download_fw(sc);
253 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF);
259 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF,
260 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
261 bzero(sc->sc_ldata, sizeof(struct txp_ldata));
263 if (txp_alloc_rings(sc)) {
268 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
269 NULL, NULL, NULL, 1)) {
274 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
275 &p1, &p2, NULL, 1)) {
282 enaddr[0] = ((uint8_t *)&p1)[1];
283 enaddr[1] = ((uint8_t *)&p1)[0];
284 enaddr[2] = ((uint8_t *)&p2)[3];
285 enaddr[3] = ((uint8_t *)&p2)[2];
286 enaddr[4] = ((uint8_t *)&p2)[1];
287 enaddr[5] = ((uint8_t *)&p2)[0];
289 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
293 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
294 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
295 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
296 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
298 sc->sc_xcvr = TXP_XCVR_AUTO;
299 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
300 NULL, NULL, NULL, 0);
301 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
304 ifp->if_mtu = ETHERMTU;
305 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
306 ifp->if_ioctl = txp_ioctl;
307 ifp->if_start = txp_start;
308 ifp->if_watchdog = txp_watchdog;
309 ifp->if_init = txp_init;
310 ifp->if_baudrate = 100000000;
311 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES);
312 ifq_set_ready(&ifp->if_snd);
313 ifp->if_hwassist = 0;
314 txp_capabilities(sc);
316 ether_ifattach(ifp, enaddr, NULL);
318 error = bus_setup_intr(dev, sc->sc_irq, INTR_NETSAFE,
319 txp_intr, sc, &sc->sc_intrhand,
322 device_printf(dev, "couldn't set up irq\n");
330 txp_release_resources(dev);
335 txp_detach(device_t dev)
337 struct txp_softc *sc = device_get_softc(dev);
338 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
341 lwkt_serialize_enter(ifp->if_serializer);
345 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand);
347 lwkt_serialize_exit(ifp->if_serializer);
349 ifmedia_removeall(&sc->sc_ifmedia);
352 for (i = 0; i < RXBUF_ENTRIES; i++)
353 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF);
355 txp_release_resources(dev);
361 txp_release_resources(device_t dev)
363 struct txp_softc *sc;
365 sc = device_get_softc(dev);
367 if (sc->sc_irq != NULL)
368 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq);
370 if (sc->sc_res != NULL)
371 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res);
373 if (sc->sc_ldata != NULL)
374 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF);
380 txp_chip_init(struct txp_softc *sc)
382 /* disable interrupts */
383 WRITE_REG(sc, TXP_IER, 0);
384 WRITE_REG(sc, TXP_IMR,
385 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
386 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
389 /* ack all interrupts */
390 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
391 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
392 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
393 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
394 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
396 if (txp_reset_adapter(sc))
399 /* disable interrupts */
400 WRITE_REG(sc, TXP_IER, 0);
401 WRITE_REG(sc, TXP_IMR,
402 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
403 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
406 /* ack all interrupts */
407 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
408 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
409 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
410 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
411 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
417 txp_reset_adapter(struct txp_softc *sc)
422 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
424 WRITE_REG(sc, TXP_SRR, 0);
426 /* Should wait max 6 seconds */
427 for (i = 0; i < 6000; i++) {
428 r = READ_REG(sc, TXP_A2H_0);
429 if (r == STAT_WAITING_FOR_HOST_REQUEST)
434 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
435 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n");
443 txp_download_fw(struct txp_softc *sc)
445 struct txp_fw_file_header *fileheader;
446 struct txp_fw_section_header *secthead;
448 u_int32_t r, i, ier, imr;
450 ier = READ_REG(sc, TXP_IER);
451 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
453 imr = READ_REG(sc, TXP_IMR);
454 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
456 for (i = 0; i < 10000; i++) {
457 r = READ_REG(sc, TXP_A2H_0);
458 if (r == STAT_WAITING_FOR_HOST_REQUEST)
462 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
463 if_printf(&sc->sc_arpcom.ac_if,
464 "not waiting for host request\n");
469 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
471 fileheader = (struct txp_fw_file_header *)tc990image;
472 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) {
473 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n");
477 /* Tell boot firmware to get ready for image */
478 WRITE_REG(sc, TXP_H2A_1, fileheader->addr);
479 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
481 if (txp_download_fw_wait(sc)) {
482 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n");
486 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) +
487 sizeof(struct txp_fw_file_header));
489 for (sect = 0; sect < fileheader->nsections; sect++) {
490 if (txp_download_fw_section(sc, secthead, sect))
492 secthead = (struct txp_fw_section_header *)
493 (((u_int8_t *)secthead) + secthead->nbytes +
497 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
499 for (i = 0; i < 10000; i++) {
500 r = READ_REG(sc, TXP_A2H_0);
501 if (r == STAT_WAITING_FOR_BOOT)
505 if (r != STAT_WAITING_FOR_BOOT) {
506 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
510 WRITE_REG(sc, TXP_IER, ier);
511 WRITE_REG(sc, TXP_IMR, imr);
517 txp_download_fw_wait(struct txp_softc *sc)
521 for (i = 0; i < 10000; i++) {
522 r = READ_REG(sc, TXP_ISR);
523 if (r & TXP_INT_A2H_0)
528 if (!(r & TXP_INT_A2H_0)) {
529 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n");
533 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
535 r = READ_REG(sc, TXP_A2H_0);
536 if (r != STAT_WAITING_FOR_SEGMENT) {
537 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n");
544 txp_download_fw_section(struct txp_softc *sc,
545 struct txp_fw_section_header *sect, int sectnum)
552 /* Skip zero length sections */
553 if (sect->nbytes == 0)
556 /* Make sure we aren't past the end of the image */
557 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image);
558 if (rseg >= sizeof(tc990image)) {
559 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, "
560 "section %d\n", sectnum);
564 /* Make sure this section doesn't go past the end */
565 rseg += sect->nbytes;
566 if (rseg >= sizeof(tc990image)) {
567 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n",
572 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes);
573 dma = vtophys(sc->sc_fwbuf);
576 * dummy up mbuf and verify section checksum
579 m.m_next = m.m_nextpkt = NULL;
580 m.m_len = sect->nbytes;
581 m.m_data = sc->sc_fwbuf;
583 csum = in_cksum(&m, sect->nbytes);
584 if (csum != sect->cksum) {
585 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad "
586 "cksum (expected 0x%x got 0x%x)\n",
587 sectnum, sect->cksum, csum);
592 WRITE_REG(sc, TXP_H2A_1, sect->nbytes);
593 WRITE_REG(sc, TXP_H2A_2, sect->cksum);
594 WRITE_REG(sc, TXP_H2A_3, sect->addr);
595 WRITE_REG(sc, TXP_H2A_4, 0);
596 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff);
597 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
599 if (txp_download_fw_wait(sc)) {
600 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, "
601 "section %d\n", sectnum);
612 struct txp_softc *sc = vsc;
613 struct txp_hostvar *hv = sc->sc_hostvar;
616 /* mask all interrupts */
617 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
618 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
619 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
620 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
621 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
623 isr = READ_REG(sc, TXP_ISR);
625 WRITE_REG(sc, TXP_ISR, isr);
627 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
628 txp_rx_reclaim(sc, &sc->sc_rxhir);
629 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
630 txp_rx_reclaim(sc, &sc->sc_rxlor);
632 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx)
633 txp_rxbuf_reclaim(sc);
635 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
636 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off))))
637 txp_tx_reclaim(sc, &sc->sc_txhir);
639 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
640 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off))))
641 txp_tx_reclaim(sc, &sc->sc_txlor);
643 isr = READ_REG(sc, TXP_ISR);
646 /* unmask all interrupts */
647 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
649 txp_start(&sc->sc_arpcom.ac_if);
655 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r)
657 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
658 struct txp_rx_desc *rxd;
660 struct txp_swdesc *sd = NULL;
661 u_int32_t roff, woff;
665 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc));
667 while (roff != woff) {
669 if (rxd->rx_flags & RX_FLAGS_ERROR) {
670 if_printf(ifp, "error 0x%x\n", rxd->rx_stat);
675 /* retrieve stashed pointer */
681 m->m_pkthdr.len = m->m_len = rxd->rx_len;
683 #ifdef __STRICT_ALIGNMENT
686 * XXX Nice chip, except it won't accept "off by 2"
687 * buffers, so we're force to copy. Supposedly
688 * this will be fixed in a newer firmware rev
689 * and this will be temporary.
693 MGETHDR(mnew, MB_DONTWAIT, MT_DATA);
698 if (m->m_len > (MHLEN - 2)) {
699 MCLGET(mnew, MB_DONTWAIT);
700 if (!(mnew->m_flags & M_EXT)) {
706 mnew->m_pkthdr.rcvif = ifp;
708 mnew->m_pkthdr.len = mnew->m_len = m->m_len;
709 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t));
715 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD)
716 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
717 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD)
718 m->m_pkthdr.csum_flags |=
719 CSUM_IP_CHECKED|CSUM_IP_VALID;
721 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) ||
722 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) {
723 m->m_pkthdr.csum_flags |=
724 CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
725 m->m_pkthdr.csum_data = 0xffff;
728 lwkt_serialize_enter(ifp->if_serializer);
729 if (rxd->rx_stat & RX_STAT_VLAN)
730 VLAN_INPUT_TAG(m, htons(rxd->rx_vlan >> 16));
732 ifp->if_input(ifp, m);
733 lwkt_serialize_exit(ifp->if_serializer);
737 roff += sizeof(struct txp_rx_desc);
738 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) {
752 txp_rxbuf_reclaim(struct txp_softc *sc)
754 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
755 struct txp_hostvar *hv = sc->sc_hostvar;
756 struct txp_rxbuf_desc *rbd;
757 struct txp_swdesc *sd;
760 if (!(ifp->if_flags & IFF_RUNNING))
763 i = sc->sc_rxbufprod;
764 rbd = sc->sc_rxbufs + i;
768 if (sd->sd_mbuf != NULL)
771 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
772 if (sd->sd_mbuf == NULL)
775 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
776 if ((sd->sd_mbuf->m_flags & M_EXT) == 0)
778 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
779 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
781 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t))
785 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i);
787 if (++i == RXBUF_ENTRIES) {
794 sc->sc_rxbufprod = i;
799 m_freem(sd->sd_mbuf);
805 * Reclaim mbufs and entries from a transmit ring.
808 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r)
810 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
811 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off));
812 u_int32_t cons = r->r_cons, cnt = r->r_cnt;
813 struct txp_tx_desc *txd = r->r_desc + cons;
814 struct txp_swdesc *sd = sc->sc_txd + cons;
817 while (cons != idx) {
821 if ((txd->tx_flags & TX_FLAGS_TYPE_M) ==
822 TX_FLAGS_TYPE_DATA) {
831 ifp->if_flags &= ~IFF_OACTIVE;
833 if (++cons == TX_ENTRIES) {
852 txp_shutdown(device_t dev)
854 struct txp_softc *sc;
857 sc = device_get_softc(dev);
858 ifp = &sc->sc_arpcom.ac_if;
859 lwkt_serialize_enter(ifp->if_serializer);
861 /* mask all interrupts */
862 WRITE_REG(sc, TXP_IMR,
863 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
864 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
867 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
868 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
869 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
871 lwkt_serialize_exit(ifp->if_serializer);
876 txp_alloc_rings(struct txp_softc *sc)
878 struct txp_boot_record *boot;
879 struct txp_ldata *ld;
884 boot = &ld->txp_boot;
890 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar));
891 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar);
892 boot->br_hostvar_hi = 0;
893 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar;
895 /* hi priority tx ring */
896 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);;
897 boot->br_txhipri_hi = 0;
898 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
899 sc->sc_txhir.r_reg = TXP_H2A_1;
900 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring;
901 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
902 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
904 /* lo priority tx ring */
905 boot->br_txlopri_lo = vtophys(&ld->txp_txloring);
906 boot->br_txlopri_hi = 0;
907 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
908 sc->sc_txlor.r_reg = TXP_H2A_3;
909 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring;
910 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
911 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
913 /* high priority rx ring */
914 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring);
915 boot->br_rxhipri_hi = 0;
916 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
917 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring;
918 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
919 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
921 /* low priority rx ring */
922 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring);
923 boot->br_rxlopri_hi = 0;
924 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
925 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring;
926 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
927 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
930 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
931 boot->br_cmd_lo = vtophys(&ld->txp_cmdring);
933 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
934 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
935 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
936 sc->sc_cmdring.lastwrite = 0;
939 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
940 boot->br_resp_lo = vtophys(&ld->txp_rspring);
941 boot->br_resp_hi = 0;
942 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc);
943 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
944 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
945 sc->sc_rspring.lastwrite = 0;
947 /* receive buffer ring */
948 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs);
949 boot->br_rxbuf_hi = 0;
950 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc);
951 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs;
953 for (i = 0; i < RXBUF_ENTRIES; i++) {
954 struct txp_swdesc *sd;
955 if (sc->sc_rxbufs[i].rb_sd != NULL)
957 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc),
959 if (sc->sc_rxbufs[i].rb_sd == NULL)
961 sd = sc->sc_rxbufs[i].rb_sd;
964 sc->sc_rxbufprod = 0;
967 bzero(&ld->txp_zero, sizeof(u_int32_t));
968 boot->br_zero_lo = vtophys(&ld->txp_zero);
969 boot->br_zero_hi = 0;
971 /* See if it's waiting for boot, and try to boot it */
972 for (i = 0; i < 10000; i++) {
973 r = READ_REG(sc, TXP_A2H_0);
974 if (r == STAT_WAITING_FOR_BOOT)
979 if (r != STAT_WAITING_FOR_BOOT) {
980 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
984 WRITE_REG(sc, TXP_H2A_2, 0);
985 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot));
986 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
988 /* See if it booted */
989 for (i = 0; i < 10000; i++) {
990 r = READ_REG(sc, TXP_A2H_0);
991 if (r == STAT_RUNNING)
995 if (r != STAT_RUNNING) {
996 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n");
1000 /* Clear TX and CMD ring write registers */
1001 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
1002 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
1003 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
1004 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
1010 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1012 struct txp_softc *sc = ifp->if_softc;
1013 struct ifreq *ifr = (struct ifreq *)data;
1018 if (ifp->if_flags & IFF_UP) {
1021 if (ifp->if_flags & IFF_RUNNING)
1028 * Multicast list has changed; set the hardware
1029 * filter accordingly.
1036 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
1039 error = ether_ioctl(ifp, command, data);
1046 txp_rxring_fill(struct txp_softc *sc)
1050 struct txp_swdesc *sd;
1052 ifp = &sc->sc_arpcom.ac_if;
1054 for (i = 0; i < RXBUF_ENTRIES; i++) {
1055 sd = sc->sc_rxbufs[i].rb_sd;
1056 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
1057 if (sd->sd_mbuf == NULL)
1060 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
1061 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) {
1062 m_freem(sd->sd_mbuf);
1065 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
1066 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
1068 sc->sc_rxbufs[i].rb_paddrlo =
1069 vtophys(mtod(sd->sd_mbuf, vm_offset_t));
1070 sc->sc_rxbufs[i].rb_paddrhi = 0;
1073 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) *
1074 sizeof(struct txp_rxbuf_desc);
1080 txp_rxring_empty(struct txp_softc *sc)
1083 struct txp_swdesc *sd;
1085 if (sc->sc_rxbufs == NULL)
1088 for (i = 0; i < RXBUF_ENTRIES; i++) {
1089 if (&sc->sc_rxbufs[i] == NULL)
1091 sd = sc->sc_rxbufs[i].rb_sd;
1094 if (sd->sd_mbuf != NULL) {
1095 m_freem(sd->sd_mbuf);
1106 struct txp_softc *sc;
1112 ifp = &sc->sc_arpcom.ac_if;
1114 if (ifp->if_flags & IFF_RUNNING)
1119 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
1120 NULL, NULL, NULL, 1);
1122 /* Set station address. */
1123 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0];
1124 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1];
1125 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2];
1126 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3];
1127 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4];
1128 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5];
1129 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0,
1130 NULL, NULL, NULL, 1);
1134 txp_rxring_fill(sc);
1136 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1137 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1139 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
1140 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
1141 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
1142 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
1143 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
1144 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
1146 ifp->if_flags |= IFF_RUNNING;
1147 ifp->if_flags &= ~IFF_OACTIVE;
1150 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1156 struct txp_softc *sc = vsc;
1157 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1158 struct txp_rsp_desc *rsp = NULL;
1159 struct txp_ext_desc *ext;
1161 lwkt_serialize_enter(ifp->if_serializer);
1162 txp_rxbuf_reclaim(sc);
1164 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
1167 if (rsp->rsp_numdesc != 6)
1169 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
1170 NULL, NULL, NULL, 1))
1172 ext = (struct txp_ext_desc *)(rsp + 1);
1174 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 +
1175 ext[4].ext_1 + ext[4].ext_4;
1176 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 +
1178 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 +
1180 ifp->if_opackets += rsp->rsp_par2;
1181 ifp->if_ipackets += ext[2].ext_3;
1185 free(rsp, M_DEVBUF);
1187 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1188 lwkt_serialize_exit(ifp->if_serializer);
1192 txp_start(struct ifnet *ifp)
1194 struct txp_softc *sc = ifp->if_softc;
1195 struct txp_tx_ring *r = &sc->sc_txhir;
1196 struct txp_tx_desc *txd;
1197 struct txp_frag_desc *fxd;
1198 struct mbuf *m, *m0;
1199 struct txp_swdesc *sd;
1200 u_int32_t firstprod, firstcnt, prod, cnt;
1203 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1210 m = ifq_poll(&ifp->if_snd);
1217 sd = sc->sc_txd + prod;
1220 if ((TX_ENTRIES - cnt) < 4)
1223 txd = r->r_desc + prod;
1225 txd->tx_flags = TX_FLAGS_TYPE_DATA;
1226 txd->tx_numdesc = 0;
1232 if (++prod == TX_ENTRIES)
1235 if (++cnt >= (TX_ENTRIES - 4))
1238 if ((m->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1239 m->m_pkthdr.rcvif != NULL) {
1240 ifv = m->m_pkthdr.rcvif->if_softc;
1241 txd->tx_pflags = TX_PFLAGS_VLAN |
1242 (htons(ifv->ifv_tag) << TX_PFLAGS_VLANTAG_S);
1245 if (m->m_pkthdr.csum_flags & CSUM_IP)
1246 txd->tx_pflags |= TX_PFLAGS_IPCKSUM;
1249 if (m->m_pkthdr.csum_flags & CSUM_TCP)
1250 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM;
1251 if (m->m_pkthdr.csum_flags & CSUM_UDP)
1252 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM;
1255 fxd = (struct txp_frag_desc *)(r->r_desc + prod);
1256 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
1259 if (++cnt >= (TX_ENTRIES - 4))
1264 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG;
1265 fxd->frag_rsvd1 = 0;
1266 fxd->frag_len = m0->m_len;
1267 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t));
1268 fxd->frag_addrhi = 0;
1269 fxd->frag_rsvd2 = 0;
1271 if (++prod == TX_ENTRIES) {
1272 fxd = (struct txp_frag_desc *)r->r_desc;
1281 ifq_dequeue(&ifp->if_snd, m);
1283 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
1291 ifp->if_flags |= IFF_OACTIVE;
1292 r->r_prod = firstprod;
1293 r->r_cnt = firstcnt;
1298 * Handle simple commands sent to the typhoon
1301 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1302 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3,
1305 struct txp_rsp_desc *rsp = NULL;
1307 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
1314 *out1 = rsp->rsp_par1;
1316 *out2 = rsp->rsp_par2;
1318 *out3 = rsp->rsp_par3;
1319 free(rsp, M_DEVBUF);
1324 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1325 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn,
1326 struct txp_rsp_desc **rspp, int wait)
1328 struct txp_hostvar *hv = sc->sc_hostvar;
1329 struct txp_cmd_desc *cmd;
1330 struct txp_ext_desc *ext;
1334 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
1335 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n");
1339 idx = sc->sc_cmdring.lastwrite;
1340 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1341 bzero(cmd, sizeof(*cmd));
1343 cmd->cmd_numdesc = in_extn;
1344 cmd->cmd_seq = seq = sc->sc_seq++;
1346 cmd->cmd_par1 = in1;
1347 cmd->cmd_par2 = in2;
1348 cmd->cmd_par3 = in3;
1349 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD |
1350 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID;
1352 idx += sizeof(struct txp_cmd_desc);
1353 if (idx == sc->sc_cmdring.size)
1356 for (i = 0; i < in_extn; i++) {
1357 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1358 bcopy(in_extp, ext, sizeof(struct txp_ext_desc));
1360 idx += sizeof(struct txp_cmd_desc);
1361 if (idx == sc->sc_cmdring.size)
1365 sc->sc_cmdring.lastwrite = idx;
1367 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
1372 for (i = 0; i < 10000; i++) {
1373 idx = hv->hv_resp_read_idx;
1374 if (idx != hv->hv_resp_write_idx) {
1376 if (txp_response(sc, idx, id, seq, rspp))
1383 if (i == 1000 || (*rspp) == NULL) {
1384 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id);
1392 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq,
1393 struct txp_rsp_desc **rspp)
1395 struct txp_hostvar *hv = sc->sc_hostvar;
1396 struct txp_rsp_desc *rsp;
1398 while (ridx != hv->hv_resp_write_idx) {
1399 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
1401 if (id == rsp->rsp_id && rsp->rsp_seq == seq) {
1402 *rspp = (struct txp_rsp_desc *)malloc(
1403 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1),
1404 M_DEVBUF, M_INTWAIT);
1405 if ((*rspp) == NULL)
1407 txp_rsp_fixup(sc, rsp, *rspp);
1411 if (rsp->rsp_flags & RSP_FLAGS_ERROR) {
1412 if_printf(&sc->sc_arpcom.ac_if, "response error!\n");
1413 txp_rsp_fixup(sc, rsp, NULL);
1414 ridx = hv->hv_resp_read_idx;
1418 switch (rsp->rsp_id) {
1419 case TXP_CMD_CYCLE_STATISTICS:
1420 case TXP_CMD_MEDIA_STATUS_READ:
1422 case TXP_CMD_HELLO_RESPONSE:
1423 if_printf(&sc->sc_arpcom.ac_if, "hello\n");
1426 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n",
1430 txp_rsp_fixup(sc, rsp, NULL);
1431 ridx = hv->hv_resp_read_idx;
1432 hv->hv_resp_read_idx = ridx;
1439 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp,
1440 struct txp_rsp_desc *dst)
1442 struct txp_rsp_desc *src = rsp;
1443 struct txp_hostvar *hv = sc->sc_hostvar;
1446 ridx = hv->hv_resp_read_idx;
1448 for (i = 0; i < rsp->rsp_numdesc + 1; i++) {
1450 bcopy(src, dst++, sizeof(struct txp_rsp_desc));
1451 ridx += sizeof(struct txp_rsp_desc);
1452 if (ridx == sc->sc_rspring.size) {
1453 src = sc->sc_rspring.base;
1457 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx;
1460 hv->hv_resp_read_idx = ridx;
1464 txp_cmd_desc_numfree(struct txp_softc *sc)
1466 struct txp_hostvar *hv = sc->sc_hostvar;
1467 struct txp_boot_record *br = sc->sc_boot;
1468 u_int32_t widx, ridx, nfree;
1470 widx = sc->sc_cmdring.lastwrite;
1471 ridx = hv->hv_cmd_read_idx;
1474 /* Ring is completely free */
1475 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc);
1478 nfree = br->br_cmd_siz -
1479 (widx - ridx + sizeof(struct txp_cmd_desc));
1481 nfree = ridx - widx - sizeof(struct txp_cmd_desc);
1484 return (nfree / sizeof(struct txp_cmd_desc));
1488 txp_stop(struct txp_softc *sc)
1492 ifp = &sc->sc_arpcom.ac_if;
1494 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1496 callout_stop(&sc->txp_stat_timer);
1498 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1499 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1501 txp_rxring_empty(sc);
1507 txp_watchdog(struct ifnet *ifp)
1513 txp_ifmedia_upd(struct ifnet *ifp)
1515 struct txp_softc *sc = ifp->if_softc;
1516 struct ifmedia *ifm = &sc->sc_ifmedia;
1519 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1522 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
1523 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1524 new_xcvr = TXP_XCVR_10_FDX;
1526 new_xcvr = TXP_XCVR_10_HDX;
1527 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
1528 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1529 new_xcvr = TXP_XCVR_100_FDX;
1531 new_xcvr = TXP_XCVR_100_HDX;
1532 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
1533 new_xcvr = TXP_XCVR_AUTO;
1538 if (sc->sc_xcvr == new_xcvr)
1541 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
1542 NULL, NULL, NULL, 0);
1543 sc->sc_xcvr = new_xcvr;
1549 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1551 struct txp_softc *sc = ifp->if_softc;
1552 struct ifmedia *ifm = &sc->sc_ifmedia;
1553 u_int16_t bmsr, bmcr, anlpar;
1555 ifmr->ifm_status = IFM_AVALID;
1556 ifmr->ifm_active = IFM_ETHER;
1558 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1559 &bmsr, NULL, NULL, 1))
1561 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1562 &bmsr, NULL, NULL, 1))
1565 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
1566 &bmcr, NULL, NULL, 1))
1569 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
1570 &anlpar, NULL, NULL, 1))
1573 if (bmsr & BMSR_LINK)
1574 ifmr->ifm_status |= IFM_ACTIVE;
1576 if (bmcr & BMCR_ISO) {
1577 ifmr->ifm_active |= IFM_NONE;
1578 ifmr->ifm_status = 0;
1582 if (bmcr & BMCR_LOOP)
1583 ifmr->ifm_active |= IFM_LOOP;
1585 if (bmcr & BMCR_AUTOEN) {
1586 if ((bmsr & BMSR_ACOMP) == 0) {
1587 ifmr->ifm_active |= IFM_NONE;
1591 if (anlpar & ANLPAR_T4)
1592 ifmr->ifm_active |= IFM_100_T4;
1593 else if (anlpar & ANLPAR_TX_FD)
1594 ifmr->ifm_active |= IFM_100_TX|IFM_FDX;
1595 else if (anlpar & ANLPAR_TX)
1596 ifmr->ifm_active |= IFM_100_TX;
1597 else if (anlpar & ANLPAR_10_FD)
1598 ifmr->ifm_active |= IFM_10_T|IFM_FDX;
1599 else if (anlpar & ANLPAR_10)
1600 ifmr->ifm_active |= IFM_10_T;
1602 ifmr->ifm_active |= IFM_NONE;
1604 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
1608 ifmr->ifm_active |= IFM_NONE;
1609 ifmr->ifm_status &= ~IFM_AVALID;
1614 txp_show_descriptor(void *d)
1616 struct txp_cmd_desc *cmd = d;
1617 struct txp_rsp_desc *rsp = d;
1618 struct txp_tx_desc *txd = d;
1619 struct txp_frag_desc *frgd = d;
1621 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) {
1622 case CMD_FLAGS_TYPE_CMD:
1623 /* command descriptor */
1624 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1625 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1626 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1628 case CMD_FLAGS_TYPE_RESP:
1629 /* response descriptor */
1630 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1631 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq,
1632 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3);
1634 case CMD_FLAGS_TYPE_DATA:
1635 /* data header (assuming tx for now) */
1636 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]",
1637 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen,
1638 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags);
1640 case CMD_FLAGS_TYPE_FRAG:
1641 /* fragment descriptor */
1642 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]",
1643 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len,
1644 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2);
1647 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1648 cmd->cmd_flags & CMD_FLAGS_TYPE_M,
1649 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1650 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1657 txp_set_filter(struct txp_softc *sc)
1659 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1661 struct ifmultiaddr *ifma;
1663 if (ifp->if_flags & IFF_PROMISC) {
1664 filter = TXP_RXFILT_PROMISC;
1668 filter = TXP_RXFILT_DIRECT;
1670 if (ifp->if_flags & IFF_BROADCAST)
1671 filter |= TXP_RXFILT_BROADCAST;
1673 if (ifp->if_flags & IFF_ALLMULTI) {
1674 filter |= TXP_RXFILT_ALLMULTI;
1676 uint32_t hashbit, hash[2];
1679 hash[0] = hash[1] = 0;
1681 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1682 if (ifma->ifma_addr->sa_family != AF_LINK)
1686 hashbit = (uint16_t)(ether_crc32_be(
1687 LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1688 ETHER_ADDR_LEN) & (64 - 1));
1689 hash[hashbit / 32] |= (1 << hashbit % 32);
1693 filter |= TXP_RXFILT_HASHMULTI;
1694 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
1695 2, hash[0], hash[1], NULL, NULL, NULL, 0);
1700 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
1701 NULL, NULL, NULL, 1);
1705 txp_capabilities(struct txp_softc *sc)
1707 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1708 struct txp_rsp_desc *rsp = NULL;
1709 struct txp_ext_desc *ext;
1711 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
1714 if (rsp->rsp_numdesc != 1)
1716 ext = (struct txp_ext_desc *)(rsp + 1);
1718 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
1719 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
1720 ifp->if_capabilities = 0;
1722 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) {
1723 sc->sc_tx_capability |= OFFLOAD_VLAN;
1724 sc->sc_rx_capability |= OFFLOAD_VLAN;
1729 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) {
1730 sc->sc_tx_capability |= OFFLOAD_IPSEC;
1731 sc->sc_rx_capability |= OFFLOAD_IPSEC;
1732 ifp->if_capabilities |= IFCAP_IPSEC;
1736 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) {
1737 sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
1738 sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
1739 ifp->if_capabilities |= IFCAP_HWCSUM;
1740 ifp->if_hwassist |= CSUM_IP;
1743 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) {
1745 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
1747 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
1748 ifp->if_capabilities |= IFCAP_HWCSUM;
1751 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) {
1753 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
1755 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
1756 ifp->if_capabilities |= IFCAP_HWCSUM;
1758 ifp->if_capenable = ifp->if_capabilities;
1760 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
1761 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
1766 free(rsp, M_DEVBUF);