2 * Copyright (c) 1993 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/i386/include/cpufunc.h,v 1.96.2.3 2002/04/28 22:50:54 dwmalone Exp $
34 * $DragonFly: src/sys/cpu/i386/include/cpufunc.h,v 1.6 2003/08/07 21:17:22 dillon Exp $
38 * Functions to provide access to special i386 instructions.
41 #ifndef _MACHINE_CPUFUNC_H_
42 #define _MACHINE_CPUFUNC_H_
44 #include <sys/cdefs.h>
47 #define readb(va) (*(volatile u_int8_t *) (va))
48 #define readw(va) (*(volatile u_int16_t *) (va))
49 #define readl(va) (*(volatile u_int32_t *) (va))
51 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
52 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
53 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
58 #include "lock.h" /* XXX */
61 #ifdef SWTCH_OPTIM_STATS
62 extern int tlb_flush_count; /* XXX */
68 __asm __volatile("int $3");
72 * Find the first 1 in mask, starting with bit 0 and return the
73 * bit number. If mask is 0 the result is undefined.
80 __asm __volatile("bsfl %0,%0" : "=r" (result) : "0" (mask));
85 * Find the last 1 in mask, starting with bit 31 and return the
86 * bit number. If mask is 0 the result is undefined.
93 __asm __volatile("bsrl %0,%0" : "=r" (result) : "0" (mask));
98 * Test and set the specified bit (1 << bit) in the integer. The
99 * previous value of the bit is returned (0 or 1).
102 btsl(u_int *mask, int bit)
106 __asm __volatile("btsl %2,%1; movl $0,%0; adcl $0,%0" :
107 "=r"(result), "=m"(*mask) : "r" (bit));
112 * Test and clear the specified bit (1 << bit) in the integer. The
113 * previous value of the bit is returned (0 or 1).
116 btrl(u_int *mask, int bit)
120 __asm __volatile("btrl %2,%1; movl $0,%0; adcl $0,%0" :
121 "=r"(result), "=m"(*mask) : "r" (bit));
126 do_cpuid(u_int ax, u_int *p)
128 __asm __volatile("cpuid"
129 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
134 cpu_disable_intr(void)
136 __asm __volatile("cli" : : : "memory");
140 cpu_enable_intr(void)
142 __asm __volatile("sti");
145 #define HAVE_INLINE_FFS
151 * Note that gcc-2's builtin ffs would be used if we didn't declare
152 * this inline or turn off the builtin. The builtin is faster but
153 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
156 return (mask == 0 ? mask : bsfl((u_int)mask) + 1);
159 #define HAVE_INLINE_FLS
164 return (mask == 0 ? mask : bsrl((u_int)mask) + 1);
169 #define inb(port) inbv(port)
170 #define outb(port, data) outbv(port, data)
172 #else /* __GNUC >= 2 */
175 * The following complications are to get around gcc not having a
176 * constraint letter for the range 0..255. We still put "d" in the
177 * constraint because "i" isn't a valid constraint when the port
178 * isn't constant. This only matters for -O0 because otherwise
179 * the non-working version gets optimized away.
181 * Use an expression-statement instead of a conditional expression
182 * because gcc-2.6.0 would promote the operands of the conditional
183 * and produce poor code for "if ((inb(var) & const1) == const2)".
185 * The unnecessary test `(port) < 0x10000' is to generate a warning if
186 * the `port' has type u_short or smaller. Such types are pessimal.
187 * This actually only works for signed types. The range check is
188 * careful to avoid generating warnings.
190 #define inb(port) __extension__ ({ \
192 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
193 && (port) < 0x10000) \
194 _data = inbc(port); \
196 _data = inbv(port); \
199 #define outb(port, data) ( \
200 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
201 && (port) < 0x10000 \
202 ? outbc(port, data) : outbv(port, data))
204 static __inline u_char
209 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
214 outbc(u_int port, u_char data)
216 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
219 #endif /* __GNUC <= 2 */
221 static __inline u_char
226 * We use %%dx and not %1 here because i/o is done at %dx and not at
227 * %edx, while gcc generates inferior code (movw instead of movl)
228 * if we tell it to load (u_short) port.
230 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
234 static __inline u_int
239 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
244 insb(u_int port, void *addr, size_t cnt)
246 __asm __volatile("cld; rep; insb"
247 : "=D" (addr), "=c" (cnt)
248 : "0" (addr), "1" (cnt), "d" (port)
253 insw(u_int port, void *addr, size_t cnt)
255 __asm __volatile("cld; rep; insw"
256 : "=D" (addr), "=c" (cnt)
257 : "0" (addr), "1" (cnt), "d" (port)
262 insl(u_int port, void *addr, size_t cnt)
264 __asm __volatile("cld; rep; insl"
265 : "=D" (addr), "=c" (cnt)
266 : "0" (addr), "1" (cnt), "d" (port)
273 __asm __volatile("invd");
279 * If we are not a true-SMP box then smp_invltlb() is a NOP. Note that this
280 * will cause the invl*() functions to be equivalent to the cpu_invl*()
284 void smp_invltlb(void);
286 #define smp_invltlb()
290 * Invalidate a patricular VA on this cpu only
293 cpu_invlpg(void *addr)
295 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
299 * Invalidate the TLB on this cpu only
306 * This should be implemented as load_cr3(rcr3()) when load_cr3()
309 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
311 #if defined(SWTCH_OPTIM_STATS)
317 * Invalidate a patricular VA on all cpus
322 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
327 * Invalidate the TLB on all cpus
334 * This should be implemented as load_cr3(rcr3()) when load_cr3()
337 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
340 #ifdef SWTCH_OPTIM_STATS
347 static __inline u_short
352 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
356 static __inline u_int
357 loadandclear(volatile u_int *addr)
361 __asm __volatile("xorl %0,%0; xchgl %1,%0"
362 : "=&r" (result) : "m" (*addr));
367 outbv(u_int port, u_char data)
371 * Use an unnecessary assignment to help gcc's register allocator.
372 * This make a large difference for gcc-1.40 and a tiny difference
373 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
374 * best results. gcc-2.6.0 can't handle this.
377 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
381 outl(u_int port, u_int data)
384 * outl() and outw() aren't used much so we haven't looked at
385 * possible micro-optimizations such as the unnecessary
386 * assignment for them.
388 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
392 outsb(u_int port, const void *addr, size_t cnt)
394 __asm __volatile("cld; rep; outsb"
395 : "=S" (addr), "=c" (cnt)
396 : "0" (addr), "1" (cnt), "d" (port));
400 outsw(u_int port, const void *addr, size_t cnt)
402 __asm __volatile("cld; rep; outsw"
403 : "=S" (addr), "=c" (cnt)
404 : "0" (addr), "1" (cnt), "d" (port));
408 outsl(u_int port, const void *addr, size_t cnt)
410 __asm __volatile("cld; rep; outsl"
411 : "=S" (addr), "=c" (cnt)
412 : "0" (addr), "1" (cnt), "d" (port));
416 outw(u_int port, u_short data)
418 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
421 static __inline u_int
426 __asm __volatile("movl %%cr2,%0" : "=r" (data));
430 static __inline u_int
435 __asm __volatile("pushfl; popl %0" : "=r" (ef));
439 static __inline u_int64_t
444 __asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr));
448 static __inline u_int64_t
453 __asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc));
457 static __inline u_int64_t
462 __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv));
469 __asm __volatile("wbinvd");
473 write_eflags(u_int ef)
475 __asm __volatile("pushl %0; popfl" : : "r" (ef));
479 wrmsr(u_int msr, u_int64_t newval)
481 __asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr));
484 static __inline u_int
488 __asm __volatile("movl %%fs,%0" : "=rm" (sel));
492 static __inline u_int
496 __asm __volatile("movl %%gs,%0" : "=rm" (sel));
503 __asm __volatile("movl %0,%%fs" : : "rm" (sel));
509 __asm __volatile("movl %0,%%gs" : : "rm" (sel));
512 static __inline u_int
516 __asm __volatile("movl %%dr0,%0" : "=r" (data));
523 __asm __volatile("movl %0,%%dr0" : : "r" (sel));
526 static __inline u_int
530 __asm __volatile("movl %%dr1,%0" : "=r" (data));
537 __asm __volatile("movl %0,%%dr1" : : "r" (sel));
540 static __inline u_int
544 __asm __volatile("movl %%dr2,%0" : "=r" (data));
551 __asm __volatile("movl %0,%%dr2" : : "r" (sel));
554 static __inline u_int
558 __asm __volatile("movl %%dr3,%0" : "=r" (data));
565 __asm __volatile("movl %0,%%dr3" : : "r" (sel));
568 static __inline u_int
572 __asm __volatile("movl %%dr4,%0" : "=r" (data));
579 __asm __volatile("movl %0,%%dr4" : : "r" (sel));
582 static __inline u_int
586 __asm __volatile("movl %%dr5,%0" : "=r" (data));
593 __asm __volatile("movl %0,%%dr5" : : "r" (sel));
596 static __inline u_int
600 __asm __volatile("movl %%dr6,%0" : "=r" (data));
607 __asm __volatile("movl %0,%%dr6" : : "r" (sel));
610 static __inline u_int
614 __asm __volatile("movl %%dr7,%0" : "=r" (data));
621 __asm __volatile("movl %0,%%dr7" : : "r" (sel));
624 #else /* !__GNUC__ */
626 int breakpoint __P((void));
627 u_int bsfl __P((u_int mask));
628 u_int bsrl __P((u_int mask));
629 void cpu_disable_intr __P((void));
630 void do_cpuid __P((u_int ax, u_int *p));
631 void cpu_enable_intr __P((void));
632 u_char inb __P((u_int port));
633 u_int inl __P((u_int port));
634 void insb __P((u_int port, void *addr, size_t cnt));
635 void insl __P((u_int port, void *addr, size_t cnt));
636 void insw __P((u_int port, void *addr, size_t cnt));
637 void invd __P((void));
638 void invlpg __P((u_int addr));
639 void invltlb __P((void));
640 u_short inw __P((u_int port));
641 u_int loadandclear __P((u_int *addr));
642 void outb __P((u_int port, u_char data));
643 void outl __P((u_int port, u_int data));
644 void outsb __P((u_int port, void *addr, size_t cnt));
645 void outsl __P((u_int port, void *addr, size_t cnt));
646 void outsw __P((u_int port, void *addr, size_t cnt));
647 void outw __P((u_int port, u_short data));
648 u_int rcr2 __P((void));
649 u_int64_t rdmsr __P((u_int msr));
650 u_int64_t rdpmc __P((u_int pmc));
651 u_int64_t rdtsc __P((void));
652 u_int read_eflags __P((void));
653 void wbinvd __P((void));
654 void write_eflags __P((u_int ef));
655 void wrmsr __P((u_int msr, u_int64_t newval));
656 u_int rfs __P((void));
657 u_int rgs __P((void));
658 void load_fs __P((u_int sel));
659 void load_gs __P((u_int sel));
661 #endif /* __GNUC__ */
663 void load_cr0 __P((u_int cr0));
664 void load_cr3 __P((u_int cr3));
665 void load_cr4 __P((u_int cr4));
666 void ltr __P((u_short sel));
667 u_int rcr0 __P((void));
668 u_int rcr3 __P((void));
669 u_int rcr4 __P((void));
670 void reset_dbregs __P((void));
673 #endif /* !_MACHINE_CPUFUNC_H_ */