sys/dev/raid/twe/twe_freebsd.c

   1 /*-
   2  * Copyright (c) 2000 Michael Smith
   3  * Copyright (c) 2003 Paul Saab
   4  * Copyright (c) 2003 Vinod Kashyap
   5  * Copyright (c) 2000 BSDi
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  *
  29  * $FreeBSD: src/sys/dev/twe/twe_freebsd.c,v 1.48 2009/12/25 17:34:43 mav Exp $
  30  */
  31
  32 /*
  33  * FreeBSD-specific code.
  34  */
  35
  36 #include <dev/raid/twe/twe_compat.h>
  37 #include <dev/raid/twe/twereg.h>
  38 #include <dev/raid/twe/tweio.h>
  39 #include <dev/raid/twe/twevar.h>
  40 #include <dev/raid/twe/twe_tables.h>
  41 #include <sys/dtype.h>
  42
  43 #include <vm/vm.h>
  44
  45 static devclass_t       twe_devclass;
  46
  47 #ifdef TWE_DEBUG
  48 static u_int32_t        twed_bio_in;
  49 #define TWED_BIO_IN     twed_bio_in++
  50 static u_int32_t        twed_bio_out;
  51 #define TWED_BIO_OUT    twed_bio_out++
  52 #else
  53 #define TWED_BIO_IN
  54 #define TWED_BIO_OUT
  55 #endif
  56
  57 static void     twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
  58 static void     twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
  59
  60 /********************************************************************************
  61  ********************************************************************************
  62                                                          Control device interface
  63  ********************************************************************************
  64  ********************************************************************************/
  65
  66 static  d_open_t                twe_open;
  67 static  d_close_t               twe_close;
  68 static  d_ioctl_t               twe_ioctl_wrapper;
  69
  70 static struct dev_ops twe_ops = {
  71         { "twe", 0, 0 },
  72         .d_open =       twe_open,
  73         .d_close =      twe_close,
  74         .d_ioctl =      twe_ioctl_wrapper,
  75 };
  76
  77 /********************************************************************************
  78  * Accept an open operation on the control device.
  79  */
  80 static int
  81 twe_open(struct dev_open_args *ap)
  82 {
  83     cdev_t                      dev = ap->a_head.a_dev;
  84     struct twe_softc            *sc = (struct twe_softc *)dev->si_drv1;
  85
  86     sc->twe_state |= TWE_STATE_OPEN;
  87     return(0);
  88 }
  89
  90 /********************************************************************************
  91  * Accept the last close on the control device.
  92  */
  93 static int
  94 twe_close(struct dev_close_args *ap)
  95 {
  96     cdev_t                      dev = ap->a_head.a_dev;
  97     struct twe_softc            *sc = (struct twe_softc *)dev->si_drv1;
  98
  99     sc->twe_state &= ~TWE_STATE_OPEN;
 100     return (0);
 101 }
 102
 103 /********************************************************************************
 104  * Handle controller-specific control operations.
 105  */
 106 static int
 107 twe_ioctl_wrapper(struct dev_ioctl_args *ap)
 108 {
 109     cdev_t dev = ap->a_head.a_dev;
 110     u_long cmd = ap->a_cmd;
 111     caddr_t addr = ap->a_data;
 112     struct twe_softc *sc = (struct twe_softc *)dev->si_drv1;
 113
 114     return(twe_ioctl(sc, cmd, addr));
 115 }
 116
 117 /********************************************************************************
 118  ********************************************************************************
 119                                                              PCI device interface
 120  ********************************************************************************
 121  ********************************************************************************/
 122
 123 static int      twe_probe(device_t dev);
 124 static int      twe_attach(device_t dev);
 125 static void     twe_free(struct twe_softc *sc);
 126 static int      twe_detach(device_t dev);
 127 static int      twe_shutdown(device_t dev);
 128 static int      twe_suspend(device_t dev);
 129 static int      twe_resume(device_t dev);
 130 static void     twe_pci_intr(void *arg);
 131 static void     twe_intrhook(void *arg);
 132
 133 static device_method_t twe_methods[] = {
 134     /* Device interface */
 135     DEVMETHOD(device_probe,     twe_probe),
 136     DEVMETHOD(device_attach,    twe_attach),
 137     DEVMETHOD(device_detach,    twe_detach),
 138     DEVMETHOD(device_shutdown,  twe_shutdown),
 139     DEVMETHOD(device_suspend,   twe_suspend),
 140     DEVMETHOD(device_resume,    twe_resume),
 141
 142     DEVMETHOD(bus_print_child,  bus_generic_print_child),
 143     DEVMETHOD(bus_driver_added, bus_generic_driver_added),
 144     { 0, 0 }
 145 };
 146
 147 static driver_t twe_pci_driver = {
 148         "twe",
 149         twe_methods,
 150         sizeof(struct twe_softc)
 151 };
 152
 153 DRIVER_MODULE(twe, pci, twe_pci_driver, twe_devclass, NULL, NULL);
 154
 155 /********************************************************************************
 156  * Match a 3ware Escalade ATA RAID controller.
 157  */
 158 static int
 159 twe_probe(device_t dev)
 160 {
 161
 162     debug_called(4);
 163
 164     if ((pci_get_vendor(dev) == TWE_VENDOR_ID) &&
 165         ((pci_get_device(dev) == TWE_DEVICE_ID) ||
 166          (pci_get_device(dev) == TWE_DEVICE_ID_ASIC))) {
 167         device_set_desc_copy(dev, TWE_DEVICE_NAME ". Driver version " TWE_DRIVER_VERSION_STRING);
 168         return(BUS_PROBE_DEFAULT);
 169     }
 170     return(ENXIO);
 171 }
 172
 173 /********************************************************************************
 174  * Allocate resources, initialise the controller.
 175  */
 176 static int
 177 twe_attach(device_t dev)
 178 {
 179     struct twe_softc    *sc;
 180     int                 rid, error;
 181     u_int32_t           command;
 182
 183     debug_called(4);
 184
 185     /*
 186      * Initialise the softc structure.
 187      */
 188     sc = device_get_softc(dev);
 189     sc->twe_dev = dev;
 190
 191     sysctl_ctx_init(&sc->sysctl_ctx);
 192     sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
 193         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
 194         device_get_nameunit(dev), CTLFLAG_RD, 0, "");
 195     if (sc->sysctl_tree == NULL) {
 196         twe_printf(sc, "cannot add sysctl tree node\n");
 197         return (ENXIO);
 198     }
 199     SYSCTL_ADD_STRING(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
 200         OID_AUTO, "driver_version", CTLFLAG_RD, TWE_DRIVER_VERSION_STRING, 0,
 201         "TWE driver version");
 202
 203     /*
 204      * Make sure we are going to be able to talk to this board.
 205      */
 206     command = pci_read_config(dev, PCIR_COMMAND, 2);
 207     if ((command & PCIM_CMD_PORTEN) == 0) {
 208         twe_printf(sc, "register window not available\n");
 209         return(ENXIO);
 210     }
 211     /*
 212      * Force the busmaster enable bit on, in case the BIOS forgot.
 213      */
 214     command |= PCIM_CMD_BUSMASTEREN;
 215     pci_write_config(dev, PCIR_COMMAND, command, 2);
 216
 217     /*
 218      * Allocate the PCI register window.
 219      */
 220     rid = TWE_IO_CONFIG_REG;
 221     if ((sc->twe_io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
 222         RF_ACTIVE)) == NULL) {
 223         twe_printf(sc, "can't allocate register window\n");
 224         twe_free(sc);
 225         return(ENXIO);
 226     }
 227     sc->twe_btag = rman_get_bustag(sc->twe_io);
 228     sc->twe_bhandle = rman_get_bushandle(sc->twe_io);
 229
 230     /*
 231      * Allocate the parent bus DMA tag appropriate for PCI.
 232      */
 233     if (bus_dma_tag_create(NULL,                                /* parent */
 234                            1, 0,                                /* alignment, boundary */
 235                            BUS_SPACE_MAXADDR_32BIT,             /* lowaddr */
 236                            BUS_SPACE_MAXADDR,                   /* highaddr */
 237                            NULL, NULL,                          /* filter, filterarg */
 238                            MAXBSIZE, TWE_MAX_SGL_LENGTH,        /* maxsize, nsegments */
 239                            BUS_SPACE_MAXSIZE_32BIT,             /* maxsegsize */
 240                            0,                                   /* flags */
 241                            &sc->twe_parent_dmat)) {
 242         twe_printf(sc, "can't allocate parent DMA tag\n");
 243         twe_free(sc);
 244         return(ENOMEM);
 245     }
 246
 247     /*
 248      * Allocate and connect our interrupt.
 249      */
 250     rid = 0;
 251     if ((sc->twe_irq = bus_alloc_resource_any(sc->twe_dev, SYS_RES_IRQ,
 252         &rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
 253         twe_printf(sc, "can't allocate interrupt\n");
 254         twe_free(sc);
 255         return(ENXIO);
 256     }
 257     if (bus_setup_intr(sc->twe_dev, sc->twe_irq, 0,
 258                         twe_pci_intr, sc, &sc->twe_intr, NULL)) {
 259         twe_printf(sc, "can't set up interrupt\n");
 260         twe_free(sc);
 261         return(ENXIO);
 262     }
 263
 264     /*
 265      * Create DMA tag for mapping command's into controller-addressable space.
 266      */
 267     if (bus_dma_tag_create(sc->twe_parent_dmat,         /* parent */
 268                            1, 0,                        /* alignment, boundary */
 269                            BUS_SPACE_MAXADDR_32BIT,     /* lowaddr */
 270                            BUS_SPACE_MAXADDR,           /* highaddr */
 271                            NULL, NULL,                  /* filter, filterarg */
 272                            sizeof(TWE_Command) *
 273                            TWE_Q_LENGTH, 1,             /* maxsize, nsegments */
 274                            BUS_SPACE_MAXSIZE_32BIT,     /* maxsegsize */
 275                            0,                           /* flags */
 276                            &sc->twe_cmd_dmat)) {
 277         twe_printf(sc, "can't allocate data buffer DMA tag\n");
 278         twe_free(sc);
 279         return(ENOMEM);
 280     }
 281     /*
 282      * Allocate memory and make it available for DMA.
 283      */
 284     if (bus_dmamem_alloc(sc->twe_cmd_dmat, (void **)&sc->twe_cmd,
 285                          BUS_DMA_NOWAIT, &sc->twe_cmdmap)) {
 286         twe_printf(sc, "can't allocate command memory\n");
 287         return(ENOMEM);
 288     }
 289     bus_dmamap_load(sc->twe_cmd_dmat, sc->twe_cmdmap, sc->twe_cmd,
 290                     sizeof(TWE_Command) * TWE_Q_LENGTH,
 291                     twe_setup_request_dmamap, sc, 0);
 292     bzero(sc->twe_cmd, sizeof(TWE_Command) * TWE_Q_LENGTH);
 293
 294     /*
 295      * Create DMA tag for mapping objects into controller-addressable space.
 296      */
 297     if (bus_dma_tag_create(sc->twe_parent_dmat,         /* parent */
 298                            1, 0,                        /* alignment, boundary */
 299                            BUS_SPACE_MAXADDR_32BIT,     /* lowaddr */
 300                            BUS_SPACE_MAXADDR,           /* highaddr */
 301                            NULL, NULL,                  /* filter, filterarg */
 302                            MAXBSIZE, TWE_MAX_SGL_LENGTH,/* maxsize, nsegments */
 303                            BUS_SPACE_MAXSIZE_32BIT,     /* maxsegsize */
 304                            BUS_DMA_ALLOCNOW,            /* flags */
 305                            &sc->twe_buffer_dmat)) {
 306         twe_printf(sc, "can't allocate data buffer DMA tag\n");
 307         twe_free(sc);
 308         return(ENOMEM);
 309     }
 310
 311     /*
 312      * Create DMA tag for mapping objects into controller-addressable space.
 313      */
 314     if (bus_dma_tag_create(sc->twe_parent_dmat,         /* parent */
 315                            1, 0,                        /* alignment, boundary */
 316                            BUS_SPACE_MAXADDR_32BIT,     /* lowaddr */
 317                            BUS_SPACE_MAXADDR,           /* highaddr */
 318                            NULL, NULL,                  /* filter, filterarg */
 319                            MAXBSIZE, 1,                 /* maxsize, nsegments */
 320                            BUS_SPACE_MAXSIZE_32BIT,     /* maxsegsize */
 321                            0,                           /* flags */
 322                            &sc->twe_immediate_dmat)) {
 323         twe_printf(sc, "can't allocate data buffer DMA tag\n");
 324         twe_free(sc);
 325         return(ENOMEM);
 326     }
 327     /*
 328      * Allocate memory for requests which cannot sleep or support continuation.
 329      */
 330      if (bus_dmamem_alloc(sc->twe_immediate_dmat, (void **)&sc->twe_immediate,
 331                           BUS_DMA_NOWAIT, &sc->twe_immediate_map)) {
 332         twe_printf(sc, "can't allocate memory for immediate requests\n");
 333         return(ENOMEM);
 334      }
 335
 336     /*
 337      * Initialise the controller and driver core.
 338      */
 339     if ((error = twe_setup(sc))) {
 340         twe_free(sc);
 341         return(error);
 342     }
 343
 344     /*
 345      * Print some information about the controller and configuration.
 346      */
 347     twe_describe_controller(sc);
 348
 349     /*
 350      * Create the control device.
 351      */
 352     sc->twe_dev_t = make_dev(&twe_ops, device_get_unit(sc->twe_dev),
 353                              UID_ROOT, GID_OPERATOR,
 354                              S_IRUSR | S_IWUSR, "twe%d",
 355                              device_get_unit(sc->twe_dev));
 356     sc->twe_dev_t->si_drv1 = sc;
 357
 358     /*
 359      * Schedule ourselves to bring the controller up once interrupts are
 360      * available.  This isn't strictly necessary, since we disable
 361      * interrupts while probing the controller, but it is more in keeping
 362      * with common practice for other disk devices.
 363      */
 364     sc->twe_ich.ich_func = twe_intrhook;
 365     sc->twe_ich.ich_arg = sc;
 366     if (config_intrhook_establish(&sc->twe_ich) != 0) {
 367         twe_printf(sc, "can't establish configuration hook\n");
 368         twe_free(sc);
 369         return(ENXIO);
 370     }
 371
 372     return(0);
 373 }
 374
 375 /********************************************************************************
 376  * Free all of the resources associated with (sc).
 377  *
 378  * Should not be called if the controller is active.
 379  */
 380 static void
 381 twe_free(struct twe_softc *sc)
 382 {
 383     struct twe_request  *tr;
 384
 385     debug_called(4);
 386
 387     /* throw away any command buffers */
 388     while ((tr = twe_dequeue_free(sc)) != NULL)
 389         twe_free_request(tr);
 390
 391     if (sc->twe_cmd != NULL) {
 392         bus_dmamap_unload(sc->twe_cmd_dmat, sc->twe_cmdmap);
 393         bus_dmamem_free(sc->twe_cmd_dmat, sc->twe_cmd, sc->twe_cmdmap);
 394     }
 395
 396     if (sc->twe_immediate != NULL) {
 397         bus_dmamap_unload(sc->twe_immediate_dmat, sc->twe_immediate_map);
 398         bus_dmamem_free(sc->twe_immediate_dmat, sc->twe_immediate,
 399                         sc->twe_immediate_map);
 400     }
 401
 402     if (sc->twe_immediate_dmat)
 403         bus_dma_tag_destroy(sc->twe_immediate_dmat);
 404
 405     /* destroy the data-transfer DMA tag */
 406     if (sc->twe_buffer_dmat)
 407         bus_dma_tag_destroy(sc->twe_buffer_dmat);
 408
 409     /* disconnect the interrupt handler */
 410     if (sc->twe_intr)
 411         bus_teardown_intr(sc->twe_dev, sc->twe_irq, sc->twe_intr);
 412     if (sc->twe_irq != NULL)
 413         bus_release_resource(sc->twe_dev, SYS_RES_IRQ, 0, sc->twe_irq);
 414
 415     /* destroy the parent DMA tag */
 416     if (sc->twe_parent_dmat)
 417         bus_dma_tag_destroy(sc->twe_parent_dmat);
 418
 419     /* release the register window mapping */
 420     if (sc->twe_io != NULL)
 421         bus_release_resource(sc->twe_dev, SYS_RES_IOPORT, TWE_IO_CONFIG_REG, sc->twe_io);
 422
 423     dev_ops_remove_minor(&twe_ops, device_get_unit(sc->twe_dev));
 424
 425     /* destroy control device */
 426     if (sc->twe_dev_t != (cdev_t)NULL)
 427         destroy_dev(sc->twe_dev_t);
 428
 429     sysctl_ctx_free(&sc->sysctl_ctx);
 430 }
 431
 432 /********************************************************************************
 433  * Disconnect from the controller completely, in preparation for unload.
 434  */
 435 static int
 436 twe_detach(device_t dev)
 437 {
 438     struct twe_softc    *sc = device_get_softc(dev);
 439     int                 error;
 440
 441     debug_called(4);
 442
 443     error = EBUSY;
 444     crit_enter();
 445     if (sc->twe_state & TWE_STATE_OPEN)
 446         goto out;
 447
 448     /*
 449      * Shut the controller down.
 450      */
 451     if (twe_shutdown(dev))
 452         goto out;
 453
 454     twe_free(sc);
 455
 456     error = 0;
 457  out:
 458     crit_exit();
 459     return(error);
 460 }
 461
 462 /********************************************************************************
 463  * Bring the controller down to a dormant state and detach all child devices.
 464  *
 465  * Note that we can assume that the bioq on the controller is empty, as we won't
 466  * allow shutdown if any device is open.
 467  */
 468 static int
 469 twe_shutdown(device_t dev)
 470 {
 471     struct twe_softc    *sc = device_get_softc(dev);
 472     int                 i, error = 0;
 473
 474     debug_called(4);
 475
 476     crit_enter();
 477
 478     /*
 479      * Delete all our child devices.
 480      */
 481     for (i = 0; i < TWE_MAX_UNITS; i++) {
 482         if (sc->twe_drive[i].td_disk != 0) {
 483             if ((error = twe_detach_drive(sc, i)) != 0)
 484                 goto out;
 485         }
 486     }
 487
 488     /*
 489      * Bring the controller down.
 490      */
 491     twe_deinit(sc);
 492
 493 out:
 494     crit_exit();
 495     return(error);
 496 }
 497
 498 /********************************************************************************
 499  * Bring the controller to a quiescent state, ready for system suspend.
 500  */
 501 static int
 502 twe_suspend(device_t dev)
 503 {
 504     struct twe_softc    *sc = device_get_softc(dev);
 505
 506     debug_called(4);
 507
 508     crit_enter();
 509     sc->twe_state |= TWE_STATE_SUSPEND;
 510
 511     twe_disable_interrupts(sc);
 512     crit_exit();
 513
 514     return(0);
 515 }
 516
 517 /********************************************************************************
 518  * Bring the controller back to a state ready for operation.
 519  */
 520 static int
 521 twe_resume(device_t dev)
 522 {
 523     struct twe_softc    *sc = device_get_softc(dev);
 524
 525     debug_called(4);
 526
 527     sc->twe_state &= ~TWE_STATE_SUSPEND;
 528     twe_enable_interrupts(sc);
 529
 530     return(0);
 531 }
 532
 533 /*******************************************************************************
 534  * Take an interrupt, or be poked by other code to look for interrupt-worthy
 535  * status.
 536  */
 537 static void
 538 twe_pci_intr(void *arg)
 539 {
 540     twe_intr((struct twe_softc *)arg);
 541 }
 542
 543 /********************************************************************************
 544  * Delayed-startup hook
 545  */
 546 static void
 547 twe_intrhook(void *arg)
 548 {
 549     struct twe_softc            *sc = (struct twe_softc *)arg;
 550
 551     /* pull ourselves off the intrhook chain */
 552     config_intrhook_disestablish(&sc->twe_ich);
 553
 554     /* call core startup routine */
 555     twe_init(sc);
 556 }
 557
 558 /********************************************************************************
 559  * Given a detected drive, attach it to the bio interface.
 560  *
 561  * This is called from twe_add_unit.
 562  */
 563 int
 564 twe_attach_drive(struct twe_softc *sc, struct twe_drive *dr)
 565 {
 566     char        buf[80];
 567     int         error;
 568
 569     dr->td_disk =  device_add_child(sc->twe_dev, NULL, -1);
 570     if (dr->td_disk == NULL) {
 571         twe_printf(sc, "Cannot add unit\n");
 572         return (EIO);
 573     }
 574     device_set_ivars(dr->td_disk, dr);
 575
 576     /*
 577      * XXX It would make sense to test the online/initialising bits, but they seem to be
 578      * always set...
 579      */
 580     ksprintf(buf, "Unit %d, %s, %s",
 581             dr->td_twe_unit,
 582             twe_describe_code(twe_table_unittype, dr->td_type),
 583             twe_describe_code(twe_table_unitstate, dr->td_state & TWE_PARAM_UNITSTATUS_MASK));
 584     device_set_desc_copy(dr->td_disk, buf);
 585
 586     if ((error = bus_generic_attach(sc->twe_dev)) != 0) {
 587         twe_printf(sc, "Cannot attach unit to controller. error = %d\n", error);
 588         return (EIO);
 589     }
 590     return (0);
 591 }
 592
 593 /********************************************************************************
 594  * Detach the specified unit if it exsists
 595  *
 596  * This is called from twe_del_unit.
 597  */
 598 int
 599 twe_detach_drive(struct twe_softc *sc, int unit)
 600 {
 601     int error = 0;
 602
 603     if ((error = device_delete_child(sc->twe_dev, sc->twe_drive[unit].td_disk)) != 0) {
 604         twe_printf(sc, "failed to delete unit %d\n", unit);
 605         return(error);
 606     }
 607     bzero(&sc->twe_drive[unit], sizeof(sc->twe_drive[unit]));
 608     return(error);
 609 }
 610
 611 /********************************************************************************
 612  * Clear a PCI parity error.
 613  */
 614 void
 615 twe_clear_pci_parity_error(struct twe_softc *sc)
 616 {
 617     TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PARITY_ERROR);
 618     pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2);
 619 }
 620
 621 /********************************************************************************
 622  * Clear a PCI abort.
 623  */
 624 void
 625 twe_clear_pci_abort(struct twe_softc *sc)
 626 {
 627     TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PCI_ABORT);
 628     pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2);
 629 }
 630
 631 /********************************************************************************
 632  ********************************************************************************
 633                                                                       Disk device
 634  ********************************************************************************
 635  ********************************************************************************/
 636
 637 /*
 638  * Disk device bus interface
 639  */
 640 static int twed_probe(device_t dev);
 641 static int twed_attach(device_t dev);
 642 static int twed_detach(device_t dev);
 643
 644 static device_method_t twed_methods[] = {
 645     DEVMETHOD(device_probe,     twed_probe),
 646     DEVMETHOD(device_attach,    twed_attach),
 647     DEVMETHOD(device_detach,    twed_detach),
 648     { 0, 0 }
 649 };
 650
 651 static driver_t twed_driver = {
 652     "twed",
 653     twed_methods,
 654     sizeof(struct twed_softc)
 655 };
 656
 657 static devclass_t       twed_devclass;
 658 DRIVER_MODULE(twed, twe, twed_driver, twed_devclass, NULL, NULL);
 659
 660 /*
 661  * Disk device control interface.
 662  */
 663 static  d_open_t        twed_open;
 664 static  d_close_t       twed_close;
 665 static  d_strategy_t    twed_strategy;
 666 static  d_dump_t        twed_dump;
 667
 668 static struct dev_ops twed_ops = {
 669         { "twed", 0, D_DISK },
 670         .d_open =       twed_open,
 671         .d_close =      twed_close,
 672         .d_read =       physread,
 673         .d_write =      physwrite,
 674         .d_strategy =   twed_strategy,
 675         .d_dump =       twed_dump,
 676 };
 677
 678 /********************************************************************************
 679  * Handle open from generic layer.
 680  *
 681  * Note that this is typically only called by the diskslice code, and not
 682  * for opens on subdevices (eg. slices, partitions).
 683  */
 684 static int
 685 twed_open(struct dev_open_args *ap)
 686 {
 687     cdev_t dev = ap->a_head.a_dev;
 688     struct twed_softc   *sc = (struct twed_softc *)dev->si_drv1;
 689
 690     debug_called(4);
 691
 692     if (sc == NULL)
 693         return (ENXIO);
 694
 695     /* check that the controller is up and running */
 696     if (sc->twed_controller->twe_state & TWE_STATE_SHUTDOWN)
 697         return(ENXIO);
 698
 699     sc->twed_flags |= TWED_OPEN;
 700     return (0);
 701 }
 702
 703 /********************************************************************************
 704  * Handle last close of the disk device.
 705  */
 706 static int
 707 twed_close(struct dev_close_args *ap)
 708 {
 709     cdev_t dev = ap->a_head.a_dev;
 710     struct twed_softc   *sc = (struct twed_softc *)dev->si_drv1;
 711
 712     debug_called(4);
 713
 714     if (sc == NULL)
 715         return (ENXIO);
 716
 717     sc->twed_flags &= ~TWED_OPEN;
 718     return (0);
 719 }
 720
 721 /********************************************************************************
 722  * Handle an I/O request.
 723  */
 724 static int
 725 twed_strategy(struct dev_strategy_args *ap)
 726 {
 727     cdev_t dev = ap->a_head.a_dev;
 728     struct bio *bio = ap->a_bio;
 729     struct twed_softc *sc = dev->si_drv1;
 730     struct buf *bp = bio->bio_buf;
 731
 732     bio->bio_driver_info = sc;
 733
 734     debug_called(4);
 735
 736     TWED_BIO_IN;
 737
 738     /* bogus disk? */
 739     if (sc == NULL || sc->twed_drive->td_disk == NULL) {
 740         bp->b_error = EINVAL;
 741         bp->b_flags |= B_ERROR;
 742         kprintf("twe: bio for invalid disk!\n");
 743         biodone(bio);
 744         TWED_BIO_OUT;
 745         return(0);
 746     }
 747
 748     /* perform accounting */
 749     devstat_start_transaction(&sc->twed_stats);
 750
 751     /* queue the bio on the controller */
 752     twe_enqueue_bio(sc->twed_controller, bio);
 753
 754     /* poke the controller to start I/O */
 755     twe_startio(sc->twed_controller);
 756     return(0);
 757 }
 758
 759 /********************************************************************************
 760  * System crashdump support
 761  */
 762 static int
 763 twed_dump(struct dev_dump_args *ap)
 764 {
 765     cdev_t dev = ap->a_head.a_dev;
 766     size_t length = ap->a_length;
 767     off_t offset = ap->a_offset;
 768     void *virtual = ap->a_virtual;
 769     struct twed_softc   *twed_sc;
 770     struct twe_softc    *twe_sc;
 771     int                 error;
 772
 773     twed_sc = dev->si_drv1;
 774     if (twed_sc == NULL)
 775         return(ENXIO);
 776     twe_sc  = (struct twe_softc *)twed_sc->twed_controller;
 777
 778     if (length > 0) {
 779         if ((error = twe_dump_blocks(twe_sc, twed_sc->twed_drive->td_twe_unit, offset / TWE_BLOCK_SIZE, virtual, length / TWE_BLOCK_SIZE)) != 0)
 780             return(error);
 781     }
 782     return(0);
 783 }
 784
 785 /********************************************************************************
 786  * Handle completion of an I/O request.
 787  */
 788 void
 789 twed_intr(struct bio *bio)
 790 {
 791     struct buf *bp = bio->bio_buf;
 792     struct twed_softc *sc = bio->bio_driver_info;
 793
 794     debug_called(4);
 795
 796     /* if no error, transfer completed */
 797     if ((bp->b_flags & B_ERROR) == 0)
 798         bp->b_resid = 0;
 799     devstat_end_transaction_buf(&sc->twed_stats, bp);
 800     biodone(bio);
 801     TWED_BIO_OUT;
 802 }
 803
 804 /********************************************************************************
 805  * Default probe stub.
 806  */
 807 static int
 808 twed_probe(device_t dev)
 809 {
 810     return (0);
 811 }
 812
 813 /********************************************************************************
 814  * Attach a unit to the controller.
 815  */
 816 static int
 817 twed_attach(device_t dev)
 818 {
 819     struct twed_softc   *sc;
 820     struct disk_info    info;
 821     device_t            parent;
 822     cdev_t              dsk;
 823
 824     debug_called(4);
 825
 826     /* initialise our softc */
 827     sc = device_get_softc(dev);
 828     parent = device_get_parent(dev);
 829     sc->twed_controller = (struct twe_softc *)device_get_softc(parent);
 830     sc->twed_drive = device_get_ivars(dev);
 831     sc->twed_dev = dev;
 832
 833     /* report the drive */
 834     twed_printf(sc, "%uMB (%u sectors)\n",
 835                 sc->twed_drive->td_size / ((1024 * 1024) / TWE_BLOCK_SIZE),
 836                 sc->twed_drive->td_size);
 837
 838     /* attach a generic disk device to ourselves */
 839
 840     sc->twed_drive->td_sys_unit = device_get_unit(dev);
 841
 842     devstat_add_entry(&sc->twed_stats, "twed", sc->twed_drive->td_sys_unit,
 843                         TWE_BLOCK_SIZE,
 844                         DEVSTAT_NO_ORDERED_TAGS,
 845                         DEVSTAT_TYPE_STORARRAY | DEVSTAT_TYPE_IF_OTHER,
 846                         DEVSTAT_PRIORITY_ARRAY);
 847
 848     dsk = disk_create(sc->twed_drive->td_sys_unit, &sc->twed_disk, &twed_ops);
 849     dsk->si_drv1 = sc;
 850     sc->twed_dev_t = dsk;
 851
 852     /* set the maximum I/O size to the theoretical maximum allowed by the S/G list size */
 853     dsk->si_iosize_max = (TWE_MAX_SGL_LENGTH - 1) * PAGE_SIZE;
 854
 855     /*
 856      * Set disk info, as it appears that all needed data is available already.
 857      * Setting the disk info will also cause the probing to start.
 858      */
 859     bzero(&info, sizeof(info));
 860     info.d_media_blksize    = TWE_BLOCK_SIZE;   /* mandatory */
 861     info.d_media_blocks     = sc->twed_drive->td_size;
 862
 863     info.d_type         = DTYPE_ESDI;           /* optional */
 864     info.d_secpertrack  = sc->twed_drive->td_sectors;
 865     info.d_nheads       = sc->twed_drive->td_heads;
 866     info.d_ncylinders   = sc->twed_drive->td_cylinders;
 867     info.d_secpercyl    = sc->twed_drive->td_sectors * sc->twed_drive->td_heads;
 868
 869     disk_setdiskinfo(&sc->twed_disk, &info);
 870
 871     return (0);
 872 }
 873
 874 /********************************************************************************
 875  * Disconnect ourselves from the system.
 876  */
 877 static int
 878 twed_detach(device_t dev)
 879 {
 880     struct twed_softc *sc = (struct twed_softc *)device_get_softc(dev);
 881
 882     debug_called(4);
 883
 884     if (sc->twed_flags & TWED_OPEN)
 885         return(EBUSY);
 886
 887     devstat_remove_entry(&sc->twed_stats);
 888     disk_destroy(&sc->twed_disk);
 889
 890     return(0);
 891 }
 892
 893 /********************************************************************************
 894  ********************************************************************************
 895                                                                              Misc
 896  ********************************************************************************
 897  ********************************************************************************/
 898
 899 /********************************************************************************
 900  * Allocate a command buffer
 901  */
 902 MALLOC_DEFINE(TWE_MALLOC_CLASS, "twe_commands", "twe commands");
 903
 904 struct twe_request *
 905 twe_allocate_request(struct twe_softc *sc, int tag)
 906 {
 907     struct twe_request  *tr;
 908         int aligned_size;
 909
 910     /*
 911      * TWE requires requests to be 512-byte aligned.  Depend on malloc()
 912      * guarenteeing alignment for power-of-2 requests.  Note that the old
 913      * (FreeBSD-4.x) malloc code aligned all requests, but the new slab
 914      * allocator only guarentees same-size alignment for power-of-2 requests.
 915      */
 916     aligned_size = (sizeof(struct twe_request) + TWE_ALIGNMASK) &
 917            ~TWE_ALIGNMASK;
 918     tr = kmalloc(aligned_size, TWE_MALLOC_CLASS, M_INTWAIT|M_ZERO);
 919     tr->tr_sc = sc;
 920     tr->tr_tag = tag;
 921     if (bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_dmamap)) {
 922         twe_free_request(tr);
 923         twe_printf(sc, "unable to allocate dmamap for tag %d\n", tag);
 924         return(NULL);
 925     }
 926     return(tr);
 927 }
 928
 929 /********************************************************************************
 930  * Permanently discard a command buffer.
 931  */
 932 void
 933 twe_free_request(struct twe_request *tr)
 934 {
 935     struct twe_softc    *sc = tr->tr_sc;
 936
 937     debug_called(4);
 938
 939     bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_dmamap);
 940     kfree(tr, TWE_MALLOC_CLASS);
 941 }
 942
 943 /********************************************************************************
 944  * Map/unmap (tr)'s command and data in the controller's addressable space.
 945  *
 946  * These routines ensure that the data which the controller is going to try to
 947  * access is actually visible to the controller, in a machine-independant
 948  * fashion.  Due to a hardware limitation, I/O buffers must be 512-byte aligned
 949  * and we take care of that here as well.
 950  */
 951 static void
 952 twe_fillin_sgl(TWE_SG_Entry *sgl, bus_dma_segment_t *segs, int nsegments, int max_sgl)
 953 {
 954     int i;
 955
 956     for (i = 0; i < nsegments; i++) {
 957         sgl[i].address = segs[i].ds_addr;
 958         sgl[i].length = segs[i].ds_len;
 959     }
 960     for (; i < max_sgl; i++) {                          /* XXX necessary? */
 961         sgl[i].address = 0;
 962         sgl[i].length = 0;
 963     }
 964 }
 965
 966 static void
 967 twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
 968 {
 969     struct twe_request  *tr = (struct twe_request *)arg;
 970     struct twe_softc    *sc = tr->tr_sc;
 971     TWE_Command         *cmd = TWE_FIND_COMMAND(tr);
 972
 973     debug_called(4);
 974
 975     if (tr->tr_flags & TWE_CMD_MAPPED)
 976         panic("already mapped command");
 977
 978     tr->tr_flags |= TWE_CMD_MAPPED;
 979
 980     if (tr->tr_flags & TWE_CMD_IN_PROGRESS)
 981         sc->twe_state &= ~TWE_STATE_FRZN;
 982     /* save base of first segment in command (applicable if there only one segment) */
 983     tr->tr_dataphys = segs[0].ds_addr;
 984
 985     /* correct command size for s/g list size */
 986     cmd->generic.size += 2 * nsegments;
 987
 988     /*
 989      * Due to the fact that parameter and I/O commands have the scatter/gather list in
 990      * different places, we need to determine which sort of command this actually is
 991      * before we can populate it correctly.
 992      */
 993     switch(cmd->generic.opcode) {
 994     case TWE_OP_GET_PARAM:
 995     case TWE_OP_SET_PARAM:
 996         cmd->generic.sgl_offset = 2;
 997         twe_fillin_sgl(&cmd->param.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
 998         break;
 999     case TWE_OP_READ:
1000     case TWE_OP_WRITE:
1001         cmd->generic.sgl_offset = 3;
1002         twe_fillin_sgl(&cmd->io.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
1003         break;
1004     case TWE_OP_ATA_PASSTHROUGH:
1005         cmd->generic.sgl_offset = 5;
1006         twe_fillin_sgl(&cmd->ata.sgl[0], segs, nsegments, TWE_MAX_ATA_SGL_LENGTH);
1007         break;
1008     default:
1009         /*
1010          * Fall back to what the linux driver does.
1011          * Do this because the API may send an opcode
1012          * the driver knows nothing about and this will
1013          * at least stop PCIABRT's from hosing us.
1014          */
1015         switch (cmd->generic.sgl_offset) {
1016         case 2:
1017             twe_fillin_sgl(&cmd->param.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
1018             break;
1019         case 3:
1020             twe_fillin_sgl(&cmd->io.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
1021             break;
1022         case 5:
1023             twe_fillin_sgl(&cmd->ata.sgl[0], segs, nsegments, TWE_MAX_ATA_SGL_LENGTH);
1024             break;
1025         }
1026     }
1027
1028     if (tr->tr_flags & TWE_CMD_DATAIN) {
1029         if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1030             bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1031                             BUS_DMASYNC_PREREAD);
1032         } else {
1033             bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1034                             BUS_DMASYNC_PREREAD);
1035         }
1036     }
1037
1038     if (tr->tr_flags & TWE_CMD_DATAOUT) {
1039         /*
1040          * if we're using an alignment buffer, and we're writing data
1041          * copy the real data out
1042          */
1043         if (tr->tr_flags & TWE_CMD_ALIGNBUF)
1044             bcopy(tr->tr_realdata, tr->tr_data, tr->tr_length);
1045
1046         if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1047             bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1048                             BUS_DMASYNC_PREWRITE);
1049         } else {
1050             bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1051                             BUS_DMASYNC_PREWRITE);
1052         }
1053     }
1054
1055     if (twe_start(tr) == EBUSY) {
1056         tr->tr_sc->twe_state |= TWE_STATE_CTLR_BUSY;
1057         twe_requeue_ready(tr);
1058     }
1059 }
1060
1061 static void
1062 twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1063 {
1064     struct twe_softc    *sc = (struct twe_softc *)arg;
1065
1066     debug_called(4);
1067
1068     /* command can't cross a page boundary */
1069     sc->twe_cmdphys = segs[0].ds_addr;
1070 }
1071
1072 int
1073 twe_map_request(struct twe_request *tr)
1074 {
1075     struct twe_softc    *sc = tr->tr_sc;
1076     int                 error = 0;
1077
1078     debug_called(4);
1079
1080     if (sc->twe_state & (TWE_STATE_CTLR_BUSY | TWE_STATE_FRZN)) {
1081         twe_requeue_ready(tr);
1082         return (EBUSY);
1083     }
1084
1085     bus_dmamap_sync(sc->twe_cmd_dmat, sc->twe_cmdmap, BUS_DMASYNC_PREWRITE);
1086
1087     /*
1088      * If the command involves data, map that too.
1089      */
1090     if (tr->tr_data != NULL && ((tr->tr_flags & TWE_CMD_MAPPED) == 0)) {
1091
1092         /*
1093          * Data must be 512-byte aligned; allocate a fixup buffer if it's not.
1094          *
1095          * DragonFly's malloc only guarentees alignment for requests which
1096          * are power-of-2 sized.
1097          */
1098         if (((vm_offset_t)tr->tr_data % TWE_ALIGNMENT) != 0) {
1099             int aligned_size;
1100
1101             tr->tr_realdata = tr->tr_data;      /* save pointer to 'real' data */
1102             aligned_size = TWE_ALIGNMENT;
1103             while (aligned_size < tr->tr_length)
1104                 aligned_size <<= 1;
1105             tr->tr_flags |= TWE_CMD_ALIGNBUF;
1106             tr->tr_data = kmalloc(aligned_size, TWE_MALLOC_CLASS, M_INTWAIT);
1107             if (tr->tr_data == NULL) {
1108                 twe_printf(sc, "%s: malloc failed\n", __func__);
1109                 tr->tr_data = tr->tr_realdata; /* restore original data pointer */
1110                 return(ENOMEM);
1111             }
1112         }
1113
1114         /*
1115          * Map the data buffer into bus space and build the s/g list.
1116          */
1117         if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1118             error = bus_dmamap_load(sc->twe_immediate_dmat, sc->twe_immediate_map, sc->twe_immediate,
1119                             tr->tr_length, twe_setup_data_dmamap, tr, BUS_DMA_NOWAIT);
1120         } else {
1121             error = bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_dmamap, tr->tr_data, tr->tr_length,
1122                                     twe_setup_data_dmamap, tr, 0);
1123         }
1124         if (error == EINPROGRESS) {
1125             tr->tr_flags |= TWE_CMD_IN_PROGRESS;
1126             sc->twe_state |= TWE_STATE_FRZN;
1127             error = 0;
1128         }
1129     } else
1130         if ((error = twe_start(tr)) == EBUSY) {
1131             sc->twe_state |= TWE_STATE_CTLR_BUSY;
1132             twe_requeue_ready(tr);
1133         }
1134
1135     return(error);
1136 }
1137
1138 void
1139 twe_unmap_request(struct twe_request *tr)
1140 {
1141     struct twe_softc    *sc = tr->tr_sc;
1142
1143     debug_called(4);
1144
1145     bus_dmamap_sync(sc->twe_cmd_dmat, sc->twe_cmdmap, BUS_DMASYNC_POSTWRITE);
1146
1147     /*
1148      * If the command involved data, unmap that too.
1149      */
1150     if (tr->tr_data != NULL) {
1151         if (tr->tr_flags & TWE_CMD_DATAIN) {
1152             if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1153                 bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1154                                 BUS_DMASYNC_POSTREAD);
1155             } else {
1156                 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1157                                 BUS_DMASYNC_POSTREAD);
1158             }
1159
1160             /* if we're using an alignment buffer, and we're reading data, copy the real data in */
1161             if (tr->tr_flags & TWE_CMD_ALIGNBUF)
1162                 bcopy(tr->tr_data, tr->tr_realdata, tr->tr_length);
1163         }
1164         if (tr->tr_flags & TWE_CMD_DATAOUT) {
1165             if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1166                 bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1167                                 BUS_DMASYNC_POSTWRITE);
1168             } else {
1169                 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1170                                 BUS_DMASYNC_POSTWRITE);
1171             }
1172         }
1173
1174         if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1175             bus_dmamap_unload(sc->twe_immediate_dmat, sc->twe_immediate_map);
1176         } else {
1177             bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_dmamap);
1178         }
1179     }
1180
1181     /* free alignment buffer if it was used */
1182     if (tr->tr_flags & TWE_CMD_ALIGNBUF) {
1183         kfree(tr->tr_data, TWE_MALLOC_CLASS);
1184         tr->tr_data = tr->tr_realdata;          /* restore 'real' data pointer */
1185     }
1186 }
1187
1188 #ifdef TWE_DEBUG
1189 void twe_report(void);
1190 /********************************************************************************
1191  * Print current controller status, call from DDB.
1192  */
1193 void
1194 twe_report(void)
1195 {
1196     struct twe_softc    *sc;
1197     int                 i;
1198
1199     crit_enter();
1200     for (i = 0; (sc = devclass_get_softc(twe_devclass, i)) != NULL; i++)
1201         twe_print_controller(sc);
1202     kprintf("twed: total bio count in %u  out %u\n", twed_bio_in, twed_bio_out);
1203     crit_exit();
1204 }
1205 #endif