sys/dev/serial/rc/rc.c

   1 /*
   2  * (MPSAFE)
   3  *
   4  * Copyright (C) 1995 by Pavel Antonov, Moscow, Russia.
   5  * Copyright (C) 1995 by Andrey A. Chernov, Moscow, Russia.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  *
  29  * $FreeBSD: src/sys/i386/isa/rc.c,v 1.53.2.1 2001/02/26 04:23:10 jlemon Exp $
  30  *
  31  */
  32
  33 /*
  34  * SDL Communications Riscom/8 (based on Cirrus Logic CL-CD180) driver
  35  *
  36  */
  37
  38 #include "use_rc.h"
  39
  40 /*#define RCDEBUG*/
  41
  42 #include <sys/param.h>
  43 #include <sys/systm.h>
  44 #include <sys/tty.h>
  45 #include <sys/proc.h>
  46 #include <sys/priv.h>
  47 #include <sys/conf.h>
  48 #include <sys/dkstat.h>
  49 #include <sys/fcntl.h>
  50 #include <sys/interrupt.h>
  51 #include <sys/kernel.h>
  52 #include <sys/thread2.h>
  53 #include <machine/clock.h>
  54
  55 #include <bus/isa/isa_device.h>
  56
  57 #include <machine_base/isa/ic/cd180.h>
  58 #include "rcreg.h"
  59
  60 /* Prototypes */
  61 static int     rcprobe         (struct isa_device *);
  62 static int     rcattach        (struct isa_device *);
  63
  64 #define rcin(port)      RC_IN  (nec, port)
  65 #define rcout(port,v)   RC_OUT (nec, port, v)
  66
  67 #define WAITFORCCR(u,c) rc_wait0(nec, (u), (c), __LINE__)
  68 #define CCRCMD(u,c,cmd) WAITFORCCR((u), (c)); rcout(CD180_CCR, (cmd))
  69
  70 #define RC_IBUFSIZE     256
  71 #define RB_I_HIGH_WATER (TTYHOG - 2 * RC_IBUFSIZE)
  72 #define RC_OBUFSIZE     512
  73 #define RC_IHIGHWATER   (3 * RC_IBUFSIZE / 4)
  74 #define INPUT_FLAGS_SHIFT (2 * RC_IBUFSIZE)
  75 #define LOTS_OF_EVENTS  64
  76
  77 #define RC_FAKEID       0x10
  78
  79 #define RC_PROBED 1
  80 #define RC_ATTACHED 2
  81
  82 #define GET_UNIT(dev)   (minor(dev) & 0x3F)
  83 #define CALLOUT(dev)    (minor(dev) & 0x80)
  84
  85 /* For isa routines */
  86 struct isa_driver rcdriver = {
  87         rcprobe, rcattach, "rc"
  88 };
  89
  90 static  d_open_t        rcopen;
  91 static  d_close_t       rcclose;
  92 static  d_ioctl_t       rcioctl;
  93
  94 static struct dev_ops rc_ops = {
  95         { "rc", 0, D_TTY },
  96         .d_open =       rcopen,
  97         .d_close =      rcclose,
  98         .d_read =       ttyread,
  99         .d_write =      ttywrite,
 100         .d_ioctl =      rcioctl,
 101         .d_kqfilter =   ttykqfilter,
 102         .d_revoke =     ttyrevoke
 103 };
 104
 105 /* Per-board structure */
 106 static struct rc_softc {
 107         u_int           rcb_probed;     /* 1 - probed, 2 - attached */
 108         u_int           rcb_addr;       /* Base I/O addr        */
 109         u_int           rcb_unit;       /* unit #               */
 110         u_char          rcb_dtr;        /* DTR status           */
 111         struct rc_chans *rcb_baserc;    /* base rc ptr          */
 112 } rc_softc[NRC];
 113
 114 /* Per-channel structure */
 115 static struct rc_chans  {
 116         struct rc_softc *rc_rcb;                /* back ptr             */
 117         u_short          rc_flags;              /* Misc. flags          */
 118         int              rc_chan;               /* Channel #            */
 119         u_char           rc_ier;                /* intr. enable reg     */
 120         u_char           rc_msvr;               /* modem sig. status    */
 121         u_char           rc_cor2;               /* options reg          */
 122         u_char           rc_pendcmd;            /* special cmd pending  */
 123         u_int            rc_dtrwait;            /* dtr timeout          */
 124         u_int            rc_dcdwaits;           /* how many waits DCD in open */
 125         u_char           rc_hotchar;            /* end packed optimize */
 126         struct tty      *rc_tp;                 /* tty struct           */
 127         u_char          *rc_iptr;               /* Chars input buffer         */
 128         u_char          *rc_hiwat;              /* hi-water mark        */
 129         u_char          *rc_bufend;             /* end of buffer        */
 130         u_char          *rc_optr;               /* ptr in output buf    */
 131         u_char          *rc_obufend;            /* end of output buf    */
 132         struct callout   rc_dtr_ch;
 133         u_char           rc_ibuf[4 * RC_IBUFSIZE];  /* input buffer         */
 134         u_char           rc_obuf[RC_OBUFSIZE];  /* output buffer        */
 135 } rc_chans[NRC * CD180_NCHAN];
 136
 137 static int rc_scheduled_event = 0;
 138 static struct callout rc_wakeup_ch;
 139
 140 /* for pstat -t */
 141 static struct tty rc_tty[NRC * CD180_NCHAN];
 142 static const int  nrc_tty = NRC * CD180_NCHAN;
 143
 144 /* Flags */
 145 #define RC_DTR_OFF      0x0001          /* DTR wait, for close/open     */
 146 #define RC_ACTOUT       0x0002          /* Dial-out port active         */
 147 #define RC_RTSFLOW      0x0004          /* RTS flow ctl enabled         */
 148 #define RC_CTSFLOW      0x0008          /* CTS flow ctl enabled         */
 149 #define RC_DORXFER      0x0010          /* RXFER event planned          */
 150 #define RC_DOXXFER      0x0020          /* XXFER event planned          */
 151 #define RC_MODCHG       0x0040          /* Modem status changed         */
 152 #define RC_OSUSP        0x0080          /* Output suspended             */
 153 #define RC_OSBUSY       0x0100          /* start() routine in progress  */
 154 #define RC_WAS_BUFOVFL  0x0200          /* low-level buffer ovferflow   */
 155 #define RC_WAS_SILOVFL  0x0400          /* silo buffer overflow         */
 156 #define RC_SEND_RDY     0x0800          /* ready to send */
 157
 158 /* Table for translation of RCSR status bits to internal form */
 159 static int rc_rcsrt[16] = {
 160         0,             TTY_OE,               TTY_FE,
 161         TTY_FE|TTY_OE, TTY_PE,               TTY_PE|TTY_OE,
 162         TTY_PE|TTY_FE, TTY_PE|TTY_FE|TTY_OE, TTY_BI,
 163         TTY_BI|TTY_OE, TTY_BI|TTY_FE,        TTY_BI|TTY_FE|TTY_OE,
 164         TTY_BI|TTY_PE, TTY_BI|TTY_PE|TTY_OE, TTY_BI|TTY_PE|TTY_FE,
 165         TTY_BI|TTY_PE|TTY_FE|TTY_OE
 166 };
 167
 168 /* Static prototypes */
 169 static inthand2_t rcintr;
 170 static void rc_hwreset          (int, int, unsigned int);
 171 static int  rc_test             (int, int);
 172 static void rc_discard_output   (struct rc_chans *);
 173 static void rc_hardclose        (struct rc_chans *);
 174 static int  rc_modctl           (struct rc_chans *, int, int);
 175 static void rc_start            (struct tty *);
 176 static void rc_stop              (struct tty *, int rw);
 177 static int  rc_param            (struct tty *, struct termios *);
 178 static inthand2_t rcpoll;
 179 static void rc_reinit           (struct rc_softc *);
 180 #ifdef RCDEBUG
 181 static void printrcflags();
 182 #endif
 183 static timeout_t rc_dtrwakeup;
 184 static timeout_t rc_wakeup;
 185 static void disc_optim          (struct tty     *tp, struct termios *t, struct rc_chans *);
 186 static void rc_wait0            (int nec, int unit, int chan, int line);
 187
 188 /**********************************************/
 189
 190 /* Quick device probing */
 191 static int
 192 rcprobe(struct isa_device *dvp)
 193 {
 194         int             irq = ffs(dvp->id_irq) - 1;
 195         int    nec = dvp->id_iobase;
 196
 197         if (dvp->id_unit > NRC)
 198                 return 0;
 199         if (!RC_VALIDADDR(nec)) {
 200                 kprintf("rc%d: illegal base address %x\n", dvp->id_unit, nec);
 201                 return 0;
 202         }
 203         if (!RC_VALIDIRQ(irq)) {
 204                 kprintf("rc%d: illegal IRQ value %d\n", dvp->id_unit, irq);
 205                 return 0;
 206         }
 207         lwkt_gettoken(&tty_token);
 208         rcout(CD180_PPRL, 0x22); /* Random values to Prescale reg. */
 209         rcout(CD180_PPRH, 0x11);
 210         if (rcin(CD180_PPRL) != 0x22 || rcin(CD180_PPRH) != 0x11) {
 211                 lwkt_reltoken(&tty_token);
 212                 return 0;
 213         }
 214         /* Now, test the board more thoroughly, with diagnostic */
 215         if (rc_test(nec, dvp->id_unit)) {
 216                 lwkt_reltoken(&tty_token);
 217                 return 0;
 218         }
 219         rc_softc[dvp->id_unit].rcb_probed = RC_PROBED;
 220         lwkt_reltoken(&tty_token);
 221         return 0xF;
 222 }
 223
 224 static int
 225 rcattach(struct isa_device *dvp)
 226 {
 227         int            chan, nec = dvp->id_iobase;
 228         struct rc_softc         *rcb = &rc_softc[dvp->id_unit];
 229         struct rc_chans         *rc  = &rc_chans[dvp->id_unit * CD180_NCHAN];
 230         static int              rc_started = 0;
 231         struct tty              *tp;
 232
 233         lwkt_gettoken(&tty_token);
 234         dvp->id_intr = rcintr;
 235
 236         /* Thorooughly test the device */
 237         if (rcb->rcb_probed != RC_PROBED) {
 238                 lwkt_reltoken(&tty_token);
 239                 return 0;
 240         }
 241         rcb->rcb_addr   = nec;
 242         rcb->rcb_dtr    = 0;
 243         rcb->rcb_baserc = rc;
 244         rcb->rcb_unit   = dvp->id_unit;
 245         /*rcb->rcb_chipid = 0x10 + dvp->id_unit;*/
 246         kprintf("rc%d: %d chans, firmware rev. %c\n", rcb->rcb_unit,
 247                 CD180_NCHAN, (rcin(CD180_GFRCR) & 0xF) + 'A');
 248
 249         for (chan = 0; chan < CD180_NCHAN; chan++, rc++) {
 250                 callout_init_mp(&rc->rc_dtr_ch);
 251                 rc->rc_rcb     = rcb;
 252                 rc->rc_chan    = chan;
 253                 rc->rc_iptr    = rc->rc_ibuf;
 254                 rc->rc_bufend  = &rc->rc_ibuf[RC_IBUFSIZE];
 255                 rc->rc_hiwat   = &rc->rc_ibuf[RC_IHIGHWATER];
 256                 rc->rc_flags   = rc->rc_ier = rc->rc_msvr = 0;
 257                 rc->rc_cor2    = rc->rc_pendcmd = 0;
 258                 rc->rc_optr    = rc->rc_obufend  = rc->rc_obuf;
 259                 rc->rc_dtrwait = 3 * hz;
 260                 rc->rc_dcdwaits= 0;
 261                 rc->rc_hotchar = 0;
 262                 tp = rc->rc_tp = &rc_tty[chan + (dvp->id_unit * CD180_NCHAN)];
 263                 ttychars(tp);
 264                 tp->t_lflag = tp->t_iflag = tp->t_oflag = 0;
 265                 tp->t_cflag = TTYDEF_CFLAG;
 266                 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
 267         }
 268         rcb->rcb_probed = RC_ATTACHED;
 269         if (!rc_started) {
 270                 register_swi_mp(SWI_TTY, rcpoll, NULL, "rcpoll", NULL);
 271                 callout_init_mp(&rc_wakeup_ch);
 272                 rc_wakeup(NULL);
 273                 rc_started = 1;
 274         }
 275         lwkt_reltoken(&tty_token);
 276         return 1;
 277 }
 278
 279 /* RC interrupt handling */
 280 static void
 281 rcintr(void *arg, void *frame)
 282 {
 283         int unit = (int)arg;
 284         struct rc_softc        *rcb = &rc_softc[unit];
 285         struct rc_chans        *rc;
 286         int                    nec, resid;
 287         u_char                 val, iack, bsr, ucnt, *optr;
 288         int                             good_data, t_state;
 289
 290         lwkt_gettoken(&tty_token);
 291         if (rcb->rcb_probed != RC_ATTACHED) {
 292                 kprintf("rc%d: bogus interrupt\n", unit);
 293                 lwkt_reltoken(&tty_token);
 294                 return;
 295         }
 296         nec = rcb->rcb_addr;
 297
 298         bsr = ~(rcin(RC_BSR));
 299
 300         if (!(bsr & (RC_BSR_TOUT|RC_BSR_RXINT|RC_BSR_TXINT|RC_BSR_MOINT))) {
 301                 kprintf("rc%d: extra interrupt\n", unit);
 302                 rcout(CD180_EOIR, 0);
 303                 lwkt_reltoken(&tty_token);
 304                 return;
 305         }
 306
 307         while (bsr & (RC_BSR_TOUT|RC_BSR_RXINT|RC_BSR_TXINT|RC_BSR_MOINT)) {
 308 #ifdef RCDEBUG_DETAILED
 309                 kprintf("rc%d: intr (%02x) %s%s%s%s\n", unit, bsr,
 310                         (bsr & RC_BSR_TOUT)?"TOUT ":"",
 311                         (bsr & RC_BSR_RXINT)?"RXINT ":"",
 312                         (bsr & RC_BSR_TXINT)?"TXINT ":"",
 313                         (bsr & RC_BSR_MOINT)?"MOINT":"");
 314 #endif
 315                 if (bsr & RC_BSR_TOUT) {
 316                         kprintf("rc%d: hardware failure, reset board\n", unit);
 317                         rcout(RC_CTOUT, 0);
 318                         rc_reinit(rcb);
 319                         lwkt_reltoken(&tty_token);
 320                         return;
 321                 }
 322                 if (bsr & RC_BSR_RXINT) {
 323                         iack = rcin(RC_PILR_RX);
 324                         good_data = (iack == (GIVR_IT_RGDI | RC_FAKEID));
 325                         if (!good_data && iack != (GIVR_IT_REI | RC_FAKEID)) {
 326                                 kprintf("rc%d: fake rxint: %02x\n", unit, iack);
 327                                 goto more_intrs;
 328                         }
 329                         rc = rcb->rcb_baserc + ((rcin(CD180_GICR) & GICR_CHAN) >> GICR_LSH);
 330                         t_state = rc->rc_tp->t_state;
 331                         /* Do RTS flow control stuff */
 332                         if (  (rc->rc_flags & RC_RTSFLOW)
 333                             || !(t_state & TS_ISOPEN)
 334                            ) {
 335                                 if (  (   !(t_state & TS_ISOPEN)
 336                                        || (t_state & TS_TBLOCK)
 337                                       )
 338                                     && (rc->rc_msvr & MSVR_RTS)
 339                                    )
 340                                         rcout(CD180_MSVR,
 341                                                 rc->rc_msvr &= ~MSVR_RTS);
 342                                 else if (!(rc->rc_msvr & MSVR_RTS))
 343                                         rcout(CD180_MSVR,
 344                                                 rc->rc_msvr |= MSVR_RTS);
 345                         }
 346                         ucnt  = rcin(CD180_RDCR) & 0xF;
 347                         resid = 0;
 348
 349                         if (t_state & TS_ISOPEN) {
 350                                 /* check for input buffer overflow */
 351                                 if ((rc->rc_iptr + ucnt) >= rc->rc_bufend) {
 352                                         resid  = ucnt;
 353                                         ucnt   = rc->rc_bufend - rc->rc_iptr;
 354                                         resid -= ucnt;
 355                                         if (!(rc->rc_flags & RC_WAS_BUFOVFL)) {
 356                                                 rc->rc_flags |= RC_WAS_BUFOVFL;
 357                                                 rc_scheduled_event++;
 358                                         }
 359                                 }
 360                                 optr = rc->rc_iptr;
 361                                 /* check foor good data */
 362                                 if (good_data) {
 363                                         while (ucnt-- > 0) {
 364                                                 val = rcin(CD180_RDR);
 365                                                 optr[0] = val;
 366                                                 optr[INPUT_FLAGS_SHIFT] = 0;
 367                                                 optr++;
 368                                                 rc_scheduled_event++;
 369                                                 if (val != 0 && val == rc->rc_hotchar)
 370                                                         setsofttty();
 371                                         }
 372                                 } else {
 373                                         /* Store also status data */
 374                                         while (ucnt-- > 0) {
 375                                                 iack = rcin(CD180_RCSR);
 376                                                 if (iack & RCSR_Timeout)
 377                                                         break;
 378                                                 if (   (iack & RCSR_OE)
 379                                                     && !(rc->rc_flags & RC_WAS_SILOVFL)) {
 380                                                         rc->rc_flags |= RC_WAS_SILOVFL;
 381                                                         rc_scheduled_event++;
 382                                                 }
 383                                                 val = rcin(CD180_RDR);
 384                                                 /*
 385                                                   Don't store PE if IGNPAR and BREAK if IGNBRK,
 386                                                   this hack allows "raw" tty optimization
 387                                                   works even if IGN* is set.
 388                                                 */
 389                                                 if (   !(iack & (RCSR_PE|RCSR_FE|RCSR_Break))
 390                                                     || ((!(iack & (RCSR_PE|RCSR_FE))
 391                                                     ||  !(rc->rc_tp->t_iflag & IGNPAR))
 392                                                     && (!(iack & RCSR_Break)
 393                                                     ||  !(rc->rc_tp->t_iflag & IGNBRK)))) {
 394                                                         if (   (iack & (RCSR_PE|RCSR_FE))
 395                                                             && (t_state & TS_CAN_BYPASS_L_RINT)
 396                                                             && ((iack & RCSR_FE)
 397                                                             ||  ((iack & RCSR_PE)
 398                                                             &&  (rc->rc_tp->t_iflag & INPCK))))
 399                                                                 val = 0;
 400                                                         else if (val != 0 && val == rc->rc_hotchar)
 401                                                                 setsofttty();
 402                                                         optr[0] = val;
 403                                                         optr[INPUT_FLAGS_SHIFT] = iack;
 404                                                         optr++;
 405                                                         rc_scheduled_event++;
 406                                                 }
 407                                         }
 408                                 }
 409                                 rc->rc_iptr = optr;
 410                                 rc->rc_flags |= RC_DORXFER;
 411                         } else
 412                                 resid = ucnt;
 413                         /* Clear FIFO if necessary */
 414                         while (resid-- > 0) {
 415                                 if (!good_data)
 416                                         iack = rcin(CD180_RCSR);
 417                                 else
 418                                         iack = 0;
 419                                 if (iack & RCSR_Timeout)
 420                                         break;
 421                                 (void) rcin(CD180_RDR);
 422                         }
 423                         goto more_intrs;
 424                 }
 425                 if (bsr & RC_BSR_MOINT) {
 426                         iack = rcin(RC_PILR_MODEM);
 427                         if (iack != (GIVR_IT_MSCI | RC_FAKEID)) {
 428                                 kprintf("rc%d: fake moint: %02x\n", unit, iack);
 429                                 goto more_intrs;
 430                         }
 431                         rc = rcb->rcb_baserc + ((rcin(CD180_GICR) & GICR_CHAN) >> GICR_LSH);
 432                         iack = rcin(CD180_MCR);
 433                         rc->rc_msvr = rcin(CD180_MSVR);
 434                         rcout(CD180_MCR, 0);
 435 #ifdef RCDEBUG
 436                         printrcflags(rc, "moint");
 437 #endif
 438                         if (rc->rc_flags & RC_CTSFLOW) {
 439                                 if (rc->rc_msvr & MSVR_CTS)
 440                                         rc->rc_flags |= RC_SEND_RDY;
 441                                 else
 442                                         rc->rc_flags &= ~RC_SEND_RDY;
 443                         } else
 444                                 rc->rc_flags |= RC_SEND_RDY;
 445                         if ((iack & MCR_CDchg) && !(rc->rc_flags & RC_MODCHG)) {
 446                                 rc_scheduled_event += LOTS_OF_EVENTS;
 447                                 rc->rc_flags |= RC_MODCHG;
 448                                 setsofttty();
 449                         }
 450                         goto more_intrs;
 451                 }
 452                 if (bsr & RC_BSR_TXINT) {
 453                         iack = rcin(RC_PILR_TX);
 454                         if (iack != (GIVR_IT_TDI | RC_FAKEID)) {
 455                                 kprintf("rc%d: fake txint: %02x\n", unit, iack);
 456                                 goto more_intrs;
 457                         }
 458                         rc = rcb->rcb_baserc + ((rcin(CD180_GICR) & GICR_CHAN) >> GICR_LSH);
 459                         if (    (rc->rc_flags & RC_OSUSP)
 460                             || !(rc->rc_flags & RC_SEND_RDY)
 461                            )
 462                                 goto more_intrs;
 463                         /* Handle breaks and other stuff */
 464                         if (rc->rc_pendcmd) {
 465                                 rcout(CD180_COR2, rc->rc_cor2 |= COR2_ETC);
 466                                 rcout(CD180_TDR,  CD180_C_ESC);
 467                                 rcout(CD180_TDR,  rc->rc_pendcmd);
 468                                 rcout(CD180_COR2, rc->rc_cor2 &= ~COR2_ETC);
 469                                 rc->rc_pendcmd = 0;
 470                                 goto more_intrs;
 471                         }
 472                         optr = rc->rc_optr;
 473                         resid = rc->rc_obufend - optr;
 474                         if (resid > CD180_NFIFO)
 475                                 resid = CD180_NFIFO;
 476                         while (resid-- > 0)
 477                                 rcout(CD180_TDR, *optr++);
 478                         rc->rc_optr = optr;
 479
 480                         /* output completed? */
 481                         if (optr >= rc->rc_obufend) {
 482                                 rcout(CD180_IER, rc->rc_ier &= ~IER_TxRdy);
 483 #ifdef RCDEBUG
 484                                 kprintf("rc%d/%d: output completed\n", unit, rc->rc_chan);
 485 #endif
 486                                 if (!(rc->rc_flags & RC_DOXXFER)) {
 487                                         rc_scheduled_event += LOTS_OF_EVENTS;
 488                                         rc->rc_flags |= RC_DOXXFER;
 489                                         setsofttty();
 490                                 }
 491                         }
 492                 }
 493         more_intrs:
 494                 rcout(CD180_EOIR, 0);   /* end of interrupt */
 495                 rcout(RC_CTOUT, 0);
 496                 bsr = ~(rcin(RC_BSR));
 497         }
 498         lwkt_reltoken(&tty_token);
 499 }
 500
 501 /* Feed characters to output buffer */
 502 static void
 503 rc_start(struct tty *tp)
 504 {
 505         struct rc_chans       *rc = &rc_chans[GET_UNIT(tp->t_dev)];
 506         int                    nec = rc->rc_rcb->rcb_addr;
 507
 508         lwkt_gettoken(&tty_token);
 509         if (rc->rc_flags & RC_OSBUSY) {
 510                 lwkt_reltoken(&tty_token);
 511                 return;
 512         }
 513         crit_enter();
 514         rc->rc_flags |= RC_OSBUSY;
 515         cpu_disable_intr();
 516         if (tp->t_state & TS_TTSTOP)
 517                 rc->rc_flags |= RC_OSUSP;
 518         else
 519                 rc->rc_flags &= ~RC_OSUSP;
 520         /* Do RTS flow control stuff */
 521         if (   (rc->rc_flags & RC_RTSFLOW)
 522             && (tp->t_state & TS_TBLOCK)
 523             && (rc->rc_msvr & MSVR_RTS)
 524            ) {
 525                 rcout(CD180_CAR, rc->rc_chan);
 526                 rcout(CD180_MSVR, rc->rc_msvr &= ~MSVR_RTS);
 527         } else if (!(rc->rc_msvr & MSVR_RTS)) {
 528                 rcout(CD180_CAR, rc->rc_chan);
 529                 rcout(CD180_MSVR, rc->rc_msvr |= MSVR_RTS);
 530         }
 531         cpu_enable_intr();
 532         if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
 533                 goto out;
 534 #ifdef RCDEBUG
 535         printrcflags(rc, "rcstart");
 536 #endif
 537         ttwwakeup(tp);
 538 #ifdef RCDEBUG
 539         kprintf("rcstart: outq = %d obuf = %d\n",
 540                 tp->t_outq.c_cc, rc->rc_obufend - rc->rc_optr);
 541 #endif
 542         if (tp->t_state & TS_BUSY)
 543                 goto    out;    /* output still in progress ... */
 544
 545         if (tp->t_outq.c_cc > 0) {
 546                 u_int   ocnt;
 547
 548                 tp->t_state |= TS_BUSY;
 549                 ocnt = q_to_b(&tp->t_outq, rc->rc_obuf, sizeof rc->rc_obuf);
 550                 cpu_disable_intr();
 551                 rc->rc_optr = rc->rc_obuf;
 552                 rc->rc_obufend = rc->rc_optr + ocnt;
 553                 cpu_enable_intr();
 554                 if (!(rc->rc_ier & IER_TxRdy)) {
 555 #ifdef RCDEBUG
 556                         kprintf("rc%d/%d: rcstart enable txint\n", rc->rc_rcb->rcb_unit, rc->rc_chan);
 557 #endif
 558                         rcout(CD180_CAR, rc->rc_chan);
 559                         rcout(CD180_IER, rc->rc_ier |= IER_TxRdy);
 560                 }
 561         }
 562 out:
 563         rc->rc_flags &= ~RC_OSBUSY;
 564         crit_exit();
 565         lwkt_reltoken(&tty_token);
 566 }
 567
 568 /* Handle delayed events. */
 569 void
 570 rcpoll(void *dummy, void *frame)
 571 {
 572         struct rc_chans *rc;
 573         struct rc_softc *rcb;
 574         u_char        *tptr, *eptr;
 575         struct tty    *tp;
 576         int            chan, icnt, nec, unit;
 577
 578         lwkt_gettoken(&tty_token);
 579         if (rc_scheduled_event == 0) {
 580                 lwkt_reltoken(&tty_token);
 581                 return;
 582         }
 583 repeat:
 584         for (unit = 0; unit < NRC; unit++) {
 585                 rcb = &rc_softc[unit];
 586                 rc = rcb->rcb_baserc;
 587                 nec = rc->rc_rcb->rcb_addr;
 588                 for (chan = 0; chan < CD180_NCHAN; rc++, chan++) {
 589                         tp = rc->rc_tp;
 590 #ifdef RCDEBUG
 591                         if (rc->rc_flags & (RC_DORXFER|RC_DOXXFER|RC_MODCHG|
 592                             RC_WAS_BUFOVFL|RC_WAS_SILOVFL))
 593                                 printrcflags(rc, "rcevent");
 594 #endif
 595                         if (rc->rc_flags & RC_WAS_BUFOVFL) {
 596                                 cpu_disable_intr();
 597                                 rc->rc_flags &= ~RC_WAS_BUFOVFL;
 598                                 rc_scheduled_event--;
 599                                 cpu_enable_intr();
 600                                 kprintf("rc%d/%d: interrupt-level buffer overflow\n",
 601                                         unit, chan);
 602                         }
 603                         if (rc->rc_flags & RC_WAS_SILOVFL) {
 604                                 cpu_disable_intr();
 605                                 rc->rc_flags &= ~RC_WAS_SILOVFL;
 606                                 rc_scheduled_event--;
 607                                 cpu_enable_intr();
 608                                 kprintf("rc%d/%d: silo overflow\n",
 609                                         unit, chan);
 610                         }
 611                         if (rc->rc_flags & RC_MODCHG) {
 612                                 cpu_disable_intr();
 613                                 rc->rc_flags &= ~RC_MODCHG;
 614                                 rc_scheduled_event -= LOTS_OF_EVENTS;
 615                                 cpu_enable_intr();
 616                                 (*linesw[tp->t_line].l_modem)(tp, !!(rc->rc_msvr & MSVR_CD));
 617                         }
 618                         if (rc->rc_flags & RC_DORXFER) {
 619                                 cpu_disable_intr();
 620                                 rc->rc_flags &= ~RC_DORXFER;
 621                                 eptr = rc->rc_iptr;
 622                                 if (rc->rc_bufend == &rc->rc_ibuf[2 * RC_IBUFSIZE])
 623                                         tptr = &rc->rc_ibuf[RC_IBUFSIZE];
 624                                 else
 625                                         tptr = rc->rc_ibuf;
 626                                 icnt = eptr - tptr;
 627                                 if (icnt > 0) {
 628                                         if (rc->rc_bufend == &rc->rc_ibuf[2 * RC_IBUFSIZE]) {
 629                                                 rc->rc_iptr   = rc->rc_ibuf;
 630                                                 rc->rc_bufend = &rc->rc_ibuf[RC_IBUFSIZE];
 631                                                 rc->rc_hiwat  = &rc->rc_ibuf[RC_IHIGHWATER];
 632                                         } else {
 633                                                 rc->rc_iptr   = &rc->rc_ibuf[RC_IBUFSIZE];
 634                                                 rc->rc_bufend = &rc->rc_ibuf[2 * RC_IBUFSIZE];
 635                                                 rc->rc_hiwat  =
 636                                                         &rc->rc_ibuf[RC_IBUFSIZE + RC_IHIGHWATER];
 637                                         }
 638                                         if (   (rc->rc_flags & RC_RTSFLOW)
 639                                             && (tp->t_state & TS_ISOPEN)
 640                                             && !(tp->t_state & TS_TBLOCK)
 641                                             && !(rc->rc_msvr & MSVR_RTS)
 642                                             ) {
 643                                                 rcout(CD180_CAR, chan);
 644                                                 rcout(CD180_MSVR,
 645                                                         rc->rc_msvr |= MSVR_RTS);
 646                                         }
 647                                         rc_scheduled_event -= icnt;
 648                                 }
 649                                 cpu_enable_intr();
 650
 651                                 if (icnt <= 0 || !(tp->t_state & TS_ISOPEN))
 652                                         goto done1;
 653
 654                                 if (   (tp->t_state & TS_CAN_BYPASS_L_RINT)
 655                                     && !(tp->t_state & TS_LOCAL)) {
 656                                         if ((tp->t_rawq.c_cc + icnt) >= RB_I_HIGH_WATER
 657                                             && ((rc->rc_flags & RC_RTSFLOW) || (tp->t_iflag & IXOFF))
 658                                             && !(tp->t_state & TS_TBLOCK))
 659                                                 ttyblock(tp);
 660                                         tk_nin += icnt;
 661                                         tk_rawcc += icnt;
 662                                         tp->t_rawcc += icnt;
 663                                         if (b_to_q(tptr, icnt, &tp->t_rawq))
 664                                                 kprintf("rc%d/%d: tty-level buffer overflow\n",
 665                                                         unit, chan);
 666                                         ttwakeup(tp);
 667                                         if ((tp->t_state & TS_TTSTOP) && ((tp->t_iflag & IXANY)
 668                                             || (tp->t_cc[VSTART] == tp->t_cc[VSTOP]))) {
 669                                                 tp->t_state &= ~TS_TTSTOP;
 670                                                 tp->t_lflag &= ~FLUSHO;
 671                                                 rc_start(tp);
 672                                         }
 673                                 } else {
 674                                         for (; tptr < eptr; tptr++)
 675                                                 (*linesw[tp->t_line].l_rint)
 676                                                     (tptr[0] |
 677                                                     rc_rcsrt[tptr[INPUT_FLAGS_SHIFT] & 0xF], tp);
 678                                 }
 679 done1: ;
 680                         }
 681                         if (rc->rc_flags & RC_DOXXFER) {
 682                                 cpu_disable_intr();
 683                                 rc_scheduled_event -= LOTS_OF_EVENTS;
 684                                 rc->rc_flags &= ~RC_DOXXFER;
 685                                 rc->rc_tp->t_state &= ~TS_BUSY;
 686                                 cpu_enable_intr();
 687                                 (*linesw[tp->t_line].l_start)(tp);
 688                         }
 689                 }
 690                 if (rc_scheduled_event == 0)
 691                         break;
 692         }
 693         if (rc_scheduled_event >= LOTS_OF_EVENTS)
 694                 goto repeat;
 695         lwkt_reltoken(&tty_token);
 696 }
 697
 698 static  void
 699 rc_stop(struct tty *tp, int rw)
 700 {
 701         struct rc_chans        *rc = &rc_chans[GET_UNIT(tp->t_dev)];
 702         u_char *tptr, *eptr;
 703
 704         lwkt_gettoken(&tty_token);
 705 #ifdef RCDEBUG
 706         kprintf("rc%d/%d: rc_stop %s%s\n", rc->rc_rcb->rcb_unit, rc->rc_chan,
 707                 (rw & FWRITE)?"FWRITE ":"", (rw & FREAD)?"FREAD":"");
 708 #endif
 709         if (rw & FWRITE)
 710                 rc_discard_output(rc);
 711         cpu_disable_intr();
 712         if (rw & FREAD) {
 713                 rc->rc_flags &= ~RC_DORXFER;
 714                 eptr = rc->rc_iptr;
 715                 if (rc->rc_bufend == &rc->rc_ibuf[2 * RC_IBUFSIZE]) {
 716                         tptr = &rc->rc_ibuf[RC_IBUFSIZE];
 717                         rc->rc_iptr = &rc->rc_ibuf[RC_IBUFSIZE];
 718                 } else {
 719                         tptr = rc->rc_ibuf;
 720                         rc->rc_iptr = rc->rc_ibuf;
 721                 }
 722                 rc_scheduled_event -= eptr - tptr;
 723         }
 724         if (tp->t_state & TS_TTSTOP)
 725                 rc->rc_flags |= RC_OSUSP;
 726         else
 727                 rc->rc_flags &= ~RC_OSUSP;
 728         cpu_enable_intr();
 729         lwkt_reltoken(&tty_token);
 730 }
 731
 732 static  int
 733 rcopen(struct dev_open_args *ap)
 734 {
 735         cdev_t dev = ap->a_head.a_dev;
 736         struct rc_chans *rc;
 737         struct tty      *tp;
 738         int             unit, nec, error = 0;
 739
 740         lwkt_gettoken(&tty_token);
 741         unit = GET_UNIT(dev);
 742         if (unit >= NRC * CD180_NCHAN) {
 743                 lwkt_reltoken(&tty_token);
 744                 return ENXIO;
 745         }
 746         if (rc_softc[unit / CD180_NCHAN].rcb_probed != RC_ATTACHED) {
 747                 lwkt_reltoken(&tty_token);
 748                 return ENXIO;
 749         }
 750         rc  = &rc_chans[unit];
 751         tp  = rc->rc_tp;
 752         dev->si_tty = tp;
 753         nec = rc->rc_rcb->rcb_addr;
 754 #ifdef RCDEBUG
 755         kprintf("rc%d/%d: rcopen: dev %x\n", rc->rc_rcb->rcb_unit, unit, dev);
 756 #endif
 757         crit_enter();
 758
 759 again:
 760         while (rc->rc_flags & RC_DTR_OFF) {
 761                 error = tsleep(&(rc->rc_dtrwait), PCATCH, "rcdtr", 0);
 762                 if (error != 0)
 763                         goto out;
 764         }
 765         if (tp->t_state & TS_ISOPEN) {
 766                 if (CALLOUT(dev)) {
 767                         if (!(rc->rc_flags & RC_ACTOUT)) {
 768                                 error = EBUSY;
 769                                 goto out;
 770                         }
 771                 } else {
 772                         if (rc->rc_flags & RC_ACTOUT) {
 773                                 if (ap->a_oflags & O_NONBLOCK) {
 774                                         error = EBUSY;
 775                                         goto out;
 776                                 }
 777                                 error = tsleep(&rc->rc_rcb, PCATCH, "rcbi", 0);
 778                                 if (error)
 779                                         goto out;
 780                                 goto again;
 781                         }
 782                 }
 783                 if (tp->t_state & TS_XCLUDE &&
 784                     priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) {
 785                         error = EBUSY;
 786                         goto out;
 787                 }
 788         } else {
 789                 tp->t_oproc   = rc_start;
 790                 tp->t_param   = rc_param;
 791                 tp->t_stop    = rc_stop;
 792                 tp->t_dev     = dev;
 793
 794                 if (CALLOUT(dev))
 795                         tp->t_cflag |= CLOCAL;
 796                 else
 797                         tp->t_cflag &= ~CLOCAL;
 798
 799                 error = rc_param(tp, &tp->t_termios);
 800                 if (error)
 801                         goto out;
 802                 (void) rc_modctl(rc, TIOCM_RTS|TIOCM_DTR, DMSET);
 803
 804                 if ((rc->rc_msvr & MSVR_CD) || CALLOUT(dev))
 805                         (*linesw[tp->t_line].l_modem)(tp, 1);
 806         }
 807         if (!(tp->t_state & TS_CARR_ON) && !CALLOUT(dev)
 808             && !(tp->t_cflag & CLOCAL) && !(ap->a_oflags & O_NONBLOCK)) {
 809                 rc->rc_dcdwaits++;
 810                 error = tsleep(TSA_CARR_ON(tp), PCATCH, "rcdcd", 0);
 811                 rc->rc_dcdwaits--;
 812                 if (error != 0)
 813                         goto out;
 814                 goto again;
 815         }
 816         error = (*linesw[tp->t_line].l_open)(dev, tp);
 817         disc_optim(tp, &tp->t_termios, rc);
 818         if ((tp->t_state & TS_ISOPEN) && CALLOUT(dev))
 819                 rc->rc_flags |= RC_ACTOUT;
 820 out:
 821         crit_exit();
 822
 823         if(rc->rc_dcdwaits == 0 && !(tp->t_state & TS_ISOPEN))
 824                 rc_hardclose(rc);
 825
 826         lwkt_reltoken(&tty_token);
 827         return error;
 828 }
 829
 830 static int
 831 rcclose(struct dev_close_args *ap)
 832 {
 833         cdev_t dev = ap->a_head.a_dev;
 834         struct rc_chans *rc;
 835         struct tty      *tp;
 836         int unit = GET_UNIT(dev);
 837
 838         lwkt_gettoken(&tty_token);
 839         if (unit >= NRC * CD180_NCHAN) {
 840                 lwkt_reltoken(&tty_token);
 841                 return ENXIO;
 842         }
 843         rc  = &rc_chans[unit];
 844         tp  = rc->rc_tp;
 845 #ifdef RCDEBUG
 846         kprintf("rc%d/%d: rcclose dev %x\n", rc->rc_rcb->rcb_unit, unit, dev);
 847 #endif
 848         crit_enter();
 849         (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
 850         disc_optim(tp, &tp->t_termios, rc);
 851         rc_stop(tp, FREAD | FWRITE);
 852         rc_hardclose(rc);
 853         ttyclose(tp);
 854         crit_exit();
 855         lwkt_reltoken(&tty_token);
 856         return 0;
 857 }
 858
 859 /*
 860  * NOTE: Must be called with tty_token held
 861  */
 862 static void
 863 rc_hardclose(struct rc_chans *rc)
 864 {
 865         int nec = rc->rc_rcb->rcb_addr;
 866         struct tty *tp = rc->rc_tp;
 867
 868         ASSERT_LWKT_TOKEN_HELD(&tty_token);
 869         crit_enter();
 870         rcout(CD180_CAR, rc->rc_chan);
 871
 872         /* Disable rx/tx intrs */
 873         rcout(CD180_IER, rc->rc_ier = 0);
 874         if (   (tp->t_cflag & HUPCL)
 875             || (!(rc->rc_flags & RC_ACTOUT)
 876                && !(rc->rc_msvr & MSVR_CD)
 877                && !(tp->t_cflag & CLOCAL))
 878             || !(tp->t_state & TS_ISOPEN)
 879            ) {
 880                 CCRCMD(rc->rc_rcb->rcb_unit, rc->rc_chan, CCR_ResetChan);
 881                 WAITFORCCR(rc->rc_rcb->rcb_unit, rc->rc_chan);
 882                 (void) rc_modctl(rc, TIOCM_RTS, DMSET);
 883                 if (rc->rc_dtrwait) {
 884                         callout_reset(&rc->rc_dtr_ch, rc->rc_dtrwait,
 885                                 rc_dtrwakeup, rc);
 886                         rc->rc_flags |= RC_DTR_OFF;
 887                 }
 888         }
 889         rc->rc_flags &= ~RC_ACTOUT;
 890         wakeup((caddr_t) &rc->rc_rcb);  /* wake bi */
 891         wakeup(TSA_CARR_ON(tp));
 892         crit_exit();
 893 }
 894
 895 /* Reset the bastard */
 896 /*
 897  * NOTE: Must be called with tty_token held
 898  */
 899 static void
 900 rc_hwreset(int unit, int nec, unsigned int chipid)
 901 {
 902         ASSERT_LWKT_TOKEN_HELD(&tty_token);
 903         CCRCMD(unit, -1, CCR_HWRESET);            /* Hardware reset */
 904         DELAY(20000);
 905         WAITFORCCR(unit, -1);
 906
 907         rcout(RC_CTOUT, 0);             /* Clear timeout  */
 908         rcout(CD180_GIVR,  chipid);
 909         rcout(CD180_GICR,  0);
 910
 911         /* Set Prescaler Registers (1 msec) */
 912         rcout(CD180_PPRL, ((RC_OSCFREQ + 999) / 1000) & 0xFF);
 913         rcout(CD180_PPRH, ((RC_OSCFREQ + 999) / 1000) >> 8);
 914
 915         /* Initialize Priority Interrupt Level Registers */
 916         rcout(CD180_PILR1, RC_PILR_MODEM);
 917         rcout(CD180_PILR2, RC_PILR_TX);
 918         rcout(CD180_PILR3, RC_PILR_RX);
 919
 920         /* Reset DTR */
 921         rcout(RC_DTREG, ~0);
 922 }
 923
 924 /* Set channel parameters */
 925 static int
 926 rc_param(struct tty *tp, struct termios *ts)
 927 {
 928         struct rc_chans *rc = &rc_chans[GET_UNIT(tp->t_dev)];
 929         int    nec = rc->rc_rcb->rcb_addr;
 930         int      idivs, odivs, val, cflag, iflag, lflag, inpflow;
 931
 932         lwkt_gettoken(&tty_token);
 933
 934         if (   ts->c_ospeed < 0 || ts->c_ospeed > 76800
 935             || ts->c_ispeed < 0 || ts->c_ispeed > 76800
 936            ) {
 937                 lwkt_reltoken(&tty_token);
 938                 return (EINVAL);
 939         }
 940         if (ts->c_ispeed == 0)
 941                 ts->c_ispeed = ts->c_ospeed;
 942         odivs = RC_BRD(ts->c_ospeed);
 943         idivs = RC_BRD(ts->c_ispeed);
 944
 945         crit_enter();
 946
 947         /* Select channel */
 948         rcout(CD180_CAR, rc->rc_chan);
 949
 950         /* If speed == 0, hangup line */
 951         if (ts->c_ospeed == 0) {
 952                 CCRCMD(rc->rc_rcb->rcb_unit, rc->rc_chan, CCR_ResetChan);
 953                 WAITFORCCR(rc->rc_rcb->rcb_unit, rc->rc_chan);
 954                 (void) rc_modctl(rc, TIOCM_DTR, DMBIC);
 955         }
 956
 957         tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
 958         cflag = ts->c_cflag;
 959         iflag = ts->c_iflag;
 960         lflag = ts->c_lflag;
 961
 962         if (idivs > 0) {
 963                 rcout(CD180_RBPRL, idivs & 0xFF);
 964                 rcout(CD180_RBPRH, idivs >> 8);
 965         }
 966         if (odivs > 0) {
 967                 rcout(CD180_TBPRL, odivs & 0xFF);
 968                 rcout(CD180_TBPRH, odivs >> 8);
 969         }
 970
 971         /* set timeout value */
 972         if (ts->c_ispeed > 0) {
 973                 int itm = ts->c_ispeed > 2400 ? 5 : 10000 / ts->c_ispeed + 1;
 974
 975                 if (   !(lflag & ICANON)
 976                     && ts->c_cc[VMIN] != 0 && ts->c_cc[VTIME] != 0
 977                     && ts->c_cc[VTIME] * 10 > itm)
 978                         itm = ts->c_cc[VTIME] * 10;
 979
 980                 rcout(CD180_RTPR, itm <= 255 ? itm : 255);
 981         }
 982
 983         switch (cflag & CSIZE) {
 984                 case CS5:       val = COR1_5BITS;      break;
 985                 case CS6:       val = COR1_6BITS;      break;
 986                 case CS7:       val = COR1_7BITS;      break;
 987                 default:
 988                 case CS8:       val = COR1_8BITS;      break;
 989         }
 990         if (cflag & PARENB) {
 991                 val |= COR1_NORMPAR;
 992                 if (cflag & PARODD)
 993                         val |= COR1_ODDP;
 994                 if (!(cflag & INPCK))
 995                         val |= COR1_Ignore;
 996         } else
 997                 val |= COR1_Ignore;
 998         if (cflag & CSTOPB)
 999                 val |= COR1_2SB;
1000         rcout(CD180_COR1, val);
1001
1002         /* Set FIFO threshold */
1003         val = ts->c_ospeed <= 4800 ? 1 : CD180_NFIFO / 2;
1004         inpflow = 0;
1005         if (   (iflag & IXOFF)
1006             && (   ts->c_cc[VSTOP] != _POSIX_VDISABLE
1007                 && (   ts->c_cc[VSTART] != _POSIX_VDISABLE
1008                     || (iflag & IXANY)
1009                    )
1010                )
1011            ) {
1012                 inpflow = 1;
1013                 val |= COR3_SCDE|COR3_FCT;
1014         }
1015         rcout(CD180_COR3, val);
1016
1017         /* Initialize on-chip automatic flow control */
1018         val = 0;
1019         rc->rc_flags &= ~(RC_CTSFLOW|RC_SEND_RDY);
1020         if (cflag & CCTS_OFLOW) {
1021                 rc->rc_flags |= RC_CTSFLOW;
1022                 val |= COR2_CtsAE;
1023         } else
1024                 rc->rc_flags |= RC_SEND_RDY;
1025         if (tp->t_state & TS_TTSTOP)
1026                 rc->rc_flags |= RC_OSUSP;
1027         else
1028                 rc->rc_flags &= ~RC_OSUSP;
1029         if (cflag & CRTS_IFLOW)
1030                 rc->rc_flags |= RC_RTSFLOW;
1031         else
1032                 rc->rc_flags &= ~RC_RTSFLOW;
1033
1034         if (inpflow) {
1035                 if (ts->c_cc[VSTART] != _POSIX_VDISABLE)
1036                         rcout(CD180_SCHR1, ts->c_cc[VSTART]);
1037                 rcout(CD180_SCHR2, ts->c_cc[VSTOP]);
1038                 val |= COR2_TxIBE;
1039                 if (iflag & IXANY)
1040                         val |= COR2_IXM;
1041         }
1042
1043         rcout(CD180_COR2, rc->rc_cor2 = val);
1044
1045         CCRCMD(rc->rc_rcb->rcb_unit, rc->rc_chan,
1046                 CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3);
1047
1048         disc_optim(tp, ts, rc);
1049
1050         /* modem ctl */
1051         val = cflag & CLOCAL ? 0 : MCOR1_CDzd;
1052         if (cflag & CCTS_OFLOW)
1053                 val |= MCOR1_CTSzd;
1054         rcout(CD180_MCOR1, val);
1055
1056         val = cflag & CLOCAL ? 0 : MCOR2_CDod;
1057         if (cflag & CCTS_OFLOW)
1058                 val |= MCOR2_CTSod;
1059         rcout(CD180_MCOR2, val);
1060
1061         /* enable i/o and interrupts */
1062         CCRCMD(rc->rc_rcb->rcb_unit, rc->rc_chan,
1063                 CCR_XMTREN | ((cflag & CREAD) ? CCR_RCVREN : CCR_RCVRDIS));
1064         WAITFORCCR(rc->rc_rcb->rcb_unit, rc->rc_chan);
1065
1066         rc->rc_ier = cflag & CLOCAL ? 0 : IER_CD;
1067         if (cflag & CCTS_OFLOW)
1068                 rc->rc_ier |= IER_CTS;
1069         if (cflag & CREAD)
1070                 rc->rc_ier |= IER_RxData;
1071         if (tp->t_state & TS_BUSY)
1072                 rc->rc_ier |= IER_TxRdy;
1073         if (ts->c_ospeed != 0)
1074                 rc_modctl(rc, TIOCM_DTR, DMBIS);
1075         if ((cflag & CCTS_OFLOW) && (rc->rc_msvr & MSVR_CTS))
1076                 rc->rc_flags |= RC_SEND_RDY;
1077         rcout(CD180_IER, rc->rc_ier);
1078         crit_exit();
1079         lwkt_reltoken(&tty_token);
1080         return 0;
1081 }
1082
1083 /* Re-initialize board after bogus interrupts */
1084 /*
1085  * NOTE: Must be called with tty_token held
1086  */
1087 static void
1088 rc_reinit(struct rc_softc *rcb)
1089 {
1090         struct rc_chans       *rc, *rce;
1091         int                    nec;
1092
1093         ASSERT_LWKT_TOKEN_HELD(&tty_token);
1094         nec = rcb->rcb_addr;
1095         rc_hwreset(rcb->rcb_unit, nec, RC_FAKEID);
1096         rc  = &rc_chans[rcb->rcb_unit * CD180_NCHAN];
1097         rce = rc + CD180_NCHAN;
1098         for (; rc < rce; rc++)
1099                 (void) rc_param(rc->rc_tp, &rc->rc_tp->t_termios);
1100 }
1101
1102 static  int
1103 rcioctl(struct dev_ioctl_args *ap)
1104 {
1105         cdev_t dev = ap->a_head.a_dev;
1106         struct rc_chans       *rc = &rc_chans[GET_UNIT(dev)];
1107         int                   error;
1108         struct tty                     *tp = rc->rc_tp;
1109
1110         lwkt_gettoken(&tty_token);
1111         error = (*linesw[tp->t_line].l_ioctl)(tp, ap->a_cmd, ap->a_data,
1112                                               ap->a_fflag, ap->a_cred);
1113         if (error != ENOIOCTL) {
1114                 lwkt_reltoken(&tty_token);
1115                 return (error);
1116         }
1117         error = ttioctl(tp, ap->a_cmd, ap->a_data, ap->a_fflag);
1118         disc_optim(tp, &tp->t_termios, rc);
1119         if (error != ENOIOCTL) {
1120                 lwkt_reltoken(&tty_token);
1121                 return (error);
1122         }
1123         crit_enter();
1124
1125         switch (ap->a_cmd) {
1126             case TIOCSBRK:
1127                 rc->rc_pendcmd = CD180_C_SBRK;
1128                 break;
1129
1130             case TIOCCBRK:
1131                 rc->rc_pendcmd = CD180_C_EBRK;
1132                 break;
1133
1134             case TIOCSDTR:
1135                 (void) rc_modctl(rc, TIOCM_DTR, DMBIS);
1136                 break;
1137
1138             case TIOCCDTR:
1139                 (void) rc_modctl(rc, TIOCM_DTR, DMBIC);
1140                 break;
1141
1142             case TIOCMGET:
1143                 *(int *) ap->a_data = rc_modctl(rc, 0, DMGET);
1144                 break;
1145
1146             case TIOCMSET:
1147                 (void) rc_modctl(rc, *(int *) ap->a_data, DMSET);
1148                 break;
1149
1150             case TIOCMBIC:
1151                 (void) rc_modctl(rc, *(int *) ap->a_data, DMBIC);
1152                 break;
1153
1154             case TIOCMBIS:
1155                 (void) rc_modctl(rc, *(int *) ap->a_data, DMBIS);
1156                 break;
1157
1158             case TIOCMSDTRWAIT:
1159                 error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0);
1160                 if (error != 0) {
1161                         crit_exit();
1162                         lwkt_reltoken(&tty_token);
1163                         return (error);
1164                 }
1165                 rc->rc_dtrwait = *(int *)ap->a_data * hz / 100;
1166                 break;
1167
1168             case TIOCMGDTRWAIT:
1169                 *(int *)ap->a_data = rc->rc_dtrwait * 100 / hz;
1170                 break;
1171
1172             default:
1173                 crit_exit();
1174                 lwkt_reltoken(&tty_token);
1175                 return ENOTTY;
1176         }
1177         crit_exit();
1178         lwkt_reltoken(&tty_token);
1179         return 0;
1180 }
1181
1182
1183 /* Modem control routines */
1184 /*
1185  * NOTE: Must be called with tty_token held
1186  */
1187 static int
1188 rc_modctl(struct rc_chans *rc, int bits, int cmd)
1189 {
1190         int    nec = rc->rc_rcb->rcb_addr;
1191         u_char         *dtr = &rc->rc_rcb->rcb_dtr, msvr;
1192
1193         ASSERT_LWKT_TOKEN_HELD(&tty_token);
1194         rcout(CD180_CAR, rc->rc_chan);
1195
1196         switch (cmd) {
1197             case DMSET:
1198                 rcout(RC_DTREG, (bits & TIOCM_DTR) ?
1199                                 ~(*dtr |= 1 << rc->rc_chan) :
1200                                 ~(*dtr &= ~(1 << rc->rc_chan)));
1201                 msvr = rcin(CD180_MSVR);
1202                 if (bits & TIOCM_RTS)
1203                         msvr |= MSVR_RTS;
1204                 else
1205                         msvr &= ~MSVR_RTS;
1206                 if (bits & TIOCM_DTR)
1207                         msvr |= MSVR_DTR;
1208                 else
1209                         msvr &= ~MSVR_DTR;
1210                 rcout(CD180_MSVR, msvr);
1211                 break;
1212
1213             case DMBIS:
1214                 if (bits & TIOCM_DTR)
1215                         rcout(RC_DTREG, ~(*dtr |= 1 << rc->rc_chan));
1216                 msvr = rcin(CD180_MSVR);
1217                 if (bits & TIOCM_RTS)
1218                         msvr |= MSVR_RTS;
1219                 if (bits & TIOCM_DTR)
1220                         msvr |= MSVR_DTR;
1221                 rcout(CD180_MSVR, msvr);
1222                 break;
1223
1224             case DMGET:
1225                 bits = TIOCM_LE;
1226                 msvr = rc->rc_msvr = rcin(CD180_MSVR);
1227
1228                 if (msvr & MSVR_RTS)
1229                         bits |= TIOCM_RTS;
1230                 if (msvr & MSVR_CTS)
1231                         bits |= TIOCM_CTS;
1232                 if (msvr & MSVR_DSR)
1233                         bits |= TIOCM_DSR;
1234                 if (msvr & MSVR_DTR)
1235                         bits |= TIOCM_DTR;
1236                 if (msvr & MSVR_CD)
1237                         bits |= TIOCM_CD;
1238                 if (~rcin(RC_RIREG) & (1 << rc->rc_chan))
1239                         bits |= TIOCM_RI;
1240                 return bits;
1241
1242             case DMBIC:
1243                 if (bits & TIOCM_DTR)
1244                         rcout(RC_DTREG, ~(*dtr &= ~(1 << rc->rc_chan)));
1245                 msvr = rcin(CD180_MSVR);
1246                 if (bits & TIOCM_RTS)
1247                         msvr &= ~MSVR_RTS;
1248                 if (bits & TIOCM_DTR)
1249                         msvr &= ~MSVR_DTR;
1250                 rcout(CD180_MSVR, msvr);
1251                 break;
1252         }
1253         rc->rc_msvr = rcin(CD180_MSVR);
1254         return 0;
1255 }
1256
1257 /* Test the board. */
1258 int
1259 rc_test(int nec, int unit)
1260 {
1261         int     chan = 0;
1262         int     i = 0, rcnt;
1263         unsigned int    iack, chipid;
1264         unsigned short  divs;
1265         static  u_char  ctest[] = "\377\125\252\045\244\0\377";
1266 #define CTLEN   8
1267 #define ERR(s)  { \
1268                 kprintf("rc%d: ", unit); kprintf s ; kprintf("\n"); \
1269                 crit_exit(); return 1; }
1270
1271         struct rtest {
1272                 u_char  txbuf[CD180_NFIFO];     /* TX buffer  */
1273                 u_char  rxbuf[CD180_NFIFO];     /* RX buffer  */
1274                 int     rxptr;                  /* RX pointer */
1275                 int     txptr;                  /* TX pointer */
1276         } tchans[CD180_NCHAN];
1277
1278         lwkt_gettoken(&tty_token);
1279         crit_enter();
1280
1281         chipid = RC_FAKEID;
1282
1283         /* First, reset board to inital state */
1284         rc_hwreset(unit, nec, chipid);
1285
1286         divs = RC_BRD(19200);
1287
1288         /* Initialize channels */
1289         for (chan = 0; chan < CD180_NCHAN; chan++) {
1290
1291                 /* Select and reset channel */
1292                 rcout(CD180_CAR, chan);
1293                 CCRCMD(unit, chan, CCR_ResetChan);
1294                 WAITFORCCR(unit, chan);
1295
1296                 /* Set speed */
1297                 rcout(CD180_RBPRL, divs & 0xFF);
1298                 rcout(CD180_RBPRH, divs >> 8);
1299                 rcout(CD180_TBPRL, divs & 0xFF);
1300                 rcout(CD180_TBPRH, divs >> 8);
1301
1302                 /* set timeout value */
1303                 rcout(CD180_RTPR,  0);
1304
1305                 /* Establish local loopback */
1306                 rcout(CD180_COR1, COR1_NOPAR | COR1_8BITS | COR1_1SB);
1307                 rcout(CD180_COR2, COR2_LLM);
1308                 rcout(CD180_COR3, CD180_NFIFO);
1309                 CCRCMD(unit, chan, CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3);
1310                 CCRCMD(unit, chan, CCR_RCVREN | CCR_XMTREN);
1311                 WAITFORCCR(unit, chan);
1312                 rcout(CD180_MSVR, MSVR_RTS);
1313
1314                 /* Fill TXBUF with test data */
1315                 for (i = 0; i < CD180_NFIFO; i++) {
1316                         tchans[chan].txbuf[i] = ctest[i];
1317                         tchans[chan].rxbuf[i] = 0;
1318                 }
1319                 tchans[chan].txptr = tchans[chan].rxptr = 0;
1320
1321                 /* Now, start transmit */
1322                 rcout(CD180_IER, IER_TxMpty|IER_RxData);
1323         }
1324         /* Pseudo-interrupt poll stuff */
1325         for (rcnt = 10000; rcnt-- > 0; rcnt--) {
1326                 i = ~(rcin(RC_BSR));
1327                 if (i & RC_BSR_TOUT)
1328                         ERR(("BSR timeout bit set\n"))
1329                 else if (i & RC_BSR_TXINT) {
1330                         iack = rcin(RC_PILR_TX);
1331                         if (iack != (GIVR_IT_TDI | chipid))
1332                                 ERR(("Bad TX intr ack (%02x != %02x)\n",
1333                                         iack, GIVR_IT_TDI | chipid));
1334                         chan = (rcin(CD180_GICR) & GICR_CHAN) >> GICR_LSH;
1335                         /* If no more data to transmit, disable TX intr */
1336                         if (tchans[chan].txptr >= CD180_NFIFO) {
1337                                 iack = rcin(CD180_IER);
1338                                 rcout(CD180_IER, iack & ~IER_TxMpty);
1339                         } else {
1340                                 for (iack = tchans[chan].txptr;
1341                                     iack < CD180_NFIFO; iack++)
1342                                         rcout(CD180_TDR,
1343                                             tchans[chan].txbuf[iack]);
1344                                 tchans[chan].txptr = iack;
1345                         }
1346                         rcout(CD180_EOIR, 0);
1347                 } else if (i & RC_BSR_RXINT) {
1348                         u_char ucnt;
1349
1350                         iack = rcin(RC_PILR_RX);
1351                         if (iack != (GIVR_IT_RGDI | chipid) &&
1352                             iack != (GIVR_IT_REI  | chipid))
1353                                 ERR(("Bad RX intr ack (%02x != %02x)\n",
1354                                         iack, GIVR_IT_RGDI | chipid))
1355                         chan = (rcin(CD180_GICR) & GICR_CHAN) >> GICR_LSH;
1356                         ucnt = rcin(CD180_RDCR) & 0xF;
1357                         while (ucnt-- > 0) {
1358                                 iack = rcin(CD180_RCSR);
1359                                 if (iack & RCSR_Timeout)
1360                                         break;
1361                                 if (iack & 0xF)
1362                                         ERR(("Bad char chan %d (RCSR = %02X)\n",
1363                                             chan, iack))
1364                                 if (tchans[chan].rxptr > CD180_NFIFO)
1365                                         ERR(("Got extra chars chan %d\n",
1366                                             chan))
1367                                 tchans[chan].rxbuf[tchans[chan].rxptr++] =
1368                                         rcin(CD180_RDR);
1369                         }
1370                         rcout(CD180_EOIR, 0);
1371                 }
1372                 rcout(RC_CTOUT, 0);
1373                 for (iack = chan = 0; chan < CD180_NCHAN; chan++)
1374                         if (tchans[chan].rxptr >= CD180_NFIFO)
1375                                 iack++;
1376                 if (iack == CD180_NCHAN)
1377                         break;
1378         }
1379         for (chan = 0; chan < CD180_NCHAN; chan++) {
1380                 /* Select and reset channel */
1381                 rcout(CD180_CAR, chan);
1382                 CCRCMD(unit, chan, CCR_ResetChan);
1383         }
1384
1385         if (!rcnt)
1386                 ERR(("looses characters during local loopback\n"))
1387         /* Now, check data */
1388         for (chan = 0; chan < CD180_NCHAN; chan++)
1389                 for (i = 0; i < CD180_NFIFO; i++)
1390                         if (ctest[i] != tchans[chan].rxbuf[i])
1391                                 ERR(("data mismatch chan %d ptr %d (%d != %d)\n",
1392                                     chan, i, ctest[i], tchans[chan].rxbuf[i]))
1393         crit_exit();
1394         lwkt_reltoken(&tty_token);
1395         return 0;
1396 }
1397
1398 #ifdef RCDEBUG
1399 static void
1400 printrcflags(struct rc_chans *rc, char *comment)
1401 {
1402         u_short f = rc->rc_flags;
1403         int    nec = rc->rc_rcb->rcb_addr;
1404
1405         kprintf("rc%d/%d: %s flags: %s%s%s%s%s%s%s%s%s%s%s%s\n",
1406                 rc->rc_rcb->rcb_unit, rc->rc_chan, comment,
1407                 (f & RC_DTR_OFF)?"DTR_OFF " :"",
1408                 (f & RC_ACTOUT) ?"ACTOUT " :"",
1409                 (f & RC_RTSFLOW)?"RTSFLOW " :"",
1410                 (f & RC_CTSFLOW)?"CTSFLOW " :"",
1411                 (f & RC_DORXFER)?"DORXFER " :"",
1412                 (f & RC_DOXXFER)?"DOXXFER " :"",
1413                 (f & RC_MODCHG) ?"MODCHG "  :"",
1414                 (f & RC_OSUSP)  ?"OSUSP " :"",
1415                 (f & RC_OSBUSY) ?"OSBUSY " :"",
1416                 (f & RC_WAS_BUFOVFL) ?"BUFOVFL " :"",
1417                 (f & RC_WAS_SILOVFL) ?"SILOVFL " :"",
1418                 (f & RC_SEND_RDY) ?"SEND_RDY":"");
1419
1420         rcout(CD180_CAR, rc->rc_chan);
1421
1422         kprintf("rc%d/%d: msvr %02x ier %02x ccsr %02x\n",
1423                 rc->rc_rcb->rcb_unit, rc->rc_chan,
1424                 rcin(CD180_MSVR),
1425                 rcin(CD180_IER),
1426                 rcin(CD180_CCSR));
1427 }
1428 #endif /* RCDEBUG */
1429
1430 static void
1431 rc_dtrwakeup(void *chan)
1432 {
1433         struct rc_chans  *rc;
1434
1435         lwkt_gettoken(&tty_token);
1436         rc = (struct rc_chans *)chan;
1437         rc->rc_flags &= ~RC_DTR_OFF;
1438         wakeup(&rc->rc_dtrwait);
1439         lwkt_reltoken(&tty_token);
1440 }
1441
1442 static void
1443 rc_discard_output(struct rc_chans *rc)
1444 {
1445         lwkt_gettoken(&tty_token);
1446         cpu_disable_intr();
1447         if (rc->rc_flags & RC_DOXXFER) {
1448                 rc_scheduled_event -= LOTS_OF_EVENTS;
1449                 rc->rc_flags &= ~RC_DOXXFER;
1450         }
1451         rc->rc_optr = rc->rc_obufend;
1452         rc->rc_tp->t_state &= ~TS_BUSY;
1453         cpu_enable_intr();
1454         ttwwakeup(rc->rc_tp);
1455         lwkt_reltoken(&tty_token);
1456 }
1457
1458 static void
1459 rc_wakeup(void *chan)
1460 {
1461         lwkt_gettoken(&tty_token);
1462         if (rc_scheduled_event != 0) {
1463                 crit_enter();
1464                 rcpoll(NULL, NULL);
1465                 crit_exit();
1466         }
1467         callout_reset(&rc_wakeup_ch, 1, rc_wakeup, NULL);
1468         lwkt_reltoken(&tty_token);
1469 }
1470
1471 static void
1472 disc_optim(struct tty *tp, struct termios *t, struct rc_chans *rc)
1473 {
1474
1475         lwkt_gettoken(&tty_token);
1476         if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
1477             && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
1478             && (!(t->c_iflag & PARMRK)
1479                 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
1480             && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
1481             && linesw[tp->t_line].l_rint == ttyinput)
1482                 tp->t_state |= TS_CAN_BYPASS_L_RINT;
1483         else
1484                 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
1485         rc->rc_hotchar = linesw[tp->t_line].l_hotchar;
1486         lwkt_reltoken(&tty_token);
1487 }
1488
1489 static void
1490 rc_wait0(int nec, int unit, int chan, int line)
1491 {
1492         int rcnt;
1493
1494         for (rcnt = 50; rcnt && rcin(CD180_CCR); rcnt--)
1495                 DELAY(30);
1496         if (rcnt == 0)
1497                 kprintf("rc%d/%d: channel command timeout, rc.c line: %d\n",
1498                       unit, chan, line);
1499 }