2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5111.c 187831 2009-01-28 18:00:22Z sam $
23 #include "ah_internal.h"
25 #include "ah_eeprom_v3.h"
27 #include "ar5212/ar5212.h"
28 #include "ar5212/ar5212reg.h"
29 #include "ar5212/ar5212phy.h"
32 #include "ar5212/ar5212.ini"
34 #define N(a) (sizeof(a)/sizeof(a[0]))
37 RF_HAL_FUNCS base; /* public state, must be first */
38 uint16_t pcdacTable[PWR_TABLE_SIZE];
40 uint32_t Bank0Data[N(ar5212Bank0_5111)];
41 uint32_t Bank1Data[N(ar5212Bank1_5111)];
42 uint32_t Bank2Data[N(ar5212Bank2_5111)];
43 uint32_t Bank3Data[N(ar5212Bank3_5111)];
44 uint32_t Bank6Data[N(ar5212Bank6_5111)];
45 uint32_t Bank7Data[N(ar5212Bank7_5111)];
47 #define AR5111(ah) ((struct ar5111State *) AH5212(ah)->ah_rfHal)
49 static uint16_t ar5212GetScaledPower(uint16_t channel, uint16_t pcdacValue,
50 const PCDACS_EEPROM *pSrcStruct);
51 static HAL_BOOL ar5212FindValueInList(uint16_t channel, uint16_t pcdacValue,
52 const PCDACS_EEPROM *pSrcStruct, uint16_t *powerValue);
53 static void ar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel,
54 const PCDACS_EEPROM *pSrcStruct,
55 uint16_t *pLowerPcdac, uint16_t *pUpperPcdac);
57 extern void ar5212GetLowerUpperValues(uint16_t value,
58 const uint16_t *pList, uint16_t listSize,
59 uint16_t *pLowerValue, uint16_t *pUpperValue);
60 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
61 uint32_t numBits, uint32_t firstBit, uint32_t column);
64 ar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5111, modesIndex, writes);
68 HAL_INI_WRITE_ARRAY(ah, ar5212Common_5111, 1, writes);
69 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5111, freqIndex, writes);
73 * Take the MHz channel value and set the Channel value
75 * ASSUMES: Writes enabled to analog bus
78 ar5111SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
80 #define CI_2GHZ_INDEX_CORRECTION 19
81 uint16_t freq = ath_hal_gethwchannel(ah, chan);
82 uint32_t refClk, reg32, data2111;
83 int16_t chan5111, chanIEEE;
86 * Structure to hold 11b tuning information for 5111/2111
87 * 16 MHz mode, divider ratio = 198 = NP+S. N=16, S=4 or 6, P=12
90 uint32_t refClkSel; /* reference clock, 1 for 16 MHz */
91 uint32_t channelSelect; /* P[7:4]S[3:0] bits */
92 uint16_t channel5111; /* 11a channel for 5111 */
95 static const CHAN_INFO_2GHZ chan2GHzData[] = {
96 { 1, 0x46, 96 }, /* 2312 -19 */
97 { 1, 0x46, 97 }, /* 2317 -18 */
98 { 1, 0x46, 98 }, /* 2322 -17 */
99 { 1, 0x46, 99 }, /* 2327 -16 */
100 { 1, 0x46, 100 }, /* 2332 -15 */
101 { 1, 0x46, 101 }, /* 2337 -14 */
102 { 1, 0x46, 102 }, /* 2342 -13 */
103 { 1, 0x46, 103 }, /* 2347 -12 */
104 { 1, 0x46, 104 }, /* 2352 -11 */
105 { 1, 0x46, 105 }, /* 2357 -10 */
106 { 1, 0x46, 106 }, /* 2362 -9 */
107 { 1, 0x46, 107 }, /* 2367 -8 */
108 { 1, 0x46, 108 }, /* 2372 -7 */
109 /* index -6 to 0 are pad to make this a nolookup table */
110 { 1, 0x46, 116 }, /* -6 */
111 { 1, 0x46, 116 }, /* -5 */
112 { 1, 0x46, 116 }, /* -4 */
113 { 1, 0x46, 116 }, /* -3 */
114 { 1, 0x46, 116 }, /* -2 */
115 { 1, 0x46, 116 }, /* -1 */
116 { 1, 0x46, 116 }, /* 0 */
117 { 1, 0x46, 116 }, /* 2412 1 */
118 { 1, 0x46, 117 }, /* 2417 2 */
119 { 1, 0x46, 118 }, /* 2422 3 */
120 { 1, 0x46, 119 }, /* 2427 4 */
121 { 1, 0x46, 120 }, /* 2432 5 */
122 { 1, 0x46, 121 }, /* 2437 6 */
123 { 1, 0x46, 122 }, /* 2442 7 */
124 { 1, 0x46, 123 }, /* 2447 8 */
125 { 1, 0x46, 124 }, /* 2452 9 */
126 { 1, 0x46, 125 }, /* 2457 10 */
127 { 1, 0x46, 126 }, /* 2462 11 */
128 { 1, 0x46, 127 }, /* 2467 12 */
129 { 1, 0x46, 128 }, /* 2472 13 */
130 { 1, 0x44, 124 }, /* 2484 14 */
131 { 1, 0x46, 136 }, /* 2512 15 */
132 { 1, 0x46, 140 }, /* 2532 16 */
133 { 1, 0x46, 144 }, /* 2552 17 */
134 { 1, 0x46, 148 }, /* 2572 18 */
135 { 1, 0x46, 152 }, /* 2592 19 */
136 { 1, 0x46, 156 }, /* 2612 20 */
137 { 1, 0x46, 160 }, /* 2632 21 */
138 { 1, 0x46, 164 }, /* 2652 22 */
139 { 1, 0x46, 168 }, /* 2672 23 */
140 { 1, 0x46, 172 }, /* 2692 24 */
141 { 1, 0x46, 176 }, /* 2712 25 */
142 { 1, 0x46, 180 } /* 2732 26 */
145 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
147 chanIEEE = chan->ic_ieee;
148 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
149 const CHAN_INFO_2GHZ* ci =
150 &chan2GHzData[chanIEEE + CI_2GHZ_INDEX_CORRECTION];
153 data2111 = ((ath_hal_reverseBits(ci->channelSelect, 8) & 0xff)
155 | (ci->refClkSel << 4);
156 chan5111 = ci->channel5111;
157 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
159 /* Enable channel spreading for channel 14 */
160 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
161 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
163 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
164 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
167 chan5111 = chanIEEE; /* no conversion needed */
171 /* Rest of the code is common for 5 GHz and 2.4 GHz. */
172 if (chan5111 >= 145 || (chan5111 & 0x1)) {
173 reg32 = ath_hal_reverseBits(chan5111 - 24, 8) & 0xff;
176 reg32 = ath_hal_reverseBits(((chan5111 - 24)/2), 8) & 0xff;
180 reg32 = (reg32 << 2) | (refClk << 1) | (1 << 10) | 0x1;
181 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff));
183 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff));
185 AH_PRIVATE(ah)->ah_curchan = chan;
187 #undef CI_2GHZ_INDEX_CORRECTION
191 * Return a reference to the requested RF Bank.
194 ar5111GetRfBank(struct ath_hal *ah, int bank)
196 struct ar5111State *priv = AR5111(ah);
198 HALASSERT(priv != AH_NULL);
200 case 0: return priv->Bank0Data;
201 case 1: return priv->Bank1Data;
202 case 2: return priv->Bank2Data;
203 case 3: return priv->Bank3Data;
204 case 6: return priv->Bank6Data;
205 case 7: return priv->Bank7Data;
207 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
213 * Reads EEPROM header info from device structure and programs
216 * REQUIRES: Access to the analog rf device
219 ar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
220 uint16_t modesIndex, uint16_t *rfXpdGain)
222 uint16_t freq = ath_hal_gethwchannel(ah, chan);
223 struct ath_hal_5212 *ahp = AH5212(ah);
224 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
225 uint16_t rfXpdGainFixed, rfPloSel, rfPwdXpd, gainI;
226 uint16_t tempOB, tempDB;
227 uint32_t ob2GHz, db2GHz, rfReg[N(ar5212Bank6_5111)];
228 int i, regWrites = 0;
230 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
231 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
233 /* Setup rf parameters */
234 switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
235 case IEEE80211_CHAN_A:
236 if (4000 < freq && freq < 5260) {
239 } else if (5260 <= freq && freq < 5500) {
242 } else if (5500 <= freq && freq < 5725) {
245 } else if (freq >= 5725) {
249 /* XXX when does this happen??? */
254 rfXpdGainFixed = ee->ee_xgain[headerInfo11A];
255 rfPloSel = ee->ee_xpd[headerInfo11A];
256 rfPwdXpd = !ee->ee_xpd[headerInfo11A];
257 gainI = ee->ee_gainI[headerInfo11A];
259 case IEEE80211_CHAN_B:
260 tempOB = ee->ee_obFor24;
261 tempDB = ee->ee_dbFor24;
262 ob2GHz = ee->ee_ob2GHz[0];
263 db2GHz = ee->ee_db2GHz[0];
265 rfXpdGainFixed = ee->ee_xgain[headerInfo11B];
266 rfPloSel = ee->ee_xpd[headerInfo11B];
267 rfPwdXpd = !ee->ee_xpd[headerInfo11B];
268 gainI = ee->ee_gainI[headerInfo11B];
270 case IEEE80211_CHAN_G:
271 case IEEE80211_CHAN_PUREG: /* NB: really 108G */
272 tempOB = ee->ee_obFor24g;
273 tempDB = ee->ee_dbFor24g;
274 ob2GHz = ee->ee_ob2GHz[1];
275 db2GHz = ee->ee_db2GHz[1];
277 rfXpdGainFixed = ee->ee_xgain[headerInfo11G];
278 rfPloSel = ee->ee_xpd[headerInfo11G];
279 rfPwdXpd = !ee->ee_xpd[headerInfo11G];
280 gainI = ee->ee_gainI[headerInfo11G];
283 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
284 __func__, chan->ic_flags);
288 HALASSERT(1 <= tempOB && tempOB <= 5);
289 HALASSERT(1 <= tempDB && tempDB <= 5);
292 for (i = 0; i < N(ar5212Bank0_5111); i++)
293 rfReg[i] = ar5212Bank0_5111[i][modesIndex];
294 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
295 ar5212ModifyRfBuffer(rfReg, ob2GHz, 3, 119, 0);
296 ar5212ModifyRfBuffer(rfReg, db2GHz, 3, 122, 0);
298 HAL_INI_WRITE_BANK(ah, ar5212Bank0_5111, rfReg, regWrites);
301 HAL_INI_WRITE_ARRAY(ah, ar5212Bank1_5111, 1, regWrites);
304 HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites);
307 HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites);
310 for (i = 0; i < N(ar5212Bank6_5111); i++)
311 rfReg[i] = ar5212Bank6_5111[i][modesIndex];
312 if (IEEE80211_IS_CHAN_A(chan)) { /* NB: CHANNEL_A | CHANNEL_T */
313 ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd84, 1, 51, 3);
314 ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd90, 1, 45, 3);
316 ar5212ModifyRfBuffer(rfReg, rfPwdXpd, 1, 95, 0);
317 ar5212ModifyRfBuffer(rfReg, rfXpdGainFixed, 4, 96, 0);
318 /* Set 5212 OB & DB */
319 ar5212ModifyRfBuffer(rfReg, tempOB, 3, 104, 0);
320 ar5212ModifyRfBuffer(rfReg, tempDB, 3, 107, 0);
321 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5111, rfReg, regWrites);
324 for (i = 0; i < N(ar5212Bank7_5111); i++)
325 rfReg[i] = ar5212Bank7_5111[i][modesIndex];
326 ar5212ModifyRfBuffer(rfReg, gainI, 6, 29, 0);
327 ar5212ModifyRfBuffer(rfReg, rfPloSel, 1, 4, 0);
329 if (IEEE80211_IS_CHAN_QUARTER(chan) || IEEE80211_IS_CHAN_HALF(chan)) {
330 uint32_t rfWaitI, rfWaitS, rfMaxTime;
333 rfWaitI = (IEEE80211_IS_CHAN_HALF(chan)) ? 0x10 : 0x1f;
335 ar5212ModifyRfBuffer(rfReg, rfWaitS, 5, 19, 0);
336 ar5212ModifyRfBuffer(rfReg, rfWaitI, 5, 24, 0);
337 ar5212ModifyRfBuffer(rfReg, rfMaxTime, 2, 49, 0);
341 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5111, rfReg, regWrites);
343 /* Now that we have reprogrammed rfgain value, clear the flag. */
344 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
350 * Returns interpolated or the scaled up interpolated value
353 interpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
354 uint16_t targetLeft, uint16_t targetRight)
359 /* to get an accurate ratio, always scale, if want to scale, then don't scale back down */
360 if ((targetLeft * targetRight) == 0)
363 if (srcRight != srcLeft) {
365 * Note the ratio always need to be scaled,
366 * since it will be a fraction.
368 lRatio = (target - srcLeft) * EEP_SCALE / (srcRight - srcLeft);
370 /* Return as Left target if value would be negative */
372 } else if (lRatio > EEP_SCALE) {
373 /* Return as Right target if Ratio is greater than 100% (SCALE) */
376 rv = (lRatio * targetRight + (EEP_SCALE - lRatio) *
377 targetLeft) / EEP_SCALE;
386 * Read the transmit power levels from the structures taken from EEPROM
387 * Interpolate read transmit power values for this channel
388 * Organize the transmit power values into a table for writing into the hardware
391 ar5111SetPowerTable(struct ath_hal *ah,
392 int16_t *pMinPower, int16_t *pMaxPower,
393 const struct ieee80211_channel *chan,
396 uint16_t freq = ath_hal_gethwchannel(ah, chan);
397 struct ath_hal_5212 *ahp = AH5212(ah);
398 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
399 FULL_PCDAC_STRUCT pcdacStruct;
402 uint16_t *pPcdacValues;
403 int16_t *pScaledUpDbm;
404 int16_t minScaledPwr;
405 int16_t maxScaledPwr;
407 uint16_t pcdacMin = 0;
408 uint16_t pcdacMax = PCDAC_STOP;
409 uint16_t pcdacTableIndex;
410 uint16_t scaledPcdac;
411 PCDACS_EEPROM *pSrcStruct;
412 PCDACS_EEPROM eepromPcdacs;
414 /* setup the pcdac struct to point to the correct info, based on mode */
415 switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) {
416 case IEEE80211_CHAN_A:
417 case IEEE80211_CHAN_ST:
418 eepromPcdacs.numChannels = ee->ee_numChannels11a;
419 eepromPcdacs.pChannelList = ee->ee_channels11a;
420 eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11a;
422 case IEEE80211_CHAN_B:
423 eepromPcdacs.numChannels = ee->ee_numChannels2_4;
424 eepromPcdacs.pChannelList = ee->ee_channels11b;
425 eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11b;
427 case IEEE80211_CHAN_G:
428 case IEEE80211_CHAN_108G:
429 eepromPcdacs.numChannels = ee->ee_numChannels2_4;
430 eepromPcdacs.pChannelList = ee->ee_channels11g;
431 eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11g;
434 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
435 __func__, chan->ic_flags);
439 pSrcStruct = &eepromPcdacs;
441 OS_MEMZERO(&pcdacStruct, sizeof(pcdacStruct));
442 pPcdacValues = pcdacStruct.PcdacValues;
443 pScaledUpDbm = pcdacStruct.PwrValues;
445 /* Initialize the pcdacs to dBM structs pcdacs to be 1 to 63 */
446 for (i = PCDAC_START, j = 0; i <= PCDAC_STOP; i+= PCDAC_STEP, j++)
449 pcdacStruct.numPcdacValues = j;
450 pcdacStruct.pcdacMin = PCDAC_START;
451 pcdacStruct.pcdacMax = PCDAC_STOP;
453 /* Fill out the power values for this channel */
454 for (j = 0; j < pcdacStruct.numPcdacValues; j++ )
455 pScaledUpDbm[j] = ar5212GetScaledPower(freq,
456 pPcdacValues[j], pSrcStruct);
458 /* Now scale the pcdac values to fit in the 64 entry power table */
459 minScaledPwr = pScaledUpDbm[0];
460 maxScaledPwr = pScaledUpDbm[pcdacStruct.numPcdacValues - 1];
462 /* find minimum and make monotonic */
463 for (j = 0; j < pcdacStruct.numPcdacValues; j++) {
464 if (minScaledPwr >= pScaledUpDbm[j]) {
465 minScaledPwr = pScaledUpDbm[j];
469 * Make the full_hsh monotonically increasing otherwise
470 * interpolation algorithm will get fooled gotta start
471 * working from the top, hence i = 63 - j.
473 i = (uint16_t)(pcdacStruct.numPcdacValues - 1 - j);
476 if (pScaledUpDbm[i-1] > pScaledUpDbm[i]) {
478 * It could be a glitch, so make the power for
479 * this pcdac the same as the power from the
480 * next highest pcdac.
482 pScaledUpDbm[i - 1] = pScaledUpDbm[i];
486 for (j = 0; j < pcdacStruct.numPcdacValues; j++)
487 if (maxScaledPwr < pScaledUpDbm[j]) {
488 maxScaledPwr = pScaledUpDbm[j];
492 /* Find the first power level with a pcdac */
493 pwr = (uint16_t)(PWR_STEP *
494 ((minScaledPwr - PWR_MIN + PWR_STEP / 2) / PWR_STEP) + PWR_MIN);
496 /* Write all the first pcdac entries based off the pcdacMin */
498 for (i = 0; i < (2 * (pwr - PWR_MIN) / EEP_SCALE + 1); i++) {
499 HALASSERT(pcdacTableIndex < PWR_TABLE_SIZE);
500 ahp->ah_pcdacTable[pcdacTableIndex++] = pcdacMin;
504 while (pwr < pScaledUpDbm[pcdacStruct.numPcdacValues - 1] &&
505 pcdacTableIndex < PWR_TABLE_SIZE) {
507 /* stop if dbM > max_power_possible */
508 while (pwr < pScaledUpDbm[pcdacStruct.numPcdacValues - 1] &&
509 (pwr - pScaledUpDbm[i])*(pwr - pScaledUpDbm[i+1]) > 0)
511 /* scale by 2 and add 1 to enable round up or down as needed */
512 scaledPcdac = (uint16_t)(interpolate(pwr,
513 pScaledUpDbm[i], pScaledUpDbm[i + 1],
514 (uint16_t)(pPcdacValues[i] * 2),
515 (uint16_t)(pPcdacValues[i + 1] * 2)) + 1);
517 HALASSERT(pcdacTableIndex < PWR_TABLE_SIZE);
518 ahp->ah_pcdacTable[pcdacTableIndex] = scaledPcdac / 2;
519 if (ahp->ah_pcdacTable[pcdacTableIndex] > pcdacMax)
520 ahp->ah_pcdacTable[pcdacTableIndex] = pcdacMax;
524 /* Write all the last pcdac entries based off the last valid pcdac */
525 while (pcdacTableIndex < PWR_TABLE_SIZE) {
526 ahp->ah_pcdacTable[pcdacTableIndex] =
527 ahp->ah_pcdacTable[pcdacTableIndex - 1];
531 /* No power table adjustment for 5111 */
532 ahp->ah_txPowerIndexOffset = 0;
538 * Get or interpolate the pcdac value from the calibrated data.
541 ar5212GetScaledPower(uint16_t channel, uint16_t pcdacValue,
542 const PCDACS_EEPROM *pSrcStruct)
545 uint16_t lFreq, rFreq; /* left and right frequency values */
546 uint16_t llPcdac, ulPcdac; /* lower and upper left pcdac values */
547 uint16_t lrPcdac, urPcdac; /* lower and upper right pcdac values */
548 uint16_t lPwr, uPwr; /* lower and upper temp pwr values */
549 uint16_t lScaledPwr, rScaledPwr; /* left and right scaled power */
551 if (ar5212FindValueInList(channel, pcdacValue, pSrcStruct, &powerValue)) {
552 /* value was copied from srcStruct */
556 ar5212GetLowerUpperValues(channel,
557 pSrcStruct->pChannelList, pSrcStruct->numChannels,
559 ar5212GetLowerUpperPcdacs(pcdacValue,
560 lFreq, pSrcStruct, &llPcdac, &ulPcdac);
561 ar5212GetLowerUpperPcdacs(pcdacValue,
562 rFreq, pSrcStruct, &lrPcdac, &urPcdac);
564 /* get the power index for the pcdac value */
565 ar5212FindValueInList(lFreq, llPcdac, pSrcStruct, &lPwr);
566 ar5212FindValueInList(lFreq, ulPcdac, pSrcStruct, &uPwr);
567 lScaledPwr = interpolate(pcdacValue, llPcdac, ulPcdac, lPwr, uPwr);
569 ar5212FindValueInList(rFreq, lrPcdac, pSrcStruct, &lPwr);
570 ar5212FindValueInList(rFreq, urPcdac, pSrcStruct, &uPwr);
571 rScaledPwr = interpolate(pcdacValue, lrPcdac, urPcdac, lPwr, uPwr);
573 return interpolate(channel, lFreq, rFreq, lScaledPwr, rScaledPwr);
577 * Find the value from the calibrated source data struct
580 ar5212FindValueInList(uint16_t channel, uint16_t pcdacValue,
581 const PCDACS_EEPROM *pSrcStruct, uint16_t *powerValue)
583 const DATA_PER_CHANNEL *pChannelData = pSrcStruct->pDataPerChannel;
586 for (i = 0; i < pSrcStruct->numChannels; i++ ) {
587 if (pChannelData->channelValue == channel) {
588 const uint16_t* pPcdac = pChannelData->PcdacValues;
591 for (j = 0; j < pChannelData->numPcdacValues; j++ ) {
592 if (*pPcdac == pcdacValue) {
593 *powerValue = pChannelData->PwrValues[j];
605 * Get the upper and lower pcdac given the channel and the pcdac
609 ar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel,
610 const PCDACS_EEPROM *pSrcStruct,
611 uint16_t *pLowerPcdac, uint16_t *pUpperPcdac)
613 const DATA_PER_CHANNEL *pChannelData = pSrcStruct->pDataPerChannel;
616 /* Find the channel information */
617 for (i = 0; i < pSrcStruct->numChannels; i++) {
618 if (pChannelData->channelValue == channel)
622 ar5212GetLowerUpperValues(pcdac, pChannelData->PcdacValues,
623 pChannelData->numPcdacValues,
624 pLowerPcdac, pUpperPcdac);
628 ar5111GetChannelMaxMinPower(struct ath_hal *ah,
629 const struct ieee80211_channel *chan,
630 int16_t *maxPow, int16_t *minPow)
632 /* XXX - Get 5111 power limits! */
633 /* NB: caller will cope */
638 * Adjust NF based on statistical values for 5GHz frequencies.
641 ar5111GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
643 static const struct {
647 { 5790, 6 }, /* NB: ordered high -> low */
661 for (i = 0; c->channel <= adjust5111[i].freqLow; i++)
663 return adjust5111[i].adjust;
667 * Free memory for analog bank scratch buffers
670 ar5111RfDetach(struct ath_hal *ah)
672 struct ath_hal_5212 *ahp = AH5212(ah);
674 HALASSERT(ahp->ah_rfHal != AH_NULL);
675 ath_hal_free(ahp->ah_rfHal);
676 ahp->ah_rfHal = AH_NULL;
680 * Allocate memory for analog bank scratch buffers
681 * Scratch Buffer will be reinitialized every reset so no need to zero now
684 ar5111RfAttach(struct ath_hal *ah, HAL_STATUS *status)
686 struct ath_hal_5212 *ahp = AH5212(ah);
687 struct ar5111State *priv;
689 HALASSERT(ah->ah_magic == AR5212_MAGIC);
691 HALASSERT(ahp->ah_rfHal == AH_NULL);
692 priv = ath_hal_malloc(sizeof(struct ar5111State));
693 if (priv == AH_NULL) {
694 HALDEBUG(ah, HAL_DEBUG_ANY,
695 "%s: cannot allocate private state\n", __func__);
696 *status = HAL_ENOMEM; /* XXX */
699 priv->base.rfDetach = ar5111RfDetach;
700 priv->base.writeRegs = ar5111WriteRegs;
701 priv->base.getRfBank = ar5111GetRfBank;
702 priv->base.setChannel = ar5111SetChannel;
703 priv->base.setRfRegs = ar5111SetRfRegs;
704 priv->base.setPowerTable = ar5111SetPowerTable;
705 priv->base.getChannelMaxMinPower = ar5111GetChannelMaxMinPower;
706 priv->base.getNfAdjust = ar5111GetNfAdjust;
708 ahp->ah_pcdacTable = priv->pcdacTable;
709 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
710 ahp->ah_rfHal = &priv->base;
716 ar5111Probe(struct ath_hal *ah)
718 return IS_RAD5111(ah);
720 AH_RF(RF5111, ar5111Probe, ar5111RfAttach);