2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5212_power.c 203159 2010-01-29 10:10:14Z rpaulo $
23 #include "ah_internal.h"
25 #include "ar5212/ar5212.h"
26 #include "ar5212/ar5212reg.h"
27 #include "ar5212/ar5212desc.h"
30 * Notify Power Mgt is enabled in self-generated frames.
31 * If requested, force chip awake.
33 * Returns A_OK if chip is awake or successfully forced awake.
35 * WARNING WARNING WARNING
36 * There is a problem with the chip where sometimes it will not wake up.
39 ar5212SetPowerModeAwake(struct ath_hal *ah, int setChip)
42 (AR_SCR_SLDUR|AR_SCR_SLE|AR_SCR_SLDTP|AR_SCR_SLDWP|\
43 AR_SCR_SLEPOL|AR_SCR_MIBIE|AR_SCR_UNKNOWN)
44 #define POWER_UP_TIME 2000
50 * Be careful setting the AWAKE mode. When we are called
51 * with the chip powered down the read returns 0xffffffff
52 * which when blindly written back with OS_REG_RMW_FIELD
53 * enables the MIB interrupt for the sleep performance
54 * counters. This can result in an interrupt storm when
55 * ANI is in operation as noone knows to turn off the MIB
58 scr = OS_REG_READ(ah, AR_SCR);
59 if (scr & ~AR_SCR_MASK) {
60 HALDEBUG(ah, HAL_DEBUG_ANY,
61 "%s: bogus SCR 0x%x, PCICFG 0x%x\n",
62 __func__, scr, OS_REG_READ(ah, AR_PCICFG));
65 scr = (scr &~ AR_SCR_SLE) | AR_SCR_SLE_WAKE;
66 OS_REG_WRITE(ah, AR_SCR, scr);
67 OS_DELAY(10); /* Give chip the chance to awake */
69 for (i = POWER_UP_TIME / 50; i != 0; i--) {
70 val = OS_REG_READ(ah, AR_PCICFG);
71 if ((val & AR_PCICFG_SPWR_DN) == 0)
74 OS_REG_WRITE(ah, AR_SCR, scr);
78 ath_hal_printf(ah, "%s: Failed to wakeup in %ums\n",
79 __func__, POWER_UP_TIME/50);
85 OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
92 * Notify Power Mgt is disabled in self-generated frames.
93 * If requested, force chip to sleep.
96 ar5212SetPowerModeSleep(struct ath_hal *ah, int setChip)
98 OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
100 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
104 * Notify Power Management is enabled in self-generating
105 * fames. If request, set power mode of chip to
106 * auto/normal. Duration in units of 128us (1/8 TU).
109 ar5212SetPowerModeNetworkSleep(struct ath_hal *ah, int setChip)
111 OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
113 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
117 * Set power mgt to the requested mode, and conditionally set
121 ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
123 struct ath_hal_5212 *ahp = AH5212(ah);
125 static const char* modes[] = {
132 int status = AH_TRUE;
134 HALDEBUG(ah, HAL_DEBUG_POWER, "%s: %s -> %s (%s)\n", __func__,
135 modes[ahp->ah_powerMode], modes[mode],
136 setChip ? "set chip " : "");
139 status = ar5212SetPowerModeAwake(ah, setChip);
141 case HAL_PM_FULL_SLEEP:
142 ar5212SetPowerModeSleep(ah, setChip);
144 case HAL_PM_NETWORK_SLEEP:
145 ar5212SetPowerModeNetworkSleep(ah, setChip);
148 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown power mode %u\n",
152 ahp->ah_powerMode = mode;
157 * Return the current sleep mode of the chip
160 ar5212GetPowerMode(struct ath_hal *ah)
162 /* Just so happens the h/w maps directly to the abstracted value */
163 return MS(OS_REG_READ(ah, AR_SCR), AR_SCR_SLE);
168 * Return the current sleep state of the chip
172 ar5212GetPowerStatus(struct ath_hal *ah)
174 return (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_SPWR_DN) != 0;