4 * BY : C.L. Huang (ching@tekram.com.tw)
5 * Erich Chen (erich@tekram.com.tw)
6 * Description: Device Driver for Tekram DC395U/UW/F ,DC315/U
7 * PCI SCSI Bus Master Host Adapter
8 * (SCSI chip set used Tekram ASIC TRM-S1040)
9 * (C)Copyright 1995-1999 Tekram Technology Co., Ltd.
15 * REV# DATE NAME DESCRIPTION
16 * 1.05 05/01/1999 ERICH CHEN First released for 3.x.x (CAM)
17 * 1.06 07/29/1999 ERICH CHEN Modify for NEW PCI
18 * 1.07 12/12/1999 ERICH CHEN Modify for 3.3.x ,DCB no free
19 * 1.08 06/12/2000 ERICH CHEN Modify for 4.x.x
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in the
32 * documentation and/or other materials provided with the distribution.
33 * 3. The name of the author may not be used to endorse or promote products
34 * derived from this software without specific prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
37 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
38 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
39 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
41 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
45 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 * $FreeBSD: src/sys/dev/trm/trm.c,v 1.2.2.2 2002/12/19 20:34:45 cognet Exp $
48 * $DragonFly: src/sys/dev/disk/trm/trm.c,v 1.4 2004/02/13 01:04:15 joerg Exp $
52 * Imported into FreeBSD source repository, and updated to compile under
53 * FreeBSD-3.0-DEVELOPMENT, by Stefan Esser <se@FreeBSD.Org>, 1996-12-17
57 * Updated to compile under FreeBSD 5.0-CURRENT by Olivier Houchard
58 * <doginou@ci0.org>, 2002-03-04
61 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/malloc.h>
65 #include <sys/queue.h>
66 #if defined(__FreeBSD__) && __FreeBSD_version >= 500000
71 #include <sys/kernel.h>
76 #include <bus/pci/pcivar.h>
77 #include <bus/pci/pcireg.h>
78 #include <machine/resource.h>
79 #include <machine/bus_pio.h>
80 #include <machine/bus.h>
81 #include <machine/clock.h>
84 #include <bus/cam/cam.h>
85 #include <bus/cam/cam_ccb.h>
86 #include <bus/cam/cam_sim.h>
87 #include <bus/cam/cam_xpt_sim.h>
88 #include <bus/cam/cam_debug.h>
90 #include <bus/cam/scsi/scsi_all.h>
94 #define trm_reg_read8(reg) bus_space_read_1(pACB->tag, pACB->bsh, reg)
95 #define trm_reg_read16(reg) bus_space_read_2(pACB->tag, pACB->bsh, reg)
96 #define trm_reg_read32(reg) bus_space_read_4(pACB->tag, pACB->bsh, reg)
97 #define trm_reg_write8(value,reg) bus_space_write_1(pACB->tag, pACB->bsh,\
99 #define trm_reg_write16(value,reg) bus_space_write_2(pACB->tag, pACB->bsh,\
101 #define trm_reg_write32(value,reg) bus_space_write_4(pACB->tag, pACB->bsh,\
104 #define PCI_Vendor_ID_TEKRAM 0x1DE1
105 #define PCI_Device_ID_TRM_S1040 0x0391
106 #define PCI_DEVICEID_TRMS1040 0x03911DE1
109 #define TRM_DPRINTF(fmt, arg...) printf("trm: " fmt, ##arg)
111 #define TRM_DPRINTF(fmt, arg...) {}
112 #endif /* TRM_DEBUG */
114 static void trm_check_eeprom(PNVRAMTYPE pEEpromBuf,PACB pACB);
115 static void TRM_read_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
116 static u_int8_t TRM_get_data(PACB pACB, u_int8_t bAddr);
117 static void TRM_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
118 static void TRM_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData);
119 static void TRM_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr);
120 static void TRM_wait_30us(PACB pACB);
122 static void trm_Interrupt(void *vpACB);
123 static void trm_DataOutPhase0(PACB pACB, PSRB pSRB,
124 u_int8_t * pscsi_status);
125 static void trm_DataInPhase0(PACB pACB, PSRB pSRB,
126 u_int8_t * pscsi_status);
127 static void trm_CommandPhase0(PACB pACB, PSRB pSRB,
128 u_int8_t * pscsi_status);
129 static void trm_StatusPhase0(PACB pACB, PSRB pSRB,
130 u_int8_t * pscsi_status);
131 static void trm_MsgOutPhase0(PACB pACB, PSRB pSRB,
132 u_int8_t * pscsi_status);
133 static void trm_MsgInPhase0(PACB pACB, PSRB pSRB,
134 u_int8_t * pscsi_status);
135 static void trm_DataOutPhase1(PACB pACB, PSRB pSRB,
136 u_int8_t * pscsi_status);
137 static void trm_DataInPhase1(PACB pACB, PSRB pSRB,
138 u_int8_t * pscsi_status);
139 static void trm_CommandPhase1(PACB pACB, PSRB pSRB,
140 u_int8_t * pscsi_status);
141 static void trm_StatusPhase1(PACB pACB, PSRB pSRB,
142 u_int8_t * pscsi_status);
143 static void trm_MsgOutPhase1(PACB pACB, PSRB pSRB,
144 u_int8_t * pscsi_status);
145 static void trm_MsgInPhase1(PACB pACB, PSRB pSRB,
146 u_int8_t * pscsi_status);
147 static void trm_Nop0(PACB pACB, PSRB pSRB, u_int8_t * pscsi_status);
148 static void trm_Nop1(PACB pACB, PSRB pSRB, u_int8_t * pscsi_status);
149 static void trm_SetXferRate(PACB pACB, PSRB pSRB,PDCB pDCB);
150 static void trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir);
151 static void trm_Disconnect(PACB pACB);
152 static void trm_Reselect(PACB pACB);
153 static void trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB);
154 static void trm_DoingSRB_Done(PACB pACB);
155 static void trm_ScsiRstDetect(PACB pACB);
156 static void trm_ResetSCSIBus(PACB pACB);
157 static void trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB);
158 static void trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB);
159 static void trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB);
160 static void trm_SendSRB(PACB pACB, PSRB pSRB);
161 static int trm_probe(device_t tag);
162 static int trm_attach(device_t tag);
163 static void trm_reset(PACB pACB);
165 static u_int16_t trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB);
167 static int trm_initAdapter(PACB pACB, u_int16_t unit,
168 device_t pci_config_id);
169 static void trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,
170 u_int32_t i, u_int32_t j);
171 static void trm_initSRB(PSRB psrb);
172 static void trm_linkSRB(PACB pACB);
173 static void trm_initACB(PACB pACB, u_int16_t unit);
174 /* CAM SIM entry points */
175 #define ccb_trmsrb_ptr spriv_ptr0
176 #define ccb_trmacb_ptr spriv_ptr1
177 static void trm_action(struct cam_sim *psim, union ccb *pccb);
178 static void trm_poll(struct cam_sim *psim);
181 static void * trm_SCSI_phase0[] = {
182 trm_DataOutPhase0, /* phase:0 */
183 trm_DataInPhase0, /* phase:1 */
184 trm_CommandPhase0, /* phase:2 */
185 trm_StatusPhase0, /* phase:3 */
186 trm_Nop0, /* phase:4 */
187 trm_Nop1, /* phase:5 */
188 trm_MsgOutPhase0, /* phase:6 */
189 trm_MsgInPhase0, /* phase:7 */
194 * stateV = (void *) trm_SCSI_phase1[phase]
197 static void * trm_SCSI_phase1[] = {
198 trm_DataOutPhase1, /* phase:0 */
199 trm_DataInPhase1, /* phase:1 */
200 trm_CommandPhase1, /* phase:2 */
201 trm_StatusPhase1, /* phase:3 */
202 trm_Nop0, /* phase:4 */
203 trm_Nop1, /* phase:5 */
204 trm_MsgOutPhase1, /* phase:6 */
205 trm_MsgInPhase1, /* phase:7 */
209 NVRAMTYPE trm_eepromBuf[MAX_ADAPTER_NUM];
211 *Fast20: 000 50ns, 20.0 Mbytes/s
212 * 001 75ns, 13.3 Mbytes/s
213 * 010 100ns, 10.0 Mbytes/s
214 * 011 125ns, 8.0 Mbytes/s
215 * 100 150ns, 6.6 Mbytes/s
216 * 101 175ns, 5.7 Mbytes/s
217 * 110 200ns, 5.0 Mbytes/s
218 * 111 250ns, 4.0 Mbytes/s
220 *Fast40: 000 25ns, 40.0 Mbytes/s
221 * 001 50ns, 20.0 Mbytes/s
222 * 010 75ns, 13.3 Mbytes/s
223 * 011 100ns, 10.0 Mbytes/s
224 * 100 125ns, 8.0 Mbytes/s
225 * 101 150ns, 6.6 Mbytes/s
226 * 110 175ns, 5.7 Mbytes/s
227 * 111 200ns, 5.0 Mbytes/s
230 u_int8_t dc395x_trm_clock_period[] = {
231 12,/* 48 ns 20 MB/sec */
232 18,/* 72 ns 13.3 MB/sec */
233 25,/* 100 ns 10.0 MB/sec */
234 31,/* 124 ns 8.0 MB/sec */
235 37,/* 148 ns 6.6 MB/sec */
236 43,/* 172 ns 5.7 MB/sec */
237 50,/* 200 ns 5.0 MB/sec */
238 62 /* 248 ns 4.0 MB/sec */
241 u_int8_t dc395x_trm_tinfo_sync_period[] = {
253 trm_GetSRB(PACB pACB)
259 pSRB = pACB->pFreeSRB;
261 pACB->pFreeSRB = pSRB->pNextSRB;
262 pSRB->pNextSRB = NULL;
269 trm_RewaitSRB0(PDCB pDCB, PSRB pSRB)
275 if ((psrb1 = pDCB->pWaitingSRB)) {
276 pSRB->pNextSRB = psrb1;
277 pDCB->pWaitingSRB = pSRB;
279 pSRB->pNextSRB = NULL;
280 pDCB->pWaitingSRB = pSRB;
281 pDCB->pWaitLastSRB = pSRB;
287 trm_RewaitSRB(PDCB pDCB, PSRB pSRB)
295 psrb1 = pDCB->pGoingSRB;
297 pDCB->pGoingSRB = psrb1->pNextSRB;
299 while (pSRB != psrb1->pNextSRB)
300 psrb1 = psrb1->pNextSRB;
301 psrb1->pNextSRB = pSRB->pNextSRB;
302 if (pSRB == pDCB->pGoingLastSRB)
303 pDCB->pGoingLastSRB = psrb1;
305 if ((psrb1 = pDCB->pWaitingSRB)) {
306 pSRB->pNextSRB = psrb1;
307 pDCB->pWaitingSRB = pSRB;
309 pSRB->pNextSRB = NULL;
310 pDCB->pWaitingSRB = pSRB;
311 pDCB->pWaitLastSRB = pSRB;
313 bval = pSRB->TagNumber;
314 pDCB->TagMask &= (~(1 << bval)); /* Free TAG number */
319 trm_DoWaitingSRB(PACB pACB)
326 if (!(pACB->pActiveDCB) &&
327 !(pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
328 ptr = pACB->pDCBRunRobin;
330 ptr = pACB->pLinkDCB;
331 pACB->pDCBRunRobin = ptr;
335 pACB->pDCBRunRobin = ptr1->pNextDCB;
336 if (!(ptr1->MaxCommand > ptr1->GoingSRBCnt)
337 || !(pSRB = ptr1->pWaitingSRB)) {
338 if (pACB->pDCBRunRobin == ptr)
340 ptr1 = ptr1->pNextDCB;
342 if (!trm_StartSCSI(pACB, ptr1, pSRB)) {
344 * If trm_StartSCSI return 0 :
345 * current interrupt status is interrupt enable
346 * It's said that SCSI processor is unoccupied
349 if (ptr1->pWaitLastSRB == pSRB) {
350 ptr1->pWaitingSRB = NULL;
351 ptr1->pWaitLastSRB = NULL;
353 ptr1->pWaitingSRB = pSRB->pNextSRB;
354 pSRB->pNextSRB = NULL;
356 ptr1->pGoingLastSRB->pNextSRB = pSRB;
358 ptr1->pGoingSRB = pSRB;
359 ptr1->pGoingLastSRB = pSRB;
370 trm_SRBwaiting(PDCB pDCB, PSRB pSRB)
373 if (pDCB->pWaitingSRB) {
374 pDCB->pWaitLastSRB->pNextSRB = pSRB;
375 pDCB->pWaitLastSRB = pSRB;
376 pSRB->pNextSRB = NULL;
378 pDCB->pWaitingSRB = pSRB;
379 pDCB->pWaitLastSRB = pSRB;
384 trm_ExecuteSRB(void *arg, bus_dma_segment_t *dm_segs, int nseg, int vp)
390 u_long totalxferlen=0;
394 pACB = (PACB)ccb->ccb_h.ccb_trmacb_ptr;
395 TRM_DPRINTF("trm_ExecuteSRB..........\n");
398 bus_dma_segment_t *end_seg;
401 /* Copy the segments into our SG list */
402 end_seg = dm_segs + nseg;
403 psg = (PSEG) &pSRB->SegmentX[0];
404 pSRB->SRBSGListPointer= psg;
405 while (dm_segs < end_seg) {
406 psg->address = vp?(u_long)vtophys(dm_segs->ds_addr)
407 :(u_long)dm_segs->ds_addr;
408 psg->length = (u_long)dm_segs->ds_len;
409 totalxferlen += dm_segs->ds_len;
413 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
414 op = BUS_DMASYNC_PREREAD;
416 op = BUS_DMASYNC_PREWRITE;
418 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
421 pSRB->SRBTotalXferLength=totalxferlen;
422 pSRB->SRBSGCount = nseg;
423 pSRB->SRBSGIndex = 0;
424 pSRB->AdaptStatus = 0;
425 pSRB->TargetStatus = 0;
430 pSRB->ScsiPhase = PH_BUS_FREE; /* SCSI bus free Phase */
433 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
435 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
436 pSRB->pNextSRB = pACB->pFreeSRB;
437 pACB->pFreeSRB = pSRB;
442 ccb->ccb_h.status |= CAM_SIM_QUEUED;
444 /* XXX Need a timeout handler */
445 ccb->ccb_h.timeout_ch = timeout(trmtimeout, (caddr_t)srb, (ccb->ccb_h.timeout * hz) / 1000);
447 trm_SendSRB(pACB, pSRB);
453 trm_SendSRB(PACB pACB, PSRB pSRB)
459 pDCB = pSRB->pSRBDCB;
460 if (!(pDCB->MaxCommand > pDCB->GoingSRBCnt) || (pACB->pActiveDCB)
461 || (pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
462 TRM_DPRINTF("pDCB->MaxCommand=%d \n",pDCB->MaxCommand);
463 TRM_DPRINTF("pDCB->GoingSRBCnt=%d \n",pDCB->GoingSRBCnt);
464 TRM_DPRINTF("pACB->pActiveDCB=%8x \n",(u_int)pACB->pActiveDCB);
465 TRM_DPRINTF("pACB->ACBFlag=%x \n",pACB->ACBFlag);
466 trm_SRBwaiting(pDCB, pSRB);
470 if (pDCB->pWaitingSRB) {
471 trm_SRBwaiting(pDCB, pSRB);
472 pSRB = pDCB->pWaitingSRB;
473 pDCB->pWaitingSRB = pSRB->pNextSRB;
474 pSRB->pNextSRB = NULL;
477 if (!trm_StartSCSI(pACB, pDCB, pSRB)) {
479 * If trm_StartSCSI return 0 :
480 * current interrupt status is interrupt enable
481 * It's said that SCSI processor is unoccupied
483 pDCB->GoingSRBCnt++; /* stack waiting SRB*/
484 if (pDCB->pGoingSRB) {
485 pDCB->pGoingLastSRB->pNextSRB = pSRB;
486 pDCB->pGoingLastSRB = pSRB;
488 pDCB->pGoingSRB = pSRB;
489 pDCB->pGoingLastSRB = pSRB;
493 * If trm_StartSCSI return 1 :
494 * current interrupt status is interrupt disreenable
495 * It's said that SCSI processor has more one SRB need to do
497 trm_RewaitSRB0(pDCB, pSRB);
509 trm_action(struct cam_sim *psim, union ccb *pccb)
512 u_int target_id,target_lun;
514 CAM_DEBUG(pccb->ccb_h.path, CAM_DEBUG_TRACE, ("trm_action\n"));
516 pACB = (PACB) cam_sim_softc(psim);
517 target_id = pccb->ccb_h.target_id;
518 target_lun = pccb->ccb_h.target_lun;
520 switch (pccb->ccb_h.func_code) {
522 TRM_DPRINTF(" XPT_NOOP \n");
523 pccb->ccb_h.status = CAM_REQ_INVALID;
527 * Execute the requested I/O operation
532 struct ccb_scsiio *pcsio;
535 TRM_DPRINTF(" XPT_SCSI_IO \n");
536 TRM_DPRINTF("trm: target_id= %d target_lun= %d \n"
537 ,target_id, target_lun);
539 "pACB->scan_devices[target_id][target_lun]= %d \n"
540 ,pACB->scan_devices[target_id][target_lun]);
541 pDCB = pACB->pDCB[target_id][target_lun];
543 * Assign an SRB and connect it with this ccb.
545 pSRB = trm_GetSRB(pACB);
548 pccb->ccb_h.status = CAM_RESRC_UNAVAIL;
552 pSRB->pSRBDCB = pDCB;
553 pccb->ccb_h.ccb_trmsrb_ptr = pSRB;
554 pccb->ccb_h.ccb_trmacb_ptr = pACB;
556 pSRB->ScsiCmdLen = pcsio->cdb_len;
558 * move layer of CAM command block to layer of SCSI
559 * Request Block for SCSI processor command doing
561 bcopy(pcsio->cdb_io.cdb_bytes,pSRB->CmdBlock
563 if ((pccb->ccb_h.flags & CAM_DIR_MASK)
565 if ((pccb->ccb_h.flags &
566 CAM_SCATTER_VALID) == 0) {
567 if ((pccb->ccb_h.flags
568 & CAM_DATA_PHYS) == 0) {
573 error = bus_dmamap_load(
581 if (error == EINPROGRESS) {
585 pccb->ccb_h.status |=
590 struct bus_dma_segment seg;
592 /* Pointer to physical buffer */
594 (bus_addr_t)pcsio->data_ptr;
595 seg.ds_len = pcsio->dxfer_len;
596 trm_ExecuteSRB(pSRB, &seg, 1,
600 /* CAM_SCATTER_VALID */
601 struct bus_dma_segment *segs;
603 if ((pccb->ccb_h.flags &
604 CAM_SG_LIST_PHYS) == 0 ||
606 & CAM_DATA_PHYS) != 0) {
607 pSRB->pNextSRB = pACB->pFreeSRB;
608 pACB->pFreeSRB = pSRB;
615 /* cam SG list is physical,
616 * cam data is virtual
618 segs = (struct bus_dma_segment *)
620 trm_ExecuteSRB(pSRB, segs,
621 pcsio->sglist_cnt, 1);
622 } /* CAM_SCATTER_VALID */
624 trm_ExecuteSRB(pSRB, NULL, 0, 0);
628 TRM_DPRINTF(" XPT_GDEV_TYPE \n");
629 pccb->ccb_h.status = CAM_REQ_INVALID;
633 TRM_DPRINTF(" XPT_GDEVLIST \n");
634 pccb->ccb_h.status = CAM_REQ_INVALID;
638 * Path routing inquiry
642 struct ccb_pathinq *cpi = &pccb->cpi;
644 TRM_DPRINTF(" XPT_PATH_INQ \n");
645 cpi->version_num = 1;
646 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
647 cpi->target_sprt = 0;
649 cpi->hba_eng_cnt = 0;
650 cpi->max_target = 15 ;
651 cpi->max_lun = pACB->max_lun; /* 7 or 0 */
652 cpi->initiator_id = pACB->AdaptSCSIID;
653 cpi->bus_id = cam_sim_bus(psim);
654 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
655 strncpy(cpi->hba_vid, "Tekram_TRM", HBA_IDLEN);
656 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
657 cpi->unit_number = cam_sim_unit(psim);
658 cpi->ccb_h.status = CAM_REQ_CMP;
663 * Release a frozen SIM queue
667 TRM_DPRINTF(" XPT_REL_SIMQ \n");
668 pccb->ccb_h.status = CAM_REQ_INVALID;
672 * Set Asynchronous Callback Parameters
673 * Set Asynchronous Callback CCB
676 TRM_DPRINTF(" XPT_SASYNC_CB \n");
677 pccb->ccb_h.status = CAM_REQ_INVALID;
681 * Set device type information
682 * Set Device Type CCB
685 TRM_DPRINTF(" XPT_SDEV_TYPE \n");
686 pccb->ccb_h.status = CAM_REQ_INVALID;
690 * (Re)Scan the SCSI Bus
691 * Rescan the given bus, or bus/target/lun
694 TRM_DPRINTF(" XPT_SCAN_BUS \n");
695 pccb->ccb_h.status = CAM_REQ_INVALID;
699 * Get EDT entries matching the given pattern
702 TRM_DPRINTF(" XPT_DEV_MATCH \n");
703 pccb->ccb_h.status = CAM_REQ_INVALID;
707 * Turn on debugging for a bus, target or lun
710 TRM_DPRINTF(" XPT_DEBUG \n");
711 pccb->ccb_h.status = CAM_REQ_INVALID;
715 * XPT_ABORT = 0x10, Abort the specified CCB
716 * Abort XPT request CCB
719 TRM_DPRINTF(" XPT_ABORT \n");
720 pccb->ccb_h.status = CAM_REQ_INVALID;
724 * Reset the specified SCSI bus
727 case XPT_RESET_BUS: {
730 TRM_DPRINTF(" XPT_RESET_BUS \n");
733 for (i=0; i<500; i++)
735 pccb->ccb_h.status = CAM_REQ_CMP;
740 * Bus Device Reset the specified SCSI device
741 * Reset SCSI Device CCB
745 * Don't (yet?) support vendor
748 TRM_DPRINTF(" XPT_RESET_DEV \n");
749 pccb->ccb_h.status = CAM_REQ_INVALID;
753 * Terminate the I/O process
754 * Terminate I/O Process Request CCB
757 TRM_DPRINTF(" XPT_TERM_IO \n");
758 pccb->ccb_h.status = CAM_REQ_INVALID;
765 TRM_DPRINTF(" XPT_SCAN_LUN \n");
766 pccb->ccb_h.status = CAM_REQ_INVALID;
771 * Get/Set transfer rate/width/disconnection/tag queueing
773 * (GET) default/user transfer settings for the target
775 case XPT_GET_TRAN_SETTINGS: {
776 struct ccb_trans_settings *cts;
778 struct trm_transinfo *tinfo;
781 TRM_DPRINTF(" XPT_GET_TRAN_SETTINGS \n");
783 pDCB = pACB->pDCB[target_id][target_lun];
788 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
789 /* current transfer settings */
790 if (pDCB->tinfo.disc_tag & TRM_CUR_DISCENB)
791 cts->flags = CCB_TRANS_DISC_ENB;
793 cts->flags = 0;/* no tag & disconnect */
794 if (pDCB->tinfo.disc_tag & TRM_CUR_TAGENB)
795 cts->flags |= CCB_TRANS_TAG_ENB;
796 tinfo = &pDCB->tinfo.current;
797 TRM_DPRINTF("CURRENT: cts->flags= %2x \n",
800 /* default(user) transfer settings */
801 if (pDCB->tinfo.disc_tag & TRM_USR_DISCENB)
802 cts->flags = CCB_TRANS_DISC_ENB;
805 if (pDCB->tinfo.disc_tag & TRM_USR_TAGENB)
806 cts->flags |= CCB_TRANS_TAG_ENB;
807 tinfo = &pDCB->tinfo.user;
808 TRM_DPRINTF("USER: cts->flags= %2x \n",
811 cts->sync_period = tinfo->period;
812 cts->sync_offset = tinfo->offset;
813 cts->bus_width = tinfo->width;
814 TRM_DPRINTF("pDCB->SyncPeriod: %d \n",
816 TRM_DPRINTF("period: %d \n", tinfo->period);
817 TRM_DPRINTF("offset: %d \n", tinfo->offset);
818 TRM_DPRINTF("width: %d \n", tinfo->width);
821 cts->valid = CCB_TRANS_SYNC_RATE_VALID |
822 CCB_TRANS_SYNC_OFFSET_VALID |
823 CCB_TRANS_BUS_WIDTH_VALID |
824 CCB_TRANS_DISC_VALID |
826 pccb->ccb_h.status = CAM_REQ_CMP;
831 * Get/Set transfer rate/width/disconnection/tag queueing
833 * (Set) transfer rate/width negotiation settings
835 case XPT_SET_TRAN_SETTINGS: {
836 struct ccb_trans_settings *cts;
841 TRM_DPRINTF(" XPT_SET_TRAN_SETTINGS \n");
844 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
845 update_type |= TRM_TRANS_GOAL;
846 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
847 update_type |= TRM_TRANS_USER;
849 pDCB = pACB->pDCB[target_id][target_lun];
851 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
852 /*ccb disc enables */
853 if (update_type & TRM_TRANS_GOAL) {
854 if ((cts->flags & CCB_TRANS_DISC_ENB)
859 pDCB->tinfo.disc_tag &=
862 if (update_type & TRM_TRANS_USER) {
863 if ((cts->flags & CCB_TRANS_DISC_ENB)
868 pDCB->tinfo.disc_tag &=
872 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
873 /* if ccb tag q active */
874 if (update_type & TRM_TRANS_GOAL) {
875 if ((cts->flags & CCB_TRANS_TAG_ENB)
877 pDCB->tinfo.disc_tag |=
880 pDCB->tinfo.disc_tag &=
883 if (update_type & TRM_TRANS_USER) {
884 if ((cts->flags & CCB_TRANS_TAG_ENB)
886 pDCB->tinfo.disc_tag |=
889 pDCB->tinfo.disc_tag &=
893 /* Minimum sync period factor */
895 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
896 /* if ccb sync active */
897 /* TRM-S1040 MinSyncPeriod = 4 clocks/byte */
898 if ((cts->sync_period != 0) &&
899 (cts->sync_period < 125))
900 cts->sync_period = 125;
901 /* 1/(125*4) minsync 2 MByte/sec */
902 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID)
904 if (cts->sync_offset == 0)
905 cts->sync_period = 0;
906 /* TRM-S1040 MaxSyncOffset = 15 bytes*/
907 if (cts->sync_offset > 15)
908 cts->sync_offset = 15;
911 if ((update_type & TRM_TRANS_USER) != 0) {
912 pDCB->tinfo.user.period = cts->sync_period;
913 pDCB->tinfo.user.offset = cts->sync_offset;
914 pDCB->tinfo.user.width = cts->bus_width;
916 if ((update_type & TRM_TRANS_GOAL) != 0) {
917 pDCB->tinfo.goal.period = cts->sync_period;
918 pDCB->tinfo.goal.offset = cts->sync_offset;
919 pDCB->tinfo.goal.width = cts->bus_width;
922 pccb->ccb_h.status = CAM_REQ_CMP;
927 * Calculate the geometry parameters for a device give
928 * the sector size and volume size.
930 case XPT_CALC_GEOMETRY: {
931 struct ccb_calc_geometry *ccg;
933 u_int32_t secs_per_cylinder;
936 TRM_DPRINTF(" XPT_CALC_GEOMETRY \n");
938 size_mb = ccg->volume_size /
939 ((1024L * 1024L) / ccg->block_size);
941 if (size_mb > 1024 && extended) {
943 ccg->secs_per_track = 63;
946 ccg->secs_per_track = 32;
948 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
949 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
950 pccb->ccb_h.status = CAM_REQ_CMP;
955 TRM_DPRINTF(" XPT_ENG_INQ \n");
956 pccb->ccb_h.status = CAM_REQ_INVALID;
960 * HBA execute engine request
961 * This structure must match SCSIIO size
964 TRM_DPRINTF(" XPT_ENG_EXEC \n");
965 pccb->ccb_h.status = CAM_REQ_INVALID;
969 * XPT_EN_LUN = 0x30, Enable LUN as a target
970 * Target mode structures.
974 * Don't (yet?) support vendor
977 TRM_DPRINTF(" XPT_EN_LUN \n");
978 pccb->ccb_h.status = CAM_REQ_INVALID;
982 * Execute target I/O request
986 * Don't (yet?) support vendor
989 TRM_DPRINTF(" XPT_TARGET_IO \n");
990 pccb->ccb_h.status = CAM_REQ_INVALID;
994 * Accept Host Target Mode CDB
996 case XPT_ACCEPT_TARGET_IO:
998 * Don't (yet?) support vendor
1001 TRM_DPRINTF(" XPT_ACCEPT_TARGET_IO \n");
1002 pccb->ccb_h.status = CAM_REQ_INVALID;
1006 * Continue Host Target I/O Connection
1008 case XPT_CONT_TARGET_IO:
1010 * Don't (yet?) support vendor
1011 * specific commands.
1013 TRM_DPRINTF(" XPT_CONT_TARGET_IO \n");
1014 pccb->ccb_h.status = CAM_REQ_INVALID;
1018 * Notify Host Target driver of event
1020 case XPT_IMMED_NOTIFY:
1021 TRM_DPRINTF(" XPT_IMMED_NOTIFY \n");
1022 pccb->ccb_h.status = CAM_REQ_INVALID;
1026 * Acknowledgement of event
1028 case XPT_NOTIFY_ACK:
1029 TRM_DPRINTF(" XPT_NOTIFY_ACK \n");
1030 pccb->ccb_h.status = CAM_REQ_INVALID;
1034 * XPT_VUNIQUE = 0x80
1037 pccb->ccb_h.status = CAM_REQ_INVALID;
1041 pccb->ccb_h.status = CAM_REQ_INVALID;
1048 trm_poll(struct cam_sim *psim)
1054 trm_ResetDevParam(PACB pACB)
1057 PNVRAMTYPE pEEpromBuf;
1058 u_int8_t PeriodIndex;
1060 pDCB = pACB->pLinkDCB;
1065 pDCB->SyncMode &= ~(SYNC_NEGO_DONE+ WIDE_NEGO_DONE);
1066 pDCB->SyncPeriod = 0;
1067 pDCB->SyncOffset = 0;
1068 pEEpromBuf = &trm_eepromBuf[pACB->AdapterUnit];
1070 pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarCfg0;
1071 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
1073 pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarPeriod & 0x07;
1074 pDCB->MaxNegoPeriod = dc395x_trm_clock_period[PeriodIndex];
1075 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
1076 (pACB->Config & HCC_WIDE_CARD))
1077 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
1078 pDCB = pDCB->pNextDCB;
1080 while (pdcb != pDCB);
1084 trm_RecoverSRB(PACB pACB)
1090 pDCB = pACB->pLinkDCB;
1095 cnt = pdcb->GoingSRBCnt;
1096 psrb = pdcb->pGoingSRB;
1097 for (i = 0; i < cnt; i++) {
1099 psrb = psrb->pNextSRB;
1100 if (pdcb->pWaitingSRB) {
1101 psrb2->pNextSRB = pdcb->pWaitingSRB;
1102 pdcb->pWaitingSRB = psrb2;
1104 pdcb->pWaitingSRB = psrb2;
1105 pdcb->pWaitLastSRB = psrb2;
1106 psrb2->pNextSRB = NULL;
1109 pdcb->GoingSRBCnt = 0;
1110 pdcb->pGoingSRB = NULL;
1112 pdcb = pdcb->pNextDCB;
1114 while (pdcb != pDCB);
1118 trm_reset(PACB pACB)
1123 TRM_DPRINTF("trm: RESET");
1125 trm_reg_write8(0x00, TRMREG_DMA_INTEN);
1126 trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
1128 trm_ResetSCSIBus(pACB);
1129 for (i = 0; i < 500; i++)
1131 trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
1132 /* Enable DMA interrupt */
1133 trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
1134 /* Clear DMA FIFO */
1135 trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1136 /* Clear SCSI FIFO */
1137 trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1138 trm_ResetDevParam(pACB);
1139 trm_DoingSRB_Done(pACB);
1140 pACB->pActiveDCB = NULL;
1141 pACB->ACBFlag = 0;/* RESET_DETECT, RESET_DONE ,RESET_DEV */
1142 trm_DoWaitingSRB(pACB);
1143 /* Tell the XPT layer that a bus reset occured */
1144 if (pACB->ppath != NULL)
1145 xpt_async(AC_BUS_RESET, pACB->ppath, NULL);
1151 trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB)
1153 u_int16_t return_code;
1154 u_int8_t tag_number, scsicommand, i,command,identify_message;
1158 struct ccb_scsiio *pcsio;
1161 pcsio = &pccb->csio;
1162 pSRB->TagNumber = 31;
1164 trm_reg_write8(pACB->AdaptSCSIID, TRMREG_SCSI_HOSTID);
1165 trm_reg_write8(pDCB->TargetID, TRMREG_SCSI_TARGETID);
1166 trm_reg_write8(pDCB->SyncPeriod, TRMREG_SCSI_SYNC);
1167 trm_reg_write8(pDCB->SyncOffset, TRMREG_SCSI_OFFSET);
1168 pSRB->ScsiPhase = PH_BUS_FREE;/* initial phase */
1170 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1172 identify_message = pDCB->IdentifyMsg;
1174 if ((pSRB->CmdBlock[0] == INQUIRY) ||
1175 (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1176 (pSRB->SRBFlag & AUTO_REQSENSE)) {
1177 if (((pDCB->SyncMode & WIDE_NEGO_ENABLE) &&
1178 !(pDCB->SyncMode & WIDE_NEGO_DONE)) \
1179 || ((pDCB->SyncMode & SYNC_NEGO_ENABLE) &&
1180 !(pDCB->SyncMode & SYNC_NEGO_DONE))) {
1181 if (!(pDCB->IdentifyMsg & 7) ||
1182 (pSRB->CmdBlock[0] != INQUIRY)) {
1183 scsicommand = SCMD_SEL_ATNSTOP;
1184 pSRB->SRBState = SRB_MSGOUT;
1189 * Send identify message
1191 trm_reg_write8((identify_message & 0xBF) ,TRMREG_SCSI_FIFO);
1192 scsicommand = SCMD_SEL_ATN;
1193 pSRB->SRBState = SRB_START_;
1195 /* not inquiry,request sense,auto request sense */
1197 * Send identify message
1199 trm_reg_write8(identify_message,TRMREG_SCSI_FIFO);
1200 scsicommand = SCMD_SEL_ATN;
1201 pSRB->SRBState = SRB_START_;
1202 if (pDCB->SyncMode & EN_TAG_QUEUING) {
1203 /* Send Tag message */
1209 while (tag_mask & pDCB->TagMask) {
1210 tag_mask = tag_mask << 1;
1216 trm_reg_write8(MSG_SIMPLE_QTAG, TRMREG_SCSI_FIFO);
1217 trm_reg_write8(tag_number, TRMREG_SCSI_FIFO);
1218 pDCB->TagMask |= tag_mask;
1219 pSRB->TagNumber = tag_number;
1220 scsicommand = SCMD_SEL_ATN3;
1221 pSRB->SRBState = SRB_START_;
1226 * Send CDB ..command block .........
1228 if (pSRB->SRBFlag & AUTO_REQSENSE) {
1229 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1230 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1231 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1232 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1233 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1234 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1236 ptr = (u_int8_t *) pSRB->CmdBlock;
1237 for (i = 0; i < pSRB->ScsiCmdLen ; i++) {
1239 trm_reg_write8(command,TRMREG_SCSI_FIFO);
1242 if (trm_reg_read16(TRMREG_SCSI_STATUS) & SCSIINTERRUPT) {
1244 * If trm_StartSCSI return 1 :
1245 * current interrupt status is interrupt disreenable
1246 * It's said that SCSI processor has more one SRB need to do,
1247 * SCSI processor has been occupied by one SRB.
1249 pSRB->SRBState = SRB_READY;
1250 pDCB->TagMask &= ~(1 << pSRB->TagNumber);
1254 * If trm_StartSCSI return 0 :
1255 * current interrupt status is interrupt enable
1256 * It's said that SCSI processor is unoccupied
1258 pSRB->ScsiPhase = SCSI_NOP1; /* SCSI bus free Phase */
1259 pACB->pActiveDCB = pDCB;
1260 pDCB->pActiveSRB = pSRB;
1262 trm_reg_write16(DO_DATALATCH | DO_HWRESELECT,
1263 TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
1267 trm_reg_write8(scsicommand,TRMREG_SCSI_COMMAND);
1269 return (return_code);
1273 trm_Interrupt(vpACB)
1280 void (*stateV)(PACB, PSRB, u_int8_t *);
1281 u_int8_t scsi_status=0, scsi_intstatus;
1286 TRM_DPRINTF("trm_Interrupt: pACB NULL return......");
1290 scsi_status = trm_reg_read16(TRMREG_SCSI_STATUS);
1291 if (!(scsi_status & SCSIINTERRUPT)) {
1292 TRM_DPRINTF("trm_Interrupt: TRMREG_SCSI_STATUS scsi_status = NULL ,return......");
1295 TRM_DPRINTF("scsi_status=%2x,",scsi_status);
1297 scsi_intstatus = trm_reg_read8(TRMREG_SCSI_INTSTATUS);
1299 TRM_DPRINTF("scsi_intstatus=%2x,",scsi_intstatus);
1301 if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
1302 trm_Disconnect(pACB);
1306 if (scsi_intstatus & INT_RESELECTED) {
1310 if (scsi_intstatus & INT_SCSIRESET) {
1311 trm_ScsiRstDetect(pACB);
1315 if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
1316 pDCB = pACB->pActiveDCB;
1317 pSRB = pDCB->pActiveSRB;
1319 if (pDCB->DCBFlag & ABORT_DEV_)
1320 trm_EnableMsgOutAbort1(pACB, pSRB);
1322 phase = (u_int16_t) pSRB->ScsiPhase; /* phase: */
1323 stateV = (void *) trm_SCSI_phase0[phase];
1324 stateV(pACB, pSRB, &scsi_status);
1325 pSRB->ScsiPhase = scsi_status & PHASEMASK;
1326 /* phase:0,1,2,3,4,5,6,7 */
1327 phase = (u_int16_t) scsi_status & PHASEMASK;
1328 stateV = (void *) trm_SCSI_phase1[phase];
1329 stateV(pACB, pSRB, &scsi_status);
1334 trm_MsgOutPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1337 if (pSRB->SRBState & (SRB_UNEXPECT_RESEL+SRB_ABORT_SENT))
1338 *pscsi_status = PH_BUS_FREE;
1339 /*.. initial phase*/
1343 trm_MsgOutPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1350 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1351 pDCB = pACB->pActiveDCB;
1352 if (!(pSRB->SRBState & SRB_MSGOUT)) {
1355 ptr = (u_int8_t *) pSRB->MsgOutBuf;
1356 for (i = 0; i < cnt; i++) {
1357 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1361 if ((pDCB->DCBFlag & ABORT_DEV_) &&
1362 (pSRB->MsgOutBuf[0] == MSG_ABORT)) {
1363 pSRB->SRBState = SRB_ABORT_SENT;
1367 if ((pSRB->CmdBlock[0] == INQUIRY) ||
1368 (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1369 (pSRB->SRBFlag & AUTO_REQSENSE)) {
1370 if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1374 trm_reg_write8(bval, TRMREG_SCSI_FIFO);
1377 mop1: /* message out phase */
1378 if (!(pSRB->SRBState & SRB_DO_WIDE_NEGO)
1379 && (pDCB->SyncMode & WIDE_NEGO_ENABLE)) {
1381 * WIDE DATA TRANSFER REQUEST code (03h)
1383 pDCB->SyncMode &= ~(SYNC_NEGO_DONE | EN_ATN_STOP);
1384 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1386 trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1388 trm_reg_write8(2,TRMREG_SCSI_FIFO);
1389 /* Message length (02h) */
1390 trm_reg_write8(3,TRMREG_SCSI_FIFO);
1391 /* wide data xfer (03h) */
1392 trm_reg_write8(1,TRMREG_SCSI_FIFO);
1393 /* width:0(8bit),1(16bit),2(32bit) */
1394 pSRB->SRBState |= SRB_DO_WIDE_NEGO;
1395 } else if (!(pSRB->SRBState & SRB_DO_SYNC_NEGO)
1396 && (pDCB->SyncMode & SYNC_NEGO_ENABLE)) {
1398 * SYNCHRONOUS DATA TRANSFER REQUEST code (01h)
1400 if (!(pDCB->SyncMode & WIDE_NEGO_DONE))
1401 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1403 trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1405 trm_reg_write8(3,TRMREG_SCSI_FIFO);
1406 /* Message length (03h) */
1407 trm_reg_write8(1,TRMREG_SCSI_FIFO);
1408 /* SYNCHRONOUS DATA TRANSFER REQUEST code (01h) */
1409 trm_reg_write8(pDCB->MaxNegoPeriod,TRMREG_SCSI_FIFO);
1410 /* Transfer peeriod factor */
1411 trm_reg_write8(SYNC_NEGO_OFFSET,TRMREG_SCSI_FIFO);
1412 /* REQ/ACK offset */
1413 pSRB->SRBState |= SRB_DO_SYNC_NEGO;
1416 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1417 /* it's important for atn stop */
1421 trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1425 trm_CommandPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1431 trm_CommandPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1437 struct ccb_scsiio *pcsio;
1440 pcsio = &pccb->csio;
1442 trm_reg_write16(DO_CLRATN | DO_CLRFIFO , TRMREG_SCSI_CONTROL);
1443 if (!(pSRB->SRBFlag & AUTO_REQSENSE)) {
1444 cnt = (u_int16_t) pSRB->ScsiCmdLen;
1445 ptr = (u_int8_t *) pSRB->CmdBlock;
1446 for (i = 0; i < cnt; i++) {
1447 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1451 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1452 pDCB = pACB->pActiveDCB;
1454 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1455 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1456 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1457 /* sizeof(struct scsi_sense_data) */
1458 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1459 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1461 pSRB->SRBState = SRB_COMMAND;
1462 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1463 /* it's important for atn stop*/
1467 trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1471 trm_DataOutPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1474 u_int8_t TempDMAstatus,SGIndexTemp;
1475 u_int16_t scsi_status;
1477 u_long TempSRBXferredLength,dLeftCounter=0;
1479 pDCB = pSRB->pSRBDCB;
1480 scsi_status = *pscsi_status;
1482 if (!(pSRB->SRBState & SRB_XFERPAD)) {
1483 if (scsi_status & PARITYERROR)
1484 pSRB->SRBStatus |= PARITY_ERROR;
1485 if (!(scsi_status & SCSIXFERDONE)) {
1487 * when data transfer from DMA FIFO to SCSI FIFO
1488 * if there was some data left in SCSI FIFO
1490 dLeftCounter = (u_long)
1491 (trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x1F);
1492 if (pDCB->SyncPeriod & WIDE_SYNC) {
1494 * if WIDE scsi SCSI FIFOCNT unit is word
1501 * caculate all the residue data that not yet tranfered
1502 * SCSI transfer counter + left in SCSI FIFO data
1504 * .....TRM_SCSI_COUNTER (24bits)
1505 * The counter always decrement by one for every SCSI byte
1507 * .....TRM_SCSI_FIFOCNT (5bits)
1508 * The counter is SCSI FIFO offset counter
1510 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1511 if (dLeftCounter == 1) {
1513 trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1515 if ((dLeftCounter == 0) ||
1516 (scsi_status & SCSIXFERCNT_2_ZERO)) {
1517 TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1518 while (!(TempDMAstatus & DMAXFERCOMP)) {
1520 trm_reg_read8(TRMREG_DMA_STATUS);
1522 pSRB->SRBTotalXferLength = 0;
1524 /* Update SG list */
1526 * if transfer not yet complete
1527 * there were some data residue in SCSI FIFO or
1528 * SCSI transfer counter not empty
1530 if (pSRB->SRBTotalXferLength != dLeftCounter) {
1532 * data that had transferred length
1534 TempSRBXferredLength =
1535 pSRB->SRBTotalXferLength - dLeftCounter;
1537 * next time to be transferred length
1539 pSRB->SRBTotalXferLength = dLeftCounter;
1541 * parsing from last time disconnect SRBSGIndex
1544 pSRB->SRBSGListPointer + pSRB->SRBSGIndex;
1545 for (SGIndexTemp = pSRB->SRBSGIndex;
1546 SGIndexTemp < pSRB->SRBSGCount;
1549 * find last time which SG transfer be
1552 if (TempSRBXferredLength >=
1554 TempSRBXferredLength -=
1558 * update last time disconnected SG
1562 TempSRBXferredLength;
1563 /* residue data length */
1565 TempSRBXferredLength;
1566 /* residue data pointer */
1567 pSRB->SRBSGIndex = SGIndexTemp;
1575 trm_reg_write8(STOPDMAXFER ,TRMREG_DMA_CONTROL);
1580 trm_DataOutPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1584 * do prepare befor transfer when data out phase
1587 ioDir = XFERDATAOUT;
1588 trm_DataIO_transfer(pACB, pSRB, ioDir);
1592 trm_DataInPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1594 u_int8_t bval,SGIndexTemp;
1595 u_int16_t scsi_status;
1597 u_long TempSRBXferredLength,dLeftCounter = 0;
1599 scsi_status = *pscsi_status;
1600 if (!(pSRB->SRBState & SRB_XFERPAD)) {
1601 if (scsi_status & PARITYERROR)
1602 pSRB->SRBStatus |= PARITY_ERROR;
1603 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1604 if ((dLeftCounter == 0) || (scsi_status & SCSIXFERCNT_2_ZERO)) {
1605 bval = trm_reg_read8(TRMREG_DMA_STATUS);
1606 while (!(bval & DMAXFERCOMP))
1607 bval = trm_reg_read8(TRMREG_DMA_STATUS);
1608 pSRB->SRBTotalXferLength = 0;
1612 * when a transfer not yet complete
1613 * but be disconnected by uper layer
1614 * if transfer not yet complete
1615 * there were some data residue in SCSI FIFO or
1616 * SCSI transfer counter not empty
1618 if (pSRB->SRBTotalXferLength != dLeftCounter) {
1620 * data that had transferred length
1622 TempSRBXferredLength =
1623 pSRB->SRBTotalXferLength - dLeftCounter;
1625 * next time to be transferred length
1627 pSRB->SRBTotalXferLength = dLeftCounter;
1629 * parsing from last time disconnect SRBSGIndex
1631 pseg = pSRB->SRBSGListPointer + pSRB->SRBSGIndex;
1632 for (SGIndexTemp = pSRB->SRBSGIndex;
1633 SGIndexTemp < pSRB->SRBSGCount;
1636 * find last time which SG transfer be disconnect
1638 if (TempSRBXferredLength >= pseg->length)
1639 TempSRBXferredLength -= pseg->length;
1642 * update last time disconnected SG list
1644 pseg->length -= TempSRBXferredLength;
1645 /* residue data length */
1646 pseg->address += TempSRBXferredLength;
1647 /* residue data pointer */
1648 pSRB->SRBSGIndex = SGIndexTemp;
1659 trm_DataInPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1663 * do prepare befor transfer when data in phase
1667 trm_DataIO_transfer(pACB, pSRB, ioDir);
1671 trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir)
1676 pDCB = pSRB->pSRBDCB;
1677 if (pSRB->SRBSGIndex < pSRB->SRBSGCount) {
1678 if (pSRB->SRBTotalXferLength != 0) {
1679 pSRB->SRBSGPhyAddr = vtophys(pSRB->SRBSGListPointer);
1681 * load what physical address of Scatter/Gather list
1682 table want to be transfer
1684 pSRB->SRBState = SRB_DATA_XFER;
1685 trm_reg_write32(0, TRMREG_DMA_XHIGHADDR);
1687 (pSRB->SRBSGPhyAddr +
1688 ((u_long)pSRB->SRBSGIndex << 3)),
1689 TRMREG_DMA_XLOWADDR);
1691 * load how many bytes in the Scatter/Gather
1695 ((u_long)(pSRB->SRBSGCount - pSRB->SRBSGIndex) << 3),
1698 * load total transfer length (24bits) max value
1701 trm_reg_write32(pSRB->SRBTotalXferLength,
1702 TRMREG_SCSI_COUNTER);
1703 /* Start DMA transfer */
1704 trm_reg_write16(ioDir, TRMREG_DMA_COMMAND);
1705 /* Start SCSI transfer */
1706 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1707 /* it's important for atn stop */
1711 bval = (ioDir == XFERDATAOUT) ?
1712 SCMD_DMA_OUT : SCMD_DMA_IN;
1713 trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1716 if (pSRB->SRBSGCount) {
1717 pSRB->AdaptStatus = H_OVER_UNDER_RUN;
1718 pSRB->SRBStatus |= OVER_RUN;
1720 if (pDCB->SyncPeriod & WIDE_SYNC)
1721 trm_reg_write32(2,TRMREG_SCSI_COUNTER);
1723 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
1724 if (ioDir == XFERDATAOUT)
1725 trm_reg_write16(0, TRMREG_SCSI_FIFO);
1727 trm_reg_read16(TRMREG_SCSI_FIFO);
1728 pSRB->SRBState |= SRB_XFERPAD;
1729 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1730 /* it's important for atn stop */
1734 bval = (ioDir == XFERDATAOUT) ?
1735 SCMD_FIFO_OUT : SCMD_FIFO_IN;
1736 trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1742 trm_StatusPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1745 pSRB->TargetStatus = trm_reg_read8(TRMREG_SCSI_FIFO);
1746 pSRB->SRBState = SRB_COMPLETED;
1747 *pscsi_status = PH_BUS_FREE;
1748 /*.. initial phase*/
1749 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1750 /* it's important for atn stop */
1754 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1760 trm_StatusPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1763 if (trm_reg_read16(TRMREG_DMA_COMMAND) & 0x0001) {
1764 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1765 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1766 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1767 trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1769 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1770 trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1771 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1772 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1774 pSRB->SRBState = SRB_STATUS;
1775 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1776 /* it's important for atn stop */
1780 trm_reg_write8(SCMD_COMP, TRMREG_SCSI_COMMAND);
1785 * trm_MsgInPhase0: one of trm_SCSI_phase0[] vectors
1786 * stateV = (void *) trm_SCSI_phase0[phase]
1788 * extended message codes:
1793 * 00h MODIFY DATA POINTER
1794 * 01h SYNCHRONOUS DATA TRANSFER REQUEST
1795 * 03h WIDE DATA TRANSFER REQUEST
1796 * 04h - 7Fh Reserved
1797 * 80h - FFh Vendor specific
1802 trm_MsgInPhase0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
1804 u_int8_t message_in_code,bIndex,message_in_tag_id;
1808 pDCB = pACB->pActiveDCB;
1810 message_in_code = trm_reg_read8(TRMREG_SCSI_FIFO);
1811 if (!(pSRB->SRBState & SRB_EXTEND_MSGIN)) {
1812 if (message_in_code == MSG_DISCONNECT) {
1813 pSRB->SRBState = SRB_DISCONNECT;
1815 } else if (message_in_code == MSG_SAVE_PTR) {
1817 } else if ((message_in_code == MSG_EXTENDED) ||
1818 ((message_in_code >= MSG_SIMPLE_QTAG) &&
1819 (message_in_code <= MSG_ORDER_QTAG))) {
1820 pSRB->SRBState |= SRB_EXTEND_MSGIN;
1821 pSRB->MsgInBuf[0] = message_in_code;
1822 /* extended message (01h) */
1824 pSRB->pMsgPtr = &pSRB->MsgInBuf[1];
1825 /* extended message length (n) */
1827 } else if (message_in_code == MSG_REJECT_) {
1828 /* Reject message */
1829 if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1830 /* do wide nego reject */
1831 pDCB = pSRB->pSRBDCB;
1832 pDCB->SyncMode |= WIDE_NEGO_DONE;
1833 pDCB->SyncMode &= ~(SYNC_NEGO_DONE |
1834 EN_ATN_STOP | WIDE_NEGO_ENABLE);
1835 pSRB->SRBState &= ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1836 if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
1837 && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
1838 /* Set ATN, in case ATN was clear */
1839 pSRB->SRBState |= SRB_MSGOUT;
1842 TRMREG_SCSI_CONTROL);
1847 TRMREG_SCSI_CONTROL);
1849 } else if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1850 /* do sync nego reject */
1851 trm_reg_write16(DO_CLRATN,TRMREG_SCSI_CONTROL);
1852 if (pSRB->SRBState & SRB_DO_SYNC_NEGO) {
1853 pDCB = pSRB->pSRBDCB;
1855 ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
1856 pDCB->SyncPeriod = 0;
1857 pDCB->SyncOffset = 0;
1862 } else if (message_in_code == MSG_IGNOREWIDE) {
1863 trm_reg_write32(1, TRMREG_SCSI_COUNTER);
1864 trm_reg_read8(TRMREG_SCSI_FIFO);
1867 /* Restore data pointer message */
1868 /* Save data pointer message */
1869 /* Completion message */
1875 * Parsing incomming extented messages
1877 *pSRB->pMsgPtr = message_in_code;
1880 TRM_DPRINTF("pSRB->MsgInBuf[0]=%2x \n ",pSRB->MsgInBuf[0]);
1881 TRM_DPRINTF("pSRB->MsgInBuf[1]=%2x \n ",pSRB->MsgInBuf[1]);
1882 TRM_DPRINTF("pSRB->MsgInBuf[2]=%2x \n ",pSRB->MsgInBuf[2]);
1883 TRM_DPRINTF("pSRB->MsgInBuf[3]=%2x \n ",pSRB->MsgInBuf[3]);
1884 TRM_DPRINTF("pSRB->MsgInBuf[4]=%2x \n ",pSRB->MsgInBuf[4]);
1885 if ((pSRB->MsgInBuf[0] >= MSG_SIMPLE_QTAG)
1886 && (pSRB->MsgInBuf[0] <= MSG_ORDER_QTAG)) {
1888 * is QUEUE tag message :
1891 * HEAD QUEUE TAG (20h)
1892 * ORDERED QUEUE TAG (21h)
1893 * SIMPLE QUEUE TAG (22h)
1895 * Queue tag (00h - FFh)
1897 if (pSRB->MsgCnt == 2) {
1899 message_in_tag_id = pSRB->MsgInBuf[1];
1900 pSRB = pDCB->pGoingSRB;
1901 pSRBTemp = pDCB->pGoingLastSRB;
1904 if (pSRB->TagNumber !=
1905 message_in_tag_id) {
1906 if (pSRB == pSRBTemp) {
1909 pSRB = pSRB->pNextSRB;
1913 if (pDCB->DCBFlag & ABORT_DEV_) {
1914 pSRB->SRBState = SRB_ABORT_SENT;
1915 trm_EnableMsgOutAbort1(
1918 if (!(pSRB->SRBState & SRB_DISCONNECT))
1920 pDCB->pActiveSRB = pSRB;
1921 pSRB->SRBState = SRB_DATA_XFER;
1924 pSRB = pACB->pTmpSRB;
1925 pSRB->SRBState = SRB_UNEXPECT_RESEL;
1926 pDCB->pActiveSRB = pSRB;
1927 pSRB->MsgOutBuf[0] = MSG_ABORT_TAG;
1928 trm_EnableMsgOutAbort2(
1933 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
1934 (pSRB->MsgInBuf[2] == 3) && (pSRB->MsgCnt == 4)) {
1936 * is Wide data xfer Extended message :
1937 * ======================================
1938 * WIDE DATA TRANSFER REQUEST
1939 * ======================================
1940 * byte 0 : Extended message (01h)
1941 * byte 1 : Extended message length (02h)
1942 * byte 2 : WIDE DATA TRANSFER code (03h)
1943 * byte 3 : Transfer width exponent
1945 pDCB = pSRB->pSRBDCB;
1946 pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_WIDE_NEGO);
1947 if ((pSRB->MsgInBuf[1] != 2)) {
1948 /* Length is wrong, reject it */
1950 ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
1952 pSRB->MsgInBuf[0] = MSG_REJECT_;
1953 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
1956 if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1957 /* Do wide negoniation */
1958 if (pSRB->MsgInBuf[3] > 2) {
1962 ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
1964 pSRB->MsgInBuf[0] = MSG_REJECT_;
1965 trm_reg_write16(DO_SETATN,
1966 TRMREG_SCSI_CONTROL);
1969 if (pSRB->MsgInBuf[3] == 2) {
1970 pSRB->MsgInBuf[3] = 1;
1973 if (!(pDCB->SyncMode
1974 & WIDE_NEGO_DONE)) {
1976 ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1983 if (pSRB->MsgInBuf[3] != 0) {
1984 /* is Wide data xfer */
1987 pDCB->tinfo.current.width
1988 = MSG_EXT_WDTR_BUS_16_BIT;
1989 pDCB->tinfo.goal.width
1990 = MSG_EXT_WDTR_BUS_16_BIT;
1995 pSRB->MsgInBuf[3] = 0;
1996 pSRB->SRBState |= SRB_MSGOUT;
1997 trm_reg_write16(DO_SETATN,TRMREG_SCSI_CONTROL);
1999 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2000 (pSRB->MsgInBuf[2] == 1) && (pSRB->MsgCnt == 5)) {
2002 * is 8bit transfer Extended message :
2003 * =================================
2004 * SYNCHRONOUS DATA TRANSFER REQUEST
2005 * =================================
2006 * byte 0 : Extended message (01h)
2007 * byte 1 : Extended message length (03)
2008 * byte 2 : SYNCHRONOUS DATA TRANSFER code (01h)
2009 * byte 3 : Transfer period factor
2010 * byte 4 : REQ/ACK offset
2012 pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_SYNC_NEGO);
2013 if ((pSRB->MsgInBuf[1] != 3) ||
2014 (pSRB->MsgInBuf[2] != 1)) {
2017 pSRB->MsgInBuf[0] = MSG_REJECT_;
2018 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2019 } else if (!(pSRB->MsgInBuf[3]) || !(pSRB->MsgInBuf[4])) {
2021 pDCB = pSRB->pSRBDCB;
2022 /* disable sync & sync nego */
2024 ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
2025 pDCB->SyncPeriod = 0;
2026 pDCB->SyncOffset = 0;
2027 pDCB->tinfo.goal.period = 0;
2028 pDCB->tinfo.goal.offset = 0;
2029 pDCB->tinfo.current.period = 0;
2030 pDCB->tinfo.current.offset = 0;
2031 pDCB->tinfo.current.width =
2032 MSG_EXT_WDTR_BUS_8_BIT;
2036 pDCB = pSRB->pSRBDCB;
2038 SYNC_NEGO_ENABLE+SYNC_NEGO_DONE;
2039 pDCB->MaxNegoPeriod = pSRB->MsgInBuf[3];
2040 /* Transfer period factor */
2041 pDCB->SyncOffset = pSRB->MsgInBuf[4];
2042 /* REQ/ACK offset */
2043 for (bIndex = 0; bIndex < 7; bIndex++) {
2044 if (pSRB->MsgInBuf[3] <=
2045 dc395x_trm_clock_period[bIndex]) {
2049 pDCB->tinfo.goal.period =
2050 dc395x_trm_tinfo_sync_period[bIndex];
2051 pDCB->tinfo.current.period =
2052 dc395x_trm_tinfo_sync_period[bIndex];
2053 pDCB->tinfo.goal.offset = pDCB->SyncOffset;
2054 pDCB->tinfo.current.offset = pDCB->SyncOffset;
2055 pDCB->SyncPeriod |= (bIndex | ALT_SYNC);
2059 * program SCSI control register
2062 trm_reg_write8(pDCB->SyncPeriod,
2064 trm_reg_write8(pDCB->SyncOffset,
2065 TRMREG_SCSI_OFFSET);
2066 trm_SetXferRate(pACB,pSRB,pDCB);
2071 *pscsi_status = PH_BUS_FREE;
2072 /* .. initial phase */
2073 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2074 /* it's important for atn stop */
2078 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2082 trm_MsgInPhase1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
2085 trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
2086 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
2087 if (!(pSRB->SRBState & SRB_MSGIN)) {
2088 pSRB->SRBState &= SRB_DISCONNECT;
2089 pSRB->SRBState |= SRB_MSGIN;
2091 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2092 /* it's important for atn stop*/
2096 trm_reg_write8(SCMD_FIFO_IN, TRMREG_SCSI_COMMAND);
2100 trm_Nop0(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
2106 trm_Nop1(PACB pACB, PSRB pSRB, u_int8_t *pscsi_status)
2112 trm_SetXferRate(PACB pACB,PSRB pSRB, PDCB pDCB)
2117 u_int target_id,target_lun;
2120 * set all lun device's period , offset
2122 target_id = pSRB->pccb->ccb_h.target_id;
2123 target_lun = pSRB->pccb->ccb_h.target_lun;
2124 TRM_DPRINTF("trm_SetXferRate:target_id= %d ,target_lun= %d \n"
2125 ,target_id,target_lun);
2126 if (!(pDCB->IdentifyMsg & 0x07)) {
2127 if (!pACB->scan_devices[target_id][target_lun]) {
2128 pDCBTemp = pACB->pLinkDCB;
2129 cnt = pACB->DeviceCnt;
2130 bval = pDCB->TargetID;
2131 for (i = 0; i < cnt; i++) {
2132 if (pDCBTemp->TargetID == bval) {
2133 pDCBTemp->SyncPeriod = pDCB->SyncPeriod;
2134 pDCBTemp->SyncOffset = pDCB->SyncOffset;
2135 pDCBTemp->SyncMode = pDCB->SyncMode;
2137 pDCBTemp = pDCBTemp->pNextDCB;
2151 * PH_DATA_OUT 0x00 Data out phase
2152 * PH_DATA_IN 0x01 Data in phase
2153 * PH_COMMAND 0x02 Command phase
2154 * PH_STATUS 0x03 Status phase
2155 * PH_BUS_FREE 0x04 Invalid phase used as bus free
2156 * PH_BUS_FREE 0x05 Invalid phase used as bus free
2157 * PH_MSG_OUT 0x06 Message out phase
2158 * PH_MSG_IN 0x07 Message in phase
2162 trm_Disconnect(PACB pACB)
2169 u_int target_id,target_lun;
2171 TRM_DPRINTF("trm_Disconnect...............\n ");
2174 pDCB = pACB->pActiveDCB;
2176 TRM_DPRINTF(" Exception Disconnect DCB=NULL..............\n ");
2181 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT),
2182 TRMREG_SCSI_CONTROL);
2185 pSRB = pDCB->pActiveSRB;
2187 target_id = pSRB->pccb->ccb_h.target_id;
2188 target_lun = pSRB->pccb->ccb_h.target_lun;
2189 TRM_DPRINTF(":pDCB->pActiveSRB= %8x \n ",(u_int) pDCB->pActiveSRB);
2190 pACB->pActiveDCB = 0;
2191 pSRB->ScsiPhase = PH_BUS_FREE;
2192 /* SCSI bus free Phase */
2193 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT), TRMREG_SCSI_CONTROL);
2194 if (pSRB->SRBState & SRB_UNEXPECT_RESEL) {
2196 trm_DoWaitingSRB(pACB);
2197 } else if (pSRB->SRBState & SRB_ABORT_SENT) {
2200 cnt = pDCB->GoingSRBCnt;
2201 pDCB->GoingSRBCnt = 0;
2202 pSRB = pDCB->pGoingSRB;
2203 for (i = 0; i < cnt; i++) {
2204 psrb = pSRB->pNextSRB;
2205 pSRB->pNextSRB = pACB->pFreeSRB;
2206 pACB->pFreeSRB = pSRB;
2209 pDCB->pGoingSRB = 0;
2210 trm_DoWaitingSRB(pACB);
2212 if ((pSRB->SRBState & (SRB_START_+SRB_MSGOUT)) ||
2213 !(pSRB->SRBState & (SRB_DISCONNECT+SRB_COMPLETED))) {
2214 /* Selection time out */
2215 if (!(pACB->scan_devices[target_id][target_lun])) {
2216 pSRB->SRBState = SRB_READY;
2217 trm_RewaitSRB(pDCB, pSRB);
2219 pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
2222 } else if (pSRB->SRBState & SRB_DISCONNECT) {
2226 trm_DoWaitingSRB(pACB);
2227 } else if (pSRB->SRBState & SRB_COMPLETED) {
2232 if (pDCB->MaxCommand > 1) {
2233 bval = pSRB->TagNumber;
2234 pDCB->TagMask &= (~(1 << bval));
2237 pDCB->pActiveSRB = 0;
2238 pSRB->SRBState = SRB_FREE;
2239 trm_SRBdone(pACB, pDCB, pSRB);
2247 trm_Reselect(PACB pACB)
2251 u_int16_t RselTarLunId;
2253 TRM_DPRINTF("trm_Reselect................. \n");
2254 pDCB = pACB->pActiveDCB;
2256 /* Arbitration lost but Reselection win */
2257 pSRB = pDCB->pActiveSRB;
2258 pSRB->SRBState = SRB_READY;
2259 trm_RewaitSRB(pDCB, pSRB);
2261 /* Read Reselected Target Id and LUN */
2262 RselTarLunId = trm_reg_read16(TRMREG_SCSI_TARGETID) & 0x1FFF;
2263 pDCB = pACB->pLinkDCB;
2264 while (RselTarLunId != *((u_int16_t *) &pDCB->TargetID)) {
2265 /* get pDCB of the reselect id */
2266 pDCB = pDCB->pNextDCB;
2269 pACB->pActiveDCB = pDCB;
2270 if (pDCB->SyncMode & EN_TAG_QUEUING) {
2271 pSRB = pACB->pTmpSRB;
2272 pDCB->pActiveSRB = pSRB;
2274 pSRB = pDCB->pActiveSRB;
2275 if (!pSRB || !(pSRB->SRBState & SRB_DISCONNECT)) {
2279 pSRB = pACB->pTmpSRB;
2280 pSRB->SRBState = SRB_UNEXPECT_RESEL;
2281 pDCB->pActiveSRB = pSRB;
2282 trm_EnableMsgOutAbort1(pACB, pSRB);
2284 if (pDCB->DCBFlag & ABORT_DEV_) {
2285 pSRB->SRBState = SRB_ABORT_SENT;
2286 trm_EnableMsgOutAbort1(pACB, pSRB);
2288 pSRB->SRBState = SRB_DATA_XFER;
2291 pSRB->ScsiPhase = PH_BUS_FREE;
2292 /* SCSI bus free Phase */
2294 * Program HA ID, target ID, period and offset
2296 trm_reg_write8((u_int8_t) RselTarLunId,TRMREG_SCSI_TARGETID);
2298 trm_reg_write8(pACB->AdaptSCSIID,TRMREG_SCSI_HOSTID);
2300 trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2302 trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2304 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2305 /* it's important for atn stop*/
2309 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2310 /* to rls the /ACK signal */
2314 trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB)
2317 u_int8_t bval, bval1,status;
2319 struct ccb_scsiio *pcsio;
2322 u_int target_id,target_lun;
2328 pcsio = &pccb->csio;
2329 target_id = pSRB->pccb->ccb_h.target_id;
2330 target_lun = pSRB->pccb->ccb_h.target_lun;
2331 if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
2332 bus_dmasync_op_t op;
2333 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
2334 op = BUS_DMASYNC_POSTREAD;
2336 op = BUS_DMASYNC_POSTWRITE;
2337 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
2338 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
2345 status = pSRB->TargetStatus;
2346 pcsio->scsi_status=SCSI_STAT_GOOD;
2347 pccb->ccb_h.status = CAM_REQ_CMP;
2348 if (pSRB->SRBFlag & AUTO_REQSENSE) {
2350 * status of auto request sense
2352 pSRB->SRBFlag &= ~AUTO_REQSENSE;
2353 pSRB->AdaptStatus = 0;
2354 pSRB->TargetStatus = SCSI_STATUS_CHECK_COND;
2356 if (status == SCSI_STATUS_CHECK_COND) {
2357 pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2360 *((u_long *) &(pSRB->CmdBlock[0])) = pSRB->Segment0[0];
2361 *((u_long *) &(pSRB->CmdBlock[4])) = pSRB->Segment0[1];
2362 pSRB->SRBTotalXferLength = pSRB->Segment1[1];
2363 pSRB->SegmentX[0].address = pSRB->SgSenseTemp.address;
2364 pSRB->SegmentX[0].length = pSRB->SgSenseTemp.length;
2365 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2366 pccb->ccb_h.status = CAM_AUTOSNS_VALID;
2373 if (status == SCSI_STATUS_CHECK_COND) {
2374 if ((pcsio->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) {
2375 TRM_DPRINTF("trm_RequestSense..................\n");
2376 trm_RequestSense(pACB, pDCB, pSRB);
2379 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2380 pccb->ccb_h.status = CAM_AUTOSNS_VALID |
2381 CAM_SCSI_STATUS_ERROR;
2383 } else if (status == SCSI_STAT_QUEUEFULL) {
2384 bval = (u_int8_t) pDCB->GoingSRBCnt;
2386 pDCB->MaxCommand = bval;
2387 trm_RewaitSRB(pDCB, pSRB);
2388 pSRB->AdaptStatus = 0;
2389 pSRB->TargetStatus = 0;
2390 pcsio->scsi_status = SCSI_STAT_QUEUEFULL;
2391 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2393 } else if (status == SCSI_STAT_SEL_TIMEOUT) {
2394 pSRB->AdaptStatus = H_SEL_TIMEOUT;
2395 pSRB->TargetStatus = 0;
2396 pcsio->scsi_status = SCSI_STAT_SEL_TIMEOUT;
2397 pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2398 } else if (status == SCSI_STAT_BUSY) {
2399 TRM_DPRINTF("trm: target busy at %s %d\n",
2400 __FILE__, __LINE__);
2401 pcsio->scsi_status = SCSI_STAT_BUSY;
2402 pccb->ccb_h.status = CAM_SCSI_BUSY;
2403 /* The device busy, try again later? */
2404 } else if (status == SCSI_STAT_RESCONFLICT) {
2405 TRM_DPRINTF("trm: target reserved at %s %d\n",
2406 __FILE__, __LINE__);
2407 pcsio->scsi_status = SCSI_STAT_RESCONFLICT;
2408 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; /*XXX*/
2410 pSRB->AdaptStatus = 0;
2411 if (pSRB->RetryCnt) {
2413 pSRB->TargetStatus = 0;
2414 pSRB->SRBSGIndex = 0;
2415 pSRB->SRBSGListPointer = (PSEG)
2417 if (trm_StartSCSI(pACB, pDCB, pSRB)) {
2419 * If trm_StartSCSI return 1 :
2420 * current interrupt status is interrupt
2422 * It's said that SCSI processor has more
2423 * one SRB need to do
2425 trm_RewaitSRB(pDCB, pSRB);
2429 TRM_DPRINTF("trm: driver stuffup at %s %d\n",
2430 __FILE__, __LINE__);
2431 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2436 * process initiator status..........................
2437 * Adapter (initiator) status
2439 status = pSRB->AdaptStatus;
2440 if (status & H_OVER_UNDER_RUN) {
2441 pSRB->TargetStatus = 0;
2442 pccb->ccb_h.status = CAM_DATA_RUN_ERR;
2443 /* Illegal length (over/under run) */
2444 } else if (pSRB->SRBStatus & PARITY_ERROR) {
2445 TRM_DPRINTF("trm: driver stuffup %s %d\n",
2446 __FILE__, __LINE__);
2447 pDCB->tinfo.goal.period = 0;
2448 pDCB->tinfo.goal.offset = 0;
2449 /* Driver failed to perform operation */
2450 pccb->ccb_h.status = CAM_UNCOR_PARITY;
2453 pSRB->AdaptStatus = 0;
2454 pSRB->TargetStatus = 0;
2455 pccb->ccb_h.status = CAM_REQ_CMP;
2456 /* there is no error, (sense is invalid) */
2460 if (pACB->scan_devices[target_id][target_lun]) {
2462 * if SCSI command in "scan devices" duty
2464 if (pSRB->CmdBlock[0] == TEST_UNIT_READY)
2465 pACB->scan_devices[target_id][target_lun] = 0;
2466 /* SCSI command phase :test unit ready */
2467 else if (pSRB->CmdBlock[0] == INQUIRY) {
2469 * SCSI command phase :inquiry scsi device data
2470 * (type,capacity,manufacture....
2472 if (pccb->ccb_h.status == CAM_SEL_TIMEOUT)
2474 ptr = (PSCSI_INQDATA) pcsio->data_ptr;
2476 TRM_DPRINTF("trm_SRBdone..PSCSI_INQDATA:%2x \n",
2478 bval1 = ptr->DevType & SCSI_DEVTYPE;
2479 if (bval1 == SCSI_NODEV) {
2481 TRM_DPRINTF("trm_SRBdone NO Device:target_id= %d ,target_lun= %d \n",
2485 pACB->scan_devices[target_id][target_lun] = 0;
2486 /* no device set scan device flag =0*/
2488 /* move the head of DCB to tempDCB*/
2489 pTempDCB=pACB->pLinkDCB;
2490 /* search current DCB for pass link */
2491 while (pTempDCB->pNextDCB != pDCB) {
2492 pTempDCB = pTempDCB->pNextDCB;
2495 * when the current DCB found than connect
2498 /* to the DCB tail that before current DCB */
2499 pTempDCB->pNextDCB = pDCB->pNextDCB;
2501 * if there was only one DCB ,connect his tail
2504 if (pACB->pLinkDCB == pDCB)
2505 pACB->pLinkDCB = pTempDCB->pNextDCB;
2506 if (pACB->pDCBRunRobin == pDCB)
2507 pACB->pDCBRunRobin = pTempDCB->pNextDCB;
2509 if (pACB->DeviceCnt == 0) {
2510 pACB->pLinkDCB = NULL;
2511 pACB->pDCBRunRobin = NULL;
2517 for (j = 0; j < 28; j++) {
2518 TRM_DPRINTF("ptr=%2x ",
2519 ((u_int8_t *)ptr)[j]);
2522 pDCB->DevType = bval1;
2523 if (bval1 == SCSI_DASD ||
2524 bval1 == SCSI_OPTICAL) {
2525 if ((((ptr->Vers & 0x07) >= 2) ||
2526 ((ptr->RDF & 0x0F) == 2)) &&
2527 (ptr->Flags & SCSI_INQ_CMDQUEUE) &&
2528 (pDCB->DevMode & TAG_QUEUING_) &&
2529 (pDCB->DevMode & EN_DISCONNECT_)) {
2537 pDCB->tinfo.disc_tag |=
2542 pDCB->tinfo.disc_tag &=
2548 /* pSRB->CmdBlock[0] == INQUIRY */
2550 /* pACB->scan_devices[target_id][target_lun] */
2553 /* ReleaseSRB(pDCB, pSRB); */
2554 if (pSRB == pDCB->pGoingSRB)
2555 pDCB->pGoingSRB = pSRB->pNextSRB;
2557 psrb = pDCB->pGoingSRB;
2558 while (psrb->pNextSRB != pSRB) {
2559 psrb = psrb->pNextSRB;
2561 psrb->pNextSRB = pSRB->pNextSRB;
2562 if (pSRB == pDCB->pGoingLastSRB) {
2563 pDCB->pGoingLastSRB = psrb;
2566 pSRB->pNextSRB = pACB->pFreeSRB;
2567 pACB->pFreeSRB = pSRB;
2568 pDCB->GoingSRBCnt--;
2569 trm_DoWaitingSRB(pACB);
2572 /* Notify cmd done */
2577 trm_DoingSRB_Done(PACB pACB)
2584 pDCB = pACB->pLinkDCB;
2589 cnt = pdcb->GoingSRBCnt;
2590 psrb = pdcb->pGoingSRB;
2591 for (i = 0; i < cnt; i++) {
2592 psrb2 = psrb->pNextSRB;
2594 pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2595 /* ReleaseSRB(pDCB, pSRB); */
2596 psrb->pNextSRB = pACB->pFreeSRB;
2597 pACB->pFreeSRB = psrb;
2601 pdcb->GoingSRBCnt = 0;;
2602 pdcb->pGoingSRB = NULL;
2604 pdcb = pdcb->pNextDCB;
2606 while (pdcb != pDCB);
2610 trm_ResetSCSIBus(PACB pACB)
2615 pACB->ACBFlag |= RESET_DEV;
2617 trm_reg_write16(DO_RSTSCSI,TRMREG_SCSI_CONTROL);
2618 while (!(trm_reg_read16(TRMREG_SCSI_INTSTATUS) & INT_SCSIRESET));
2624 trm_ScsiRstDetect(PACB pACB)
2629 TRM_DPRINTF("trm_ScsiRstDetect \n");
2634 trm_reg_write8(STOPDMAXFER,TRMREG_DMA_CONTROL);
2636 trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
2638 if (pACB->ACBFlag & RESET_DEV)
2639 pACB->ACBFlag |= RESET_DONE;
2641 pACB->ACBFlag |= RESET_DETECT;
2642 trm_ResetDevParam(pACB);
2643 /* trm_DoingSRB_Done(pACB); ???? */
2644 trm_RecoverSRB(pACB);
2645 pACB->pActiveDCB = NULL;
2647 trm_DoWaitingSRB(pACB);
2654 trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB)
2657 struct ccb_scsiio *pcsio;
2660 pcsio = &pccb->csio;
2662 pSRB->SRBFlag |= AUTO_REQSENSE;
2663 pSRB->Segment0[0] = *((u_long *) &(pSRB->CmdBlock[0]));
2664 pSRB->Segment0[1] = *((u_long *) &(pSRB->CmdBlock[4]));
2665 pSRB->Segment1[0] = (u_long) ((pSRB->ScsiCmdLen << 8) +
2667 pSRB->Segment1[1] = pSRB->SRBTotalXferLength; /* ?????????? */
2669 /* $$$$$$ Status of initiator/target $$$$$$$$ */
2670 pSRB->AdaptStatus = 0;
2671 pSRB->TargetStatus = 0;
2672 /* $$$$$$ Status of initiator/target $$$$$$$$ */
2674 pSRB->SRBTotalXferLength = sizeof(pcsio->sense_data);
2675 pSRB->SgSenseTemp.address = pSRB->SegmentX[0].address;
2676 pSRB->SgSenseTemp.length = pSRB->SegmentX[0].length;
2677 pSRB->SegmentX[0].address = (u_long) vtophys(&pcsio->sense_data);
2678 pSRB->SegmentX[0].length = (u_long) pcsio->sense_len;
2679 pSRB->SRBSGListPointer = &pSRB->SegmentX[0];
2680 pSRB->SRBSGCount = 1;
2681 pSRB->SRBSGIndex = 0;
2683 *((u_long *) &(pSRB->CmdBlock[0])) = 0x00000003;
2684 pSRB->CmdBlock[1] = pDCB->IdentifyMsg << 5;
2685 *((u_int16_t *) &(pSRB->CmdBlock[4])) = pcsio->sense_len;
2686 pSRB->ScsiCmdLen = 6;
2688 if (trm_StartSCSI(pACB, pDCB, pSRB))
2690 * If trm_StartSCSI return 1 :
2691 * current interrupt status is interrupt disreenable
2692 * It's said that SCSI processor has more one SRB need to do
2694 trm_RewaitSRB(pDCB, pSRB);
2698 trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB)
2702 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2706 trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB)
2709 pSRB->MsgOutBuf[0] = MSG_ABORT;
2710 trm_EnableMsgOutAbort2(pACB, pSRB);
2714 trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,u_int32_t i,u_int32_t j)
2716 PNVRAMTYPE pEEpromBuf;
2717 u_int8_t bval,PeriodIndex;
2718 u_int target_id,target_lun;
2726 if (pACB->pLinkDCB == 0) {
2727 pACB->pLinkDCB = pDCB;
2729 * RunRobin impersonate the role
2730 * that let each device had good proportion
2731 * about SCSI command proceeding
2733 pACB->pDCBRunRobin = pDCB;
2734 pDCB->pNextDCB = pDCB;
2736 pTempDCB=pACB->pLinkDCB;
2737 /* search the last nod of DCB link */
2738 while (pTempDCB->pNextDCB != pACB->pLinkDCB)
2739 pTempDCB = pTempDCB->pNextDCB;
2740 /* connect current DCB with last DCB tail */
2741 pTempDCB->pNextDCB = pDCB;
2742 /* connect current DCB tail to this DCB Q head */
2743 pDCB->pNextDCB=pACB->pLinkDCB;
2748 pDCB->pDCBACB = pACB;
2749 pDCB->TargetID = target_id;
2750 pDCB->TargetLUN = target_lun;
2751 pDCB->pWaitingSRB = NULL;
2752 pDCB->pGoingSRB = NULL;
2753 pDCB->GoingSRBCnt = 0;
2754 pDCB->pActiveSRB = NULL;
2756 pDCB->MaxCommand = 1;
2759 pEEpromBuf = &trm_eepromBuf[unit];
2760 pDCB->DevMode = pEEpromBuf->NvramTarget[target_id].NvmTarCfg0;
2761 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
2764 * disconnect enable ?
2766 if (pDCB->DevMode & NTC_DO_DISCONNECT) {
2768 pDCB->tinfo.disc_tag |= TRM_USR_DISCENB ;
2771 pDCB->tinfo.disc_tag &= ~(TRM_USR_DISCENB);
2774 pDCB->IdentifyMsg = bval;
2779 if (pDCB->DevMode & TAG_QUEUING_) {
2780 pDCB->tinfo.disc_tag |= TRM_USR_TAGENB ;
2782 pDCB->tinfo.disc_tag &= ~(TRM_USR_TAGENB);
2785 * wide nego ,sync nego enable ?
2787 pDCB->SyncPeriod = 0;
2788 pDCB->SyncOffset = 0;
2789 PeriodIndex = pEEpromBuf->NvramTarget[target_id].NvmTarPeriod & 0x07;
2790 pDCB->MaxNegoPeriod = dc395x_trm_clock_period[ PeriodIndex ] ;
2792 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
2793 (pACB->Config & HCC_WIDE_CARD))
2794 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
2795 /* enable wide nego */
2796 if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
2797 pDCB->SyncMode |= SYNC_NEGO_ENABLE;
2798 /* enable sync nego */
2801 * Fill in tinfo structure.
2803 pDCB->tinfo.user.period = pDCB->MaxNegoPeriod;
2804 pDCB->tinfo.user.offset = (pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 15 : 0;
2805 pDCB->tinfo.user.width = (pDCB->SyncMode & WIDE_NEGO_ENABLE) ?
2806 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
2808 pDCB->tinfo.current.period = 0;
2809 pDCB->tinfo.current.offset = 0;
2810 pDCB->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
2814 trm_initSRB(PSRB psrb)
2817 psrb->PhysSRB = vtophys(psrb);
2821 trm_linkSRB(PACB pACB)
2825 for (i = 0; i < MAX_SRB_CNT; i++) {
2826 if (i != MAX_SRB_CNT - 1)
2830 pACB->SRB_array[i].pNextSRB = &pACB->SRB_array[i+1];
2833 * load NULL to NextSRB of the last SRB
2835 pACB->SRB_array[i].pNextSRB = NULL;
2837 * convert and save physical address of SRB to pSRB->PhysSRB
2839 trm_initSRB((PSRB) &pACB->SRB_array[i]);
2845 trm_initACB(PACB pACB, u_int16_t unit)
2847 PNVRAMTYPE pEEpromBuf;
2850 pEEpromBuf = &trm_eepromBuf[unit];
2853 if (pEEpromBuf->NvramChannelCfg & NAC_SCANLUN)
2858 TRM_DPRINTF("trm: pACB->max_id= %d pACB->max_lun= %d \n",
2859 pACB->max_id, pACB->max_lun);
2861 pACB->pLinkDCB = NULL;
2862 pACB->pDCBRunRobin = NULL;
2863 pACB->pActiveDCB = NULL;
2864 pACB->pFreeSRB = pACB->SRB_array;
2865 pACB->AdapterUnit = unit;
2866 pACB->AdaptSCSIID = pEEpromBuf->NvramScsiId;
2867 pACB->AdaptSCSILUN = 0;
2868 pACB->DeviceCnt = 0;
2869 pACB->TagMaxNum = 2 << pEEpromBuf->NvramMaxTag ;
2872 * link all device's SRB Q of this adapter
2876 * temp SRB for Q tag used or abord command used
2878 pACB->pTmpSRB = &pACB->TmpSRB;
2880 * convert and save physical address of SRB to pSRB->PhysSRB
2882 trm_initSRB(pACB->pTmpSRB);
2883 /* allocate DCB array for scan device */
2884 for (i = 0; i < (pACB->max_id +1); i++) {
2885 if (pACB->AdaptSCSIID != i) {
2886 for (j = 0; j < (pACB->max_lun +1); j++) {
2887 pACB->scan_devices[i][j] = 1;
2888 pACB->pDCB[i][j]= (PDCB) malloc (
2889 sizeof (struct _DCB), M_DEVBUF, M_WAITOK);
2891 pACB->pDCB[i][j], unit, i, j);
2892 TRM_DPRINTF("pDCB= %8x \n",
2893 (u_int)pACB->pDCB[i][j]);
2897 TRM_DPRINTF("sizeof(struct _DCB)= %8x \n",sizeof(struct _DCB));
2898 TRM_DPRINTF("sizeof(struct _ACB)= %8x \n",sizeof(struct _ACB));
2899 TRM_DPRINTF("sizeof(struct _SRB)= %8x \n",sizeof(struct _SRB));
2903 TRM_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB)
2905 u_int8_t *bpEeprom = (u_int8_t *) pEEpromBuf;
2908 /* Enable SEEPROM */
2909 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
2910 TRMREG_GEN_CONTROL);
2914 TRM_write_cmd(pACB, 0x04, 0xFF);
2915 trm_reg_write8(0, TRMREG_GEN_NVRAM);
2916 TRM_wait_30us(pACB);
2917 for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++) {
2918 TRM_set_data(pACB, bAddr, *bpEeprom);
2923 TRM_write_cmd(pACB, 0x04, 0x00);
2924 trm_reg_write8(0 , TRMREG_GEN_NVRAM);
2925 TRM_wait_30us(pACB);
2926 /* Disable SEEPROM */
2927 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
2928 TRMREG_GEN_CONTROL);
2933 TRM_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData)
2938 * Send write command & address
2941 TRM_write_cmd(pACB, 0x05, bAddr);
2945 for (i = 0; i < 8; i++, bData <<= 1) {
2946 bSendData = NVR_SELECT;
2948 /* Start from bit 7 */
2949 bSendData |= NVR_BITOUT;
2950 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
2951 TRM_wait_30us(pACB);
2952 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
2953 TRM_wait_30us(pACB);
2955 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
2956 TRM_wait_30us(pACB);
2958 * Disable chip select
2960 trm_reg_write8(0 , TRMREG_GEN_NVRAM);
2961 TRM_wait_30us(pACB);
2962 trm_reg_write8(NVR_SELECT ,TRMREG_GEN_NVRAM);
2963 TRM_wait_30us(pACB);
2965 * Wait for write ready
2968 trm_reg_write8((NVR_SELECT | NVR_CLOCK), TRMREG_GEN_NVRAM);
2969 TRM_wait_30us(pACB);
2970 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
2971 TRM_wait_30us(pACB);
2972 if (trm_reg_read8(TRMREG_GEN_NVRAM) & NVR_BITIN) {
2977 * Disable chip select
2979 trm_reg_write8(0, TRMREG_GEN_NVRAM);
2984 TRM_read_all(PNVRAMTYPE pEEpromBuf, PACB pACB)
2986 u_int8_t *bpEeprom = (u_int8_t*) pEEpromBuf;
2992 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
2993 TRMREG_GEN_CONTROL);
2994 for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++)
2995 *bpEeprom = TRM_get_data(pACB, bAddr);
2999 trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3000 TRMREG_GEN_CONTROL);
3005 TRM_get_data(PACB pACB, u_int8_t bAddr)
3008 u_int8_t bReadData, bData = 0;
3010 * Send read command & address
3013 TRM_write_cmd(pACB, 0x06, bAddr);
3015 for (i = 0; i < 8; i++) {
3019 trm_reg_write8((NVR_SELECT | NVR_CLOCK) , TRMREG_GEN_NVRAM);
3020 TRM_wait_30us(pACB);
3021 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3023 * Get data bit while falling edge
3025 bReadData = trm_reg_read8(TRMREG_GEN_NVRAM);
3027 if (bReadData & NVR_BITIN) {
3030 TRM_wait_30us(pACB);
3033 * Disable chip select
3035 trm_reg_write8(0, TRMREG_GEN_NVRAM);
3040 TRM_wait_30us(PACB pACB)
3043 /* ScsiPortStallExecution(30); wait 30 us */
3044 trm_reg_write8(5, TRMREG_GEN_TIMER);
3045 while (!(trm_reg_read8(TRMREG_GEN_STATUS) & GTIMEOUT));
3050 TRM_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr)
3055 for (i = 0; i < 3; i++, bCmd <<= 1) {
3057 * Program SB+OP code
3059 bSendData = NVR_SELECT;
3061 bSendData |= NVR_BITOUT;
3062 /* start from bit 2 */
3063 trm_reg_write8(bSendData, TRMREG_GEN_NVRAM);
3064 TRM_wait_30us(pACB);
3065 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3066 TRM_wait_30us(pACB);
3068 for (i = 0; i < 7; i++, bAddr <<= 1) {
3072 bSendData = NVR_SELECT;
3074 /* Start from bit 6 */
3075 bSendData |= NVR_BITOUT;
3076 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3077 TRM_wait_30us(pACB);
3078 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3079 TRM_wait_30us(pACB);
3081 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3082 TRM_wait_30us(pACB);
3086 trm_check_eeprom(PNVRAMTYPE pEEpromBuf, PACB pACB)
3088 u_int16_t *wpEeprom = (u_int16_t *) pEEpromBuf;
3089 u_int16_t wAddr, wCheckSum;
3090 u_long dAddr, *dpEeprom;
3092 TRM_read_all(pEEpromBuf,pACB);
3094 for (wAddr = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3095 wAddr < 64; wAddr++, wpEeprom++) {
3096 wCheckSum += *wpEeprom;
3098 if (wCheckSum != 0x1234) {
3100 * Checksum error, load default
3102 pEEpromBuf->NvramSubVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3103 pEEpromBuf->NvramSubVendorID[1] =
3104 (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3105 pEEpromBuf->NvramSubSysID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3106 pEEpromBuf->NvramSubSysID[1] =
3107 (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3108 pEEpromBuf->NvramSubClass = 0x00;
3109 pEEpromBuf->NvramVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3110 pEEpromBuf->NvramVendorID[1] =
3111 (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3112 pEEpromBuf->NvramDeviceID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3113 pEEpromBuf->NvramDeviceID[1] =
3114 (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3115 pEEpromBuf->NvramReserved = 0x00;
3117 for (dAddr = 0, dpEeprom = (u_long *) pEEpromBuf->NvramTarget;
3118 dAddr < 16; dAddr++, dpEeprom++) {
3119 *dpEeprom = 0x00000077;
3120 /* NvmTarCfg3,NvmTarCfg2,NvmTarPeriod,NvmTarCfg0 */
3123 *dpEeprom++ = 0x04000F07;
3124 /* NvramMaxTag,NvramDelayTime,NvramChannelCfg,NvramScsiId */
3125 *dpEeprom++ = 0x00000015;
3126 /* NvramReserved1,NvramBootLun,NvramBootTarget,NvramReserved0 */
3127 for (dAddr = 0; dAddr < 12; dAddr++, dpEeprom++)
3129 pEEpromBuf->NvramCheckSum = 0x00;
3130 for (wAddr = 0, wCheckSum = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3131 wAddr < 63; wAddr++, wpEeprom++)
3132 wCheckSum += *wpEeprom;
3133 *wpEeprom = 0x1234 - wCheckSum;
3134 TRM_write_all(pEEpromBuf,pACB);
3139 trm_initAdapter(PACB pACB, u_int16_t unit, device_t pci_config_id)
3141 PNVRAMTYPE pEEpromBuf;
3145 pEEpromBuf = &trm_eepromBuf[unit];
3147 /* 250ms selection timeout */
3148 trm_reg_write8(SEL_TIMEOUT, TRMREG_SCSI_TIMEOUT);
3149 /* Mask all the interrupt */
3150 trm_reg_write8(0x00, TRMREG_DMA_INTEN);
3151 trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
3152 /* Reset SCSI module */
3153 trm_reg_write16(DO_RSTMODULE, TRMREG_SCSI_CONTROL);
3154 /* program configuration 0 */
3155 pACB->Config = HCC_AUTOTERM | HCC_PARITY;
3156 if (trm_reg_read8(TRMREG_GEN_STATUS) & WIDESCSI)
3157 pACB->Config |= HCC_WIDE_CARD;
3158 if (pEEpromBuf->NvramChannelCfg & NAC_POWERON_SCSI_RESET)
3159 pACB->Config |= HCC_SCSI_RESET;
3160 if (pACB->Config & HCC_PARITY)
3161 bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
3163 bval = PHASELATCH | INITIATOR | BLOCKRST ;
3164 trm_reg_write8(bval,TRMREG_SCSI_CONFIG0);
3165 /* program configuration 1 */
3166 trm_reg_write8(0x13, TRMREG_SCSI_CONFIG1);
3167 /* program Host ID */
3168 bval = pEEpromBuf->NvramScsiId;
3169 trm_reg_write8(bval, TRMREG_SCSI_HOSTID);
3170 /* set ansynchronous transfer */
3171 trm_reg_write8(0x00, TRMREG_SCSI_OFFSET);
3172 /* Trun LED control off*/
3173 wval = trm_reg_read16(TRMREG_GEN_CONTROL) & 0x7F;
3174 trm_reg_write16(wval, TRMREG_GEN_CONTROL);
3176 wval = trm_reg_read16(TRMREG_DMA_CONFIG) | DMA_ENHANCE;
3177 trm_reg_write16(wval, TRMREG_DMA_CONFIG);
3178 /* Clear pending interrupt status */
3179 trm_reg_read8(TRMREG_SCSI_INTSTATUS);
3180 /* Enable SCSI interrupt */
3181 trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
3182 trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
3187 trm_init(u_int16_t unit, device_t pci_config_id)
3190 int rid = PCIR_MAPS;
3192 pACB = (PACB) device_get_softc(pci_config_id);
3194 printf("trm%d: cannot allocate ACB !\n", unit);
3197 bzero (pACB, sizeof (struct _ACB));
3198 pACB->iores = bus_alloc_resource(pci_config_id, SYS_RES_IOPORT,
3199 &rid, 0, ~0, 1, RF_ACTIVE);
3200 if (pACB->iores == NULL) {
3201 printf("trm_init: bus_alloc_resource failed!\n");
3204 pACB->tag = rman_get_bustag(pACB->iores);
3205 pACB->bsh = rman_get_bushandle(pACB->iores);
3206 if (bus_dma_tag_create(/*parent_dmat*/ NULL,
3209 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT,
3210 /*highaddr*/ BUS_SPACE_MAXADDR,
3213 /*maxsize*/ MAXBSIZE,
3214 /*nsegments*/ TRM_NSEG,
3215 /*maxsegsz*/ TRM_MAXTRANSFER_SIZE,
3216 /*flags*/ BUS_DMA_ALLOCNOW,
3217 &pACB->buffer_dmat) != 0)
3219 trm_check_eeprom(&trm_eepromBuf[unit],pACB);
3220 trm_initACB(pACB, unit);
3221 if (trm_initAdapter(pACB, unit, pci_config_id)) {
3222 printf("trm_initAdapter: initial ERROR\n");
3228 bus_release_resource(pci_config_id, SYS_RES_IOPORT, PCIR_MAPS,
3230 if (pACB->buffer_dmat)
3231 bus_dma_tag_destroy(pACB->buffer_dmat);
3236 trm_attach(device_t pci_config_id)
3238 struct cam_devq *device_Q;
3242 int unit = device_get_unit(pci_config_id);
3244 device_id = pci_get_devid(pci_config_id);
3246 * These cards do not allow memory mapped accesses
3248 if (device_id == PCI_DEVICEID_TRMS1040) {
3249 if ((pACB=trm_init((u_int16_t) unit,
3250 pci_config_id)) == NULL) {
3251 printf("trm%d: trm_init error!\n",unit);
3256 /* After setting up the adapter, map our interrupt */
3258 * Now let the CAM generic SCSI layer find the SCSI devices on the bus
3259 * start queue to reset to the idle loop.
3260 * Create device queue of SIM(s)
3261 * (MAX_START_JOB - 1) : max_sim_transactions
3263 pACB->irq = bus_alloc_resource(pci_config_id, SYS_RES_IRQ, &rid, 0,
3264 ~0, 1, RF_SHAREABLE | RF_ACTIVE);
3265 if (pACB->irq == NULL ||
3266 bus_setup_intr(pci_config_id, pACB->irq,
3267 INTR_TYPE_CAM, trm_Interrupt, pACB, &pACB->ih)) {
3268 printf("trm%d: register Interrupt handler error!\n", unit);
3271 device_Q = cam_simq_alloc(MAX_START_JOB);
3272 if (device_Q == NULL){
3273 printf("trm%d: device_Q == NULL !\n",unit);
3277 * Now tell the generic SCSI layer
3279 * If this is the xpt layer creating a sim, then it's OK
3280 * to wait for an allocation.
3281 * XXX Should we pass in a flag to indicate that wait is OK?
3285 * SCSI Interface Modules
3286 * The sim driver creates a sim for each controller. The sim device
3287 * queue is separately created in order to allow resource sharing betwee
3288 * sims. For instance, a driver may create one sim for each channel of
3289 * a multi-channel controller and use the same queue for each channel.
3290 * In this way, the queue resources are shared across all the channels
3291 * of the multi-channel controller.
3292 * trm_action : sim_action_func
3293 * trm_poll : sim_poll_func
3294 * "trm" : sim_name ,if sim_name = "xpt" ..M_DEVBUF,M_WAITOK
3295 * pACB : *softc if sim_name <> "xpt" ..M_DEVBUF,M_NOWAIT
3297 * 1 : max_dev_transactions
3298 * MAX_TAGS : max_tagged_dev_transactions
3300 * *******Construct our first channel SIM entry
3302 pACB->psim = cam_sim_alloc(trm_action,
3310 if (pACB->psim == NULL) {
3311 printf("trm%d: SIM allocate fault !\n",unit);
3312 cam_simq_free(device_Q); /* SIM allocate fault*/
3315 if (xpt_bus_register(pACB->psim, 0) != CAM_SUCCESS) {
3316 printf("trm%d: xpt_bus_register fault !\n",unit);
3319 if (xpt_create_path(&pACB->ppath,
3321 cam_sim_path(pACB->psim),
3322 CAM_TARGET_WILDCARD,
3323 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3324 printf("trm%d: xpt_create_path fault !\n",unit);
3325 xpt_bus_deregister(cam_sim_path(pACB->psim));
3328 * cam_sim_free(pACB->psim, TRUE); free_devq
3329 * pACB->psim = NULL;
3336 bus_release_resource(pci_config_id, SYS_RES_IOPORT, PCIR_MAPS,
3338 if (pACB->buffer_dmat)
3339 bus_dma_tag_destroy(pACB->buffer_dmat);
3341 bus_teardown_intr(pci_config_id, pACB->irq, pACB->ih);
3343 bus_release_resource(pci_config_id, SYS_RES_IRQ, 0, pACB->irq);
3345 cam_sim_free(pACB->psim, TRUE);
3353 * trm_probe (device_t tag, pcidi_t type)
3357 trm_probe(device_t tag)
3360 if (pci_get_devid(tag) == PCI_DEVICEID_TRMS1040) {
3361 device_set_desc(tag,
3362 "Tekram DC395U/UW/F DC315/U Fast20 Wide SCSI Adapter");
3369 trm_detach(device_t dev)
3371 PACB pACB = device_get_softc(dev);
3373 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, pACB->iores);
3374 bus_dma_tag_destroy(pACB->buffer_dmat);
3375 bus_teardown_intr(dev, pACB->irq, pACB->ih);
3376 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3377 xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL);
3378 xpt_free_path(pACB->ppath);
3379 xpt_bus_deregister(cam_sim_path(pACB->psim));
3380 cam_sim_free(pACB->psim, TRUE);
3383 static device_method_t trm_methods[] = {
3384 /* Device interface */
3385 DEVMETHOD(device_probe, trm_probe),
3386 DEVMETHOD(device_attach, trm_attach),
3387 DEVMETHOD(device_detach, trm_detach),
3391 static driver_t trm_driver = {
3392 "trm", trm_methods, sizeof(struct _ACB)
3395 static devclass_t trm_devclass;
3396 DRIVER_MODULE(trm, pci, trm_driver, trm_devclass, 0, 0);