2 * Copyright (c) 1993 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/i386/include/cpufunc.h,v 1.96.2.3 2002/04/28 22:50:54 dwmalone Exp $
34 * $DragonFly: src/sys/i386/include/Attic/cpufunc.h,v 1.3 2003/06/28 02:09:49 dillon Exp $
38 * Functions to provide access to special i386 instructions.
41 #ifndef _MACHINE_CPUFUNC_H_
42 #define _MACHINE_CPUFUNC_H_
44 #include <sys/cdefs.h>
47 #define readb(va) (*(volatile u_int8_t *) (va))
48 #define readw(va) (*(volatile u_int16_t *) (va))
49 #define readl(va) (*(volatile u_int32_t *) (va))
51 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
52 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
53 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
58 #include <machine/lock.h> /* XXX */
61 #ifdef SWTCH_OPTIM_STATS
62 extern int tlb_flush_count; /* XXX */
68 __asm __volatile("int $3");
76 __asm __volatile("bsfl %0,%0" : "=r" (result) : "0" (mask));
85 __asm __volatile("bsrl %0,%0" : "=r" (result) : "0" (mask));
92 __asm __volatile("cli" : : : "memory");
99 do_cpuid(u_int ax, u_int *p)
101 __asm __volatile("cpuid"
102 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
112 __asm __volatile("sti");
115 #define HAVE_INLINE_FFS
121 * Note that gcc-2's builtin ffs would be used if we didn't declare
122 * this inline or turn off the builtin. The builtin is faster but
123 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
126 return (mask == 0 ? mask : bsfl((u_int)mask) + 1);
129 #define HAVE_INLINE_FLS
134 return (mask == 0 ? mask : bsrl((u_int)mask) + 1);
139 #define inb(port) inbv(port)
140 #define outb(port, data) outbv(port, data)
142 #else /* __GNUC >= 2 */
145 * The following complications are to get around gcc not having a
146 * constraint letter for the range 0..255. We still put "d" in the
147 * constraint because "i" isn't a valid constraint when the port
148 * isn't constant. This only matters for -O0 because otherwise
149 * the non-working version gets optimized away.
151 * Use an expression-statement instead of a conditional expression
152 * because gcc-2.6.0 would promote the operands of the conditional
153 * and produce poor code for "if ((inb(var) & const1) == const2)".
155 * The unnecessary test `(port) < 0x10000' is to generate a warning if
156 * the `port' has type u_short or smaller. Such types are pessimal.
157 * This actually only works for signed types. The range check is
158 * careful to avoid generating warnings.
160 #define inb(port) __extension__ ({ \
162 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
163 && (port) < 0x10000) \
164 _data = inbc(port); \
166 _data = inbv(port); \
169 #define outb(port, data) ( \
170 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
171 && (port) < 0x10000 \
172 ? outbc(port, data) : outbv(port, data))
174 static __inline u_char
179 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
184 outbc(u_int port, u_char data)
186 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
189 #endif /* __GNUC <= 2 */
191 static __inline u_char
196 * We use %%dx and not %1 here because i/o is done at %dx and not at
197 * %edx, while gcc generates inferior code (movw instead of movl)
198 * if we tell it to load (u_short) port.
200 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
204 static __inline u_int
209 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
214 insb(u_int port, void *addr, size_t cnt)
216 __asm __volatile("cld; rep; insb"
217 : "=D" (addr), "=c" (cnt)
218 : "0" (addr), "1" (cnt), "d" (port)
223 insw(u_int port, void *addr, size_t cnt)
225 __asm __volatile("cld; rep; insw"
226 : "=D" (addr), "=c" (cnt)
227 : "0" (addr), "1" (cnt), "d" (port)
232 insl(u_int port, void *addr, size_t cnt)
234 __asm __volatile("cld; rep; insl"
235 : "=D" (addr), "=c" (cnt)
236 : "0" (addr), "1" (cnt), "d" (port)
243 __asm __volatile("invd");
249 * If we are not a true-SMP box then smp_invltlb() is a NOP. Note that this
250 * will cause the invl*() functions to be equivalent to the cpu_invl*()
254 #define smp_invltlb()
258 * Invalidate a patricular VA on this cpu only
261 cpu_invlpg(void *addr)
263 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
267 * Invalidate the TLB on this cpu only
274 * This should be implemented as load_cr3(rcr3()) when load_cr3()
277 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
279 #if defined(SWTCH_OPTIM_STATS)
285 * Invalidate a patricular VA on all cpus
290 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
295 * Invalidate the TLB on all cpus
302 * This should be implemented as load_cr3(rcr3()) when load_cr3()
305 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
308 #ifdef SWTCH_OPTIM_STATS
315 static __inline u_short
320 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
324 static __inline u_int
325 loadandclear(volatile u_int *addr)
329 __asm __volatile("xorl %0,%0; xchgl %1,%0"
330 : "=&r" (result) : "m" (*addr));
335 outbv(u_int port, u_char data)
339 * Use an unnecessary assignment to help gcc's register allocator.
340 * This make a large difference for gcc-1.40 and a tiny difference
341 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
342 * best results. gcc-2.6.0 can't handle this.
345 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
349 outl(u_int port, u_int data)
352 * outl() and outw() aren't used much so we haven't looked at
353 * possible micro-optimizations such as the unnecessary
354 * assignment for them.
356 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
360 outsb(u_int port, const void *addr, size_t cnt)
362 __asm __volatile("cld; rep; outsb"
363 : "=S" (addr), "=c" (cnt)
364 : "0" (addr), "1" (cnt), "d" (port));
368 outsw(u_int port, const void *addr, size_t cnt)
370 __asm __volatile("cld; rep; outsw"
371 : "=S" (addr), "=c" (cnt)
372 : "0" (addr), "1" (cnt), "d" (port));
376 outsl(u_int port, const void *addr, size_t cnt)
378 __asm __volatile("cld; rep; outsl"
379 : "=S" (addr), "=c" (cnt)
380 : "0" (addr), "1" (cnt), "d" (port));
384 outw(u_int port, u_short data)
386 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
389 static __inline u_int
394 __asm __volatile("movl %%cr2,%0" : "=r" (data));
398 static __inline u_int
403 __asm __volatile("pushfl; popl %0" : "=r" (ef));
407 static __inline u_int64_t
412 __asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr));
416 static __inline u_int64_t
421 __asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc));
425 static __inline u_int64_t
430 __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv));
437 __asm __volatile("wbinvd");
441 write_eflags(u_int ef)
443 __asm __volatile("pushl %0; popfl" : : "r" (ef));
447 wrmsr(u_int msr, u_int64_t newval)
449 __asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr));
452 static __inline u_int
456 __asm __volatile("movl %%fs,%0" : "=rm" (sel));
460 static __inline u_int
464 __asm __volatile("movl %%gs,%0" : "=rm" (sel));
471 __asm __volatile("movl %0,%%fs" : : "rm" (sel));
477 __asm __volatile("movl %0,%%gs" : : "rm" (sel));
480 static __inline u_int
484 __asm __volatile("movl %%dr0,%0" : "=r" (data));
491 __asm __volatile("movl %0,%%dr0" : : "r" (sel));
494 static __inline u_int
498 __asm __volatile("movl %%dr1,%0" : "=r" (data));
505 __asm __volatile("movl %0,%%dr1" : : "r" (sel));
508 static __inline u_int
512 __asm __volatile("movl %%dr2,%0" : "=r" (data));
519 __asm __volatile("movl %0,%%dr2" : : "r" (sel));
522 static __inline u_int
526 __asm __volatile("movl %%dr3,%0" : "=r" (data));
533 __asm __volatile("movl %0,%%dr3" : : "r" (sel));
536 static __inline u_int
540 __asm __volatile("movl %%dr4,%0" : "=r" (data));
547 __asm __volatile("movl %0,%%dr4" : : "r" (sel));
550 static __inline u_int
554 __asm __volatile("movl %%dr5,%0" : "=r" (data));
561 __asm __volatile("movl %0,%%dr5" : : "r" (sel));
564 static __inline u_int
568 __asm __volatile("movl %%dr6,%0" : "=r" (data));
575 __asm __volatile("movl %0,%%dr6" : : "r" (sel));
578 static __inline u_int
582 __asm __volatile("movl %%dr7,%0" : "=r" (data));
589 __asm __volatile("movl %0,%%dr7" : : "r" (sel));
592 #else /* !__GNUC__ */
594 int breakpoint __P((void));
595 u_int bsfl __P((u_int mask));
596 u_int bsrl __P((u_int mask));
597 void disable_intr __P((void));
598 void do_cpuid __P((u_int ax, u_int *p));
599 void enable_intr __P((void));
600 u_char inb __P((u_int port));
601 u_int inl __P((u_int port));
602 void insb __P((u_int port, void *addr, size_t cnt));
603 void insl __P((u_int port, void *addr, size_t cnt));
604 void insw __P((u_int port, void *addr, size_t cnt));
605 void invd __P((void));
606 void invlpg __P((u_int addr));
607 void invltlb __P((void));
608 u_short inw __P((u_int port));
609 u_int loadandclear __P((u_int *addr));
610 void outb __P((u_int port, u_char data));
611 void outl __P((u_int port, u_int data));
612 void outsb __P((u_int port, void *addr, size_t cnt));
613 void outsl __P((u_int port, void *addr, size_t cnt));
614 void outsw __P((u_int port, void *addr, size_t cnt));
615 void outw __P((u_int port, u_short data));
616 u_int rcr2 __P((void));
617 u_int64_t rdmsr __P((u_int msr));
618 u_int64_t rdpmc __P((u_int pmc));
619 u_int64_t rdtsc __P((void));
620 u_int read_eflags __P((void));
621 void wbinvd __P((void));
622 void write_eflags __P((u_int ef));
623 void wrmsr __P((u_int msr, u_int64_t newval));
624 u_int rfs __P((void));
625 u_int rgs __P((void));
626 void load_fs __P((u_int sel));
627 void load_gs __P((u_int sel));
629 #endif /* __GNUC__ */
631 void load_cr0 __P((u_int cr0));
632 void load_cr3 __P((u_int cr3));
633 void load_cr4 __P((u_int cr4));
634 void ltr __P((u_short sel));
635 u_int rcr0 __P((void));
636 u_int rcr3 __P((void));
637 u_int rcr4 __P((void));
638 void reset_dbregs __P((void));
641 #endif /* !_MACHINE_CPUFUNC_H_ */