2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
30 #include <sys/cdefs.h>
33 * Driver for the Atheros Wireless LAN controller.
35 * This software is derived from work of Atsushi Onoe; his contribution
36 * is greatly appreciated.
42 * This is needed for register operations which are performed
43 * by the driver - eg, calls to ath_hal_gettsf32().
45 * It's also required for any AH_DEBUG checks in here, eg the
46 * module dependencies.
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/sysctl.h>
55 #include <sys/malloc.h>
57 #include <sys/mutex.h>
58 #include <sys/kernel.h>
59 #include <sys/socket.h>
60 #include <sys/sockio.h>
61 #include <sys/errno.h>
62 #include <sys/callout.h>
64 #include <sys/endian.h>
65 #include <sys/kthread.h>
66 #include <sys/taskqueue.h>
68 #include <sys/module.h>
72 #include <net/if_var.h>
73 #include <net/if_dl.h>
74 #include <net/if_media.h>
75 #include <net/if_types.h>
76 #include <net/if_arp.h>
77 #include <net/ethernet.h>
78 #include <net/if_llc.h>
80 #include <netproto/802_11/ieee80211_var.h>
81 #include <netproto/802_11/ieee80211_regdomain.h>
82 #ifdef IEEE80211_SUPPORT_SUPERG
83 #include <netproto/802_11/ieee80211_superg.h>
85 #ifdef IEEE80211_SUPPORT_TDMA
86 #include <netproto/802_11/ieee80211_tdma.h>
92 #include <netinet/in.h>
93 #include <netinet/if_ether.h>
96 #include <dev/netif/ath/ath/if_athvar.h>
97 #include <dev/netif/ath/ath_hal/ah_devid.h> /* XXX for softled */
98 #include <dev/netif/ath/ath_hal/ah_diagcodes.h>
100 #include <dev/netif/ath/ath/if_ath_debug.h>
101 #include <dev/netif/ath/ath/if_ath_misc.h>
102 #include <dev/netif/ath/ath/if_ath_tsf.h>
103 #include <dev/netif/ath/ath/if_ath_tx.h>
104 #include <dev/netif/ath/ath/if_ath_sysctl.h>
105 #include <dev/netif/ath/ath/if_ath_led.h>
106 #include <dev/netif/ath/ath/if_ath_keycache.h>
107 #include <dev/netif/ath/ath/if_ath_rx.h>
108 #include <dev/netif/ath/ath/if_ath_beacon.h>
109 #include <dev/netif/ath/ath/if_athdfs.h>
112 #include <dev/netif/ath/ath_tx99/ath_tx99.h>
116 #include <dev/netif/ath/ath/if_ath_alq.h>
119 #ifdef IEEE80211_SUPPORT_TDMA
120 #include <dev/netif/ath/ath/if_ath_tdma.h>
122 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
124 static void ath_tdma_bintvalsetup(struct ath_softc *sc,
125 const struct ieee80211_tdma_state *tdma);
126 #endif /* IEEE80211_SUPPORT_TDMA */
128 #ifdef IEEE80211_SUPPORT_TDMA
130 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
132 struct ath_hal *ah = sc->sc_ah;
133 HAL_BEACON_TIMERS bt;
135 bt.bt_intval = bintval | HAL_BEACON_ENA;
136 bt.bt_nexttbtt = nexttbtt;
137 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
138 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
139 bt.bt_nextatim = nexttbtt+1;
140 /* Enables TBTT, DBA, SWBA timers by default */
143 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
144 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n",
159 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) {
160 struct if_ath_alq_tdma_timer_set t;
161 t.bt_intval = htobe32(bt.bt_intval);
162 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt);
163 t.bt_nextdba = htobe32(bt.bt_nextdba);
164 t.bt_nextswba = htobe32(bt.bt_nextswba);
165 t.bt_nextatim = htobe32(bt.bt_nextatim);
166 t.bt_flags = htobe32(bt.bt_flags);
167 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep);
168 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep);
169 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET,
170 sizeof(t), (char *) &t);
174 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
175 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n",
179 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10),
180 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10));
181 ath_hal_beaconsettimers(ah, &bt);
185 * Calculate the beacon interval. This is periodic in the
186 * superframe for the bss. We assume each station is configured
187 * identically wrt transmit rate so the guard time we calculate
188 * above will be the same on all stations. Note we need to
189 * factor in the xmit time because the hardware will schedule
190 * a frame for transmit if the start of the frame is within
191 * the burst time. When we get hardware that properly kills
192 * frames in the PCU we can reduce/eliminate the guard time.
194 * Roundup to 1024 is so we have 1 TU buffer in the guard time
195 * to deal with the granularity of the nexttbtt timer. 11n MAC's
196 * with 1us timer granularity should allow us to reduce/eliminate
200 ath_tdma_bintvalsetup(struct ath_softc *sc,
201 const struct ieee80211_tdma_state *tdma)
203 /* copy from vap state (XXX check all vaps have same value?) */
204 sc->sc_tdmaslotlen = tdma->tdma_slotlen;
206 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
207 tdma->tdma_slotcnt, 1024);
208 sc->sc_tdmabintval >>= 10; /* TSF -> TU */
209 if (sc->sc_tdmabintval & 1)
210 sc->sc_tdmabintval++;
212 if (tdma->tdma_slot == 0) {
214 * Only slot 0 beacons; other slots respond.
216 sc->sc_imask |= HAL_INT_SWBA;
217 sc->sc_tdmaswba = 0; /* beacon immediately */
219 /* XXX all vaps must be slot 0 or slot !0 */
220 sc->sc_imask &= ~HAL_INT_SWBA;
225 * Max 802.11 overhead. This assumes no 4-address frames and
226 * the encapsulation done by ieee80211_encap (llc). We also
227 * include potential crypto overhead.
229 #define IEEE80211_MAXOVERHEAD \
230 (sizeof(struct ieee80211_qosframe) \
231 + sizeof(struct llc) \
232 + IEEE80211_ADDR_LEN \
233 + IEEE80211_WEP_IVLEN \
234 + IEEE80211_WEP_KIDLEN \
235 + IEEE80211_WEP_CRCLEN \
236 + IEEE80211_WEP_MICLEN \
240 * Setup initially for tdma operation. Start the beacon
241 * timers and enable SWBA if we are slot 0. Otherwise
242 * we wait for slot 0 to arrive so we can sync up before
243 * starting to transmit.
246 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
248 struct ath_hal *ah = sc->sc_ah;
249 struct ifnet *ifp = sc->sc_ifp;
250 struct ieee80211com *ic = ifp->if_l2com;
251 const struct ieee80211_txparam *tp;
252 const struct ieee80211_tdma_state *tdma = NULL;
256 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
258 if_printf(ifp, "%s: no vaps?\n", __func__);
262 /* XXX should take a locked ref to iv_bss */
263 tp = vap->iv_bss->ni_txparms;
265 * Calculate the guard time for each slot. This is the
266 * time to send a maximal-size frame according to the
267 * fixed/lowest transmit rate. Note that the interface
268 * mtu does not include the 802.11 overhead so we must
269 * tack that on (ath_hal_computetxtime includes the
270 * preamble and plcp in it's calculation).
273 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
274 rix = ath_tx_findrix(sc, tp->ucastrate);
276 rix = ath_tx_findrix(sc, tp->mcastrate);
279 * If the chip supports enforcing TxOP on transmission,
280 * we can just delete the guard window. It isn't at all required.
282 if (sc->sc_hasenforcetxop) {
283 sc->sc_tdmaguard = 0;
285 /* XXX short preamble assumed */
286 /* XXX non-11n rate assumed */
287 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
288 ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE);
291 ath_hal_intrset(ah, 0);
293 ath_beaconq_config(sc); /* setup h/w beacon q */
295 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */
296 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */
297 ath_tdma_settimers(sc, sc->sc_tdmabintval,
298 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
299 sc->sc_syncbeacon = 0;
301 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
302 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
304 ath_hal_intrset(ah, sc->sc_imask);
306 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
307 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
308 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
309 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
313 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) {
314 struct if_ath_alq_tdma_timer_config t;
316 t.tdma_slot = htobe32(tdma->tdma_slot);
317 t.tdma_slotlen = htobe32(tdma->tdma_slotlen);
318 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt);
319 t.tdma_bintval = htobe32(tdma->tdma_bintval);
320 t.tdma_guard = htobe32(sc->sc_tdmaguard);
321 t.tdma_scbintval = htobe32(sc->sc_tdmabintval);
322 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep);
324 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG,
325 sizeof(t), (char *) &t);
327 #endif /* ATH_DEBUG_ALQ */
331 * Update tdma operation. Called from the 802.11 layer
332 * when a beacon is received from the TDMA station operating
333 * in the slot immediately preceding us in the bss. Use
334 * the rx timestamp for the beacon frame to update our
335 * beacon timers so we follow their schedule. Note that
336 * by using the rx timestamp we implicitly include the
337 * propagation delay in our schedule.
339 * XXX TODO: since the changes for the AR5416 and later chips
340 * involved changing the TSF/TU calculations, we need to make
341 * sure that various calculations wrap consistently.
343 * A lot of the problems stemmed from the calculations wrapping
344 * at 65,535 TU. Since a lot of the math is still being done in
345 * TU, please audit it to ensure that when the TU values programmed
346 * into the timers wrap at (2^31)-1 TSF, all the various terms
350 ath_tdma_update(struct ieee80211_node *ni,
351 const struct ieee80211_tdma_param *tdma, int changed)
353 #define TSF_TO_TU(_h,_l) \
354 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
355 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10)
356 struct ieee80211vap *vap = ni->ni_vap;
357 struct ieee80211com *ic = ni->ni_ic;
358 struct ath_softc *sc = ic->ic_ifp->if_softc;
359 struct ath_hal *ah = sc->sc_ah;
360 const HAL_RATE_TABLE *rt = sc->sc_currates;
361 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full;
362 u_int32_t txtime, nextslottu;
363 int32_t tudelta, tsfdelta;
364 const struct ath_rx_status *rs;
367 sc->sc_stats.ast_tdma_update++;
370 * Check for and adopt configuration changes.
373 const struct ieee80211_tdma_state *ts = vap->iv_tdma;
375 ath_tdma_bintvalsetup(sc, ts);
376 if (changed & TDMA_UPDATE_SLOTLEN)
379 DPRINTF(sc, ATH_DEBUG_TDMA,
380 "%s: adopt slot %u slotcnt %u slotlen %u us "
381 "bintval %u TU\n", __func__,
382 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
386 ath_hal_intrset(ah, sc->sc_imask);
387 /* NB: beacon timers programmed below */
390 /* extend rx timestamp to 64 bits */
392 tsf = ath_hal_gettsf64(ah);
393 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf);
395 * The rx timestamp is set by the hardware on completing
396 * reception (at the point where the rx descriptor is DMA'd
397 * to the host). To find the start of our next slot we
398 * must adjust this time by the time required to send
399 * the packet just received.
401 rix = rt->rateCodeToIndex[rs->rs_rate];
404 * To calculate the packet duration for legacy rates, we
405 * only need the rix and preamble.
407 * For 11n non-aggregate frames, we also need the channel
408 * width and short/long guard interval.
410 * For 11n aggregate frames, the required hacks are a little
411 * more subtle. You need to figure out the frame duration
412 * for each frame, including the delimiters. However, when
413 * a frame isn't received successfully, we won't hear it
414 * (unless you enable reception of CRC errored frames), so
415 * your duration calculation is going to be off.
417 * However, we can assume that the beacon frames won't be
418 * transmitted as aggregate frames, so we should be okay.
419 * Just add a check to ensure that we aren't handed something
422 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is
423 * actually short guard interval. For legacy rates,
424 * it's short preamble.
426 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen,
428 !! (rs->rs_flags & HAL_RX_2040),
430 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble);
431 /* NB: << 9 is to cvt to TU and /2 */
432 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
435 * For 802.11n chips: nextslottu needs to be the full TSF space,
436 * not just 0..65535 TU.
438 nextslottu = TSF_TO_TU(nextslot>>32, nextslot);
440 * Retrieve the hardware NextTBTT in usecs
441 * and calculate the difference between what the
442 * other station thinks and what we have programmed. This
443 * lets us figure how to adjust our timers to match. The
444 * adjustments are done by pulling the TSF forward and possibly
445 * rewriting the beacon timers.
448 * The logic here assumes the nexttbtt counter is in TSF
449 * but the prr-11n NICs are in TU. The HAL shifts them
450 * to TSF but there's two important differences:
452 * + The TU->TSF values have 0's for the low 9 bits, and
453 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for
454 * the pre-11n NICs, but not for the 11n NICs.
456 * So for now, just make sure the nexttbtt value we get
457 * matches the second issue or once nexttbtt exceeds this
458 * value, tsfdelta ends up becoming very negative and all
459 * of the adjustments get very messed up.
463 * We need to track the full nexttbtt rather than having it
464 * truncated at HAL_BEACON_PERIOD, as programming the
465 * nexttbtt (and related) registers for the 11n chips is
466 * actually going to take the full 32 bit space, rather than
469 nexttbtt_full = ath_hal_getnexttbtt(ah);
470 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1));
471 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt);
473 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
474 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, "
475 "nextslottu %d, nextslottume %d\n",
476 (unsigned long long) rs->rs_tstamp, rstamp, tsf, txtime,
477 nextslot, nextslottu, TSF_TO_TU(nextslot >> 32, nextslot));
478 DPRINTF(sc, ATH_DEBUG_TDMA,
479 " beacon tstamp: %llu (0x%016llx)\n",
480 le64toh(ni->ni_tstamp.tsf),
481 le64toh(ni->ni_tstamp.tsf));
483 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
484 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n",
486 (long long) nexttbtt,
488 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
491 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
492 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
493 tsfdelta = -tsfdelta % 1024;
495 } else if (tsfdelta > 0) {
496 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
497 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
498 tsfdelta = 1024 - (tsfdelta % 1024);
501 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
502 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
504 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full);
507 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) {
508 struct if_ath_alq_tdma_beacon_state t;
509 t.rx_tsf = htobe64(rstamp);
510 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf));
511 t.tsf64 = htobe64(tsf);
512 t.nextslot_tsf = htobe64(nextslot);
513 t.nextslot_tu = htobe32(nextslottu);
514 t.txtime = htobe32(txtime);
515 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE,
516 sizeof(t), (char *) &t);
519 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) {
520 struct if_ath_alq_tdma_slot_calc t;
522 t.nexttbtt = htobe64(nexttbtt_full);
523 t.next_slot = htobe64(nextslot);
524 t.tsfdelta = htobe32(tsfdelta);
525 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap));
526 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam));
528 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC,
529 sizeof(t), (char *) &t);
534 * Copy sender's timetstamp into tdma ie so they can
535 * calculate roundtrip time. We submit a beacon frame
536 * below after any timer adjustment. The frame goes out
537 * at the next TBTT so the sender can calculate the
538 * roundtrip by inspecting the tdma ie in our beacon frame.
540 * NB: This tstamp is subtlely preserved when
541 * IEEE80211_BEACON_TDMA is marked (e.g. when the
542 * slot position changes) because ieee80211_add_tdma
543 * skips over the data.
545 memcpy(ATH_VAP(vap)->av_boff.bo_tdma +
546 __offsetof(struct ieee80211_tdma_param, tdma_tstamp),
547 &ni->ni_tstamp.data, 8);
549 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
550 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n",
551 (unsigned long long) tsf, (unsigned long long) nextslot,
552 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta);
555 * Adjust the beacon timers only when pulling them forward
556 * or when going back by less than the beacon interval.
557 * Negative jumps larger than the beacon interval seem to
558 * cause the timers to stop and generally cause instability.
559 * This basically filters out jumps due to missed beacons.
561 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
562 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
563 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n",
567 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
568 sc->sc_stats.ast_tdma_timers++;
573 /* XXX should just teach ath_hal_adjusttsf() to do this */
574 tsf = ath_hal_gettsf64(ah);
575 ath_hal_settsf64(ah, tsf + tsfdelta);
576 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
577 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n",
583 if (if_ath_alq_checkdebug(&sc->sc_alq,
584 ATH_ALQ_TDMA_TSF_ADJUST)) {
585 struct if_ath_alq_tdma_tsf_adjust t;
587 t.tsfdelta = htobe32(tsfdelta);
588 t.tsf64_old = htobe64(tsf);
589 t.tsf64_new = htobe64(tsf + tsfdelta);
590 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST,
591 sizeof(t), (char *) &t);
593 #endif /* ATH_DEBUG_ALQ */
594 sc->sc_stats.ast_tdma_tsf++;
596 ath_tdma_beacon_send(sc, vap); /* prepare response */
602 * Transmit a beacon frame at SWBA. Dynamic updates
603 * to the frame contents are done as needed.
606 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
608 struct ath_hal *ah = sc->sc_ah;
613 * Check if the previous beacon has gone out. If
614 * not don't try to post another, skip this period
615 * and wait for the next. Missed beacons indicate
616 * a problem and should not occur. If we miss too
617 * many consecutive beacons reset the device.
619 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
621 DPRINTF(sc, ATH_DEBUG_BEACON,
622 "%s: missed %u consecutive beacons\n",
623 __func__, sc->sc_bmisscount);
624 if (sc->sc_bmisscount >= ath_bstuck_threshold)
625 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
628 if (sc->sc_bmisscount != 0) {
629 DPRINTF(sc, ATH_DEBUG_BEACON,
630 "%s: resume beacon xmit after %u misses\n",
631 __func__, sc->sc_bmisscount);
632 sc->sc_bmisscount = 0;
636 * Check recent per-antenna transmit statistics and flip
637 * the default antenna if noticeably more frames went out
638 * on the non-default antenna.
639 * XXX assumes 2 anntenae
641 if (!sc->sc_diversity) {
642 otherant = sc->sc_defant & 1 ? 2 : 1;
643 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
644 ath_setdefantenna(sc, otherant);
645 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
648 bf = ath_beacon_generate(sc, vap);
649 /* XXX We don't do cabq traffic, but just for completeness .. */
650 ATH_TXQ_LOCK(sc->sc_cabq);
651 ath_beacon_cabq_start(sc);
652 ATH_TXQ_UNLOCK(sc->sc_cabq);
656 * Stop any current dma and put the new frame on the queue.
657 * This should never fail since we check above that no frames
658 * are still pending on the queue.
660 if ((! sc->sc_isedma) &&
661 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) {
662 DPRINTF(sc, ATH_DEBUG_ANY,
663 "%s: beacon queue %u did not stop?\n",
664 __func__, sc->sc_bhalq);
665 /* NB: the HAL still stops DMA, so proceed */
667 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
668 ath_hal_txstart(ah, sc->sc_bhalq);
670 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */
673 * Record local TSF for our last send for use
674 * in arbitrating slot collisions.
676 /* XXX should take a locked ref to iv_bss */
677 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
680 #endif /* IEEE80211_SUPPORT_TDMA */