2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
15 * 3. Neither the names of the above-listed copyright holders nor the names
16 * of any contributors may be used to endorse or promote products derived
17 * from this software without specific prior written permission.
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
21 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
36 * $FreeBSD: src/sys/dev/ath/ah_osdep.c,v 1.1 2006/09/18 16:49:14 sam Exp $
37 * $DragonFly: src/sys/dev/netif/ath/hal/ah_osdep.c,v 1.1 2007/02/22 05:17:09 sephe Exp $
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
45 #include <sys/sysctl.h>
47 #include <sys/malloc.h>
51 #include <machine/stdarg.h>
53 #include <net/ethernet.h> /* XXX for ether_sprintf */
55 #include <contrib/dev/ath/ah.h>
58 * WiSoC boards overload the bus tag with information about the
59 * board layout. We must extract the bus space tag from that
60 * indirect structure. For everyone else the tag is passed in
62 * XXX cache indirect ref privately
64 #ifdef AH_SUPPORT_AR5312
66 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
68 #define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st)
71 extern void ath_hal_printf(struct ath_hal *, const char*, ...)
73 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
75 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac);
76 extern void *ath_hal_malloc(size_t);
77 extern void ath_hal_free(void *);
79 extern void ath_hal_assert_failed(const char* filename,
80 int lineno, const char* msg);
83 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...);
84 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...);
87 /* NB: put this here instead of the driver to avoid circular references */
88 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
89 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
92 static int ath_hal_debug = 0;
93 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
94 0, "Atheros HAL debugging printfs");
95 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
98 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0,
99 "Atheros HAL version");
101 /* NB: these are deprecated; they exist for now for compatibility */
102 int ath_hal_dma_beacon_response_time = 2; /* in TU's */
103 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
104 &ath_hal_dma_beacon_response_time, 0,
105 "Atheros HAL DMA beacon response time");
106 int ath_hal_sw_beacon_response_time = 10; /* in TU's */
107 SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW,
108 &ath_hal_sw_beacon_response_time, 0,
109 "Atheros HAL software beacon response time");
110 int ath_hal_additional_swba_backoff = 0; /* in TU's */
111 SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW,
112 &ath_hal_additional_swba_backoff, 0,
113 "Atheros HAL additional SWBA backoff time");
115 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
118 ath_hal_malloc(size_t size)
120 return kmalloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
124 ath_hal_free(void* p)
126 return kfree(p, M_ATH_HAL);
130 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap)
136 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
140 ath_hal_vprintf(ah, fmt, ap);
145 ath_hal_ether_sprintf(const u_int8_t *mac)
147 static char etherbuf[18];
149 ksnprintf(etherbuf, sizeof(etherbuf), "%6D", mac, ":");
155 HALDEBUG(struct ath_hal *ah, const char* fmt, ...)
160 ath_hal_vprintf(ah, fmt, ap);
166 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...)
168 if (ath_hal_debug >= level) {
171 ath_hal_vprintf(ah, fmt, ap);
175 #endif /* AH_DEBUG */
179 * ALQ register tracing support.
181 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
182 * writes to the file /tmp/ath_hal.log. The file format is a simple
183 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
184 * and then decode the file with the arcode program (that is part of the
185 * HAL). If you start+stop tracing the data will be appended to an
188 * NB: doesn't handle multiple devices properly; only one DEVICE record
189 * is emitted and the different devices are not identified.
192 #include <sys/pcpu.h>
193 #include <contrib/dev/ath/ah_decode.h>
195 static struct alq *ath_hal_alq;
196 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */
197 static u_int ath_hal_alq_lost; /* count of lost records */
198 static const char *ath_hal_logfile = "/tmp/ath_hal.log";
199 static u_int ath_hal_alq_qsize = 64*1024;
202 ath_hal_setlogging(int enable)
207 error = priv_check(curthread, PRIV_ROOT);
209 error = alq_open(&ath_hal_alq, ath_hal_logfile,
210 curthread->td_ucred, ALQ_DEFAULT_CMODE,
211 sizeof (struct athregrec), ath_hal_alq_qsize);
212 ath_hal_alq_lost = 0;
213 ath_hal_alq_emitdev = 1;
214 kprintf("ath_hal: logging to %s enabled\n",
219 alq_close(ath_hal_alq);
221 kprintf("ath_hal: logging disabled\n");
228 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
232 enable = (ath_hal_alq != NULL);
233 error = sysctl_handle_int(oidp, &enable, 0, req);
234 if (error || !req->newptr)
237 return (ath_hal_setlogging(enable));
239 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
240 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
241 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
242 &ath_hal_alq_qsize, 0, "In-memory log size (#records)");
243 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
244 &ath_hal_alq_lost, 0, "Register operations not logged");
247 ath_hal_alq_get(struct ath_hal *ah)
251 if (ath_hal_alq_emitdev) {
252 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
254 struct athregrec *r =
255 (struct athregrec *) ale->ae_data;
258 r->val = ah->ah_devid;
259 alq_post(ath_hal_alq, ale);
260 ath_hal_alq_emitdev = 0;
264 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
271 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
273 bus_space_tag_t tag = BUSTAG(ah);
274 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
277 struct ale *ale = ath_hal_alq_get(ah);
279 struct athregrec *r = (struct athregrec *) ale->ae_data;
283 alq_post(ath_hal_alq, ale);
286 #if _BYTE_ORDER == _BIG_ENDIAN
287 if (reg >= 0x4000 && reg < 0x5000)
288 bus_space_write_4(tag, h, reg, val);
291 bus_space_write_stream_4(tag, h, reg, val);
295 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
297 bus_space_tag_t tag = BUSTAG(ah);
298 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
301 #if _BYTE_ORDER == _BIG_ENDIAN
302 if (reg >= 0x4000 && reg < 0x5000)
303 val = bus_space_read_4(tag, h, reg);
306 val = bus_space_read_stream_4(tag, h, reg);
308 struct ale *ale = ath_hal_alq_get(ah);
310 struct athregrec *r = (struct athregrec *) ale->ae_data;
314 alq_post(ath_hal_alq, ale);
321 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
324 struct ale *ale = ath_hal_alq_get(ah);
326 struct athregrec *r = (struct athregrec *) ale->ae_data;
330 alq_post(ath_hal_alq, ale);
334 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
336 * Memory-mapped device register read/write. These are here
337 * as routines when debugging support is enabled and/or when
338 * explicitly configured to use function calls. The latter is
339 * for architectures that might need to do something before
340 * referencing memory (e.g. remap an i/o window).
342 * NB: see the comments in ah_osdep.h about byte-swapping register
343 * reads and writes to understand what's going on below.
347 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
349 bus_space_tag_t tag = BUSTAG(ah);
350 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
352 #if _BYTE_ORDER == _BIG_ENDIAN
353 if (reg >= 0x4000 && reg < 0x5000)
354 bus_space_write_4(tag, h, reg, val);
357 bus_space_write_stream_4(tag, h, reg, val);
361 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
363 bus_space_tag_t tag = BUSTAG(ah);
364 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
367 #if _BYTE_ORDER == _BIG_ENDIAN
368 if (reg >= 0x4000 && reg < 0x5000)
369 val = bus_space_read_4(tag, h, reg);
372 val = bus_space_read_stream_4(tag, h, reg);
375 #endif /* AH_DEBUG || AH_REGOPS_FUNC */
379 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
381 kprintf("Atheros HAL assertion failure: %s: line %u: %s\n",
382 filename, lineno, msg);
383 panic("ath_hal_assert");
385 #endif /* AH_ASSERT */
388 * Delay n microseconds.
397 ath_hal_getuptime(struct ath_hal *ah)
402 return (tv.tv_sec * 1000) + (tv.tv_usec / 1000);
406 ath_hal_memzero(void *dst, size_t n)
412 ath_hal_memcpy(void *dst, const void *src, size_t n)
414 return memcpy(dst, src, n);
422 ath_hal_modevent(module_t mod, int type, void *unused)
429 kprintf("ath_hal: %s (", ath_hal_version);
431 for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
432 kprintf("%s%s", sep, ath_hal_buildopts[i]);
443 static moduledata_t ath_hal_mod = {
448 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
449 MODULE_VERSION(ath_hal, 1);