2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
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14 * similar Disclaimer requirement for further binary redistribution.
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16 * of any contributors may be used to endorse or promote products derived
17 * from this software without specific prior written permission.
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
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36 * $FreeBSD: src/sys/dev/ath/ah_osdep.c,v 1.1 2006/09/18 16:49:14 sam Exp $
37 * $DragonFly: src/sys/dev/netif/ath/hal/ah_osdep.c,v 1.1 2007/02/22 05:17:09 sephe Exp $
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
45 #include <sys/sysctl.h>
47 #include <sys/malloc.h>
50 #include <machine/stdarg.h>
52 #include <net/ethernet.h> /* XXX for ether_sprintf */
54 #include <contrib/dev/ath/ah.h>
57 * WiSoC boards overload the bus tag with information about the
58 * board layout. We must extract the bus space tag from that
59 * indirect structure. For everyone else the tag is passed in
61 * XXX cache indirect ref privately
63 #ifdef AH_SUPPORT_AR5312
65 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
67 #define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st)
70 extern void ath_hal_printf(struct ath_hal *, const char*, ...)
72 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
74 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac);
75 extern void *ath_hal_malloc(size_t);
76 extern void ath_hal_free(void *);
78 extern void ath_hal_assert_failed(const char* filename,
79 int lineno, const char* msg);
82 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...);
83 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...);
86 /* NB: put this here instead of the driver to avoid circular references */
87 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
88 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
91 static int ath_hal_debug = 0;
92 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
93 0, "Atheros HAL debugging printfs");
94 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
97 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0,
98 "Atheros HAL version");
100 /* NB: these are deprecated; they exist for now for compatibility */
101 int ath_hal_dma_beacon_response_time = 2; /* in TU's */
102 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
103 &ath_hal_dma_beacon_response_time, 0,
104 "Atheros HAL DMA beacon response time");
105 int ath_hal_sw_beacon_response_time = 10; /* in TU's */
106 SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW,
107 &ath_hal_sw_beacon_response_time, 0,
108 "Atheros HAL software beacon response time");
109 int ath_hal_additional_swba_backoff = 0; /* in TU's */
110 SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW,
111 &ath_hal_additional_swba_backoff, 0,
112 "Atheros HAL additional SWBA backoff time");
114 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
117 ath_hal_malloc(size_t size)
119 return kmalloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
123 ath_hal_free(void* p)
125 return kfree(p, M_ATH_HAL);
129 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap)
135 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
139 ath_hal_vprintf(ah, fmt, ap);
144 ath_hal_ether_sprintf(const u_int8_t *mac)
146 static char etherbuf[18];
148 ksnprintf(etherbuf, sizeof(etherbuf), "%6D", mac, ":");
154 HALDEBUG(struct ath_hal *ah, const char* fmt, ...)
159 ath_hal_vprintf(ah, fmt, ap);
165 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...)
167 if (ath_hal_debug >= level) {
170 ath_hal_vprintf(ah, fmt, ap);
174 #endif /* AH_DEBUG */
178 * ALQ register tracing support.
180 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
181 * writes to the file /tmp/ath_hal.log. The file format is a simple
182 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
183 * and then decode the file with the arcode program (that is part of the
184 * HAL). If you start+stop tracing the data will be appended to an
187 * NB: doesn't handle multiple devices properly; only one DEVICE record
188 * is emitted and the different devices are not identified.
191 #include <sys/pcpu.h>
192 #include <contrib/dev/ath/ah_decode.h>
194 static struct alq *ath_hal_alq;
195 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */
196 static u_int ath_hal_alq_lost; /* count of lost records */
197 static const char *ath_hal_logfile = "/tmp/ath_hal.log";
198 static u_int ath_hal_alq_qsize = 64*1024;
201 ath_hal_setlogging(int enable)
206 error = suser(curthread);
208 error = alq_open(&ath_hal_alq, ath_hal_logfile,
209 curthread->td_ucred, ALQ_DEFAULT_CMODE,
210 sizeof (struct athregrec), ath_hal_alq_qsize);
211 ath_hal_alq_lost = 0;
212 ath_hal_alq_emitdev = 1;
213 kprintf("ath_hal: logging to %s enabled\n",
218 alq_close(ath_hal_alq);
220 kprintf("ath_hal: logging disabled\n");
227 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
231 enable = (ath_hal_alq != NULL);
232 error = sysctl_handle_int(oidp, &enable, 0, req);
233 if (error || !req->newptr)
236 return (ath_hal_setlogging(enable));
238 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
239 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
240 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
241 &ath_hal_alq_qsize, 0, "In-memory log size (#records)");
242 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
243 &ath_hal_alq_lost, 0, "Register operations not logged");
246 ath_hal_alq_get(struct ath_hal *ah)
250 if (ath_hal_alq_emitdev) {
251 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
253 struct athregrec *r =
254 (struct athregrec *) ale->ae_data;
257 r->val = ah->ah_devid;
258 alq_post(ath_hal_alq, ale);
259 ath_hal_alq_emitdev = 0;
263 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
270 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
272 bus_space_tag_t tag = BUSTAG(ah);
273 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
276 struct ale *ale = ath_hal_alq_get(ah);
278 struct athregrec *r = (struct athregrec *) ale->ae_data;
282 alq_post(ath_hal_alq, ale);
285 #if _BYTE_ORDER == _BIG_ENDIAN
286 if (reg >= 0x4000 && reg < 0x5000)
287 bus_space_write_4(tag, h, reg, val);
290 bus_space_write_stream_4(tag, h, reg, val);
294 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
296 bus_space_tag_t tag = BUSTAG(ah);
297 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
300 #if _BYTE_ORDER == _BIG_ENDIAN
301 if (reg >= 0x4000 && reg < 0x5000)
302 val = bus_space_read_4(tag, h, reg);
305 val = bus_space_read_stream_4(tag, h, reg);
307 struct ale *ale = ath_hal_alq_get(ah);
309 struct athregrec *r = (struct athregrec *) ale->ae_data;
313 alq_post(ath_hal_alq, ale);
320 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
323 struct ale *ale = ath_hal_alq_get(ah);
325 struct athregrec *r = (struct athregrec *) ale->ae_data;
329 alq_post(ath_hal_alq, ale);
333 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
335 * Memory-mapped device register read/write. These are here
336 * as routines when debugging support is enabled and/or when
337 * explicitly configured to use function calls. The latter is
338 * for architectures that might need to do something before
339 * referencing memory (e.g. remap an i/o window).
341 * NB: see the comments in ah_osdep.h about byte-swapping register
342 * reads and writes to understand what's going on below.
346 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
348 bus_space_tag_t tag = BUSTAG(ah);
349 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
351 #if _BYTE_ORDER == _BIG_ENDIAN
352 if (reg >= 0x4000 && reg < 0x5000)
353 bus_space_write_4(tag, h, reg, val);
356 bus_space_write_stream_4(tag, h, reg, val);
360 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
362 bus_space_tag_t tag = BUSTAG(ah);
363 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
366 #if _BYTE_ORDER == _BIG_ENDIAN
367 if (reg >= 0x4000 && reg < 0x5000)
368 val = bus_space_read_4(tag, h, reg);
371 val = bus_space_read_stream_4(tag, h, reg);
374 #endif /* AH_DEBUG || AH_REGOPS_FUNC */
378 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
380 kprintf("Atheros HAL assertion failure: %s: line %u: %s\n",
381 filename, lineno, msg);
382 panic("ath_hal_assert");
384 #endif /* AH_ASSERT */
387 * Delay n microseconds.
396 ath_hal_getuptime(struct ath_hal *ah)
401 return (tv.tv_sec * 1000) + (tv.tv_usec / 1000);
405 ath_hal_memzero(void *dst, size_t n)
411 ath_hal_memcpy(void *dst, const void *src, size_t n)
413 return memcpy(dst, src, n);
421 ath_hal_modevent(module_t mod, int type, void *unused)
428 kprintf("ath_hal: %s (", ath_hal_version);
430 for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
431 kprintf("%s%s", sep, ath_hal_buildopts[i]);
442 static moduledata_t ath_hal_mod = {
447 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
448 MODULE_VERSION(ath_hal, 1);