2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.11 2004/01/11 16:45:17 joerg Exp $
35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
36 * from: i386/isa sio.c,v 1.234
39 #include "opt_comconsole.h"
40 #include "opt_compat.h"
50 * Serial driver, based on 386BSD-0.1 com driver.
51 * Mostly rewritten to use pseudo-DMA.
52 * Works for National Semiconductor NS8250-NS16550AF UARTs.
53 * COM driver, based on HP dca driver.
55 * Changes for PC-Card integration:
56 * - Added PC-Card driver table and handlers
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/reboot.h>
61 #include <sys/malloc.h>
64 #include <sys/module.h>
66 #include <sys/dkstat.h>
67 #include <sys/fcntl.h>
68 #include <sys/interrupt.h>
69 #include <sys/kernel.h>
70 #include <sys/syslog.h>
71 #include <sys/sysctl.h>
73 #include <machine/bus_pio.h>
74 #include <machine/bus.h>
76 #include <sys/timepps.h>
78 #include <machine/limits.h>
80 #include <bus/isa/isareg.h>
81 #include <bus/isa/isavar.h>
83 #include <bus/pci/pcireg.h>
84 #include <bus/pci/pcivar.h>
87 #include <dev/misc/puc/pucvar.h>
89 #include <machine/lock.h>
91 #include <machine/clock.h>
92 #include <machine/ipl.h>
94 #include <machine/lock.h>
96 #include <machine/resource.h>
99 #include "sio_private.h"
102 #include "../ic_layer/esp.h"
104 #include "../ic_layer/ns16550.h"
106 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
108 #define CALLOUT_MASK 0x80
109 #define CONTROL_MASK 0x60
110 #define CONTROL_INIT_STATE 0x20
111 #define CONTROL_LOCK_STATE 0x40
112 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
113 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
115 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
118 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */
120 #define sio_getreg(com, off) \
121 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
122 #define sio_setreg(com, off, value) \
123 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
127 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
128 * than the other bits so that they can be tested as a group without masking
131 * The following com and tty flags correspond closely:
132 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
134 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
135 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
136 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
137 * TS_FLUSH is not used.
138 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
139 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
141 #define CS_BUSY 0x80 /* output in progress */
142 #define CS_TTGO 0x40 /* output not stopped by XOFF */
143 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
144 #define CS_CHECKMSR 1 /* check of MSR scheduled */
145 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
146 #define CS_DTR_OFF 0x10 /* DTR held off */
147 #define CS_ODONE 4 /* output completed */
148 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
149 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
151 static char const * const error_desc[] = {
154 #define CE_INTERRUPT_BUF_OVERFLOW 1
155 "interrupt-level buffer overflow",
156 #define CE_TTY_BUF_OVERFLOW 2
157 "tty-level buffer overflow",
161 static int espattach (struct com_s *com, Port_t esp_port);
163 static int sio_isa_attach (device_t dev);
165 static timeout_t siobusycheck;
166 static u_int siodivisor (u_long rclk, speed_t speed);
167 static timeout_t siodtrwakeup;
168 static void comhardclose (struct com_s *com);
169 static void sioinput (struct com_s *com);
170 static void siointr1 (struct com_s *com);
171 static void siointr (void *arg);
172 static int commctl (struct com_s *com, int bits, int how);
173 static int comparam (struct tty *tp, struct termios *t);
174 static inthand2_t siopoll;
175 static int sio_isa_probe (device_t dev);
176 static void siosettimeout (void);
177 static int siosetwater (struct com_s *com, speed_t speed);
178 static void comstart (struct tty *tp);
179 static void comstop (struct tty *tp, int rw);
180 static timeout_t comwakeup;
181 static void disc_optim (struct tty *tp, struct termios *t,
185 static int sio_pci_attach (device_t dev);
186 static void sio_pci_kludge_unit (device_t dev);
187 static int sio_pci_probe (device_t dev);
188 #endif /* NPCI > 0 */
191 static int sio_puc_attach (device_t dev);
192 static int sio_puc_probe (device_t dev);
193 #endif /* NPUC > 0 */
195 static char driver_name[] = "sio";
197 /* table and macro for fast conversion from a unit number to its com struct */
198 devclass_t sio_devclass;
199 #define com_addr(unit) ((struct com_s *) \
200 devclass_get_softc(sio_devclass, unit))
202 static device_method_t sio_isa_methods[] = {
203 /* Device interface */
204 DEVMETHOD(device_probe, sio_isa_probe),
205 DEVMETHOD(device_attach, sio_isa_attach),
210 static driver_t sio_isa_driver = {
213 sizeof(struct com_s),
217 static device_method_t sio_pci_methods[] = {
218 /* Device interface */
219 DEVMETHOD(device_probe, sio_pci_probe),
220 DEVMETHOD(device_attach, sio_pci_attach),
225 static driver_t sio_pci_driver = {
228 sizeof(struct com_s),
230 #endif /* NPCI > 0 */
233 static device_method_t sio_puc_methods[] = {
234 /* Device interface */
235 DEVMETHOD(device_probe, sio_puc_probe),
236 DEVMETHOD(device_attach, sio_puc_attach),
241 static driver_t sio_puc_driver = {
244 sizeof(struct com_s),
246 #endif /* NPUC > 0 */
248 static d_open_t sioopen;
249 static d_close_t sioclose;
250 static d_read_t sioread;
251 static d_write_t siowrite;
252 static d_ioctl_t sioioctl;
254 #define CDEV_MAJOR 28
255 static struct cdevsw sio_cdevsw = {
256 /* name */ driver_name,
257 /* maj */ CDEV_MAJOR,
258 /* flags */ D_TTY | D_KQFILTER,
263 /* close */ sioclose,
265 /* write */ siowrite,
266 /* ioctl */ sioioctl,
269 /* strategy */ nostrategy,
272 /* kqfilter */ ttykqfilter
276 static volatile speed_t comdefaultrate = CONSPEED;
277 static u_long comdefaultrclk = DEFAULT_RCLK;
278 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
280 static volatile speed_t gdbdefaultrate = CONSPEED;
282 static u_int com_events; /* input chars + weighted output completions */
283 static Port_t siocniobase;
284 static int siocnunit;
285 static Port_t siogdbiobase;
286 static int siogdbunit = -1;
287 static bool_t sio_registered;
288 static int sio_timeout;
289 static int sio_timeouts_until_log;
290 static struct callout_handle sio_timeout_handle
291 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
292 static int sio_numunits;
295 /* XXX configure this properly. */
296 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
297 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
301 * handle sysctl read/write requests for console speed
303 * In addition to setting comdefaultrate for I/O through /dev/console,
304 * also set the initial and lock values for the /dev/ttyXX device
305 * if there is one associated with the console. Finally, if the /dev/tty
306 * device has already been open, change the speed on the open running port
311 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
318 newspeed = comdefaultrate;
320 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
321 if (error || !req->newptr)
324 comdefaultrate = newspeed;
326 if (comconsole < 0) /* serial console not selected? */
329 com = com_addr(comconsole);
334 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
335 * (note, the lock rates really are boolean -- if non-zero, disallow
338 com->it_in.c_ispeed = com->it_in.c_ospeed =
339 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
340 com->it_out.c_ispeed = com->it_out.c_ospeed =
341 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
344 * if we're open, change the running rate too
347 if (tp && (tp->t_state & TS_ISOPEN)) {
348 tp->t_termios.c_ispeed =
349 tp->t_termios.c_ospeed = comdefaultrate;
351 error = comparam(tp, &tp->t_termios);
357 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
358 0, 0, sysctl_machdep_comdefaultrate, "I", "");
367 static struct pci_ids pci_ids[] = {
368 { 0x100812b9, "3COM PCI FaxModem", 0x10 },
369 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
370 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
371 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
372 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
373 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
374 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 },
375 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
376 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 },
377 { 0x00000000, NULL, 0 }
387 type = pci_get_devid(dev);
389 while (id->type && id->type != type)
391 if (id->desc == NULL)
393 sio_pci_kludge_unit(dev);
394 return (sioattach(dev, id->rid, 0UL));
398 * Don't cut and paste this to other drivers. It is a horrible kludge
399 * which will fail to work and also be unnecessary in future versions.
402 sio_pci_kludge_unit(dev)
412 while (resource_int_value("sio", unit, "port", &start) == 0 &&
415 if (device_get_unit(dev) < unit) {
416 dc = device_get_devclass(dev);
417 while (devclass_get_device(dc, unit))
419 device_printf(dev, "moving to sio%d\n", unit);
420 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */
422 device_printf(dev, "error moving device %d\n", err);
433 type = pci_get_devid(dev);
435 while (id->type && id->type != type)
437 if (id->desc == NULL)
439 device_set_desc(dev, id->desc);
440 return (sioprobe(dev, id->rid, 0UL));
442 #endif /* NPCI > 0 */
451 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
454 return (sioattach(dev, 0, rclk));
463 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
466 return (sioprobe(dev, 0, rclk));
470 static struct isa_pnp_id sio_ids[] = {
471 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */
472 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */
473 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
474 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */
475 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */
476 /* Devices that do not have a compatid */
477 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */
478 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */
479 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */
480 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */
481 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
482 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */
483 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
484 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */
485 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */
486 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */
487 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */
488 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */
489 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */
490 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */
491 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */
492 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */
493 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */
494 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */
495 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
496 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */
497 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */
498 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */
499 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */
500 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */
501 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */
502 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */
503 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
504 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
505 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */
506 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */
507 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */
508 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */
509 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */
510 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */
511 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */
512 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */
513 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */
514 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */
515 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */
516 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */
517 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */
518 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
519 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */
520 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */
521 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */
522 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */
523 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */
524 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */
525 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */
526 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */
527 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */
528 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */
529 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */
530 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */
531 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */
532 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */
533 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */
534 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */
535 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */
536 {0x11007256, NULL}, /* USR0011 - USR ? */
537 {0x01017256, NULL}, /* USR0101 - USR ? */
538 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */
539 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */
540 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */
541 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */
542 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */
543 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */
544 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */
545 {0x90307256, NULL}, /* USR3090 - USR ? */
546 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */
547 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */
548 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
549 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */
550 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */
560 /* Check isapnp ids */
561 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO)
563 return (sioprobe(dev, 0, 0UL));
567 sioprobe(dev, xrid, rclk)
573 static bool_t already_init;
582 intrmask_t irqmap[4];
587 u_int flags = device_get_flags(dev);
589 struct resource *port;
592 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
593 0, ~0, IO_COMSIZE, RF_ACTIVE);
597 com = device_get_softc(dev);
598 com->bst = rman_get_bustag(port);
599 com->bsh = rman_get_bushandle(port);
606 * XXX this is broken - when we are first called, there are no
607 * previously configured IO ports. We could hard code
608 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
609 * This code has been doing nothing since the conversion since
610 * "count" is zero the first time around.
614 * Turn off MCR_IENABLE for all likely serial ports. An unused
615 * port with its MCR_IENABLE gate open will inhibit interrupts
616 * from any used port that shares the interrupt vector.
617 * XXX the gate enable is elsewhere for some multiports.
620 int count, i, xioport;
622 devclass_get_devices(sio_devclass, &devs, &count);
623 for (i = 0; i < count; i++) {
625 if (device_is_enabled(xdev) &&
626 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
628 outb(xioport + com_mcr, 0);
635 if (COM_LLCONSOLE(flags)) {
636 printf("sio%d: reserved for low-level i/o\n",
637 device_get_unit(dev));
638 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
643 * If the device is on a multiport card and has an AST/4
644 * compatible interrupt control register, initialize this
645 * register and prepare to leave MCR_IENABLE clear in the mcr.
646 * Otherwise, prepare to set MCR_IENABLE in the mcr.
647 * Point idev to the device struct giving the correct id_irq.
648 * This is the struct for the master device if there is one.
651 mcr_image = MCR_IENABLE;
653 if (COM_ISMULTIPORT(flags)) {
657 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
659 printf("sio%d: master device %d not configured\n",
660 device_get_unit(dev), COM_MPMASTER(flags));
663 if (!COM_NOTAST4(flags)) {
664 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
667 if (bus_get_resource(idev, SYS_RES_IRQ, 0,
669 outb(xiobase + com_scr, 0x80);
671 outb(xiobase + com_scr, 0);
676 #endif /* COM_MULTIPORT */
677 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
680 bzero(failures, sizeof failures);
681 iobase = rman_get_start(port);
684 * We don't want to get actual interrupts, just masked ones.
685 * Interrupts from this line should already be masked in the ICU,
686 * but mask them in the processor as well in case there are some
687 * (misconfigured) shared interrupts.
693 * For the TI16754 chips, set prescaler to 1 (4 is often the
694 * default after-reset value) as otherwise it's impossible to
695 * get highest baudrates.
697 if (COM_TI16754(flags)) {
700 cfcr = sio_getreg(com, com_cfcr);
701 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
702 efr = sio_getreg(com, com_efr);
703 /* Unlock extended features to turn off prescaler. */
704 sio_setreg(com, com_efr, efr | EFR_EFE);
706 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
707 /* Turn off prescaler. */
708 sio_setreg(com, com_mcr,
709 sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
710 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
711 sio_setreg(com, com_efr, efr);
712 sio_setreg(com, com_cfcr, cfcr);
716 * Initialize the speed and the word size and wait long enough to
717 * drain the maximum of 16 bytes of junk in device output queues.
718 * The speed is undefined after a master reset and must be set
719 * before relying on anything related to output. There may be
720 * junk after a (very fast) soft reboot and (apparently) after
722 * XXX what about the UART bug avoided by waiting in comparam()?
723 * We don't want to to wait long enough to drain at 2 bps.
725 if (iobase == siocniobase)
726 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
728 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
729 divisor = siodivisor(rclk, SIO_TEST_SPEED);
730 sio_setreg(com, com_dlbl, divisor & 0xff);
731 sio_setreg(com, com_dlbh, divisor >> 8);
732 sio_setreg(com, com_cfcr, CFCR_8BITS);
733 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
737 * Enable the interrupt gate and disable device interupts. This
738 * should leave the device driving the interrupt line low and
739 * guarantee an edge trigger if an interrupt can be generated.
742 sio_setreg(com, com_mcr, mcr_image);
743 sio_setreg(com, com_ier, 0);
744 DELAY(1000); /* XXX */
745 irqmap[0] = isa_irq_pending();
748 * Attempt to set loopback mode so that we can send a null byte
749 * without annoying any external device.
752 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
755 * Attempt to generate an output interrupt. On 8250's, setting
756 * IER_ETXRDY generates an interrupt independent of the current
757 * setting and independent of whether the THR is empty. On 16450's,
758 * setting IER_ETXRDY generates an interrupt independent of the
759 * current setting. On 16550A's, setting IER_ETXRDY only
760 * generates an interrupt when IER_ETXRDY is not already set.
762 sio_setreg(com, com_ier, IER_ETXRDY);
765 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
766 * an interrupt. They'd better generate one for actually doing
767 * output. Loopback may be broken on the same incompatibles but
768 * it's unlikely to do more than allow the null byte out.
770 sio_setreg(com, com_data, 0);
771 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
774 * Turn off loopback mode so that the interrupt gate works again
775 * (MCR_IENABLE was hidden). This should leave the device driving
776 * an interrupt line high. It doesn't matter if the interrupt
777 * line oscillates while we are not looking at it, since interrupts
781 sio_setreg(com, com_mcr, mcr_image);
784 * Some pcmcia cards have the "TXRDY bug", so we check everyone
785 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
787 if (COM_NOPROBE(flags)) {
788 /* Reading IIR register twice */
789 for (fn = 0; fn < 2; fn ++) {
791 failures[6] = sio_getreg(com, com_iir);
793 /* Check IIR_TXRDY clear ? */
795 if (failures[6] & IIR_TXRDY) {
796 /* Nop, Double check with clearing IER */
797 sio_setreg(com, com_ier, 0);
798 if (sio_getreg(com, com_iir) & IIR_NOPEND) {
799 /* Ok. we're familia this gang */
800 SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
802 /* Unknown, Just omit this chip.. XXX */
804 sio_setreg(com, com_mcr, 0);
807 /* OK. this is well-known guys */
808 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
810 sio_setreg(com, com_ier, 0);
811 sio_setreg(com, com_cfcr, CFCR_8BITS);
813 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
814 return (iobase == siocniobase ? 0 : result);
819 * o the CFCR, IER and MCR in UART hold the values written to them
820 * (the values happen to be all distinct - this is good for
821 * avoiding false positive tests from bus echoes).
822 * o an output interrupt is generated and its vector is correct.
823 * o the interrupt goes away when the IIR in the UART is read.
826 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
827 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
828 failures[2] = sio_getreg(com, com_mcr) - mcr_image;
829 DELAY(10000); /* Some internal modems need this time */
830 irqmap[1] = isa_irq_pending();
831 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
832 DELAY(1000); /* XXX */
833 irqmap[2] = isa_irq_pending();
834 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
837 * Turn off all device interrupts and check that they go off properly.
838 * Leave MCR_IENABLE alone. For ports without a master port, it gates
839 * the OUT2 output of the UART to
840 * the ICU input. Closing the gate would give a floating ICU input
841 * (unless there is another device driving it) and spurious interrupts.
842 * (On the system that this was first tested on, the input floats high
843 * and gives a (masked) interrupt as soon as the gate is closed.)
845 sio_setreg(com, com_ier, 0);
846 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */
847 failures[7] = sio_getreg(com, com_ier);
848 DELAY(1000); /* XXX */
849 irqmap[3] = isa_irq_pending();
850 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
854 irqs = irqmap[1] & ~irqmap[0];
855 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
856 ((1 << xirq) & irqs) == 0)
858 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
859 device_get_unit(dev), xirq, irqs);
861 printf("sio%d: irq maps: %#x %#x %#x %#x\n",
862 device_get_unit(dev),
863 irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
866 for (fn = 0; fn < sizeof failures; ++fn)
868 sio_setreg(com, com_mcr, 0);
871 printf("sio%d: probe failed test(s):",
872 device_get_unit(dev));
873 for (fn = 0; fn < sizeof failures; ++fn)
880 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
881 return (iobase == siocniobase ? 0 : result);
886 espattach(com, esp_port)
894 * Check the ESP-specific I/O port to see if we're an ESP
895 * card. If not, return failure immediately.
897 if ((inb(esp_port) & 0xf3) == 0) {
898 printf(" port 0x%x is not an ESP board?\n", esp_port);
903 * We've got something that claims to be a Hayes ESP card.
907 /* Get the dip-switch configuration */
908 outb(esp_port + ESP_CMD1, ESP_GETDIPS);
909 dips = inb(esp_port + ESP_STATUS1);
912 * Bits 0,1 of dips say which COM port we are.
914 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
917 printf(" esp_port has com %d\n", dips & 0x03);
922 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
924 outb(esp_port + ESP_CMD1, ESP_GETTEST);
925 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */
926 val = inb(esp_port + ESP_STATUS2);
927 if ((val & 0x70) < 0x20) {
928 printf("-old (%o)", val & 0x70);
933 * Check for ability to emulate 16550: bit 7 == 1
935 if ((dips & 0x80) == 0) {
941 * Okay, we seem to be a Hayes ESP card. Whee.
944 com->esp_port = esp_port;
953 return (sioattach(dev, 0, 0UL));
957 sioattach(dev, xrid, rclk)
971 struct resource *port;
975 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
976 0, ~0, IO_COMSIZE, RF_ACTIVE);
980 iobase = rman_get_start(port);
981 unit = device_get_unit(dev);
982 com = device_get_softc(dev);
983 flags = device_get_flags(dev);
985 if (unit >= sio_numunits)
986 sio_numunits = unit + 1;
988 * sioprobe() has initialized the device registers as follows:
989 * o cfcr = CFCR_8BITS.
990 * It is most important that CFCR_DLAB is off, so that the
991 * data port is not hidden when we enable interrupts.
993 * Interrupts are only enabled when the line is open.
994 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
995 * interrupt control register or the config specifies no irq.
996 * Keeping MCR_DTR and MCR_RTS off might stop the external
997 * device from sending before we are ready.
999 bzero(com, sizeof *com);
1001 com->ioportres = port;
1002 com->bst = rman_get_bustag(port);
1003 com->bsh = rman_get_bushandle(port);
1004 com->cfcr_image = CFCR_8BITS;
1005 com->dtr_wait = 3 * hz;
1006 com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
1007 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
1008 com->tx_fifo_size = 1;
1009 com->obufs[0].l_head = com->obuf1;
1010 com->obufs[1].l_head = com->obuf2;
1012 com->data_port = iobase + com_data;
1013 com->int_id_port = iobase + com_iir;
1014 com->modem_ctl_port = iobase + com_mcr;
1015 com->mcr_image = inb(com->modem_ctl_port);
1016 com->line_status_port = iobase + com_lsr;
1017 com->modem_status_port = iobase + com_msr;
1018 com->intr_ctl_port = iobase + com_ier;
1021 rclk = DEFAULT_RCLK;
1025 * We don't use all the flags from <sys/ttydefaults.h> since they
1026 * are only relevant for logins. It's important to have echo off
1027 * initially so that the line doesn't start blathering before the
1028 * echo flag can be turned off.
1030 com->it_in.c_iflag = 0;
1031 com->it_in.c_oflag = 0;
1032 com->it_in.c_cflag = TTYDEF_CFLAG;
1033 com->it_in.c_lflag = 0;
1034 if (unit == comconsole) {
1035 com->it_in.c_iflag = TTYDEF_IFLAG;
1036 com->it_in.c_oflag = TTYDEF_OFLAG;
1037 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
1038 com->it_in.c_lflag = TTYDEF_LFLAG;
1039 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
1040 com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1041 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1042 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1044 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1045 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1048 * Leave i/o resources allocated if this is a `cn'-level
1049 * console, so that other devices can't snarf them.
1051 if (iobase != siocniobase)
1052 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1056 termioschars(&com->it_in);
1057 com->it_out = com->it_in;
1059 /* attempt to determine UART type */
1060 printf("sio%d: type", unit);
1063 #ifdef COM_MULTIPORT
1064 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags))
1066 if (!COM_IIR_TXRDYBUG(flags))
1073 scr = sio_getreg(com, com_scr);
1074 sio_setreg(com, com_scr, 0xa5);
1075 scr1 = sio_getreg(com, com_scr);
1076 sio_setreg(com, com_scr, 0x5a);
1077 scr2 = sio_getreg(com, com_scr);
1078 sio_setreg(com, com_scr, scr);
1079 if (scr1 != 0xa5 || scr2 != 0x5a) {
1081 goto determined_type;
1084 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1087 switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1098 if (COM_NOFIFO(flags)) {
1099 printf(" 16550A fifo disabled");
1101 com->hasfifo = TRUE;
1102 if (COM_ST16650A(flags)) {
1104 com->tx_fifo_size = 32;
1105 printf(" ST16650A");
1106 } else if (COM_TI16754(flags)) {
1107 com->tx_fifo_size = 64;
1110 com->tx_fifo_size = COM_FIFOSIZE(flags);
1115 for (espp = likely_esp_ports; *espp != 0; espp++)
1116 if (espattach(com, *espp)) {
1117 com->tx_fifo_size = 1024;
1121 if (!com->st16650a && !COM_TI16754(flags)) {
1122 if (!com->tx_fifo_size)
1123 com->tx_fifo_size = 16;
1125 printf(" lookalike with %d bytes FIFO",
1135 * Set 16550 compatibility mode.
1136 * We don't use the ESP_MODE_SCALE bit to increase the
1137 * fifo trigger levels because we can't handle large
1139 * XXX flow control should be set in comparam(), not here.
1141 outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1142 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1144 /* Set RTS/CTS flow control. */
1145 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1146 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1147 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1149 /* Set flow-control levels. */
1150 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1151 outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1152 outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1153 outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1154 outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1156 #endif /* COM_ESP */
1157 sio_setreg(com, com_fifo, 0);
1160 #ifdef COM_MULTIPORT
1161 if (COM_ISMULTIPORT(flags)) {
1164 com->multiport = TRUE;
1165 printf(" (multiport");
1166 if (unit == COM_MPMASTER(flags))
1169 masterdev = devclass_get_device(sio_devclass,
1170 COM_MPMASTER(flags));
1171 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1172 SYS_RES_IRQ, 0, NULL, NULL) != 0);
1174 #endif /* COM_MULTIPORT */
1175 if (unit == comconsole)
1176 printf(", console");
1177 if (COM_IIR_TXRDYBUG(flags))
1178 printf(" with a bogus IIR_TXRDY register");
1181 if (!sio_registered) {
1182 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll");
1183 sio_registered = TRUE;
1185 minorbase = UNIT_TO_MINOR(unit);
1186 make_dev(&sio_cdevsw, minorbase,
1187 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1188 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE,
1189 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1190 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE,
1191 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1192 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
1193 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1194 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1195 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1196 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1197 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1199 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1200 pps_init(&com->pps);
1203 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
1206 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1207 INTR_TYPE_TTY | INTR_TYPE_FAST,
1208 siointr, com, &com->cookie);
1210 ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1211 com->irqres, INTR_TYPE_TTY,
1212 siointr, com, &com->cookie);
1214 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1217 device_printf(dev, "could not activate interrupt\n");
1218 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1219 defined(ALT_BREAK_TO_DEBUGGER))
1221 * Enable interrupts for early break-to-debugger support
1224 if (ret == 0 && unit == comconsole)
1225 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1234 sioopen(dev_t dev, int flag, int mode, struct thread *td)
1244 unit = MINOR_TO_UNIT(mynor);
1245 com = com_addr(unit);
1250 if (mynor & CONTROL_MASK)
1252 tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1255 * We jump to this label after all non-interrupted sleeps to pick
1256 * up any changes of the device state.
1259 while (com->state & CS_DTR_OFF) {
1260 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0);
1261 if (com_addr(unit) == NULL)
1263 if (error != 0 || com->gone)
1266 if (tp->t_state & TS_ISOPEN) {
1268 * The device is open, so everything has been initialized.
1271 if (mynor & CALLOUT_MASK) {
1272 if (!com->active_out) {
1277 if (com->active_out) {
1278 if (flag & O_NONBLOCK) {
1282 error = tsleep(&com->active_out,
1283 PCATCH, "siobi", 0);
1284 if (com_addr(unit) == NULL)
1286 if (error != 0 || com->gone)
1291 if (tp->t_state & TS_XCLUDE && suser(td)) {
1297 * The device isn't open, so there are no conflicts.
1298 * Initialize it. Initialization is done twice in many
1299 * cases: to preempt sleeping callin opens if we are
1300 * callout, and to complete a callin open after DCD rises.
1302 tp->t_oproc = comstart;
1303 tp->t_param = comparam;
1304 tp->t_stop = comstop;
1306 tp->t_termios = mynor & CALLOUT_MASK
1307 ? com->it_out : com->it_in;
1308 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1309 com->poll = com->no_irq;
1310 com->poll_output = com->loses_outints;
1312 error = comparam(tp, &tp->t_termios);
1317 * XXX we should goto open_top if comparam() slept.
1321 * (Re)enable and drain fifos.
1323 * Certain SMC chips cause problems if the fifos
1324 * are enabled while input is ready. Turn off the
1325 * fifo if necessary to clear the input. We test
1326 * the input ready bit after enabling the fifos
1327 * since we've already enabled them in comparam()
1328 * and to handle races between enabling and fresh
1332 sio_setreg(com, com_fifo,
1333 FIFO_RCV_RST | FIFO_XMT_RST
1336 * XXX the delays are for superstitious
1337 * historical reasons. It must be less than
1338 * the character time at the maximum
1339 * supported speed (87 usec at 115200 bps
1340 * 8N1). Otherwise we might loop endlessly
1341 * if data is streaming in. We used to use
1342 * delays of 100. That usually worked
1343 * because DELAY(100) used to usually delay
1344 * for about 85 usec instead of 100.
1347 if (!(inb(com->line_status_port) & LSR_RXRDY))
1349 sio_setreg(com, com_fifo, 0);
1351 (void) inb(com->data_port);
1356 (void) inb(com->line_status_port);
1357 (void) inb(com->data_port);
1358 com->prev_modem_status = com->last_modem_status
1359 = inb(com->modem_status_port);
1360 if (COM_IIR_TXRDYBUG(com->flags)) {
1361 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS
1364 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY
1365 | IER_ERLS | IER_EMSC);
1369 * Handle initial DCD. Callout devices get a fake initial
1370 * DCD (trapdoor DCD). If we are callout, then any sleeping
1371 * callin opens get woken up and resume sleeping on "siobi"
1372 * instead of "siodcd".
1375 * XXX `mynor & CALLOUT_MASK' should be
1376 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1377 * TRAPDOOR_CARRIER is the default initial state for callout
1378 * devices and SOFT_CARRIER is like CLOCAL except it hides
1381 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1382 (*linesw[tp->t_line].l_modem)(tp, 1);
1385 * Wait for DCD if necessary.
1387 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1388 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1390 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0);
1391 if (com_addr(unit) == NULL)
1394 if (error != 0 || com->gone)
1398 error = (*linesw[tp->t_line].l_open)(dev, tp);
1399 disc_optim(tp, &tp->t_termios, com);
1400 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1401 com->active_out = TRUE;
1405 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1411 sioclose(dev_t dev, int flag, int mode, struct thread *td)
1419 if (mynor & CONTROL_MASK)
1421 com = com_addr(MINOR_TO_UNIT(mynor));
1426 (*linesw[tp->t_line].l_close)(tp, flag);
1427 disc_optim(tp, &tp->t_termios, com);
1428 comstop(tp, FREAD | FWRITE);
1434 printf("sio%d: gone\n", com->unit);
1436 if (com->ibuf != NULL)
1437 free(com->ibuf, M_DEVBUF);
1438 bzero(tp, sizeof *tp);
1455 com->poll_output = FALSE;
1456 com->do_timestamp = FALSE;
1457 com->do_dcd_timestamp = FALSE;
1458 com->pps.ppsparam.mode = 0;
1459 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1462 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1463 defined(ALT_BREAK_TO_DEBUGGER))
1465 * Leave interrupts enabled and don't clear DTR if this is the
1466 * console. This allows us to detect break-to-debugger events
1467 * while the console device is closed.
1469 if (com->unit != comconsole)
1472 sio_setreg(com, com_ier, 0);
1473 if (tp->t_cflag & HUPCL
1475 * XXX we will miss any carrier drop between here and the
1476 * next open. Perhaps we should watch DCD even when the
1477 * port is closed; it is not sufficient to check it at
1478 * the next open because it might go up and down while
1479 * we're not watching.
1481 || (!com->active_out
1482 && !(com->prev_modem_status & MSR_DCD)
1483 && !(com->it_in.c_cflag & CLOCAL))
1484 || !(tp->t_state & TS_ISOPEN)) {
1485 (void)commctl(com, TIOCM_DTR, DMBIC);
1486 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1487 timeout(siodtrwakeup, com, com->dtr_wait);
1488 com->state |= CS_DTR_OFF;
1494 * Disable fifos so that they are off after controlled
1495 * reboots. Some BIOSes fail to detect 16550s when the
1496 * fifos are enabled.
1498 sio_setreg(com, com_fifo, 0);
1500 com->active_out = FALSE;
1501 wakeup(&com->active_out);
1502 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
1507 sioread(dev, uio, flag)
1516 if (mynor & CONTROL_MASK)
1518 com = com_addr(MINOR_TO_UNIT(mynor));
1519 if (com == NULL || com->gone)
1521 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag));
1525 siowrite(dev, uio, flag)
1535 if (mynor & CONTROL_MASK)
1538 unit = MINOR_TO_UNIT(mynor);
1539 com = com_addr(unit);
1540 if (com == NULL || com->gone)
1543 * (XXX) We disallow virtual consoles if the physical console is
1544 * a serial port. This is in case there is a display attached that
1545 * is not the console. In that situation we don't need/want the X
1546 * server taking over the console.
1548 if (constty != NULL && unit == comconsole)
1550 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag));
1560 com = (struct com_s *)chan;
1563 * Clear TS_BUSY if low-level output is complete.
1564 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1565 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1566 * called again. Reading the line status port outside of siointr1()
1567 * is safe because CS_BUSY is clear so there are no output interrupts
1571 if (com->state & CS_BUSY)
1572 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */
1573 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1574 == (LSR_TSRE | LSR_TXRDY)) {
1575 com->tp->t_state &= ~TS_BUSY;
1577 com->extra_state &= ~CSE_BUSYCHECK;
1579 timeout(siobusycheck, com, hz / 100);
1584 siodivisor(rclk, speed)
1592 if (speed == 0 || speed > (ULONG_MAX - 1) / 8)
1594 divisor = (rclk / (8UL * speed) + 1) / 2;
1595 if (divisor == 0 || divisor >= 65536)
1597 actual_speed = rclk / (16UL * divisor);
1599 /* 10 times error in percent: */
1600 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1602 /* 3.0% maximum error tolerance: */
1603 if (error < -30 || error > 30)
1615 com = (struct com_s *)chan;
1616 com->state &= ~CS_DTR_OFF;
1617 wakeup(&com->dtr_wait);
1632 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1633 com_events -= (com->iptr - com->ibuf);
1634 com->iptr = com->ibuf;
1637 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1639 * Avoid the grotesquely inefficient lineswitch routine
1640 * (ttyinput) in "raw" mode. It usually takes about 450
1641 * instructions (that's without canonical processing or echo!).
1642 * slinput is reasonably fast (usually 40 instructions plus
1647 incc = com->iptr - buf;
1648 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1649 && (com->state & CS_RTS_IFLOW
1650 || tp->t_iflag & IXOFF)
1651 && !(tp->t_state & TS_TBLOCK))
1653 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1654 += b_to_q((char *)buf, incc, &tp->t_rawq);
1658 tp->t_rawcc += incc;
1660 if (tp->t_state & TS_TTSTOP
1661 && (tp->t_iflag & IXANY
1662 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1663 tp->t_state &= ~TS_TTSTOP;
1664 tp->t_lflag &= ~FLUSHO;
1668 } while (buf < com->iptr);
1672 line_status = buf[com->ierroff];
1675 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1676 if (line_status & LSR_BI)
1677 recv_data |= TTY_BI;
1678 if (line_status & LSR_FE)
1679 recv_data |= TTY_FE;
1680 if (line_status & LSR_OE)
1681 recv_data |= TTY_OE;
1682 if (line_status & LSR_PE)
1683 recv_data |= TTY_PE;
1685 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1687 } while (buf < com->iptr);
1689 com_events -= (com->iptr - com->ibuf);
1690 com->iptr = com->ibuf;
1693 * There is now room for another low-level buffer full of input,
1694 * so enable RTS if it is now disabled and there is room in the
1695 * high-level buffer.
1697 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1698 !(tp->t_state & TS_TBLOCK))
1699 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1706 #ifndef COM_MULTIPORT
1708 siointr1((struct com_s *) arg);
1710 #else /* COM_MULTIPORT */
1711 bool_t possibly_more_intrs;
1716 * Loop until there is no activity on any port. This is necessary
1717 * to get an interrupt edge more than to avoid another interrupt.
1718 * If the IRQ signal is just an OR of the IRQ signals from several
1719 * devices, then the edge from one may be lost because another is
1724 possibly_more_intrs = FALSE;
1725 for (unit = 0; unit < sio_numunits; ++unit) {
1726 com = com_addr(unit);
1729 * would it work here, or be counter-productive?
1733 && (inb(com->int_id_port) & IIR_IMASK)
1736 possibly_more_intrs = TRUE;
1738 /* XXX com_unlock(); */
1740 } while (possibly_more_intrs);
1742 #endif /* COM_MULTIPORT */
1750 u_char modem_status;
1755 struct timecounter *tc;
1758 int_ctl = inb(com->intr_ctl_port);
1759 int_ctl_new = int_ctl;
1761 while (!com->gone) {
1762 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1763 modem_status = inb(com->modem_status_port);
1764 if ((modem_status ^ com->last_modem_status) & MSR_DCD) {
1766 count = tc->tc_get_timecount(tc);
1767 pps_event(&com->pps, tc, count,
1768 (modem_status & MSR_DCD) ?
1769 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1772 line_status = inb(com->line_status_port);
1774 /* input event? (check first to help avoid overruns) */
1775 while (line_status & LSR_RCV_MASK) {
1776 /* break/unnattached error bits or real input? */
1777 if (!(line_status & LSR_RXRDY))
1780 recv_data = inb(com->data_port);
1781 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1783 * Solaris implements a new BREAK which is initiated
1784 * by a character sequence CR ~ ^b which is similar
1785 * to a familiar pattern used on Sun servers by the
1788 #define KEY_CRTLB 2 /* ^B */
1789 #define KEY_CR 13 /* CR '\r' */
1790 #define KEY_TILDE 126 /* ~ */
1792 if (com->unit == comconsole) {
1793 static int brk_state1 = 0, brk_state2 = 0;
1794 if (recv_data == KEY_CR) {
1795 brk_state1 = recv_data;
1797 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) {
1798 if (recv_data == KEY_TILDE)
1799 brk_state2 = recv_data;
1800 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) {
1802 brk_state1 = brk_state2 = 0;
1810 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1812 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1813 * Otherwise, push the work to a higher level
1814 * (to handle PARMRK) if we're bypassing.
1815 * Otherwise, convert BI/FE and PE+INPCK to 0.
1817 * This makes bypassing work right in the
1818 * usual "raw" case (IGNBRK set, and IGNPAR
1821 * Note: BI together with FE/PE means just BI.
1823 if (line_status & LSR_BI) {
1824 #if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1825 if (com->unit == comconsole) {
1831 || com->tp->t_iflag & IGNBRK)
1835 || com->tp->t_iflag & IGNPAR)
1838 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1839 && (line_status & (LSR_BI | LSR_FE)
1840 || com->tp->t_iflag & INPCK))
1844 if (com->hotchar != 0 && recv_data == com->hotchar)
1847 if (ioptr >= com->ibufend)
1848 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1850 if (com->do_timestamp)
1851 microtime(&com->timestamp);
1854 #if 0 /* for testing input latency vs efficiency */
1855 if (com->iptr - com->ibuf == 8)
1858 ioptr[0] = recv_data;
1859 ioptr[com->ierroff] = line_status;
1860 com->iptr = ++ioptr;
1861 if (ioptr == com->ihighwater
1862 && com->state & CS_RTS_IFLOW)
1863 outb(com->modem_ctl_port,
1864 com->mcr_image &= ~MCR_RTS);
1865 if (line_status & LSR_OE)
1866 CE_RECORD(com, CE_OVERRUN);
1870 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1871 * jump from the top of the loop to here
1873 line_status = inb(com->line_status_port) & 0x7F;
1876 /* modem status change? (always check before doing output) */
1877 modem_status = inb(com->modem_status_port);
1878 if (modem_status != com->last_modem_status) {
1879 if (com->do_dcd_timestamp
1880 && !(com->last_modem_status & MSR_DCD)
1881 && modem_status & MSR_DCD)
1882 microtime(&com->dcd_timestamp);
1885 * Schedule high level to handle DCD changes. Note
1886 * that we don't use the delta bits anywhere. Some
1887 * UARTs mess them up, and it's easy to remember the
1888 * previous bits and calculate the delta.
1890 com->last_modem_status = modem_status;
1891 if (!(com->state & CS_CHECKMSR)) {
1892 com_events += LOTS_OF_EVENTS;
1893 com->state |= CS_CHECKMSR;
1897 /* handle CTS change immediately for crisp flow ctl */
1898 if (com->state & CS_CTS_OFLOW) {
1899 if (modem_status & MSR_CTS)
1900 com->state |= CS_ODEVREADY;
1902 com->state &= ~CS_ODEVREADY;
1906 /* output queued and everything ready? */
1907 if (line_status & LSR_TXRDY
1908 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1909 ioptr = com->obufq.l_head;
1910 if (com->tx_fifo_size > 1) {
1913 ocount = com->obufq.l_tail - ioptr;
1914 if (ocount > com->tx_fifo_size)
1915 ocount = com->tx_fifo_size;
1916 com->bytes_out += ocount;
1918 outb(com->data_port, *ioptr++);
1919 while (--ocount != 0);
1921 outb(com->data_port, *ioptr++);
1924 com->obufq.l_head = ioptr;
1925 if (COM_IIR_TXRDYBUG(com->flags)) {
1926 int_ctl_new = int_ctl | IER_ETXRDY;
1928 if (ioptr >= com->obufq.l_tail) {
1931 qp = com->obufq.l_next;
1932 qp->l_queued = FALSE;
1935 com->obufq.l_head = qp->l_head;
1936 com->obufq.l_tail = qp->l_tail;
1937 com->obufq.l_next = qp;
1939 /* output just completed */
1940 if (COM_IIR_TXRDYBUG(com->flags)) {
1941 int_ctl_new = int_ctl & ~IER_ETXRDY;
1943 com->state &= ~CS_BUSY;
1945 if (!(com->state & CS_ODONE)) {
1946 com_events += LOTS_OF_EVENTS;
1947 com->state |= CS_ODONE;
1948 setsofttty(); /* handle at high level ASAP */
1951 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) {
1952 outb(com->intr_ctl_port, int_ctl_new);
1957 #ifndef COM_MULTIPORT
1958 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1959 #endif /* COM_MULTIPORT */
1965 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
1972 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1974 struct termios term;
1978 com = com_addr(MINOR_TO_UNIT(mynor));
1979 if (com == NULL || com->gone)
1981 if (mynor & CONTROL_MASK) {
1984 switch (mynor & CONTROL_MASK) {
1985 case CONTROL_INIT_STATE:
1986 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1988 case CONTROL_LOCK_STATE:
1989 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1992 return (ENODEV); /* /dev/nodev */
1999 *ct = *(struct termios *)data;
2002 *(struct termios *)data = *ct;
2005 *(int *)data = TTYDISC;
2008 bzero(data, sizeof(struct winsize));
2015 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2016 term = tp->t_termios;
2018 error = ttsetcompat(tp, &cmd, data, &term);
2022 data = (caddr_t)&term;
2024 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2026 struct termios *dt = (struct termios *)data;
2027 struct termios *lt = mynor & CALLOUT_MASK
2028 ? &com->lt_out : &com->lt_in;
2030 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2031 | (dt->c_iflag & ~lt->c_iflag);
2032 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2033 | (dt->c_oflag & ~lt->c_oflag);
2034 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2035 | (dt->c_cflag & ~lt->c_cflag);
2036 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2037 | (dt->c_lflag & ~lt->c_lflag);
2038 for (cc = 0; cc < NCCS; ++cc)
2039 if (lt->c_cc[cc] != 0)
2040 dt->c_cc[cc] = tp->t_cc[cc];
2041 if (lt->c_ispeed != 0)
2042 dt->c_ispeed = tp->t_ispeed;
2043 if (lt->c_ospeed != 0)
2044 dt->c_ospeed = tp->t_ospeed;
2046 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td);
2047 if (error != ENOIOCTL)
2050 error = ttioctl(tp, cmd, data, flag);
2051 disc_optim(tp, &tp->t_termios, com);
2052 if (error != ENOIOCTL) {
2058 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2061 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2064 (void)commctl(com, TIOCM_DTR, DMBIS);
2067 (void)commctl(com, TIOCM_DTR, DMBIC);
2070 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
2071 * changes get undone on the next call to comparam().
2074 (void)commctl(com, *(int *)data, DMSET);
2077 (void)commctl(com, *(int *)data, DMBIS);
2080 (void)commctl(com, *(int *)data, DMBIC);
2083 *(int *)data = commctl(com, 0, DMGET);
2086 /* must be root since the wait applies to following logins */
2092 com->dtr_wait = *(int *)data * hz / 100;
2095 *(int *)data = com->dtr_wait * 100 / hz;
2098 com->do_timestamp = TRUE;
2099 *(struct timeval *)data = com->timestamp;
2101 case TIOCDCDTIMESTAMP:
2102 com->do_dcd_timestamp = TRUE;
2103 *(struct timeval *)data = com->dcd_timestamp;
2107 error = pps_ioctl(cmd, data, &com->pps);
2108 if (error == ENODEV)
2117 siopoll(void *dummy)
2121 if (com_events == 0)
2124 for (unit = 0; unit < sio_numunits; ++unit) {
2129 com = com_addr(unit);
2133 if (tp == NULL || com->gone) {
2135 * Discard any events related to never-opened or
2136 * going-away devices.
2139 incc = com->iptr - com->ibuf;
2140 com->iptr = com->ibuf;
2141 if (com->state & CS_CHECKMSR) {
2142 incc += LOTS_OF_EVENTS;
2143 com->state &= ~CS_CHECKMSR;
2149 if (com->iptr != com->ibuf) {
2154 if (com->state & CS_CHECKMSR) {
2155 u_char delta_modem_status;
2158 delta_modem_status = com->last_modem_status
2159 ^ com->prev_modem_status;
2160 com->prev_modem_status = com->last_modem_status;
2161 com_events -= LOTS_OF_EVENTS;
2162 com->state &= ~CS_CHECKMSR;
2164 if (delta_modem_status & MSR_DCD)
2165 (*linesw[tp->t_line].l_modem)
2166 (tp, com->prev_modem_status & MSR_DCD);
2168 if (com->state & CS_ODONE) {
2170 com_events -= LOTS_OF_EVENTS;
2171 com->state &= ~CS_ODONE;
2173 if (!(com->state & CS_BUSY)
2174 && !(com->extra_state & CSE_BUSYCHECK)) {
2175 timeout(siobusycheck, com, hz / 100);
2176 com->extra_state |= CSE_BUSYCHECK;
2178 (*linesw[tp->t_line].l_start)(tp);
2180 if (com_events == 0)
2183 if (com_events >= LOTS_OF_EVENTS)
2201 unit = DEV_TO_UNIT(tp->t_dev);
2202 com = com_addr(unit);
2206 /* do historical conversions */
2207 if (t->c_ispeed == 0)
2208 t->c_ispeed = t->c_ospeed;
2210 /* check requested parameters */
2211 if (t->c_ospeed == 0)
2214 if (t->c_ispeed != t->c_ospeed)
2216 divisor = siodivisor(com->rclk, t->c_ispeed);
2221 /* parameters are OK, convert them to the com struct and the device */
2224 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
2226 (void)commctl(com, TIOCM_DTR, DMBIS);
2228 switch (cflag & CSIZE) {
2242 if (cflag & PARENB) {
2244 if (!(cflag & PARODD))
2250 if (com->hasfifo && divisor != 0) {
2252 * Use a fifo trigger level low enough so that the input
2253 * latency from the fifo is less than about 16 msec and
2254 * the total latency is less than about 30 msec. These
2255 * latencies are reasonable for humans. Serial comms
2256 * protocols shouldn't expect anything better since modem
2257 * latencies are larger.
2259 * Interrupts can be held up for long periods of time
2260 * due to inefficiencies in other parts of the kernel,
2261 * certain video cards, etc. Setting the FIFO trigger
2262 * point to MEDH instead of HIGH gives us 694uS of slop
2263 * (8 character times) instead of 173uS (2 character times)
2266 com->fifo_image = t->c_ospeed <= 4800
2267 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2270 * The Hayes ESP card needs the fifo DMA mode bit set
2271 * in compatibility mode. If not, it will interrupt
2272 * for each character received.
2275 com->fifo_image |= FIFO_DMA_MODE;
2277 sio_setreg(com, com_fifo, com->fifo_image);
2281 * This returns with interrupts disabled so that we can complete
2282 * the speed change atomically. Keeping interrupts disabled is
2283 * especially important while com_data is hidden.
2285 (void) siosetwater(com, t->c_ispeed);
2288 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2290 * Only set the divisor registers if they would change,
2291 * since on some 16550 incompatibles (UMC8669F), setting
2292 * them while input is arriving them loses sync until
2293 * data stops arriving.
2295 dlbl = divisor & 0xFF;
2296 if (sio_getreg(com, com_dlbl) != dlbl)
2297 sio_setreg(com, com_dlbl, dlbl);
2298 dlbh = divisor >> 8;
2299 if (sio_getreg(com, com_dlbh) != dlbh)
2300 sio_setreg(com, com_dlbh, dlbh);
2303 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2305 if (!(tp->t_state & TS_TTSTOP))
2306 com->state |= CS_TTGO;
2308 if (cflag & CRTS_IFLOW) {
2309 if (com->st16650a) {
2310 sio_setreg(com, com_cfcr, 0xbf);
2311 sio_setreg(com, com_fifo,
2312 sio_getreg(com, com_fifo) | 0x40);
2314 com->state |= CS_RTS_IFLOW;
2316 * If CS_RTS_IFLOW just changed from off to on, the change
2317 * needs to be propagated to MCR_RTS. This isn't urgent,
2318 * so do it later by calling comstart() instead of repeating
2319 * a lot of code from comstart() here.
2321 } else if (com->state & CS_RTS_IFLOW) {
2322 com->state &= ~CS_RTS_IFLOW;
2324 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2325 * on here, since comstart() won't do it later.
2327 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2328 if (com->st16650a) {
2329 sio_setreg(com, com_cfcr, 0xbf);
2330 sio_setreg(com, com_fifo,
2331 sio_getreg(com, com_fifo) & ~0x40);
2337 * Set up state to handle output flow control.
2338 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2339 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2341 com->state |= CS_ODEVREADY;
2342 com->state &= ~CS_CTS_OFLOW;
2343 if (cflag & CCTS_OFLOW) {
2344 com->state |= CS_CTS_OFLOW;
2345 if (!(com->last_modem_status & MSR_CTS))
2346 com->state &= ~CS_ODEVREADY;
2347 if (com->st16650a) {
2348 sio_setreg(com, com_cfcr, 0xbf);
2349 sio_setreg(com, com_fifo,
2350 sio_getreg(com, com_fifo) | 0x80);
2353 if (com->st16650a) {
2354 sio_setreg(com, com_cfcr, 0xbf);
2355 sio_setreg(com, com_fifo,
2356 sio_getreg(com, com_fifo) & ~0x80);
2360 sio_setreg(com, com_cfcr, com->cfcr_image);
2362 /* XXX shouldn't call functions while intrs are disabled. */
2363 disc_optim(tp, t, com);
2365 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2366 * unconditionally, but that defeated the careful discarding of
2367 * stale input in sioopen().
2369 if (com->state >= (CS_BUSY | CS_TTGO))
2375 if (com->ibufold != NULL) {
2376 free(com->ibufold, M_DEVBUF);
2377 com->ibufold = NULL;
2383 siosetwater(com, speed)
2393 * Make the buffer size large enough to handle a softtty interrupt
2394 * latency of about 2 ticks without loss of throughput or data
2395 * (about 3 ticks if input flow control is not used or not honoured,
2396 * but a bit less for CS5-CS7 modes).
2398 cp4ticks = speed / 10 / hz * 4;
2399 for (ibufsize = 128; ibufsize < cp4ticks;)
2401 if (ibufsize == com->ibufsize) {
2407 * Allocate input buffer. The extra factor of 2 in the size is
2408 * to allow for an error byte for each input byte.
2410 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2416 /* Initialize non-critical variables. */
2417 com->ibufold = com->ibuf;
2418 com->ibufsize = ibufsize;
2421 tp->t_ififosize = 2 * ibufsize;
2422 tp->t_ispeedwat = (speed_t)-1;
2423 tp->t_ospeedwat = (speed_t)-1;
2427 * Read current input buffer, if any. Continue with interrupts
2431 if (com->iptr != com->ibuf)
2435 * Initialize critical variables, including input buffer watermarks.
2436 * The external device is asked to stop sending when the buffer
2437 * exactly reaches high water, or when the high level requests it.
2438 * The high level is notified immediately (rather than at a later
2439 * clock tick) when this watermark is reached.
2440 * The buffer size is chosen so the watermark should almost never
2442 * The low watermark is invisibly 0 since the buffer is always
2443 * emptied all at once.
2445 com->iptr = com->ibuf = ibuf;
2446 com->ibufend = ibuf + ibufsize;
2447 com->ierroff = ibufsize;
2448 com->ihighwater = ibuf + 3 * ibufsize / 4;
2460 unit = DEV_TO_UNIT(tp->t_dev);
2461 com = com_addr(unit);
2466 if (tp->t_state & TS_TTSTOP)
2467 com->state &= ~CS_TTGO;
2469 com->state |= CS_TTGO;
2470 if (tp->t_state & TS_TBLOCK) {
2471 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2472 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2474 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2475 && com->state & CS_RTS_IFLOW)
2476 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2479 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2484 if (tp->t_outq.c_cc != 0) {
2488 if (!com->obufs[0].l_queued) {
2489 com->obufs[0].l_tail
2490 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2492 com->obufs[0].l_next = NULL;
2493 com->obufs[0].l_queued = TRUE;
2495 if (com->state & CS_BUSY) {
2496 qp = com->obufq.l_next;
2497 while ((next = qp->l_next) != NULL)
2499 qp->l_next = &com->obufs[0];
2501 com->obufq.l_head = com->obufs[0].l_head;
2502 com->obufq.l_tail = com->obufs[0].l_tail;
2503 com->obufq.l_next = &com->obufs[0];
2504 com->state |= CS_BUSY;
2508 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2509 com->obufs[1].l_tail
2510 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2512 com->obufs[1].l_next = NULL;
2513 com->obufs[1].l_queued = TRUE;
2515 if (com->state & CS_BUSY) {
2516 qp = com->obufq.l_next;
2517 while ((next = qp->l_next) != NULL)
2519 qp->l_next = &com->obufs[1];
2521 com->obufq.l_head = com->obufs[1].l_head;
2522 com->obufq.l_tail = com->obufs[1].l_tail;
2523 com->obufq.l_next = &com->obufs[1];
2524 com->state |= CS_BUSY;
2528 tp->t_state |= TS_BUSY;
2531 if (com->state >= (CS_BUSY | CS_TTGO))
2532 siointr1(com); /* fake interrupt to start output */
2545 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2546 if (com == NULL || com->gone)
2552 /* XXX avoid h/w bug. */
2555 sio_setreg(com, com_fifo,
2556 FIFO_XMT_RST | com->fifo_image);
2557 com->obufs[0].l_queued = FALSE;
2558 com->obufs[1].l_queued = FALSE;
2559 if (com->state & CS_ODONE)
2560 com_events -= LOTS_OF_EVENTS;
2561 com->state &= ~(CS_ODONE | CS_BUSY);
2562 com->tp->t_state &= ~TS_BUSY;
2567 /* XXX avoid h/w bug. */
2570 sio_setreg(com, com_fifo,
2571 FIFO_RCV_RST | com->fifo_image);
2572 com_events -= (com->iptr - com->ibuf);
2573 com->iptr = com->ibuf;
2580 commctl(com, bits, how)
2589 bits = TIOCM_LE; /* XXX - always enabled while open */
2590 mcr = com->mcr_image;
2595 msr = com->prev_modem_status;
2603 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2604 * more volatile by reading the modem status a lot. Perhaps
2605 * we should latch both bits until the status is read here.
2607 if (msr & (MSR_RI | MSR_TERI))
2612 if (bits & TIOCM_DTR)
2614 if (bits & TIOCM_RTS)
2621 outb(com->modem_ctl_port,
2622 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2625 outb(com->modem_ctl_port, com->mcr_image |= mcr);
2628 outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2643 * Set our timeout period to 1 second if no polled devices are open.
2644 * Otherwise set it to max(1/200, 1/hz).
2645 * Enable timeouts iff some device is open.
2647 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2650 for (unit = 0; unit < sio_numunits; ++unit) {
2651 com = com_addr(unit);
2652 if (com != NULL && com->tp != NULL
2653 && com->tp->t_state & TS_ISOPEN && !com->gone) {
2655 if (com->poll || com->poll_output) {
2656 sio_timeout = hz > 200 ? hz / 200 : 1;
2662 sio_timeouts_until_log = hz / sio_timeout;
2663 sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2666 /* Flush error messages, if any. */
2667 sio_timeouts_until_log = 1;
2668 comwakeup((void *)NULL);
2669 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2680 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2683 * Recover from lost output interrupts.
2684 * Poll any lines that don't use interrupts.
2686 for (unit = 0; unit < sio_numunits; ++unit) {
2687 com = com_addr(unit);
2688 if (com != NULL && !com->gone
2689 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2697 * Check for and log errors, but not too often.
2699 if (--sio_timeouts_until_log > 0)
2701 sio_timeouts_until_log = hz / sio_timeout;
2702 for (unit = 0; unit < sio_numunits; ++unit) {
2705 com = com_addr(unit);
2710 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2715 delta = com->delta_error_counts[errnum];
2716 com->delta_error_counts[errnum] = 0;
2720 total = com->error_counts[errnum] += delta;
2721 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2722 unit, delta, error_desc[errnum],
2723 delta == 1 ? "" : "s", total);
2729 disc_optim(tp, t, com)
2734 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2735 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2736 && (!(t->c_iflag & PARMRK)
2737 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2738 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2739 && linesw[tp->t_line].l_rint == ttyinput)
2740 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2742 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2743 com->hotchar = linesw[tp->t_line].l_hotchar;
2747 * Following are all routines needed for SIO to act as console
2749 #include <sys/cons.h>
2759 static speed_t siocngetspeed (Port_t, u_long rclk);
2760 static void siocnclose (struct siocnstate *sp, Port_t iobase);
2761 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed);
2762 static void siocntxwait (Port_t iobase);
2764 static cn_probe_t siocnprobe;
2765 static cn_init_t siocninit;
2766 static cn_checkc_t siocncheckc;
2767 static cn_getc_t siocngetc;
2768 static cn_putc_t siocnputc;
2771 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc,
2775 /* To get the GDB related variables */
2777 #include <ddb/ddb.h>
2787 * Wait for any pending transmission to finish. Required to avoid
2788 * the UART lockup bug when the speed is changed, and for normal
2792 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2793 != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2798 * Read the serial port specified and try to figure out what speed
2799 * it's currently running at. We're assuming the serial port has
2800 * been initialized and is basicly idle. This routine is only intended
2801 * to be run at system startup.
2803 * If the value read from the serial port doesn't make sense, return 0.
2807 siocngetspeed(iobase, rclk)
2816 cfcr = inb(iobase + com_cfcr);
2817 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2819 dlbl = inb(iobase + com_dlbl);
2820 dlbh = inb(iobase + com_dlbh);
2822 outb(iobase + com_cfcr, cfcr);
2824 divisor = dlbh << 8 | dlbl;
2826 /* XXX there should be more sanity checking. */
2829 return (rclk / (16UL * divisor));
2833 siocnopen(sp, iobase, speed)
2834 struct siocnstate *sp;
2843 * Save all the device control registers except the fifo register
2844 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2845 * We can't save the fifo register since it is read-only.
2847 sp->ier = inb(iobase + com_ier);
2848 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */
2849 siocntxwait(iobase);
2850 sp->cfcr = inb(iobase + com_cfcr);
2851 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2852 sp->dlbl = inb(iobase + com_dlbl);
2853 sp->dlbh = inb(iobase + com_dlbh);
2855 * Only set the divisor registers if they would change, since on
2856 * some 16550 incompatibles (Startech), setting them clears the
2857 * data input register. This also reduces the effects of the
2860 divisor = siodivisor(comdefaultrclk, speed);
2861 dlbl = divisor & 0xFF;
2862 if (sp->dlbl != dlbl)
2863 outb(iobase + com_dlbl, dlbl);
2864 dlbh = divisor >> 8;
2865 if (sp->dlbh != dlbh)
2866 outb(iobase + com_dlbh, dlbh);
2867 outb(iobase + com_cfcr, CFCR_8BITS);
2868 sp->mcr = inb(iobase + com_mcr);
2870 * We don't want interrupts, but must be careful not to "disable"
2871 * them by clearing the MCR_IENABLE bit, since that might cause
2872 * an interrupt by floating the IRQ line.
2874 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2878 siocnclose(sp, iobase)
2879 struct siocnstate *sp;
2883 * Restore the device control registers.
2885 siocntxwait(iobase);
2886 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2887 if (sp->dlbl != inb(iobase + com_dlbl))
2888 outb(iobase + com_dlbl, sp->dlbl);
2889 if (sp->dlbh != inb(iobase + com_dlbh))
2890 outb(iobase + com_dlbh, sp->dlbh);
2891 outb(iobase + com_cfcr, sp->cfcr);
2893 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2895 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2896 outb(iobase + com_ier, sp->ier);
2907 struct siocnstate sp;
2910 * Find our first enabled console, if any. If it is a high-level
2911 * console device, then initialize it and return successfully.
2912 * If it is a low-level console device, then initialize it and
2913 * return unsuccessfully. It must be initialized in both cases
2914 * for early use by console drivers and debuggers. Initializing
2915 * the hardware is not necessary in all cases, since the i/o
2916 * routines initialize it on the fly, but it is necessary if
2917 * input might arrive while the hardware is switched back to an
2918 * uninitialized state. We can't handle multiple console devices
2919 * yet because our low-level routines don't take a device arg.
2920 * We trust the user to set the console flags properly so that we
2921 * don't need to probe.
2923 cp->cn_pri = CN_DEAD;
2925 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2928 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) {
2932 if (resource_int_value("sio", unit, "flags", &flags))
2934 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2938 if (resource_int_value("sio", unit, "port", &port))
2942 if (boothowto & RB_SERIAL) {
2944 siocngetspeed(iobase, comdefaultrclk);
2946 comdefaultrate = boot_speed;
2950 * Initialize the divisor latch. We can't rely on
2951 * siocnopen() to do this the first time, since it
2952 * avoids writing to the latch if the latch appears
2953 * to have the correct value. Also, if we didn't
2954 * just read the speed from the hardware, then we
2955 * need to set the speed in hardware so that
2956 * switching it later is null.
2958 cfcr = inb(iobase + com_cfcr);
2959 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2960 divisor = siodivisor(comdefaultrclk, comdefaultrate);
2961 outb(iobase + com_dlbl, divisor & 0xff);
2962 outb(iobase + com_dlbh, divisor >> 8);
2963 outb(iobase + com_cfcr, cfcr);
2965 siocnopen(&sp, iobase, comdefaultrate);
2968 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2969 cp->cn_dev = makedev(CDEV_MAJOR, unit);
2970 cp->cn_pri = COM_FORCECONSOLE(flags)
2971 || boothowto & RB_SERIAL
2972 ? CN_REMOTE : CN_NORMAL;
2973 siocniobase = iobase;
2976 if (COM_DEBUGGER(flags)) {
2977 printf("sio%d: gdb debugging port\n", unit);
2978 siogdbiobase = iobase;
2981 gdbdev = makedev(CDEV_MAJOR, unit);
2982 gdb_getc = siocngetc;
2983 gdb_putc = siocnputc;
2991 * XXX Ugly Compatability.
2992 * If no gdb port has been specified, set it to be the console
2993 * as some configuration files don't specify the gdb port.
2995 if (gdbdev == NODEV && (boothowto & RB_GDB)) {
2996 printf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2998 printf("Set flag 0x80 on desired GDB port in your\n");
2999 printf("configuration file (currently sio only).\n");
3000 siogdbiobase = siocniobase;
3001 siogdbunit = siocnunit;
3002 gdbdev = makedev(CDEV_MAJOR, siocnunit);
3003 gdb_getc = siocngetc;
3004 gdb_putc = siocnputc;
3012 CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL);
3015 siocnattach(port, speed)
3022 struct siocnstate sp;
3025 comdefaultrate = speed;
3026 sio_consdev.cn_pri = CN_NORMAL;
3027 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0);
3032 * Initialize the divisor latch. We can't rely on
3033 * siocnopen() to do this the first time, since it
3034 * avoids writing to the latch if the latch appears
3035 * to have the correct value. Also, if we didn't
3036 * just read the speed from the hardware, then we
3037 * need to set the speed in hardware so that
3038 * switching it later is null.
3040 cfcr = inb(siocniobase + com_cfcr);
3041 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
3042 divisor = siodivisor(comdefaultrclk, comdefaultrate);
3043 outb(siocniobase + com_dlbl, divisor & 0xff);
3044 outb(siocniobase + com_dlbh, divisor >> 8);
3045 outb(siocniobase + com_cfcr, cfcr);
3047 siocnopen(&sp, siocniobase, comdefaultrate);
3050 cn_tab = &sio_consdev;
3055 siogdbattach(port, speed)
3062 struct siocnstate sp;
3064 siogdbiobase = port;
3065 gdbdefaultrate = speed;
3070 * Initialize the divisor latch. We can't rely on
3071 * siocnopen() to do this the first time, since it
3072 * avoids writing to the latch if the latch appears
3073 * to have the correct value. Also, if we didn't
3074 * just read the speed from the hardware, then we
3075 * need to set the speed in hardware so that
3076 * switching it later is null.
3078 cfcr = inb(siogdbiobase + com_cfcr);
3079 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr);
3080 divisor = siodivisor(comdefaultrclk, gdbdefaultrate);
3081 outb(siogdbiobase + com_dlbl, divisor & 0xff);
3082 outb(siogdbiobase + com_dlbh, divisor >> 8);
3083 outb(siogdbiobase + com_cfcr, cfcr);
3085 siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3097 comconsole = DEV_TO_UNIT(cp->cn_dev);
3107 struct siocnstate sp;
3109 if (minor(dev) == siogdbunit)
3110 iobase = siogdbiobase;
3112 iobase = siocniobase;
3114 siocnopen(&sp, iobase, comdefaultrate);
3115 if (inb(iobase + com_lsr) & LSR_RXRDY)
3116 c = inb(iobase + com_data);
3119 siocnclose(&sp, iobase);
3132 struct siocnstate sp;
3134 if (minor(dev) == siogdbunit)
3135 iobase = siogdbiobase;
3137 iobase = siocniobase;
3139 siocnopen(&sp, iobase, comdefaultrate);
3140 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3142 c = inb(iobase + com_data);
3143 siocnclose(&sp, iobase);
3154 struct siocnstate sp;
3157 if (minor(dev) == siogdbunit)
3158 iobase = siogdbiobase;
3160 iobase = siocniobase;
3162 siocnopen(&sp, iobase, comdefaultrate);
3163 siocntxwait(iobase);
3164 outb(iobase + com_data, c);
3165 siocnclose(&sp, iobase);
3176 struct siocnstate sp;
3178 iobase = siogdbiobase;
3180 siocnopen(&sp, iobase, gdbdefaultrate);
3181 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3183 c = inb(iobase + com_data);
3184 siocnclose(&sp, iobase);
3194 struct siocnstate sp;
3197 siocnopen(&sp, siogdbiobase, gdbdefaultrate);
3198 siocntxwait(siogdbiobase);
3199 outb(siogdbiobase + com_data, c);
3200 siocnclose(&sp, siogdbiobase);
3205 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0);
3207 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0);
3210 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0);