sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2014, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/em/if_em.h>
 115
 116 #define DEBUG_HW 0
 117
 118 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 119 #define EM_VER  " 7.4.2"
 120
 121 #define _EM_DEVICE(id, ret)     \
 122         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 123 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 124 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 125 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 126
 127 static const struct em_vendor_info em_vendor_info_array[] = {
 128         EM_DEVICE(82540EM),
 129         EM_DEVICE(82540EM_LOM),
 130         EM_DEVICE(82540EP),
 131         EM_DEVICE(82540EP_LOM),
 132         EM_DEVICE(82540EP_LP),
 133
 134         EM_DEVICE(82541EI),
 135         EM_DEVICE(82541ER),
 136         EM_DEVICE(82541ER_LOM),
 137         EM_DEVICE(82541EI_MOBILE),
 138         EM_DEVICE(82541GI),
 139         EM_DEVICE(82541GI_LF),
 140         EM_DEVICE(82541GI_MOBILE),
 141
 142         EM_DEVICE(82542),
 143
 144         EM_DEVICE(82543GC_FIBER),
 145         EM_DEVICE(82543GC_COPPER),
 146
 147         EM_DEVICE(82544EI_COPPER),
 148         EM_DEVICE(82544EI_FIBER),
 149         EM_DEVICE(82544GC_COPPER),
 150         EM_DEVICE(82544GC_LOM),
 151
 152         EM_DEVICE(82545EM_COPPER),
 153         EM_DEVICE(82545EM_FIBER),
 154         EM_DEVICE(82545GM_COPPER),
 155         EM_DEVICE(82545GM_FIBER),
 156         EM_DEVICE(82545GM_SERDES),
 157
 158         EM_DEVICE(82546EB_COPPER),
 159         EM_DEVICE(82546EB_FIBER),
 160         EM_DEVICE(82546EB_QUAD_COPPER),
 161         EM_DEVICE(82546GB_COPPER),
 162         EM_DEVICE(82546GB_FIBER),
 163         EM_DEVICE(82546GB_SERDES),
 164         EM_DEVICE(82546GB_PCIE),
 165         EM_DEVICE(82546GB_QUAD_COPPER),
 166         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 167
 168         EM_DEVICE(82547EI),
 169         EM_DEVICE(82547EI_MOBILE),
 170         EM_DEVICE(82547GI),
 171
 172         EM_EMX_DEVICE(82571EB_COPPER),
 173         EM_EMX_DEVICE(82571EB_FIBER),
 174         EM_EMX_DEVICE(82571EB_SERDES),
 175         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 176         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 177         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 178         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 180         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 181         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 182
 183         EM_EMX_DEVICE(82572EI_COPPER),
 184         EM_EMX_DEVICE(82572EI_FIBER),
 185         EM_EMX_DEVICE(82572EI_SERDES),
 186         EM_EMX_DEVICE(82572EI),
 187
 188         EM_EMX_DEVICE(82573E),
 189         EM_EMX_DEVICE(82573E_IAMT),
 190         EM_EMX_DEVICE(82573L),
 191
 192         EM_DEVICE(82583V),
 193
 194         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 195         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 196         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 197         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 198
 199         EM_DEVICE(ICH8_IGP_M_AMT),
 200         EM_DEVICE(ICH8_IGP_AMT),
 201         EM_DEVICE(ICH8_IGP_C),
 202         EM_DEVICE(ICH8_IFE),
 203         EM_DEVICE(ICH8_IFE_GT),
 204         EM_DEVICE(ICH8_IFE_G),
 205         EM_DEVICE(ICH8_IGP_M),
 206         EM_DEVICE(ICH8_82567V_3),
 207
 208         EM_DEVICE(ICH9_IGP_M_AMT),
 209         EM_DEVICE(ICH9_IGP_AMT),
 210         EM_DEVICE(ICH9_IGP_C),
 211         EM_DEVICE(ICH9_IGP_M),
 212         EM_DEVICE(ICH9_IGP_M_V),
 213         EM_DEVICE(ICH9_IFE),
 214         EM_DEVICE(ICH9_IFE_GT),
 215         EM_DEVICE(ICH9_IFE_G),
 216         EM_DEVICE(ICH9_BM),
 217
 218         EM_EMX_DEVICE(82574L),
 219         EM_EMX_DEVICE(82574LA),
 220
 221         EM_DEVICE(ICH10_R_BM_LM),
 222         EM_DEVICE(ICH10_R_BM_LF),
 223         EM_DEVICE(ICH10_R_BM_V),
 224         EM_DEVICE(ICH10_D_BM_LM),
 225         EM_DEVICE(ICH10_D_BM_LF),
 226         EM_DEVICE(ICH10_D_BM_V),
 227
 228         EM_DEVICE(PCH_M_HV_LM),
 229         EM_DEVICE(PCH_M_HV_LC),
 230         EM_DEVICE(PCH_D_HV_DM),
 231         EM_DEVICE(PCH_D_HV_DC),
 232
 233         EM_DEVICE(PCH2_LV_LM),
 234         EM_DEVICE(PCH2_LV_V),
 235
 236         EM_EMX_DEVICE(PCH_LPT_I217_LM),
 237         EM_EMX_DEVICE(PCH_LPT_I217_V),
 238         EM_EMX_DEVICE(PCH_LPTLP_I218_LM),
 239         EM_EMX_DEVICE(PCH_LPTLP_I218_V),
 240         EM_EMX_DEVICE(PCH_I218_LM2),
 241         EM_EMX_DEVICE(PCH_I218_V2),
 242         EM_EMX_DEVICE(PCH_I218_LM3),
 243         EM_EMX_DEVICE(PCH_I218_V3),
 244
 245         /* required last entry */
 246         EM_DEVICE_NULL
 247 };
 248
 249 static int      em_probe(device_t);
 250 static int      em_attach(device_t);
 251 static int      em_detach(device_t);
 252 static int      em_shutdown(device_t);
 253 static int      em_suspend(device_t);
 254 static int      em_resume(device_t);
 255
 256 static void     em_init(void *);
 257 static void     em_stop(struct adapter *);
 258 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 259 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 260 #ifdef IFPOLL_ENABLE
 261 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 262 static void     em_npoll_compat(struct ifnet *, void *, int);
 263 #endif
 264 static void     em_watchdog(struct ifnet *);
 265 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 266 static int      em_media_change(struct ifnet *);
 267 static void     em_timer(void *);
 268
 269 static void     em_intr(void *);
 270 static void     em_intr_mask(void *);
 271 static void     em_intr_body(struct adapter *, boolean_t);
 272 static void     em_rxeof(struct adapter *, int);
 273 static void     em_txeof(struct adapter *);
 274 static void     em_tx_collect(struct adapter *);
 275 static void     em_tx_purge(struct adapter *);
 276 static void     em_enable_intr(struct adapter *);
 277 static void     em_disable_intr(struct adapter *);
 278
 279 static int      em_dma_malloc(struct adapter *, bus_size_t,
 280                     struct em_dma_alloc *);
 281 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 282 static void     em_init_tx_ring(struct adapter *);
 283 static int      em_init_rx_ring(struct adapter *);
 284 static int      em_create_tx_ring(struct adapter *);
 285 static int      em_create_rx_ring(struct adapter *);
 286 static void     em_destroy_tx_ring(struct adapter *, int);
 287 static void     em_destroy_rx_ring(struct adapter *, int);
 288 static int      em_newbuf(struct adapter *, int, int);
 289 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 290 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 291                     struct mbuf *);
 292 static int      em_txcsum(struct adapter *, struct mbuf *,
 293                     uint32_t *, uint32_t *);
 294 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 295 static int      em_tso_setup(struct adapter *, struct mbuf *,
 296                     uint32_t *, uint32_t *);
 297
 298 static int      em_get_hw_info(struct adapter *);
 299 static int      em_is_valid_eaddr(const uint8_t *);
 300 static int      em_alloc_pci_res(struct adapter *);
 301 static void     em_free_pci_res(struct adapter *);
 302 static int      em_reset(struct adapter *);
 303 static void     em_setup_ifp(struct adapter *);
 304 static void     em_init_tx_unit(struct adapter *);
 305 static void     em_init_rx_unit(struct adapter *);
 306 static void     em_update_stats(struct adapter *);
 307 static void     em_set_promisc(struct adapter *);
 308 static void     em_disable_promisc(struct adapter *);
 309 static void     em_set_multi(struct adapter *);
 310 static void     em_update_link_status(struct adapter *);
 311 static void     em_smartspeed(struct adapter *);
 312 static void     em_set_itr(struct adapter *, uint32_t);
 313 static void     em_disable_aspm(struct adapter *);
 314
 315 /* Hardware workarounds */
 316 static int      em_82547_fifo_workaround(struct adapter *, int);
 317 static void     em_82547_update_fifo_head(struct adapter *, int);
 318 static int      em_82547_tx_fifo_reset(struct adapter *);
 319 static void     em_82547_move_tail(void *);
 320 static void     em_82547_move_tail_serialized(struct adapter *);
 321 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 322
 323 static void     em_print_debug_info(struct adapter *);
 324 static void     em_print_nvm_info(struct adapter *);
 325 static void     em_print_hw_stats(struct adapter *);
 326
 327 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 328 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 329 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 330 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 331 static void     em_add_sysctl(struct adapter *adapter);
 332
 333 /* Management and WOL Support */
 334 static void     em_get_mgmt(struct adapter *);
 335 static void     em_rel_mgmt(struct adapter *);
 336 static void     em_get_hw_control(struct adapter *);
 337 static void     em_rel_hw_control(struct adapter *);
 338 static void     em_enable_wol(device_t);
 339
 340 static device_method_t em_methods[] = {
 341         /* Device interface */
 342         DEVMETHOD(device_probe,         em_probe),
 343         DEVMETHOD(device_attach,        em_attach),
 344         DEVMETHOD(device_detach,        em_detach),
 345         DEVMETHOD(device_shutdown,      em_shutdown),
 346         DEVMETHOD(device_suspend,       em_suspend),
 347         DEVMETHOD(device_resume,        em_resume),
 348         DEVMETHOD_END
 349 };
 350
 351 static driver_t em_driver = {
 352         "em",
 353         em_methods,
 354         sizeof(struct adapter),
 355 };
 356
 357 static devclass_t em_devclass;
 358
 359 DECLARE_DUMMY_MODULE(if_em);
 360 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 361 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 362
 363 /*
 364  * Tunables
 365  */
 366 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 367 static int      em_rxd = EM_DEFAULT_RXD;
 368 static int      em_txd = EM_DEFAULT_TXD;
 369 static int      em_smart_pwr_down = 0;
 370
 371 /* Controls whether promiscuous also shows bad packets */
 372 static int      em_debug_sbp = FALSE;
 373
 374 static int      em_82573_workaround = 1;
 375 static int      em_msi_enable = 1;
 376
 377 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 378 TUNABLE_INT("hw.em.rxd", &em_rxd);
 379 TUNABLE_INT("hw.em.txd", &em_txd);
 380 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 381 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 382 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 383 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 384
 385 /* Global used in WOL setup with multiport cards */
 386 static int      em_global_quad_port_a = 0;
 387
 388 /* Set this to one to display debug statistics */
 389 static int      em_display_debug_stats = 0;
 390
 391 #if !defined(KTR_IF_EM)
 392 #define KTR_IF_EM       KTR_ALL
 393 #endif
 394 KTR_INFO_MASTER(if_em);
 395 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 396 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 397 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 398 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 399 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 400 #define logif(name)     KTR_LOG(if_em_ ## name)
 401
 402 static int
 403 em_probe(device_t dev)
 404 {
 405         const struct em_vendor_info *ent;
 406         uint16_t vid, did;
 407
 408         vid = pci_get_vendor(dev);
 409         did = pci_get_device(dev);
 410
 411         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 412                 if (vid == ent->vendor_id && did == ent->device_id) {
 413                         device_set_desc(dev, ent->desc);
 414                         device_set_async_attach(dev, TRUE);
 415                         return (ent->ret);
 416                 }
 417         }
 418         return (ENXIO);
 419 }
 420
 421 static int
 422 em_attach(device_t dev)
 423 {
 424         struct adapter *adapter = device_get_softc(dev);
 425         struct ifnet *ifp = &adapter->arpcom.ac_if;
 426         int tsize, rsize;
 427         int error = 0;
 428         uint16_t eeprom_data, device_id, apme_mask;
 429         driver_intr_t *intr_func;
 430
 431         adapter->dev = adapter->osdep.dev = dev;
 432
 433         callout_init_mp(&adapter->timer);
 434         callout_init_mp(&adapter->tx_fifo_timer);
 435
 436         ifmedia_init(&adapter->media, IFM_IMASK,
 437             em_media_change, em_media_status);
 438
 439         /* Determine hardware and mac info */
 440         error = em_get_hw_info(adapter);
 441         if (error) {
 442                 device_printf(dev, "Identify hardware failed\n");
 443                 goto fail;
 444         }
 445
 446         /* Setup PCI resources */
 447         error = em_alloc_pci_res(adapter);
 448         if (error) {
 449                 device_printf(dev, "Allocation of PCI resources failed\n");
 450                 goto fail;
 451         }
 452
 453         /*
 454          * For ICH8 and family we need to map the flash memory,
 455          * and this must happen after the MAC is identified.
 456          */
 457         if (adapter->hw.mac.type == e1000_ich8lan ||
 458             adapter->hw.mac.type == e1000_ich9lan ||
 459             adapter->hw.mac.type == e1000_ich10lan ||
 460             adapter->hw.mac.type == e1000_pchlan ||
 461             adapter->hw.mac.type == e1000_pch2lan ||
 462             adapter->hw.mac.type == e1000_pch_lpt) {
 463                 adapter->flash_rid = EM_BAR_FLASH;
 464
 465                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 466                                         &adapter->flash_rid, RF_ACTIVE);
 467                 if (adapter->flash == NULL) {
 468                         device_printf(dev, "Mapping of Flash failed\n");
 469                         error = ENXIO;
 470                         goto fail;
 471                 }
 472                 adapter->osdep.flash_bus_space_tag =
 473                     rman_get_bustag(adapter->flash);
 474                 adapter->osdep.flash_bus_space_handle =
 475                     rman_get_bushandle(adapter->flash);
 476
 477                 /*
 478                  * This is used in the shared code
 479                  * XXX this goof is actually not used.
 480                  */
 481                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 482         }
 483
 484         switch (adapter->hw.mac.type) {
 485         case e1000_82571:
 486         case e1000_82572:
 487         case e1000_pch_lpt:
 488                 /*
 489                  * Pullup extra 4bytes into the first data segment for
 490                  * TSO, see:
 491                  * 82571/82572 specification update errata #7
 492                  *
 493                  * Same applies to I217 (and maybe I218).
 494                  *
 495                  * NOTE:
 496                  * 4bytes instead of 2bytes, which are mentioned in the
 497                  * errata, are pulled; mainly to keep rest of the data
 498                  * properly aligned.
 499                  */
 500                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 501                 /* FALL THROUGH */
 502
 503         default:
 504                 if (pci_is_pcie(dev))
 505                         adapter->flags |= EM_FLAG_TSO;
 506                 break;
 507         }
 508
 509         /* Do Shared Code initialization */
 510         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 511                 device_printf(dev, "Setup of Shared code failed\n");
 512                 error = ENXIO;
 513                 goto fail;
 514         }
 515
 516         e1000_get_bus_info(&adapter->hw);
 517
 518         /*
 519          * Validate number of transmit and receive descriptors.  It
 520          * must not exceed hardware maximum, and must be multiple
 521          * of E1000_DBA_ALIGN.
 522          */
 523         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 524             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 525             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 526             em_txd < EM_MIN_TXD) {
 527                 if (adapter->hw.mac.type < e1000_82544)
 528                         adapter->num_tx_desc = EM_MAX_TXD_82543;
 529                 else
 530                         adapter->num_tx_desc = EM_DEFAULT_TXD;
 531                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 532                     adapter->num_tx_desc, em_txd);
 533         } else {
 534                 adapter->num_tx_desc = em_txd;
 535         }
 536         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 537             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 538             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 539             em_rxd < EM_MIN_RXD) {
 540                 if (adapter->hw.mac.type < e1000_82544)
 541                         adapter->num_rx_desc = EM_MAX_RXD_82543;
 542                 else
 543                         adapter->num_rx_desc = EM_DEFAULT_RXD;
 544                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 545                     adapter->num_rx_desc, em_rxd);
 546         } else {
 547                 adapter->num_rx_desc = em_rxd;
 548         }
 549
 550         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 551         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 552         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 553         adapter->rx_buffer_len = MCLBYTES;
 554
 555         /*
 556          * Interrupt throttle rate
 557          */
 558         if (em_int_throttle_ceil == 0) {
 559                 adapter->int_throttle_ceil = 0;
 560         } else {
 561                 int throttle = em_int_throttle_ceil;
 562
 563                 if (throttle < 0)
 564                         throttle = EM_DEFAULT_ITR;
 565
 566                 /* Recalculate the tunable value to get the exact frequency. */
 567                 throttle = 1000000000 / 256 / throttle;
 568
 569                 /* Upper 16bits of ITR is reserved and should be zero */
 570                 if (throttle & 0xffff0000)
 571                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 572
 573                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 574         }
 575
 576         e1000_init_script_state_82541(&adapter->hw, TRUE);
 577         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 578
 579         /* Copper options */
 580         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 581                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 582                 adapter->hw.phy.disable_polarity_correction = FALSE;
 583                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 584         }
 585
 586         /* Set the frame limits assuming standard ethernet sized frames. */
 587         adapter->hw.mac.max_frame_size =
 588             ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 589         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 590
 591         /* This controls when hardware reports transmit completion status. */
 592         adapter->hw.mac.report_tx_early = 1;
 593
 594         /*
 595          * Create top level busdma tag
 596          */
 597         error = bus_dma_tag_create(NULL, 1, 0,
 598                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 599                         NULL, NULL,
 600                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 601                         0, &adapter->parent_dtag);
 602         if (error) {
 603                 device_printf(dev, "could not create top level DMA tag\n");
 604                 goto fail;
 605         }
 606
 607         /*
 608          * Allocate Transmit Descriptor ring
 609          */
 610         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 611                          EM_DBA_ALIGN);
 612         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 613         if (error) {
 614                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 615                 goto fail;
 616         }
 617         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 618
 619         /*
 620          * Allocate Receive Descriptor ring
 621          */
 622         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 623                          EM_DBA_ALIGN);
 624         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 625         if (error) {
 626                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 627                 goto fail;
 628         }
 629         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 630
 631         /* Allocate multicast array memory. */
 632         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 633             M_DEVBUF, M_WAITOK);
 634
 635         /* Indicate SOL/IDER usage */
 636         if (e1000_check_reset_block(&adapter->hw)) {
 637                 device_printf(dev,
 638                     "PHY reset is blocked due to SOL/IDER session.\n");
 639         }
 640
 641         /* Disable EEE */
 642         adapter->hw.dev_spec.ich8lan.eee_disable = 1;
 643
 644         /*
 645          * Start from a known state, this is important in reading the
 646          * nvm and mac from that.
 647          */
 648         e1000_reset_hw(&adapter->hw);
 649
 650         /* Make sure we have a good EEPROM before we read from it */
 651         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 652                 /*
 653                  * Some PCI-E parts fail the first check due to
 654                  * the link being in sleep state, call it again,
 655                  * if it fails a second time its a real issue.
 656                  */
 657                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 658                         device_printf(dev,
 659                             "The EEPROM Checksum Is Not Valid\n");
 660                         error = EIO;
 661                         goto fail;
 662                 }
 663         }
 664
 665         /* Copy the permanent MAC address out of the EEPROM */
 666         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 667                 device_printf(dev, "EEPROM read error while reading MAC"
 668                     " address\n");
 669                 error = EIO;
 670                 goto fail;
 671         }
 672         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 673                 device_printf(dev, "Invalid MAC address\n");
 674                 error = EIO;
 675                 goto fail;
 676         }
 677
 678         /* Disable ULP support */
 679         e1000_disable_ulp_lpt_lp(&adapter->hw, TRUE);
 680
 681         /* Allocate transmit descriptors and buffers */
 682         error = em_create_tx_ring(adapter);
 683         if (error) {
 684                 device_printf(dev, "Could not setup transmit structures\n");
 685                 goto fail;
 686         }
 687
 688         /* Allocate receive descriptors and buffers */
 689         error = em_create_rx_ring(adapter);
 690         if (error) {
 691                 device_printf(dev, "Could not setup receive structures\n");
 692                 goto fail;
 693         }
 694
 695         /* Manually turn off all interrupts */
 696         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 697
 698         /* Determine if we have to control management hardware */
 699         if (e1000_enable_mng_pass_thru(&adapter->hw))
 700                 adapter->flags |= EM_FLAG_HAS_MGMT;
 701
 702         /*
 703          * Setup Wake-on-Lan
 704          */
 705         apme_mask = EM_EEPROM_APME;
 706         eeprom_data = 0;
 707         switch (adapter->hw.mac.type) {
 708         case e1000_82542:
 709         case e1000_82543:
 710                 break;
 711
 712         case e1000_82573:
 713         case e1000_82583:
 714                 adapter->flags |= EM_FLAG_HAS_AMT;
 715                 /* FALL THROUGH */
 716
 717         case e1000_82546:
 718         case e1000_82546_rev_3:
 719         case e1000_82571:
 720         case e1000_82572:
 721         case e1000_80003es2lan:
 722                 if (adapter->hw.bus.func == 1) {
 723                         e1000_read_nvm(&adapter->hw,
 724                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 725                 } else {
 726                         e1000_read_nvm(&adapter->hw,
 727                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 728                 }
 729                 break;
 730
 731         case e1000_ich8lan:
 732         case e1000_ich9lan:
 733         case e1000_ich10lan:
 734         case e1000_pchlan:
 735         case e1000_pch2lan:
 736                 apme_mask = E1000_WUC_APME;
 737                 adapter->flags |= EM_FLAG_HAS_AMT;
 738                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 739                 break;
 740
 741         default:
 742                 e1000_read_nvm(&adapter->hw,
 743                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 744                 break;
 745         }
 746         if (eeprom_data & apme_mask)
 747                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 748
 749         /*
 750          * We have the eeprom settings, now apply the special cases
 751          * where the eeprom may be wrong or the board won't support
 752          * wake on lan on a particular port
 753          */
 754         device_id = pci_get_device(dev);
 755         switch (device_id) {
 756         case E1000_DEV_ID_82546GB_PCIE:
 757                 adapter->wol = 0;
 758                 break;
 759
 760         case E1000_DEV_ID_82546EB_FIBER:
 761         case E1000_DEV_ID_82546GB_FIBER:
 762         case E1000_DEV_ID_82571EB_FIBER:
 763                 /*
 764                  * Wake events only supported on port A for dual fiber
 765                  * regardless of eeprom setting
 766                  */
 767                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 768                     E1000_STATUS_FUNC_1)
 769                         adapter->wol = 0;
 770                 break;
 771
 772         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 773         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 774         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 775         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 776                 /* if quad port adapter, disable WoL on all but port A */
 777                 if (em_global_quad_port_a != 0)
 778                         adapter->wol = 0;
 779                 /* Reset for multiple quad port adapters */
 780                 if (++em_global_quad_port_a == 4)
 781                         em_global_quad_port_a = 0;
 782                 break;
 783         }
 784
 785         /* XXX disable wol */
 786         adapter->wol = 0;
 787
 788         /* Setup OS specific network interface */
 789         em_setup_ifp(adapter);
 790
 791         /* Add sysctl tree, must after em_setup_ifp() */
 792         em_add_sysctl(adapter);
 793
 794 #ifdef IFPOLL_ENABLE
 795         /* Polling setup */
 796         ifpoll_compat_setup(&adapter->npoll,
 797             device_get_sysctl_ctx(dev), device_get_sysctl_tree(dev),
 798             device_get_unit(dev), ifp->if_serializer);
 799 #endif
 800
 801         /* Reset the hardware */
 802         error = em_reset(adapter);
 803         if (error) {
 804                 /*
 805                  * Some 82573 parts fail the first reset, call it again,
 806                  * if it fails a second time its a real issue.
 807                  */
 808                 error = em_reset(adapter);
 809                 if (error) {
 810                         device_printf(dev, "Unable to reset the hardware\n");
 811                         ether_ifdetach(ifp);
 812                         goto fail;
 813                 }
 814         }
 815
 816         /* Initialize statistics */
 817         em_update_stats(adapter);
 818
 819         adapter->hw.mac.get_link_status = 1;
 820         em_update_link_status(adapter);
 821
 822         /* Do we need workaround for 82544 PCI-X adapter? */
 823         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 824             adapter->hw.mac.type == e1000_82544)
 825                 adapter->pcix_82544 = TRUE;
 826         else
 827                 adapter->pcix_82544 = FALSE;
 828
 829         if (adapter->pcix_82544) {
 830                 /*
 831                  * 82544 on PCI-X may split one TX segment
 832                  * into two TX descs, so we double its number
 833                  * of spare TX desc here.
 834                  */
 835                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 836         } else {
 837                 adapter->spare_tx_desc = EM_TX_SPARE;
 838         }
 839         if (adapter->flags & EM_FLAG_TSO)
 840                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 841         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 842
 843         /*
 844          * Keep following relationship between spare_tx_desc, oact_tx_desc
 845          * and tx_int_nsegs:
 846          * (spare_tx_desc + EM_TX_RESERVED) <=
 847          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 848          */
 849         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 850         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 851                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 852         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 853                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 854
 855         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 856         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 857                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 858
 859         /* Non-AMT based hardware can now take control from firmware */
 860         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 861             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 862                 em_get_hw_control(adapter);
 863
 864         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 865
 866         /*
 867          * Missing Interrupt Following ICR read:
 868          *
 869          * 82571/82572 specification update errata #76
 870          * 82573 specification update errata #31
 871          * 82574 specification update errata #12
 872          * 82583 specification update errata #4
 873          */
 874         intr_func = em_intr;
 875         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 876             (adapter->hw.mac.type == e1000_82571 ||
 877              adapter->hw.mac.type == e1000_82572 ||
 878              adapter->hw.mac.type == e1000_82573 ||
 879              adapter->hw.mac.type == e1000_82574 ||
 880              adapter->hw.mac.type == e1000_82583))
 881                 intr_func = em_intr_mask;
 882
 883         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 884                                intr_func, adapter, &adapter->intr_tag,
 885                                ifp->if_serializer);
 886         if (error) {
 887                 device_printf(dev, "Failed to register interrupt handler");
 888                 ether_ifdetach(ifp);
 889                 goto fail;
 890         }
 891         return (0);
 892 fail:
 893         em_detach(dev);
 894         return (error);
 895 }
 896
 897 static int
 898 em_detach(device_t dev)
 899 {
 900         struct adapter *adapter = device_get_softc(dev);
 901
 902         if (device_is_attached(dev)) {
 903                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 904
 905                 lwkt_serialize_enter(ifp->if_serializer);
 906
 907                 em_stop(adapter);
 908
 909                 e1000_phy_hw_reset(&adapter->hw);
 910
 911                 em_rel_mgmt(adapter);
 912                 em_rel_hw_control(adapter);
 913
 914                 if (adapter->wol) {
 915                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 916                                         E1000_WUC_PME_EN);
 917                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 918                         em_enable_wol(dev);
 919                 }
 920
 921                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 922
 923                 lwkt_serialize_exit(ifp->if_serializer);
 924
 925                 ether_ifdetach(ifp);
 926         } else if (adapter->memory != NULL) {
 927                 em_rel_hw_control(adapter);
 928         }
 929
 930         ifmedia_removeall(&adapter->media);
 931         bus_generic_detach(dev);
 932
 933         em_free_pci_res(adapter);
 934
 935         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 936         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 937
 938         /* Free Transmit Descriptor ring */
 939         if (adapter->tx_desc_base)
 940                 em_dma_free(adapter, &adapter->txdma);
 941
 942         /* Free Receive Descriptor ring */
 943         if (adapter->rx_desc_base)
 944                 em_dma_free(adapter, &adapter->rxdma);
 945
 946         /* Free top level busdma tag */
 947         if (adapter->parent_dtag != NULL)
 948                 bus_dma_tag_destroy(adapter->parent_dtag);
 949
 950         if (adapter->mta != NULL)
 951                 kfree(adapter->mta, M_DEVBUF);
 952
 953         return (0);
 954 }
 955
 956 static int
 957 em_shutdown(device_t dev)
 958 {
 959         return em_suspend(dev);
 960 }
 961
 962 static int
 963 em_suspend(device_t dev)
 964 {
 965         struct adapter *adapter = device_get_softc(dev);
 966         struct ifnet *ifp = &adapter->arpcom.ac_if;
 967
 968         lwkt_serialize_enter(ifp->if_serializer);
 969
 970         em_stop(adapter);
 971
 972         em_rel_mgmt(adapter);
 973         em_rel_hw_control(adapter);
 974
 975         if (adapter->wol) {
 976                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 977                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 978                 em_enable_wol(dev);
 979         }
 980
 981         lwkt_serialize_exit(ifp->if_serializer);
 982
 983         return bus_generic_suspend(dev);
 984 }
 985
 986 static int
 987 em_resume(device_t dev)
 988 {
 989         struct adapter *adapter = device_get_softc(dev);
 990         struct ifnet *ifp = &adapter->arpcom.ac_if;
 991
 992         lwkt_serialize_enter(ifp->if_serializer);
 993
 994         if (adapter->hw.mac.type == e1000_pch2lan)
 995                 e1000_resume_workarounds_pchlan(&adapter->hw);
 996
 997         em_init(adapter);
 998         em_get_mgmt(adapter);
 999         if_devstart(ifp);
1000
1001         lwkt_serialize_exit(ifp->if_serializer);
1002
1003         return bus_generic_resume(dev);
1004 }
1005
1006 static void
1007 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1008 {
1009         struct adapter *adapter = ifp->if_softc;
1010         struct mbuf *m_head;
1011         int idx = -1, nsegs = 0;
1012
1013         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1014         ASSERT_SERIALIZED(ifp->if_serializer);
1015
1016         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1017                 return;
1018
1019         if (!adapter->link_active) {
1020                 ifq_purge(&ifp->if_snd);
1021                 return;
1022         }
1023
1024         while (!ifq_is_empty(&ifp->if_snd)) {
1025                 /* Now do we at least have a minimal? */
1026                 if (EM_IS_OACTIVE(adapter)) {
1027                         em_tx_collect(adapter);
1028                         if (EM_IS_OACTIVE(adapter)) {
1029                                 ifq_set_oactive(&ifp->if_snd);
1030                                 adapter->no_tx_desc_avail1++;
1031                                 break;
1032                         }
1033                 }
1034
1035                 logif(pkt_txqueue);
1036                 m_head = ifq_dequeue(&ifp->if_snd);
1037                 if (m_head == NULL)
1038                         break;
1039
1040                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1041                         IFNET_STAT_INC(ifp, oerrors, 1);
1042                         em_tx_collect(adapter);
1043                         continue;
1044                 }
1045
1046                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1047                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1048                         nsegs = 0;
1049                         idx = -1;
1050                 }
1051
1052                 /* Send a copy of the frame to the BPF listener */
1053                 ETHER_BPF_MTAP(ifp, m_head);
1054
1055                 /* Set timeout in case hardware has problems transmitting. */
1056                 ifp->if_timer = EM_TX_TIMEOUT;
1057         }
1058         if (idx >= 0)
1059                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1060 }
1061
1062 static int
1063 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1064 {
1065         struct adapter *adapter = ifp->if_softc;
1066         struct ifreq *ifr = (struct ifreq *)data;
1067         uint16_t eeprom_data = 0;
1068         int max_frame_size, mask, reinit;
1069         int error = 0;
1070
1071         ASSERT_SERIALIZED(ifp->if_serializer);
1072
1073         switch (command) {
1074         case SIOCSIFMTU:
1075                 switch (adapter->hw.mac.type) {
1076                 case e1000_82573:
1077                         /*
1078                          * 82573 only supports jumbo frames
1079                          * if ASPM is disabled.
1080                          */
1081                         e1000_read_nvm(&adapter->hw,
1082                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1083                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1084                                 max_frame_size = ETHER_MAX_LEN;
1085                                 break;
1086                         }
1087                         /* FALL THROUGH */
1088
1089                 /* Limit Jumbo Frame size */
1090                 case e1000_82571:
1091                 case e1000_82572:
1092                 case e1000_ich9lan:
1093                 case e1000_ich10lan:
1094                 case e1000_pch2lan:
1095                 case e1000_pch_lpt:
1096                 case e1000_82574:
1097                 case e1000_82583:
1098                 case e1000_80003es2lan:
1099                         max_frame_size = 9234;
1100                         break;
1101
1102                 case e1000_pchlan:
1103                         max_frame_size = 4096;
1104                         break;
1105
1106                 /* Adapters that do not support jumbo frames */
1107                 case e1000_82542:
1108                 case e1000_ich8lan:
1109                         max_frame_size = ETHER_MAX_LEN;
1110                         break;
1111
1112                 default:
1113                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1114                         break;
1115                 }
1116                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1117                     ETHER_CRC_LEN) {
1118                         error = EINVAL;
1119                         break;
1120                 }
1121
1122                 ifp->if_mtu = ifr->ifr_mtu;
1123                 adapter->hw.mac.max_frame_size =
1124                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1125
1126                 if (ifp->if_flags & IFF_RUNNING)
1127                         em_init(adapter);
1128                 break;
1129
1130         case SIOCSIFFLAGS:
1131                 if (ifp->if_flags & IFF_UP) {
1132                         if ((ifp->if_flags & IFF_RUNNING)) {
1133                                 if ((ifp->if_flags ^ adapter->if_flags) &
1134                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1135                                         em_disable_promisc(adapter);
1136                                         em_set_promisc(adapter);
1137                                 }
1138                         } else {
1139                                 em_init(adapter);
1140                         }
1141                 } else if (ifp->if_flags & IFF_RUNNING) {
1142                         em_stop(adapter);
1143                 }
1144                 adapter->if_flags = ifp->if_flags;
1145                 break;
1146
1147         case SIOCADDMULTI:
1148         case SIOCDELMULTI:
1149                 if (ifp->if_flags & IFF_RUNNING) {
1150                         em_disable_intr(adapter);
1151                         em_set_multi(adapter);
1152                         if (adapter->hw.mac.type == e1000_82542 &&
1153                             adapter->hw.revision_id == E1000_REVISION_2)
1154                                 em_init_rx_unit(adapter);
1155 #ifdef IFPOLL_ENABLE
1156                         if (!(ifp->if_flags & IFF_NPOLLING))
1157 #endif
1158                                 em_enable_intr(adapter);
1159                 }
1160                 break;
1161
1162         case SIOCSIFMEDIA:
1163                 /* Check SOL/IDER usage */
1164                 if (e1000_check_reset_block(&adapter->hw)) {
1165                         device_printf(adapter->dev, "Media change is"
1166                             " blocked due to SOL/IDER session.\n");
1167                         break;
1168                 }
1169                 /* FALL THROUGH */
1170
1171         case SIOCGIFMEDIA:
1172                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1173                 break;
1174
1175         case SIOCSIFCAP:
1176                 reinit = 0;
1177                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1178                 if (mask & IFCAP_RXCSUM) {
1179                         ifp->if_capenable ^= IFCAP_RXCSUM;
1180                         reinit = 1;
1181                 }
1182                 if (mask & IFCAP_TXCSUM) {
1183                         ifp->if_capenable ^= IFCAP_TXCSUM;
1184                         if (ifp->if_capenable & IFCAP_TXCSUM)
1185                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1186                         else
1187                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1188                 }
1189                 if (mask & IFCAP_TSO) {
1190                         ifp->if_capenable ^= IFCAP_TSO;
1191                         if (ifp->if_capenable & IFCAP_TSO)
1192                                 ifp->if_hwassist |= CSUM_TSO;
1193                         else
1194                                 ifp->if_hwassist &= ~CSUM_TSO;
1195                 }
1196                 if (mask & IFCAP_VLAN_HWTAGGING) {
1197                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1198                         reinit = 1;
1199                 }
1200                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1201                         em_init(adapter);
1202                 break;
1203
1204         default:
1205                 error = ether_ioctl(ifp, command, data);
1206                 break;
1207         }
1208         return (error);
1209 }
1210
1211 static void
1212 em_watchdog(struct ifnet *ifp)
1213 {
1214         struct adapter *adapter = ifp->if_softc;
1215
1216         ASSERT_SERIALIZED(ifp->if_serializer);
1217
1218         /*
1219          * The timer is set to 5 every time start queues a packet.
1220          * Then txeof keeps resetting it as long as it cleans at
1221          * least one descriptor.
1222          * Finally, anytime all descriptors are clean the timer is
1223          * set to 0.
1224          */
1225
1226         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1227             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1228                 /*
1229                  * If we reach here, all TX jobs are completed and
1230                  * the TX engine should have been idled for some time.
1231                  * We don't need to call if_devstart() here.
1232                  */
1233                 ifq_clr_oactive(&ifp->if_snd);
1234                 ifp->if_timer = 0;
1235                 return;
1236         }
1237
1238         /*
1239          * If we are in this routine because of pause frames, then
1240          * don't reset the hardware.
1241          */
1242         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1243             E1000_STATUS_TXOFF) {
1244                 ifp->if_timer = EM_TX_TIMEOUT;
1245                 return;
1246         }
1247
1248         if (e1000_check_for_link(&adapter->hw) == 0)
1249                 if_printf(ifp, "watchdog timeout -- resetting\n");
1250
1251         IFNET_STAT_INC(ifp, oerrors, 1);
1252         adapter->watchdog_events++;
1253
1254         em_init(adapter);
1255
1256         if (!ifq_is_empty(&ifp->if_snd))
1257                 if_devstart(ifp);
1258 }
1259
1260 static void
1261 em_init(void *xsc)
1262 {
1263         struct adapter *adapter = xsc;
1264         struct ifnet *ifp = &adapter->arpcom.ac_if;
1265         device_t dev = adapter->dev;
1266
1267         ASSERT_SERIALIZED(ifp->if_serializer);
1268
1269         em_stop(adapter);
1270
1271         /* Get the latest mac address, User can use a LAA */
1272         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1273
1274         /* Put the address into the Receive Address Array */
1275         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1276
1277         /*
1278          * With the 82571 adapter, RAR[0] may be overwritten
1279          * when the other port is reset, we make a duplicate
1280          * in RAR[14] for that eventuality, this assures
1281          * the interface continues to function.
1282          */
1283         if (adapter->hw.mac.type == e1000_82571) {
1284                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1285                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1286                     E1000_RAR_ENTRIES - 1);
1287         }
1288
1289         /* Reset the hardware */
1290         if (em_reset(adapter)) {
1291                 device_printf(dev, "Unable to reset the hardware\n");
1292                 /* XXX em_stop()? */
1293                 return;
1294         }
1295         em_update_link_status(adapter);
1296
1297         /* Setup VLAN support, basic and offload if available */
1298         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1299
1300         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1301                 uint32_t ctrl;
1302
1303                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1304                 ctrl |= E1000_CTRL_VME;
1305                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1306         }
1307
1308         /* Configure for OS presence */
1309         em_get_mgmt(adapter);
1310
1311         /* Prepare transmit descriptors and buffers */
1312         em_init_tx_ring(adapter);
1313         em_init_tx_unit(adapter);
1314
1315         /* Setup Multicast table */
1316         em_set_multi(adapter);
1317
1318         /* Prepare receive descriptors and buffers */
1319         if (em_init_rx_ring(adapter)) {
1320                 device_printf(dev, "Could not setup receive structures\n");
1321                 em_stop(adapter);
1322                 return;
1323         }
1324         em_init_rx_unit(adapter);
1325
1326         /* Don't lose promiscuous settings */
1327         em_set_promisc(adapter);
1328
1329         ifp->if_flags |= IFF_RUNNING;
1330         ifq_clr_oactive(&ifp->if_snd);
1331
1332         callout_reset(&adapter->timer, hz, em_timer, adapter);
1333         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1334
1335         /* MSI/X configuration for 82574 */
1336         if (adapter->hw.mac.type == e1000_82574) {
1337                 int tmp;
1338
1339                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1340                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1341                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1342                 /*
1343                  * XXX MSIX
1344                  * Set the IVAR - interrupt vector routing.
1345                  * Each nibble represents a vector, high bit
1346                  * is enable, other 3 bits are the MSIX table
1347                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1348                  * Link (other) to 2, hence the magic number.
1349                  */
1350                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1351         }
1352
1353 #ifdef IFPOLL_ENABLE
1354         /*
1355          * Only enable interrupts if we are not polling, make sure
1356          * they are off otherwise.
1357          */
1358         if (ifp->if_flags & IFF_NPOLLING)
1359                 em_disable_intr(adapter);
1360         else
1361 #endif /* IFPOLL_ENABLE */
1362                 em_enable_intr(adapter);
1363
1364         /* AMT based hardware can now take control from firmware */
1365         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1366             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1367             adapter->hw.mac.type >= e1000_82571)
1368                 em_get_hw_control(adapter);
1369 }
1370
1371 #ifdef IFPOLL_ENABLE
1372
1373 static void
1374 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1375 {
1376         struct adapter *adapter = ifp->if_softc;
1377
1378         ASSERT_SERIALIZED(ifp->if_serializer);
1379
1380         if (adapter->npoll.ifpc_stcount-- == 0) {
1381                 uint32_t reg_icr;
1382
1383                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1384
1385                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1386                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1387                         callout_stop(&adapter->timer);
1388                         adapter->hw.mac.get_link_status = 1;
1389                         em_update_link_status(adapter);
1390                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1391                 }
1392         }
1393
1394         em_rxeof(adapter, count);
1395         em_txeof(adapter);
1396
1397         if (!ifq_is_empty(&ifp->if_snd))
1398                 if_devstart(ifp);
1399 }
1400
1401 static void
1402 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1403 {
1404         struct adapter *adapter = ifp->if_softc;
1405
1406         ASSERT_SERIALIZED(ifp->if_serializer);
1407
1408         if (info != NULL) {
1409                 int cpuid = adapter->npoll.ifpc_cpuid;
1410
1411                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1412                 info->ifpi_rx[cpuid].arg = NULL;
1413                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1414
1415                 if (ifp->if_flags & IFF_RUNNING)
1416                         em_disable_intr(adapter);
1417                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1418         } else {
1419                 if (ifp->if_flags & IFF_RUNNING)
1420                         em_enable_intr(adapter);
1421                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1422         }
1423 }
1424
1425 #endif /* IFPOLL_ENABLE */
1426
1427 static void
1428 em_intr(void *xsc)
1429 {
1430         em_intr_body(xsc, TRUE);
1431 }
1432
1433 static void
1434 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1435 {
1436         struct ifnet *ifp = &adapter->arpcom.ac_if;
1437         uint32_t reg_icr;
1438
1439         logif(intr_beg);
1440         ASSERT_SERIALIZED(ifp->if_serializer);
1441
1442         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1443
1444         if (chk_asserted &&
1445             ((adapter->hw.mac.type >= e1000_82571 &&
1446               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1447              reg_icr == 0)) {
1448                 logif(intr_end);
1449                 return;
1450         }
1451
1452         /*
1453          * XXX: some laptops trigger several spurious interrupts
1454          * on em(4) when in the resume cycle. The ICR register
1455          * reports all-ones value in this case. Processing such
1456          * interrupts would lead to a freeze. I don't know why.
1457          */
1458         if (reg_icr == 0xffffffff) {
1459                 logif(intr_end);
1460                 return;
1461         }
1462
1463         if (ifp->if_flags & IFF_RUNNING) {
1464                 if (reg_icr &
1465                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1466                         em_rxeof(adapter, -1);
1467                 if (reg_icr & E1000_ICR_TXDW) {
1468                         em_txeof(adapter);
1469                         if (!ifq_is_empty(&ifp->if_snd))
1470                                 if_devstart(ifp);
1471                 }
1472         }
1473
1474         /* Link status change */
1475         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1476                 callout_stop(&adapter->timer);
1477                 adapter->hw.mac.get_link_status = 1;
1478                 em_update_link_status(adapter);
1479
1480                 /* Deal with TX cruft when link lost */
1481                 em_tx_purge(adapter);
1482
1483                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1484         }
1485
1486         if (reg_icr & E1000_ICR_RXO)
1487                 adapter->rx_overruns++;
1488
1489         logif(intr_end);
1490 }
1491
1492 static void
1493 em_intr_mask(void *xsc)
1494 {
1495         struct adapter *adapter = xsc;
1496
1497         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1498         /*
1499          * NOTE:
1500          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1501          * so don't check it.
1502          */
1503         em_intr_body(adapter, FALSE);
1504         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1505 }
1506
1507 static void
1508 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1509 {
1510         struct adapter *adapter = ifp->if_softc;
1511         u_char fiber_type = IFM_1000_SX;
1512
1513         ASSERT_SERIALIZED(ifp->if_serializer);
1514
1515         em_update_link_status(adapter);
1516
1517         ifmr->ifm_status = IFM_AVALID;
1518         ifmr->ifm_active = IFM_ETHER;
1519
1520         if (!adapter->link_active)
1521                 return;
1522
1523         ifmr->ifm_status |= IFM_ACTIVE;
1524
1525         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1526             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1527                 if (adapter->hw.mac.type == e1000_82545)
1528                         fiber_type = IFM_1000_LX;
1529                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1530         } else {
1531                 switch (adapter->link_speed) {
1532                 case 10:
1533                         ifmr->ifm_active |= IFM_10_T;
1534                         break;
1535                 case 100:
1536                         ifmr->ifm_active |= IFM_100_TX;
1537                         break;
1538
1539                 case 1000:
1540                         ifmr->ifm_active |= IFM_1000_T;
1541                         break;
1542                 }
1543                 if (adapter->link_duplex == FULL_DUPLEX)
1544                         ifmr->ifm_active |= IFM_FDX;
1545                 else
1546                         ifmr->ifm_active |= IFM_HDX;
1547         }
1548 }
1549
1550 static int
1551 em_media_change(struct ifnet *ifp)
1552 {
1553         struct adapter *adapter = ifp->if_softc;
1554         struct ifmedia *ifm = &adapter->media;
1555
1556         ASSERT_SERIALIZED(ifp->if_serializer);
1557
1558         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1559                 return (EINVAL);
1560
1561         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1562         case IFM_AUTO:
1563                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1564                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1565                 break;
1566
1567         case IFM_1000_LX:
1568         case IFM_1000_SX:
1569         case IFM_1000_T:
1570                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1571                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1572                 break;
1573
1574         case IFM_100_TX:
1575                 adapter->hw.mac.autoneg = FALSE;
1576                 adapter->hw.phy.autoneg_advertised = 0;
1577                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1578                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1579                 else
1580                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1581                 break;
1582
1583         case IFM_10_T:
1584                 adapter->hw.mac.autoneg = FALSE;
1585                 adapter->hw.phy.autoneg_advertised = 0;
1586                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1587                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1588                 else
1589                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1590                 break;
1591
1592         default:
1593                 if_printf(ifp, "Unsupported media type\n");
1594                 break;
1595         }
1596
1597         em_init(adapter);
1598
1599         return (0);
1600 }
1601
1602 static int
1603 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1604     int *segs_used, int *idx)
1605 {
1606         bus_dma_segment_t segs[EM_MAX_SCATTER];
1607         bus_dmamap_t map;
1608         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1609         struct e1000_tx_desc *ctxd = NULL;
1610         struct mbuf *m_head = *m_headp;
1611         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1612         int maxsegs, nsegs, i, j, first, last = 0, error;
1613
1614         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1615                 error = em_tso_pullup(adapter, m_headp);
1616                 if (error)
1617                         return error;
1618                 m_head = *m_headp;
1619         }
1620
1621         txd_upper = txd_lower = 0;
1622         txd_used = 0;
1623
1624         /*
1625          * Capture the first descriptor index, this descriptor
1626          * will have the index of the EOP which is the only one
1627          * that now gets a DONE bit writeback.
1628          */
1629         first = adapter->next_avail_tx_desc;
1630         tx_buffer = &adapter->tx_buffer_area[first];
1631         tx_buffer_mapped = tx_buffer;
1632         map = tx_buffer->map;
1633
1634         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1635         KASSERT(maxsegs >= adapter->spare_tx_desc,
1636                 ("not enough spare TX desc"));
1637         if (adapter->pcix_82544) {
1638                 /* Half it; see the comment in em_attach() */
1639                 maxsegs >>= 1;
1640         }
1641         if (maxsegs > EM_MAX_SCATTER)
1642                 maxsegs = EM_MAX_SCATTER;
1643
1644         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1645                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1646         if (error) {
1647                 if (error == ENOBUFS)
1648                         adapter->mbuf_alloc_failed++;
1649                 else
1650                         adapter->no_tx_dma_setup++;
1651
1652                 m_freem(*m_headp);
1653                 *m_headp = NULL;
1654                 return error;
1655         }
1656         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1657
1658         m_head = *m_headp;
1659         adapter->tx_nsegs += nsegs;
1660         *segs_used += nsegs;
1661
1662         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1663                 /* TSO will consume one TX desc */
1664                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1665                 adapter->tx_nsegs += i;
1666                 *segs_used += i;
1667         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1668                 /* TX csum offloading will consume one TX desc */
1669                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1670                 adapter->tx_nsegs += i;
1671                 *segs_used += i;
1672         }
1673
1674         /* Handle VLAN tag */
1675         if (m_head->m_flags & M_VLANTAG) {
1676                 /* Set the vlan id. */
1677                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1678                 /* Tell hardware to add tag */
1679                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1680         }
1681
1682         i = adapter->next_avail_tx_desc;
1683
1684         /* Set up our transmit descriptors */
1685         for (j = 0; j < nsegs; j++) {
1686                 /* If adapter is 82544 and on PCIX bus */
1687                 if(adapter->pcix_82544) {
1688                         DESC_ARRAY desc_array;
1689                         uint32_t array_elements, counter;
1690
1691                         /*
1692                          * Check the Address and Length combination and
1693                          * split the data accordingly
1694                          */
1695                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1696                                                 segs[j].ds_len, &desc_array);
1697                         for (counter = 0; counter < array_elements; counter++) {
1698                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1699
1700                                 tx_buffer = &adapter->tx_buffer_area[i];
1701                                 ctxd = &adapter->tx_desc_base[i];
1702
1703                                 ctxd->buffer_addr = htole64(
1704                                     desc_array.descriptor[counter].address);
1705                                 ctxd->lower.data = htole32(
1706                                     E1000_TXD_CMD_IFCS | txd_lower |
1707                                     desc_array.descriptor[counter].length);
1708                                 ctxd->upper.data = htole32(txd_upper);
1709
1710                                 last = i;
1711                                 if (++i == adapter->num_tx_desc)
1712                                         i = 0;
1713
1714                                 txd_used++;
1715                         }
1716                 } else {
1717                         tx_buffer = &adapter->tx_buffer_area[i];
1718                         ctxd = &adapter->tx_desc_base[i];
1719
1720                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1721                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1722                                                    txd_lower | segs[j].ds_len);
1723                         ctxd->upper.data = htole32(txd_upper);
1724
1725                         last = i;
1726                         if (++i == adapter->num_tx_desc)
1727                                 i = 0;
1728                 }
1729         }
1730
1731         adapter->next_avail_tx_desc = i;
1732         if (adapter->pcix_82544) {
1733                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1734                 adapter->num_tx_desc_avail -= txd_used;
1735         } else {
1736                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1737                 adapter->num_tx_desc_avail -= nsegs;
1738         }
1739
1740         tx_buffer->m_head = m_head;
1741         tx_buffer_mapped->map = tx_buffer->map;
1742         tx_buffer->map = map;
1743
1744         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1745                 adapter->tx_nsegs = 0;
1746
1747                 /*
1748                  * Report Status (RS) is turned on
1749                  * every tx_int_nsegs descriptors.
1750                  */
1751                 cmd = E1000_TXD_CMD_RS;
1752
1753                 /*
1754                  * Keep track of the descriptor, which will
1755                  * be written back by hardware.
1756                  */
1757                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1758                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1759                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1760         }
1761
1762         /*
1763          * Last Descriptor of Packet needs End Of Packet (EOP)
1764          */
1765         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1766
1767         if (adapter->hw.mac.type == e1000_82547) {
1768                 /*
1769                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1770                  * E1000 that this frame is available to transmit.
1771                  */
1772                 if (adapter->link_duplex == HALF_DUPLEX) {
1773                         em_82547_move_tail_serialized(adapter);
1774                 } else {
1775                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1776                         em_82547_update_fifo_head(adapter,
1777                             m_head->m_pkthdr.len);
1778                 }
1779         } else {
1780                 /*
1781                  * Defer TDT updating, until enough descriptors are setup
1782                  */
1783                 *idx = i;
1784         }
1785         return (0);
1786 }
1787
1788 /*
1789  * 82547 workaround to avoid controller hang in half-duplex environment.
1790  * The workaround is to avoid queuing a large packet that would span
1791  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1792  * in this case.  We do that only when FIFO is quiescent.
1793  */
1794 static void
1795 em_82547_move_tail_serialized(struct adapter *adapter)
1796 {
1797         struct e1000_tx_desc *tx_desc;
1798         uint16_t hw_tdt, sw_tdt, length = 0;
1799         bool eop = 0;
1800
1801         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1802
1803         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1804         sw_tdt = adapter->next_avail_tx_desc;
1805
1806         while (hw_tdt != sw_tdt) {
1807                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1808                 length += tx_desc->lower.flags.length;
1809                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1810                 if (++hw_tdt == adapter->num_tx_desc)
1811                         hw_tdt = 0;
1812
1813                 if (eop) {
1814                         if (em_82547_fifo_workaround(adapter, length)) {
1815                                 adapter->tx_fifo_wrk_cnt++;
1816                                 callout_reset(&adapter->tx_fifo_timer, 1,
1817                                         em_82547_move_tail, adapter);
1818                                 break;
1819                         }
1820                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1821                         em_82547_update_fifo_head(adapter, length);
1822                         length = 0;
1823                 }
1824         }
1825 }
1826
1827 static void
1828 em_82547_move_tail(void *xsc)
1829 {
1830         struct adapter *adapter = xsc;
1831         struct ifnet *ifp = &adapter->arpcom.ac_if;
1832
1833         lwkt_serialize_enter(ifp->if_serializer);
1834         em_82547_move_tail_serialized(adapter);
1835         lwkt_serialize_exit(ifp->if_serializer);
1836 }
1837
1838 static int
1839 em_82547_fifo_workaround(struct adapter *adapter, int len)
1840 {
1841         int fifo_space, fifo_pkt_len;
1842
1843         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1844
1845         if (adapter->link_duplex == HALF_DUPLEX) {
1846                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1847
1848                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1849                         if (em_82547_tx_fifo_reset(adapter))
1850                                 return (0);
1851                         else
1852                                 return (1);
1853                 }
1854         }
1855         return (0);
1856 }
1857
1858 static void
1859 em_82547_update_fifo_head(struct adapter *adapter, int len)
1860 {
1861         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1862
1863         /* tx_fifo_head is always 16 byte aligned */
1864         adapter->tx_fifo_head += fifo_pkt_len;
1865         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1866                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1867 }
1868
1869 static int
1870 em_82547_tx_fifo_reset(struct adapter *adapter)
1871 {
1872         uint32_t tctl;
1873
1874         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1875              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1876             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1877              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1878             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1879              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1880             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1881                 /* Disable TX unit */
1882                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1883                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1884                     tctl & ~E1000_TCTL_EN);
1885
1886                 /* Reset FIFO pointers */
1887                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1888                     adapter->tx_head_addr);
1889                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1890                     adapter->tx_head_addr);
1891                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1892                     adapter->tx_head_addr);
1893                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1894                     adapter->tx_head_addr);
1895
1896                 /* Re-enable TX unit */
1897                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1898                 E1000_WRITE_FLUSH(&adapter->hw);
1899
1900                 adapter->tx_fifo_head = 0;
1901                 adapter->tx_fifo_reset_cnt++;
1902
1903                 return (TRUE);
1904         } else {
1905                 return (FALSE);
1906         }
1907 }
1908
1909 static void
1910 em_set_promisc(struct adapter *adapter)
1911 {
1912         struct ifnet *ifp = &adapter->arpcom.ac_if;
1913         uint32_t reg_rctl;
1914
1915         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1916
1917         if (ifp->if_flags & IFF_PROMISC) {
1918                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1919                 /* Turn this on if you want to see bad packets */
1920                 if (em_debug_sbp)
1921                         reg_rctl |= E1000_RCTL_SBP;
1922                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1923         } else if (ifp->if_flags & IFF_ALLMULTI) {
1924                 reg_rctl |= E1000_RCTL_MPE;
1925                 reg_rctl &= ~E1000_RCTL_UPE;
1926                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1927         }
1928 }
1929
1930 static void
1931 em_disable_promisc(struct adapter *adapter)
1932 {
1933         uint32_t reg_rctl;
1934
1935         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1936
1937         reg_rctl &= ~E1000_RCTL_UPE;
1938         reg_rctl &= ~E1000_RCTL_MPE;
1939         reg_rctl &= ~E1000_RCTL_SBP;
1940         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1941 }
1942
1943 static void
1944 em_set_multi(struct adapter *adapter)
1945 {
1946         struct ifnet *ifp = &adapter->arpcom.ac_if;
1947         struct ifmultiaddr *ifma;
1948         uint32_t reg_rctl = 0;
1949         uint8_t *mta;
1950         int mcnt = 0;
1951
1952         mta = adapter->mta;
1953         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1954
1955         if (adapter->hw.mac.type == e1000_82542 &&
1956             adapter->hw.revision_id == E1000_REVISION_2) {
1957                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1958                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1959                         e1000_pci_clear_mwi(&adapter->hw);
1960                 reg_rctl |= E1000_RCTL_RST;
1961                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1962                 msec_delay(5);
1963         }
1964
1965         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1966                 if (ifma->ifma_addr->sa_family != AF_LINK)
1967                         continue;
1968
1969                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1970                         break;
1971
1972                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1973                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1974                 mcnt++;
1975         }
1976
1977         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1978                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1979                 reg_rctl |= E1000_RCTL_MPE;
1980                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1981         } else {
1982                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1983         }
1984
1985         if (adapter->hw.mac.type == e1000_82542 &&
1986             adapter->hw.revision_id == E1000_REVISION_2) {
1987                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1988                 reg_rctl &= ~E1000_RCTL_RST;
1989                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1990                 msec_delay(5);
1991                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1992                         e1000_pci_set_mwi(&adapter->hw);
1993         }
1994 }
1995
1996 /*
1997  * This routine checks for link status and updates statistics.
1998  */
1999 static void
2000 em_timer(void *xsc)
2001 {
2002         struct adapter *adapter = xsc;
2003         struct ifnet *ifp = &adapter->arpcom.ac_if;
2004
2005         lwkt_serialize_enter(ifp->if_serializer);
2006
2007         em_update_link_status(adapter);
2008         em_update_stats(adapter);
2009
2010         /* Reset LAA into RAR[0] on 82571 */
2011         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2012                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2013
2014         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2015                 em_print_hw_stats(adapter);
2016
2017         em_smartspeed(adapter);
2018
2019         callout_reset(&adapter->timer, hz, em_timer, adapter);
2020
2021         lwkt_serialize_exit(ifp->if_serializer);
2022 }
2023
2024 static void
2025 em_update_link_status(struct adapter *adapter)
2026 {
2027         struct e1000_hw *hw = &adapter->hw;
2028         struct ifnet *ifp = &adapter->arpcom.ac_if;
2029         device_t dev = adapter->dev;
2030         uint32_t link_check = 0;
2031
2032         /* Get the cached link value or read phy for real */
2033         switch (hw->phy.media_type) {
2034         case e1000_media_type_copper:
2035                 if (hw->mac.get_link_status) {
2036                         /* Do the work to read phy */
2037                         e1000_check_for_link(hw);
2038                         link_check = !hw->mac.get_link_status;
2039                         if (link_check) /* ESB2 fix */
2040                                 e1000_cfg_on_link_up(hw);
2041                 } else {
2042                         link_check = TRUE;
2043                 }
2044                 break;
2045
2046         case e1000_media_type_fiber:
2047                 e1000_check_for_link(hw);
2048                 link_check =
2049                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2050                 break;
2051
2052         case e1000_media_type_internal_serdes:
2053                 e1000_check_for_link(hw);
2054                 link_check = adapter->hw.mac.serdes_has_link;
2055                 break;
2056
2057         case e1000_media_type_unknown:
2058         default:
2059                 break;
2060         }
2061
2062         /* Now check for a transition */
2063         if (link_check && adapter->link_active == 0) {
2064                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2065                     &adapter->link_duplex);
2066
2067                 /*
2068                  * Check if we should enable/disable SPEED_MODE bit on
2069                  * 82571/82572
2070                  */
2071                 if (adapter->link_speed != SPEED_1000 &&
2072                     (hw->mac.type == e1000_82571 ||
2073                      hw->mac.type == e1000_82572)) {
2074                         int tarc0;
2075
2076                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2077                         tarc0 &= ~SPEED_MODE_BIT;
2078                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2079                 }
2080                 if (bootverbose) {
2081                         device_printf(dev, "Link is up %d Mbps %s\n",
2082                             adapter->link_speed,
2083                             ((adapter->link_duplex == FULL_DUPLEX) ?
2084                             "Full Duplex" : "Half Duplex"));
2085                 }
2086                 adapter->link_active = 1;
2087                 adapter->smartspeed = 0;
2088                 ifp->if_baudrate = adapter->link_speed * 1000000;
2089                 ifp->if_link_state = LINK_STATE_UP;
2090                 if_link_state_change(ifp);
2091         } else if (!link_check && adapter->link_active == 1) {
2092                 ifp->if_baudrate = adapter->link_speed = 0;
2093                 adapter->link_duplex = 0;
2094                 if (bootverbose)
2095                         device_printf(dev, "Link is Down\n");
2096                 adapter->link_active = 0;
2097 #if 0
2098                 /* Link down, disable watchdog */
2099                 if->if_timer = 0;
2100 #endif
2101                 ifp->if_link_state = LINK_STATE_DOWN;
2102                 if_link_state_change(ifp);
2103         }
2104 }
2105
2106 static void
2107 em_stop(struct adapter *adapter)
2108 {
2109         struct ifnet *ifp = &adapter->arpcom.ac_if;
2110         int i;
2111
2112         ASSERT_SERIALIZED(ifp->if_serializer);
2113
2114         em_disable_intr(adapter);
2115
2116         callout_stop(&adapter->timer);
2117         callout_stop(&adapter->tx_fifo_timer);
2118
2119         ifp->if_flags &= ~IFF_RUNNING;
2120         ifq_clr_oactive(&ifp->if_snd);
2121         ifp->if_timer = 0;
2122
2123         e1000_reset_hw(&adapter->hw);
2124         if (adapter->hw.mac.type >= e1000_82544)
2125                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2126
2127         for (i = 0; i < adapter->num_tx_desc; i++) {
2128                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2129
2130                 if (tx_buffer->m_head != NULL) {
2131                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2132                         m_freem(tx_buffer->m_head);
2133                         tx_buffer->m_head = NULL;
2134                 }
2135         }
2136
2137         for (i = 0; i < adapter->num_rx_desc; i++) {
2138                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2139
2140                 if (rx_buffer->m_head != NULL) {
2141                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2142                         m_freem(rx_buffer->m_head);
2143                         rx_buffer->m_head = NULL;
2144                 }
2145         }
2146
2147         if (adapter->fmp != NULL)
2148                 m_freem(adapter->fmp);
2149         adapter->fmp = NULL;
2150         adapter->lmp = NULL;
2151
2152         adapter->csum_flags = 0;
2153         adapter->csum_lhlen = 0;
2154         adapter->csum_iphlen = 0;
2155         adapter->csum_thlen = 0;
2156         adapter->csum_mss = 0;
2157         adapter->csum_pktlen = 0;
2158
2159         adapter->tx_dd_head = 0;
2160         adapter->tx_dd_tail = 0;
2161         adapter->tx_nsegs = 0;
2162 }
2163
2164 static int
2165 em_get_hw_info(struct adapter *adapter)
2166 {
2167         device_t dev = adapter->dev;
2168
2169         /* Save off the information about this board */
2170         adapter->hw.vendor_id = pci_get_vendor(dev);
2171         adapter->hw.device_id = pci_get_device(dev);
2172         adapter->hw.revision_id = pci_get_revid(dev);
2173         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2174         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2175
2176         /* Do Shared Code Init and Setup */
2177         if (e1000_set_mac_type(&adapter->hw))
2178                 return ENXIO;
2179         return 0;
2180 }
2181
2182 static int
2183 em_alloc_pci_res(struct adapter *adapter)
2184 {
2185         device_t dev = adapter->dev;
2186         u_int intr_flags;
2187         int val, rid, msi_enable;
2188
2189         /* Enable bus mastering */
2190         pci_enable_busmaster(dev);
2191
2192         adapter->memory_rid = EM_BAR_MEM;
2193         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2194                                 &adapter->memory_rid, RF_ACTIVE);
2195         if (adapter->memory == NULL) {
2196                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2197                 return (ENXIO);
2198         }
2199         adapter->osdep.mem_bus_space_tag =
2200             rman_get_bustag(adapter->memory);
2201         adapter->osdep.mem_bus_space_handle =
2202             rman_get_bushandle(adapter->memory);
2203
2204         /* XXX This is quite goofy, it is not actually used */
2205         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2206
2207         /* Only older adapters use IO mapping */
2208         if (adapter->hw.mac.type > e1000_82543 &&
2209             adapter->hw.mac.type < e1000_82571) {
2210                 /* Figure our where our IO BAR is ? */
2211                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2212                         val = pci_read_config(dev, rid, 4);
2213                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2214                                 adapter->io_rid = rid;
2215                                 break;
2216                         }
2217                         rid += 4;
2218                         /* check for 64bit BAR */
2219                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2220                                 rid += 4;
2221                 }
2222                 if (rid >= PCIR_CARDBUSCIS) {
2223                         device_printf(dev, "Unable to locate IO BAR\n");
2224                         return (ENXIO);
2225                 }
2226                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2227                                         &adapter->io_rid, RF_ACTIVE);
2228                 if (adapter->ioport == NULL) {
2229                         device_printf(dev, "Unable to allocate bus resource: "
2230                             "ioport\n");
2231                         return (ENXIO);
2232                 }
2233                 adapter->hw.io_base = 0;
2234                 adapter->osdep.io_bus_space_tag =
2235                     rman_get_bustag(adapter->ioport);
2236                 adapter->osdep.io_bus_space_handle =
2237                     rman_get_bushandle(adapter->ioport);
2238         }
2239
2240         /*
2241          * Don't enable MSI-X on 82574, see:
2242          * 82574 specification update errata #15
2243          *
2244          * Don't enable MSI on PCI/PCI-X chips, see:
2245          * 82540 specification update errata #6
2246          * 82545 specification update errata #4
2247          *
2248          * Don't enable MSI on 82571/82572, see:
2249          * 82571/82572 specification update errata #63
2250          */
2251         msi_enable = em_msi_enable;
2252         if (msi_enable &&
2253             (!pci_is_pcie(dev) ||
2254              adapter->hw.mac.type == e1000_82571 ||
2255              adapter->hw.mac.type == e1000_82572))
2256                 msi_enable = 0;
2257
2258         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2259             &adapter->intr_rid, &intr_flags);
2260
2261         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2262                 int unshared;
2263
2264                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2265                 if (!unshared) {
2266                         adapter->flags |= EM_FLAG_SHARED_INTR;
2267                         if (bootverbose)
2268                                 device_printf(dev, "IRQ shared\n");
2269                 } else {
2270                         intr_flags &= ~RF_SHAREABLE;
2271                         if (bootverbose)
2272                                 device_printf(dev, "IRQ unshared\n");
2273                 }
2274         }
2275
2276         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2277             &adapter->intr_rid, intr_flags);
2278         if (adapter->intr_res == NULL) {
2279                 device_printf(dev, "Unable to allocate bus resource: "
2280                     "interrupt\n");
2281                 return (ENXIO);
2282         }
2283
2284         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2285         adapter->hw.back = &adapter->osdep;
2286         return (0);
2287 }
2288
2289 static void
2290 em_free_pci_res(struct adapter *adapter)
2291 {
2292         device_t dev = adapter->dev;
2293
2294         if (adapter->intr_res != NULL) {
2295                 bus_release_resource(dev, SYS_RES_IRQ,
2296                     adapter->intr_rid, adapter->intr_res);
2297         }
2298
2299         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2300                 pci_release_msi(dev);
2301
2302         if (adapter->memory != NULL) {
2303                 bus_release_resource(dev, SYS_RES_MEMORY,
2304                     adapter->memory_rid, adapter->memory);
2305         }
2306
2307         if (adapter->flash != NULL) {
2308                 bus_release_resource(dev, SYS_RES_MEMORY,
2309                     adapter->flash_rid, adapter->flash);
2310         }
2311
2312         if (adapter->ioport != NULL) {
2313                 bus_release_resource(dev, SYS_RES_IOPORT,
2314                     adapter->io_rid, adapter->ioport);
2315         }
2316 }
2317
2318 static int
2319 em_reset(struct adapter *adapter)
2320 {
2321         device_t dev = adapter->dev;
2322         uint16_t rx_buffer_size;
2323         uint32_t pba;
2324
2325         /* When hardware is reset, fifo_head is also reset */
2326         adapter->tx_fifo_head = 0;
2327
2328         /* Set up smart power down as default off on newer adapters. */
2329         if (!em_smart_pwr_down &&
2330             (adapter->hw.mac.type == e1000_82571 ||
2331              adapter->hw.mac.type == e1000_82572)) {
2332                 uint16_t phy_tmp = 0;
2333
2334                 /* Speed up time to link by disabling smart power down. */
2335                 e1000_read_phy_reg(&adapter->hw,
2336                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2337                 phy_tmp &= ~IGP02E1000_PM_SPD;
2338                 e1000_write_phy_reg(&adapter->hw,
2339                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2340         }
2341
2342         /*
2343          * Packet Buffer Allocation (PBA)
2344          * Writing PBA sets the receive portion of the buffer
2345          * the remainder is used for the transmit buffer.
2346          *
2347          * Devices before the 82547 had a Packet Buffer of 64K.
2348          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2349          * After the 82547 the buffer was reduced to 40K.
2350          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2351          *   Note: default does not leave enough room for Jumbo Frame >10k.
2352          */
2353         switch (adapter->hw.mac.type) {
2354         case e1000_82547:
2355         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2356                 if (adapter->hw.mac.max_frame_size > 8192)
2357                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2358                 else
2359                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2360                 adapter->tx_fifo_head = 0;
2361                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2362                 adapter->tx_fifo_size =
2363                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2364                 break;
2365
2366         /* Total Packet Buffer on these is 48K */
2367         case e1000_82571:
2368         case e1000_82572:
2369         case e1000_80003es2lan:
2370                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2371                 break;
2372
2373         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2374                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2375                 break;
2376
2377         case e1000_82574:
2378         case e1000_82583:
2379                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2380                 break;
2381
2382         case e1000_ich8lan:
2383                 pba = E1000_PBA_8K;
2384                 break;
2385
2386         case e1000_ich9lan:
2387         case e1000_ich10lan:
2388 #define E1000_PBA_10K   0x000A
2389                 pba = E1000_PBA_10K;
2390                 break;
2391
2392         case e1000_pchlan:
2393         case e1000_pch2lan:
2394         case e1000_pch_lpt:
2395                 pba = E1000_PBA_26K;
2396                 break;
2397
2398         default:
2399                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2400                 if (adapter->hw.mac.max_frame_size > 8192)
2401                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2402                 else
2403                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2404         }
2405         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2406
2407         /*
2408          * These parameters control the automatic generation (Tx) and
2409          * response (Rx) to Ethernet PAUSE frames.
2410          * - High water mark should allow for at least two frames to be
2411          *   received after sending an XOFF.
2412          * - Low water mark works best when it is very near the high water mark.
2413          *   This allows the receiver to restart by sending XON when it has
2414          *   drained a bit. Here we use an arbitary value of 1500 which will
2415          *   restart after one full frame is pulled from the buffer. There
2416          *   could be several smaller frames in the buffer and if so they will
2417          *   not trigger the XON until their total number reduces the buffer
2418          *   by 1500.
2419          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2420          */
2421         rx_buffer_size =
2422                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2423
2424         adapter->hw.fc.high_water = rx_buffer_size -
2425             roundup2(adapter->hw.mac.max_frame_size, 1024);
2426         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2427
2428         if (adapter->hw.mac.type == e1000_80003es2lan)
2429                 adapter->hw.fc.pause_time = 0xFFFF;
2430         else
2431                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2432
2433         adapter->hw.fc.send_xon = TRUE;
2434
2435         adapter->hw.fc.requested_mode = e1000_fc_full;
2436
2437         /*
2438          * Device specific overrides/settings
2439          */
2440         switch (adapter->hw.mac.type) {
2441         case e1000_pchlan:
2442                 /* Workaround: no TX flow ctrl for PCH */
2443                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2444                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2445                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2446                         adapter->hw.fc.high_water = 0x3500;
2447                         adapter->hw.fc.low_water = 0x1500;
2448                 } else {
2449                         adapter->hw.fc.high_water = 0x5000;
2450                         adapter->hw.fc.low_water = 0x3000;
2451                 }
2452                 adapter->hw.fc.refresh_time = 0x1000;
2453                 break;
2454
2455         case e1000_pch2lan:
2456         case e1000_pch_lpt:
2457                 adapter->hw.fc.high_water = 0x5C20;
2458                 adapter->hw.fc.low_water = 0x5048;
2459                 adapter->hw.fc.pause_time = 0x0650;
2460                 adapter->hw.fc.refresh_time = 0x0400;
2461                 /* Jumbos need adjusted PBA */
2462                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2463                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2464                 else
2465                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2466                 break;
2467
2468         case e1000_ich9lan:
2469         case e1000_ich10lan:
2470                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2471                         adapter->hw.fc.high_water = 0x2800;
2472                         adapter->hw.fc.low_water =
2473                             adapter->hw.fc.high_water - 8;
2474                         break;
2475                 }
2476                 /* FALL THROUGH */
2477         default:
2478                 if (adapter->hw.mac.type == e1000_80003es2lan)
2479                         adapter->hw.fc.pause_time = 0xFFFF;
2480                 break;
2481         }
2482
2483         /* Issue a global reset */
2484         e1000_reset_hw(&adapter->hw);
2485         if (adapter->hw.mac.type >= e1000_82544)
2486                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2487         em_disable_aspm(adapter);
2488
2489         if (e1000_init_hw(&adapter->hw) < 0) {
2490                 device_printf(dev, "Hardware Initialization Failed\n");
2491                 return (EIO);
2492         }
2493
2494         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2495         e1000_get_phy_info(&adapter->hw);
2496         e1000_check_for_link(&adapter->hw);
2497
2498         return (0);
2499 }
2500
2501 static void
2502 em_setup_ifp(struct adapter *adapter)
2503 {
2504         struct ifnet *ifp = &adapter->arpcom.ac_if;
2505
2506         if_initname(ifp, device_get_name(adapter->dev),
2507                     device_get_unit(adapter->dev));
2508         ifp->if_softc = adapter;
2509         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2510         ifp->if_init =  em_init;
2511         ifp->if_ioctl = em_ioctl;
2512         ifp->if_start = em_start;
2513 #ifdef IFPOLL_ENABLE
2514         ifp->if_npoll = em_npoll;
2515 #endif
2516         ifp->if_watchdog = em_watchdog;
2517         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2518         ifq_set_ready(&ifp->if_snd);
2519
2520         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2521
2522         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2523         if (adapter->hw.mac.type >= e1000_82543)
2524                 ifp->if_capabilities |= IFCAP_HWCSUM;
2525         if (adapter->flags & EM_FLAG_TSO)
2526                 ifp->if_capabilities |= IFCAP_TSO;
2527         ifp->if_capenable = ifp->if_capabilities;
2528
2529         if (ifp->if_capenable & IFCAP_TXCSUM)
2530                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2531         if (ifp->if_capenable & IFCAP_TSO)
2532                 ifp->if_hwassist |= CSUM_TSO;
2533
2534         /*
2535          * Tell the upper layer(s) we support long frames.
2536          */
2537         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2538
2539         /*
2540          * Specify the media types supported by this adapter and register
2541          * callbacks to update media and link information
2542          */
2543         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2544             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2545                 u_char fiber_type = IFM_1000_SX; /* default type */
2546
2547                 if (adapter->hw.mac.type == e1000_82545)
2548                         fiber_type = IFM_1000_LX;
2549                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2550                             0, NULL);
2551                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2552         } else {
2553                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2554                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2555                             0, NULL);
2556                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2557                             0, NULL);
2558                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2559                             0, NULL);
2560                 if (adapter->hw.phy.type != e1000_phy_ife) {
2561                         ifmedia_add(&adapter->media,
2562                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2563                         ifmedia_add(&adapter->media,
2564                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2565                 }
2566         }
2567         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2568         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2569 }
2570
2571
2572 /*
2573  * Workaround for SmartSpeed on 82541 and 82547 controllers
2574  */
2575 static void
2576 em_smartspeed(struct adapter *adapter)
2577 {
2578         uint16_t phy_tmp;
2579
2580         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2581             adapter->hw.mac.autoneg == 0 ||
2582             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2583                 return;
2584
2585         if (adapter->smartspeed == 0) {
2586                 /*
2587                  * If Master/Slave config fault is asserted twice,
2588                  * we assume back-to-back
2589                  */
2590                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2591                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2592                         return;
2593                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2594                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2595                         e1000_read_phy_reg(&adapter->hw,
2596                             PHY_1000T_CTRL, &phy_tmp);
2597                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2598                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2599                                 e1000_write_phy_reg(&adapter->hw,
2600                                     PHY_1000T_CTRL, phy_tmp);
2601                                 adapter->smartspeed++;
2602                                 if (adapter->hw.mac.autoneg &&
2603                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2604                                     !e1000_read_phy_reg(&adapter->hw,
2605                                      PHY_CONTROL, &phy_tmp)) {
2606                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2607                                                    MII_CR_RESTART_AUTO_NEG;
2608                                         e1000_write_phy_reg(&adapter->hw,
2609                                             PHY_CONTROL, phy_tmp);
2610                                 }
2611                         }
2612                 }
2613                 return;
2614         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2615                 /* If still no link, perhaps using 2/3 pair cable */
2616                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2617                 phy_tmp |= CR_1000T_MS_ENABLE;
2618                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2619                 if (adapter->hw.mac.autoneg &&
2620                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2621                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2622                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2623                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2624                 }
2625         }
2626
2627         /* Restart process after EM_SMARTSPEED_MAX iterations */
2628         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2629                 adapter->smartspeed = 0;
2630 }
2631
2632 static int
2633 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2634               struct em_dma_alloc *dma)
2635 {
2636         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2637                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2638                                 &dma->dma_tag, &dma->dma_map,
2639                                 &dma->dma_paddr);
2640         if (dma->dma_vaddr == NULL)
2641                 return ENOMEM;
2642         else
2643                 return 0;
2644 }
2645
2646 static void
2647 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2648 {
2649         if (dma->dma_tag == NULL)
2650                 return;
2651         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2652         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2653         bus_dma_tag_destroy(dma->dma_tag);
2654 }
2655
2656 static int
2657 em_create_tx_ring(struct adapter *adapter)
2658 {
2659         device_t dev = adapter->dev;
2660         struct em_buffer *tx_buffer;
2661         int error, i;
2662
2663         adapter->tx_buffer_area =
2664                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2665                         M_DEVBUF, M_WAITOK | M_ZERO);
2666
2667         /*
2668          * Create DMA tags for tx buffers
2669          */
2670         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2671                         1, 0,                   /* alignment, bounds */
2672                         BUS_SPACE_MAXADDR,      /* lowaddr */
2673                         BUS_SPACE_MAXADDR,      /* highaddr */
2674                         NULL, NULL,             /* filter, filterarg */
2675                         EM_TSO_SIZE,            /* maxsize */
2676                         EM_MAX_SCATTER,         /* nsegments */
2677                         PAGE_SIZE,              /* maxsegsize */
2678                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2679                         BUS_DMA_ONEBPAGE,       /* flags */
2680                         &adapter->txtag);
2681         if (error) {
2682                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2683                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2684                 adapter->tx_buffer_area = NULL;
2685                 return error;
2686         }
2687
2688         /*
2689          * Create DMA maps for tx buffers
2690          */
2691         for (i = 0; i < adapter->num_tx_desc; i++) {
2692                 tx_buffer = &adapter->tx_buffer_area[i];
2693
2694                 error = bus_dmamap_create(adapter->txtag,
2695                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2696                                           &tx_buffer->map);
2697                 if (error) {
2698                         device_printf(dev, "Unable to create TX DMA map\n");
2699                         em_destroy_tx_ring(adapter, i);
2700                         return error;
2701                 }
2702         }
2703         return (0);
2704 }
2705
2706 static void
2707 em_init_tx_ring(struct adapter *adapter)
2708 {
2709         /* Clear the old ring contents */
2710         bzero(adapter->tx_desc_base,
2711             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2712
2713         /* Reset state */
2714         adapter->next_avail_tx_desc = 0;
2715         adapter->next_tx_to_clean = 0;
2716         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2717 }
2718
2719 static void
2720 em_init_tx_unit(struct adapter *adapter)
2721 {
2722         uint32_t tctl, tarc, tipg = 0;
2723         uint64_t bus_addr;
2724
2725         /* Setup the Base and Length of the Tx Descriptor Ring */
2726         bus_addr = adapter->txdma.dma_paddr;
2727         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2728             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2729         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2730             (uint32_t)(bus_addr >> 32));
2731         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2732             (uint32_t)bus_addr);
2733         /* Setup the HW Tx Head and Tail descriptor pointers */
2734         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2735         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2736
2737         /* Set the default values for the Tx Inter Packet Gap timer */
2738         switch (adapter->hw.mac.type) {
2739         case e1000_82542:
2740                 tipg = DEFAULT_82542_TIPG_IPGT;
2741                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2742                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2743                 break;
2744
2745         case e1000_80003es2lan:
2746                 tipg = DEFAULT_82543_TIPG_IPGR1;
2747                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2748                     E1000_TIPG_IPGR2_SHIFT;
2749                 break;
2750
2751         default:
2752                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2753                     adapter->hw.phy.media_type ==
2754                     e1000_media_type_internal_serdes)
2755                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2756                 else
2757                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2758                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2759                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2760                 break;
2761         }
2762
2763         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2764
2765         /* NOTE: 0 is not allowed for TIDV */
2766         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2767         if(adapter->hw.mac.type >= e1000_82540)
2768                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2769
2770         if (adapter->hw.mac.type == e1000_82571 ||
2771             adapter->hw.mac.type == e1000_82572) {
2772                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2773                 tarc |= SPEED_MODE_BIT;
2774                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2775         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2776                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2777                 tarc |= 1;
2778                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2779                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2780                 tarc |= 1;
2781                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2782         }
2783
2784         /* Program the Transmit Control Register */
2785         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2786         tctl &= ~E1000_TCTL_CT;
2787         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2788                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2789
2790         if (adapter->hw.mac.type >= e1000_82571)
2791                 tctl |= E1000_TCTL_MULR;
2792
2793         /* This write will effectively turn on the transmit unit. */
2794         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2795
2796         if (adapter->hw.mac.type == e1000_82571 ||
2797             adapter->hw.mac.type == e1000_82572 ||
2798             adapter->hw.mac.type == e1000_80003es2lan) {
2799                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2800                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2801                 tarc &= ~(1 << 28);
2802                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2803         }
2804 }
2805
2806 static void
2807 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2808 {
2809         struct em_buffer *tx_buffer;
2810         int i;
2811
2812         if (adapter->tx_buffer_area == NULL)
2813                 return;
2814
2815         for (i = 0; i < ndesc; i++) {
2816                 tx_buffer = &adapter->tx_buffer_area[i];
2817
2818                 KKASSERT(tx_buffer->m_head == NULL);
2819                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2820         }
2821         bus_dma_tag_destroy(adapter->txtag);
2822
2823         kfree(adapter->tx_buffer_area, M_DEVBUF);
2824         adapter->tx_buffer_area = NULL;
2825 }
2826
2827 /*
2828  * The offload context needs to be set when we transfer the first
2829  * packet of a particular protocol (TCP/UDP).  This routine has been
2830  * enhanced to deal with inserted VLAN headers.
2831  *
2832  * If the new packet's ether header length, ip header length and
2833  * csum offloading type are same as the previous packet, we should
2834  * avoid allocating a new csum context descriptor; mainly to take
2835  * advantage of the pipeline effect of the TX data read request.
2836  *
2837  * This function returns number of TX descrptors allocated for
2838  * csum context.
2839  */
2840 static int
2841 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2842           uint32_t *txd_upper, uint32_t *txd_lower)
2843 {
2844         struct e1000_context_desc *TXD;
2845         int curr_txd, ehdrlen, csum_flags;
2846         uint32_t cmd, hdr_len, ip_hlen;
2847
2848         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2849         ip_hlen = mp->m_pkthdr.csum_iphlen;
2850         ehdrlen = mp->m_pkthdr.csum_lhlen;
2851
2852         if (adapter->csum_lhlen == ehdrlen &&
2853             adapter->csum_iphlen == ip_hlen &&
2854             adapter->csum_flags == csum_flags) {
2855                 /*
2856                  * Same csum offload context as the previous packets;
2857                  * just return.
2858                  */
2859                 *txd_upper = adapter->csum_txd_upper;
2860                 *txd_lower = adapter->csum_txd_lower;
2861                 return 0;
2862         }
2863
2864         /*
2865          * Setup a new csum offload context.
2866          */
2867
2868         curr_txd = adapter->next_avail_tx_desc;
2869         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2870
2871         cmd = 0;
2872
2873         /* Setup of IP header checksum. */
2874         if (csum_flags & CSUM_IP) {
2875                 /*
2876                  * Start offset for header checksum calculation.
2877                  * End offset for header checksum calculation.
2878                  * Offset of place to put the checksum.
2879                  */
2880                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2881                 TXD->lower_setup.ip_fields.ipcse =
2882                     htole16(ehdrlen + ip_hlen - 1);
2883                 TXD->lower_setup.ip_fields.ipcso =
2884                     ehdrlen + offsetof(struct ip, ip_sum);
2885                 cmd |= E1000_TXD_CMD_IP;
2886                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2887         }
2888         hdr_len = ehdrlen + ip_hlen;
2889
2890         if (csum_flags & CSUM_TCP) {
2891                 /*
2892                  * Start offset for payload checksum calculation.
2893                  * End offset for payload checksum calculation.
2894                  * Offset of place to put the checksum.
2895                  */
2896                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2897                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2898                 TXD->upper_setup.tcp_fields.tucso =
2899                     hdr_len + offsetof(struct tcphdr, th_sum);
2900                 cmd |= E1000_TXD_CMD_TCP;
2901                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2902         } else if (csum_flags & CSUM_UDP) {
2903                 /*
2904                  * Start offset for header checksum calculation.
2905                  * End offset for header checksum calculation.
2906                  * Offset of place to put the checksum.
2907                  */
2908                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2909                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2910                 TXD->upper_setup.tcp_fields.tucso =
2911                     hdr_len + offsetof(struct udphdr, uh_sum);
2912                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2913         }
2914
2915         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2916                      E1000_TXD_DTYP_D;          /* Data descr */
2917
2918         /* Save the information for this csum offloading context */
2919         adapter->csum_lhlen = ehdrlen;
2920         adapter->csum_iphlen = ip_hlen;
2921         adapter->csum_flags = csum_flags;
2922         adapter->csum_txd_upper = *txd_upper;
2923         adapter->csum_txd_lower = *txd_lower;
2924
2925         TXD->tcp_seg_setup.data = htole32(0);
2926         TXD->cmd_and_length =
2927             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2928
2929         if (++curr_txd == adapter->num_tx_desc)
2930                 curr_txd = 0;
2931
2932         KKASSERT(adapter->num_tx_desc_avail > 0);
2933         adapter->num_tx_desc_avail--;
2934
2935         adapter->next_avail_tx_desc = curr_txd;
2936         return 1;
2937 }
2938
2939 static void
2940 em_txeof(struct adapter *adapter)
2941 {
2942         struct ifnet *ifp = &adapter->arpcom.ac_if;
2943         struct em_buffer *tx_buffer;
2944         int first, num_avail;
2945
2946         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2947                 return;
2948
2949         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2950                 return;
2951
2952         num_avail = adapter->num_tx_desc_avail;
2953         first = adapter->next_tx_to_clean;
2954
2955         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2956                 struct e1000_tx_desc *tx_desc;
2957                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2958
2959                 tx_desc = &adapter->tx_desc_base[dd_idx];
2960                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2961                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2962
2963                         if (++dd_idx == adapter->num_tx_desc)
2964                                 dd_idx = 0;
2965
2966                         while (first != dd_idx) {
2967                                 logif(pkt_txclean);
2968
2969                                 num_avail++;
2970
2971                                 tx_buffer = &adapter->tx_buffer_area[first];
2972                                 if (tx_buffer->m_head) {
2973                                         IFNET_STAT_INC(ifp, opackets, 1);
2974                                         bus_dmamap_unload(adapter->txtag,
2975                                                           tx_buffer->map);
2976                                         m_freem(tx_buffer->m_head);
2977                                         tx_buffer->m_head = NULL;
2978                                 }
2979
2980                                 if (++first == adapter->num_tx_desc)
2981                                         first = 0;
2982                         }
2983                 } else {
2984                         break;
2985                 }
2986         }
2987         adapter->next_tx_to_clean = first;
2988         adapter->num_tx_desc_avail = num_avail;
2989
2990         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2991                 adapter->tx_dd_head = 0;
2992                 adapter->tx_dd_tail = 0;
2993         }
2994
2995         if (!EM_IS_OACTIVE(adapter)) {
2996                 ifq_clr_oactive(&ifp->if_snd);
2997
2998                 /* All clean, turn off the timer */
2999                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3000                         ifp->if_timer = 0;
3001         }
3002 }
3003
3004 static void
3005 em_tx_collect(struct adapter *adapter)
3006 {
3007         struct ifnet *ifp = &adapter->arpcom.ac_if;
3008         struct em_buffer *tx_buffer;
3009         int tdh, first, num_avail, dd_idx = -1;
3010
3011         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3012                 return;
3013
3014         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
3015         if (tdh == adapter->next_tx_to_clean)
3016                 return;
3017
3018         if (adapter->tx_dd_head != adapter->tx_dd_tail)
3019                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3020
3021         num_avail = adapter->num_tx_desc_avail;
3022         first = adapter->next_tx_to_clean;
3023
3024         while (first != tdh) {
3025                 logif(pkt_txclean);
3026
3027                 num_avail++;
3028
3029                 tx_buffer = &adapter->tx_buffer_area[first];
3030                 if (tx_buffer->m_head) {
3031                         IFNET_STAT_INC(ifp, opackets, 1);
3032                         bus_dmamap_unload(adapter->txtag,
3033                                           tx_buffer->map);
3034                         m_freem(tx_buffer->m_head);
3035                         tx_buffer->m_head = NULL;
3036                 }
3037
3038                 if (first == dd_idx) {
3039                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3040                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3041                                 adapter->tx_dd_head = 0;
3042                                 adapter->tx_dd_tail = 0;
3043                                 dd_idx = -1;
3044                         } else {
3045                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3046                         }
3047                 }
3048
3049                 if (++first == adapter->num_tx_desc)
3050                         first = 0;
3051         }
3052         adapter->next_tx_to_clean = first;
3053         adapter->num_tx_desc_avail = num_avail;
3054
3055         if (!EM_IS_OACTIVE(adapter)) {
3056                 ifq_clr_oactive(&ifp->if_snd);
3057
3058                 /* All clean, turn off the timer */
3059                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3060                         ifp->if_timer = 0;
3061         }
3062 }
3063
3064 /*
3065  * When Link is lost sometimes there is work still in the TX ring
3066  * which will result in a watchdog, rather than allow that do an
3067  * attempted cleanup and then reinit here.  Note that this has been
3068  * seens mostly with fiber adapters.
3069  */
3070 static void
3071 em_tx_purge(struct adapter *adapter)
3072 {
3073         struct ifnet *ifp = &adapter->arpcom.ac_if;
3074
3075         if (!adapter->link_active && ifp->if_timer) {
3076                 em_tx_collect(adapter);
3077                 if (ifp->if_timer) {
3078                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3079                         ifp->if_timer = 0;
3080                         em_init(adapter);
3081                 }
3082         }
3083 }
3084
3085 static int
3086 em_newbuf(struct adapter *adapter, int i, int init)
3087 {
3088         struct mbuf *m;
3089         bus_dma_segment_t seg;
3090         bus_dmamap_t map;
3091         struct em_buffer *rx_buffer;
3092         int error, nseg;
3093
3094         m = m_getcl(init ? M_WAITOK : M_NOWAIT, MT_DATA, M_PKTHDR);
3095         if (m == NULL) {
3096                 adapter->mbuf_cluster_failed++;
3097                 if (init) {
3098                         if_printf(&adapter->arpcom.ac_if,
3099                                   "Unable to allocate RX mbuf\n");
3100                 }
3101                 return (ENOBUFS);
3102         }
3103         m->m_len = m->m_pkthdr.len = MCLBYTES;
3104
3105         if (adapter->hw.mac.max_frame_size <= MCLBYTES - ETHER_ALIGN)
3106                 m_adj(m, ETHER_ALIGN);
3107
3108         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3109                         adapter->rx_sparemap, m,
3110                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3111         if (error) {
3112                 m_freem(m);
3113                 if (init) {
3114                         if_printf(&adapter->arpcom.ac_if,
3115                                   "Unable to load RX mbuf\n");
3116                 }
3117                 return (error);
3118         }
3119
3120         rx_buffer = &adapter->rx_buffer_area[i];
3121         if (rx_buffer->m_head != NULL)
3122                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3123
3124         map = rx_buffer->map;
3125         rx_buffer->map = adapter->rx_sparemap;
3126         adapter->rx_sparemap = map;
3127
3128         rx_buffer->m_head = m;
3129
3130         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3131         return (0);
3132 }
3133
3134 static int
3135 em_create_rx_ring(struct adapter *adapter)
3136 {
3137         device_t dev = adapter->dev;
3138         struct em_buffer *rx_buffer;
3139         int i, error;
3140
3141         adapter->rx_buffer_area =
3142                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3143                         M_DEVBUF, M_WAITOK | M_ZERO);
3144
3145         /*
3146          * Create DMA tag for rx buffers
3147          */
3148         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3149                         1, 0,                   /* alignment, bounds */
3150                         BUS_SPACE_MAXADDR,      /* lowaddr */
3151                         BUS_SPACE_MAXADDR,      /* highaddr */
3152                         NULL, NULL,             /* filter, filterarg */
3153                         MCLBYTES,               /* maxsize */
3154                         1,                      /* nsegments */
3155                         MCLBYTES,               /* maxsegsize */
3156                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3157                         &adapter->rxtag);
3158         if (error) {
3159                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3160                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3161                 adapter->rx_buffer_area = NULL;
3162                 return error;
3163         }
3164
3165         /*
3166          * Create spare DMA map for rx buffers
3167          */
3168         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3169                                   &adapter->rx_sparemap);
3170         if (error) {
3171                 device_printf(dev, "Unable to create spare RX DMA map\n");
3172                 bus_dma_tag_destroy(adapter->rxtag);
3173                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3174                 adapter->rx_buffer_area = NULL;
3175                 return error;
3176         }
3177
3178         /*
3179          * Create DMA maps for rx buffers
3180          */
3181         for (i = 0; i < adapter->num_rx_desc; i++) {
3182                 rx_buffer = &adapter->rx_buffer_area[i];
3183
3184                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3185                                           &rx_buffer->map);
3186                 if (error) {
3187                         device_printf(dev, "Unable to create RX DMA map\n");
3188                         em_destroy_rx_ring(adapter, i);
3189                         return error;
3190                 }
3191         }
3192         return (0);
3193 }
3194
3195 static int
3196 em_init_rx_ring(struct adapter *adapter)
3197 {
3198         int i, error;
3199
3200         /* Reset descriptor ring */
3201         bzero(adapter->rx_desc_base,
3202             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3203
3204         /* Allocate new ones. */
3205         for (i = 0; i < adapter->num_rx_desc; i++) {
3206                 error = em_newbuf(adapter, i, 1);
3207                 if (error)
3208                         return (error);
3209         }
3210
3211         /* Setup our descriptor pointers */
3212         adapter->next_rx_desc_to_check = 0;
3213
3214         return (0);
3215 }
3216
3217 static void
3218 em_init_rx_unit(struct adapter *adapter)
3219 {
3220         struct ifnet *ifp = &adapter->arpcom.ac_if;
3221         uint64_t bus_addr;
3222         uint32_t rctl;
3223
3224         /*
3225          * Make sure receives are disabled while setting
3226          * up the descriptor ring
3227          */
3228         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3229         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3230
3231         if (adapter->hw.mac.type >= e1000_82540) {
3232                 uint32_t itr;
3233
3234                 /*
3235                  * Set the interrupt throttling rate. Value is calculated
3236                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3237                  */
3238                 if (adapter->int_throttle_ceil)
3239                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3240                 else
3241                         itr = 0;
3242                 em_set_itr(adapter, itr);
3243         }
3244
3245         /* Disable accelerated ackknowledge */
3246         if (adapter->hw.mac.type == e1000_82574) {
3247                 E1000_WRITE_REG(&adapter->hw,
3248                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3249         }
3250
3251         /* Receive Checksum Offload for TCP and UDP */
3252         if (ifp->if_capenable & IFCAP_RXCSUM) {
3253                 uint32_t rxcsum;
3254
3255                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3256                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3257                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3258         }
3259
3260         /*
3261          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3262          * long latencies are observed, like Lenovo X60. This
3263          * change eliminates the problem, but since having positive
3264          * values in RDTR is a known source of problems on other
3265          * platforms another solution is being sought.
3266          */
3267         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3268                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3269                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3270         }
3271
3272         /*
3273          * Setup the Base and Length of the Rx Descriptor Ring
3274          */
3275         bus_addr = adapter->rxdma.dma_paddr;
3276         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3277             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3278         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3279             (uint32_t)(bus_addr >> 32));
3280         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3281             (uint32_t)bus_addr);
3282
3283         /*
3284          * Setup the HW Rx Head and Tail Descriptor Pointers
3285          */
3286         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3287         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3288
3289         /* Set PTHRESH for improved jumbo performance */
3290         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3291             (adapter->hw.mac.type == e1000_pch2lan) ||
3292             (adapter->hw.mac.type == e1000_ich10lan)) &&
3293             (ifp->if_mtu > ETHERMTU)) {
3294                 uint32_t rxdctl;
3295
3296                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3297                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3298         }
3299
3300         if (adapter->hw.mac.type >= e1000_pch2lan) {
3301                 if (ifp->if_mtu > ETHERMTU)
3302                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3303                 else
3304                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3305         }
3306
3307         /* Setup the Receive Control Register */
3308         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3309         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3310                 E1000_RCTL_RDMTS_HALF |
3311                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3312
3313         /* Make sure VLAN Filters are off */
3314         rctl &= ~E1000_RCTL_VFE;
3315
3316         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3317                 rctl |= E1000_RCTL_SBP;
3318         else
3319                 rctl &= ~E1000_RCTL_SBP;
3320
3321         switch (adapter->rx_buffer_len) {
3322         default:
3323         case 2048:
3324                 rctl |= E1000_RCTL_SZ_2048;
3325                 break;
3326
3327         case 4096:
3328                 rctl |= E1000_RCTL_SZ_4096 |
3329                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3330                 break;
3331
3332         case 8192:
3333                 rctl |= E1000_RCTL_SZ_8192 |
3334                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3335                 break;
3336
3337         case 16384:
3338                 rctl |= E1000_RCTL_SZ_16384 |
3339                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3340                 break;
3341         }
3342
3343         if (ifp->if_mtu > ETHERMTU)
3344                 rctl |= E1000_RCTL_LPE;
3345         else
3346                 rctl &= ~E1000_RCTL_LPE;
3347
3348         /* Enable Receives */
3349         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3350 }
3351
3352 static void
3353 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3354 {
3355         struct em_buffer *rx_buffer;
3356         int i;
3357
3358         if (adapter->rx_buffer_area == NULL)
3359                 return;
3360
3361         for (i = 0; i < ndesc; i++) {
3362                 rx_buffer = &adapter->rx_buffer_area[i];
3363
3364                 KKASSERT(rx_buffer->m_head == NULL);
3365                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3366         }
3367         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3368         bus_dma_tag_destroy(adapter->rxtag);
3369
3370         kfree(adapter->rx_buffer_area, M_DEVBUF);
3371         adapter->rx_buffer_area = NULL;
3372 }
3373
3374 static void
3375 em_rxeof(struct adapter *adapter, int count)
3376 {
3377         struct ifnet *ifp = &adapter->arpcom.ac_if;
3378         uint8_t status, accept_frame = 0, eop = 0;
3379         uint16_t len, desc_len, prev_len_adj;
3380         struct e1000_rx_desc *current_desc;
3381         struct mbuf *mp;
3382         int i;
3383
3384         i = adapter->next_rx_desc_to_check;
3385         current_desc = &adapter->rx_desc_base[i];
3386
3387         if (!(current_desc->status & E1000_RXD_STAT_DD))
3388                 return;
3389
3390         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3391                 struct mbuf *m = NULL;
3392
3393                 logif(pkt_receive);
3394
3395                 mp = adapter->rx_buffer_area[i].m_head;
3396
3397                 /*
3398                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3399                  * needs to access the last received byte in the mbuf.
3400                  */
3401                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3402                                 BUS_DMASYNC_POSTREAD);
3403
3404                 accept_frame = 1;
3405                 prev_len_adj = 0;
3406                 desc_len = le16toh(current_desc->length);
3407                 status = current_desc->status;
3408                 if (status & E1000_RXD_STAT_EOP) {
3409                         count--;
3410                         eop = 1;
3411                         if (desc_len < ETHER_CRC_LEN) {
3412                                 len = 0;
3413                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3414                         } else {
3415                                 len = desc_len - ETHER_CRC_LEN;
3416                         }
3417                 } else {
3418                         eop = 0;
3419                         len = desc_len;
3420                 }
3421
3422                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3423                         uint8_t last_byte;
3424                         uint32_t pkt_len = desc_len;
3425
3426                         if (adapter->fmp != NULL)
3427                                 pkt_len += adapter->fmp->m_pkthdr.len;
3428
3429                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3430                         if (TBI_ACCEPT(&adapter->hw, status,
3431                             current_desc->errors, pkt_len, last_byte,
3432                             adapter->min_frame_size,
3433                             adapter->hw.mac.max_frame_size)) {
3434                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3435                                     &adapter->stats, pkt_len,
3436                                     adapter->hw.mac.addr,
3437                                     adapter->hw.mac.max_frame_size);
3438                                 if (len > 0)
3439                                         len--;
3440                         } else {
3441                                 accept_frame = 0;
3442                         }
3443                 }
3444
3445                 if (accept_frame) {
3446                         if (em_newbuf(adapter, i, 0) != 0) {
3447                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3448                                 goto discard;
3449                         }
3450
3451                         /* Assign correct length to the current fragment */
3452                         mp->m_len = len;
3453
3454                         if (adapter->fmp == NULL) {
3455                                 mp->m_pkthdr.len = len;
3456                                 adapter->fmp = mp; /* Store the first mbuf */
3457                                 adapter->lmp = mp;
3458                         } else {
3459                                 /*
3460                                  * Chain mbuf's together
3461                                  */
3462
3463                                 /*
3464                                  * Adjust length of previous mbuf in chain if
3465                                  * we received less than 4 bytes in the last
3466                                  * descriptor.
3467                                  */
3468                                 if (prev_len_adj > 0) {
3469                                         adapter->lmp->m_len -= prev_len_adj;
3470                                         adapter->fmp->m_pkthdr.len -=
3471                                             prev_len_adj;
3472                                 }
3473                                 adapter->lmp->m_next = mp;
3474                                 adapter->lmp = adapter->lmp->m_next;
3475                                 adapter->fmp->m_pkthdr.len += len;
3476                         }
3477
3478                         if (eop) {
3479                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3480                                 IFNET_STAT_INC(ifp, ipackets, 1);
3481
3482                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3483                                         em_rxcsum(adapter, current_desc,
3484                                                   adapter->fmp);
3485                                 }
3486
3487                                 if (status & E1000_RXD_STAT_VP) {
3488                                         adapter->fmp->m_pkthdr.ether_vlantag =
3489                                             (le16toh(current_desc->special) &
3490                                             E1000_RXD_SPC_VLAN_MASK);
3491                                         adapter->fmp->m_flags |= M_VLANTAG;
3492                                 }
3493                                 m = adapter->fmp;
3494                                 adapter->fmp = NULL;
3495                                 adapter->lmp = NULL;
3496                         }
3497                 } else {
3498                         IFNET_STAT_INC(ifp, ierrors, 1);
3499 discard:
3500 #ifdef foo
3501                         /* Reuse loaded DMA map and just update mbuf chain */
3502                         mp = adapter->rx_buffer_area[i].m_head;
3503                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3504                         mp->m_data = mp->m_ext.ext_buf;
3505                         mp->m_next = NULL;
3506                         if (adapter->hw.mac.max_frame_size <=
3507                             (MCLBYTES - ETHER_ALIGN))
3508                                 m_adj(mp, ETHER_ALIGN);
3509 #endif
3510                         if (adapter->fmp != NULL) {
3511                                 m_freem(adapter->fmp);
3512                                 adapter->fmp = NULL;
3513                                 adapter->lmp = NULL;
3514                         }
3515                         m = NULL;
3516                 }
3517
3518                 /* Zero out the receive descriptors status. */
3519                 current_desc->status = 0;
3520
3521                 if (m != NULL)
3522                         ifp->if_input(ifp, m, NULL, -1);
3523
3524                 /* Advance our pointers to the next descriptor. */
3525                 if (++i == adapter->num_rx_desc)
3526                         i = 0;
3527                 current_desc = &adapter->rx_desc_base[i];
3528         }
3529         adapter->next_rx_desc_to_check = i;
3530
3531         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3532         if (--i < 0)
3533                 i = adapter->num_rx_desc - 1;
3534         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3535 }
3536
3537 static void
3538 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3539           struct mbuf *mp)
3540 {
3541         /* 82543 or newer only */
3542         if (adapter->hw.mac.type < e1000_82543 ||
3543             /* Ignore Checksum bit is set */
3544             (rx_desc->status & E1000_RXD_STAT_IXSM))
3545                 return;
3546
3547         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3548             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3549                 /* IP Checksum Good */
3550                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3551         }
3552
3553         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3554             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3555                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3556                                            CSUM_PSEUDO_HDR |
3557                                            CSUM_FRAG_NOT_CHECKED;
3558                 mp->m_pkthdr.csum_data = htons(0xffff);
3559         }
3560 }
3561
3562 static void
3563 em_enable_intr(struct adapter *adapter)
3564 {
3565         uint32_t ims_mask = IMS_ENABLE_MASK;
3566
3567         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3568
3569 #if 0
3570         /* XXX MSIX */
3571         if (adapter->hw.mac.type == e1000_82574) {
3572                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3573                 ims_mask |= EM_MSIX_MASK;
3574         }
3575 #endif
3576         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3577 }
3578
3579 static void
3580 em_disable_intr(struct adapter *adapter)
3581 {
3582         uint32_t clear = 0xffffffff;
3583
3584         /*
3585          * The first version of 82542 had an errata where when link was forced
3586          * it would stay up even up even if the cable was disconnected.
3587          * Sequence errors were used to detect the disconnect and then the
3588          * driver would unforce the link.  This code in the in the ISR.  For
3589          * this to work correctly the Sequence error interrupt had to be
3590          * enabled all the time.
3591          */
3592         if (adapter->hw.mac.type == e1000_82542 &&
3593             adapter->hw.revision_id == E1000_REVISION_2)
3594                 clear &= ~E1000_ICR_RXSEQ;
3595         else if (adapter->hw.mac.type == e1000_82574)
3596                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3597
3598         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3599
3600         adapter->npoll.ifpc_stcount = 0;
3601
3602         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3603 }
3604
3605 /*
3606  * Bit of a misnomer, what this really means is
3607  * to enable OS management of the system... aka
3608  * to disable special hardware management features
3609  */
3610 static void
3611 em_get_mgmt(struct adapter *adapter)
3612 {
3613         /* A shared code workaround */
3614 #define E1000_82542_MANC2H E1000_MANC2H
3615         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3616                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3617                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3618
3619                 /* disable hardware interception of ARP */
3620                 manc &= ~(E1000_MANC_ARP_EN);
3621
3622                 /* enable receiving management packets to the host */
3623                 if (adapter->hw.mac.type >= e1000_82571) {
3624                         manc |= E1000_MANC_EN_MNG2HOST;
3625 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3626 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3627                         manc2h |= E1000_MNG2HOST_PORT_623;
3628                         manc2h |= E1000_MNG2HOST_PORT_664;
3629                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3630                 }
3631
3632                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3633         }
3634 }
3635
3636 /*
3637  * Give control back to hardware management
3638  * controller if there is one.
3639  */
3640 static void
3641 em_rel_mgmt(struct adapter *adapter)
3642 {
3643         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3644                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3645
3646                 /* re-enable hardware interception of ARP */
3647                 manc |= E1000_MANC_ARP_EN;
3648
3649                 if (adapter->hw.mac.type >= e1000_82571)
3650                         manc &= ~E1000_MANC_EN_MNG2HOST;
3651
3652                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3653         }
3654 }
3655
3656 /*
3657  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3658  * For ASF and Pass Through versions of f/w this means that
3659  * the driver is loaded.  For AMT version (only with 82573)
3660  * of the f/w this means that the network i/f is open.
3661  */
3662 static void
3663 em_get_hw_control(struct adapter *adapter)
3664 {
3665         /* Let firmware know the driver has taken over */
3666         if (adapter->hw.mac.type == e1000_82573) {
3667                 uint32_t swsm;
3668
3669                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3670                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3671                     swsm | E1000_SWSM_DRV_LOAD);
3672         } else {
3673                 uint32_t ctrl_ext;
3674
3675                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3676                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3677                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3678         }
3679         adapter->flags |= EM_FLAG_HW_CTRL;
3680 }
3681
3682 /*
3683  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3684  * For ASF and Pass Through versions of f/w this means that the
3685  * driver is no longer loaded.  For AMT version (only with 82573)
3686  * of the f/w this means that the network i/f is closed.
3687  */
3688 static void
3689 em_rel_hw_control(struct adapter *adapter)
3690 {
3691         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3692                 return;
3693         adapter->flags &= ~EM_FLAG_HW_CTRL;
3694
3695         /* Let firmware taken over control of h/w */
3696         if (adapter->hw.mac.type == e1000_82573) {
3697                 uint32_t swsm;
3698
3699                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3700                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3701                     swsm & ~E1000_SWSM_DRV_LOAD);
3702         } else {
3703                 uint32_t ctrl_ext;
3704
3705                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3706                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3707                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3708         }
3709 }
3710
3711 static int
3712 em_is_valid_eaddr(const uint8_t *addr)
3713 {
3714         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3715
3716         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3717                 return (FALSE);
3718
3719         return (TRUE);
3720 }
3721
3722 /*
3723  * Enable PCI Wake On Lan capability
3724  */
3725 void
3726 em_enable_wol(device_t dev)
3727 {
3728         uint16_t cap, status;
3729         uint8_t id;
3730
3731         /* First find the capabilities pointer*/
3732         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3733
3734         /* Read the PM Capabilities */
3735         id = pci_read_config(dev, cap, 1);
3736         if (id != PCIY_PMG)     /* Something wrong */
3737                 return;
3738
3739         /*
3740          * OK, we have the power capabilities,
3741          * so now get the status register
3742          */
3743         cap += PCIR_POWER_STATUS;
3744         status = pci_read_config(dev, cap, 2);
3745         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3746         pci_write_config(dev, cap, status, 2);
3747 }
3748
3749
3750 /*
3751  * 82544 Coexistence issue workaround.
3752  *    There are 2 issues.
3753  *       1. Transmit Hang issue.
3754  *    To detect this issue, following equation can be used...
3755  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3756  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3757  *
3758  *       2. DAC issue.
3759  *    To detect this issue, following equation can be used...
3760  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3761  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3762  *
3763  *    WORKAROUND:
3764  *        Make sure we do not have ending address
3765  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3766  */
3767 static uint32_t
3768 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3769 {
3770         uint32_t safe_terminator;
3771
3772         /*
3773          * Since issue is sensitive to length and address.
3774          * Let us first check the address...
3775          */
3776         if (length <= 4) {
3777                 desc_array->descriptor[0].address = address;
3778                 desc_array->descriptor[0].length = length;
3779                 desc_array->elements = 1;
3780                 return (desc_array->elements);
3781         }
3782
3783         safe_terminator =
3784         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3785
3786         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3787         if (safe_terminator == 0 ||
3788             (safe_terminator > 4 && safe_terminator < 9) ||
3789             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3790                 desc_array->descriptor[0].address = address;
3791                 desc_array->descriptor[0].length = length;
3792                 desc_array->elements = 1;
3793                 return (desc_array->elements);
3794         }
3795
3796         desc_array->descriptor[0].address = address;
3797         desc_array->descriptor[0].length = length - 4;
3798         desc_array->descriptor[1].address = address + (length - 4);
3799         desc_array->descriptor[1].length = 4;
3800         desc_array->elements = 2;
3801         return (desc_array->elements);
3802 }
3803
3804 static void
3805 em_update_stats(struct adapter *adapter)
3806 {
3807         struct ifnet *ifp = &adapter->arpcom.ac_if;
3808
3809         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3810             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3811                 adapter->stats.symerrs +=
3812                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3813                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3814         }
3815         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3816         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3817         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3818         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3819
3820         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3821         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3822         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3823         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3824         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3825         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3826         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3827         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3828         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3829         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3830         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3831         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3832         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3833         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3834         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3835         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3836         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3837         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3838         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3839         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3840
3841         /* For the 64-bit byte counters the low dword must be read first. */
3842         /* Both registers clear on the read of the high dword */
3843
3844         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3845         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3846
3847         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3848         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3849         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3850         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3851         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3852
3853         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3854         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3855
3856         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3857         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3858         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3859         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3860         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3861         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3862         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3863         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3864         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3865         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3866
3867         if (adapter->hw.mac.type >= e1000_82543) {
3868                 adapter->stats.algnerrc +=
3869                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3870                 adapter->stats.rxerrc +=
3871                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3872                 adapter->stats.tncrs +=
3873                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3874                 adapter->stats.cexterr +=
3875                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3876                 adapter->stats.tsctc +=
3877                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3878                 adapter->stats.tsctfc +=
3879                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3880         }
3881
3882         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3883
3884         /* Rx Errors */
3885         IFNET_STAT_SET(ifp, ierrors,
3886             adapter->dropped_pkts + adapter->stats.rxerrc +
3887             adapter->stats.crcerrs + adapter->stats.algnerrc +
3888             adapter->stats.ruc + adapter->stats.roc +
3889             adapter->stats.mpc + adapter->stats.cexterr);
3890
3891         /* Tx Errors */
3892         IFNET_STAT_SET(ifp, oerrors,
3893             adapter->stats.ecol + adapter->stats.latecol +
3894             adapter->watchdog_events);
3895 }
3896
3897 static void
3898 em_print_debug_info(struct adapter *adapter)
3899 {
3900         device_t dev = adapter->dev;
3901         uint8_t *hw_addr = adapter->hw.hw_addr;
3902
3903         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3904         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3905             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3906             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3907         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3908             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3909             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3910         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3911             adapter->hw.fc.high_water,
3912             adapter->hw.fc.low_water);
3913         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3914             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3915             E1000_READ_REG(&adapter->hw, E1000_TADV));
3916         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3917             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3918             E1000_READ_REG(&adapter->hw, E1000_RADV));
3919         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3920             (long long)adapter->tx_fifo_wrk_cnt,
3921             (long long)adapter->tx_fifo_reset_cnt);
3922         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3923             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3924             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3925         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3926             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3927             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3928         device_printf(dev, "Num Tx descriptors avail = %d\n",
3929             adapter->num_tx_desc_avail);
3930         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3931             adapter->no_tx_desc_avail1);
3932         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3933             adapter->no_tx_desc_avail2);
3934         device_printf(dev, "Std mbuf failed = %ld\n",
3935             adapter->mbuf_alloc_failed);
3936         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3937             adapter->mbuf_cluster_failed);
3938         device_printf(dev, "Driver dropped packets = %ld\n",
3939             adapter->dropped_pkts);
3940         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3941             adapter->no_tx_dma_setup);
3942 }
3943
3944 static void
3945 em_print_hw_stats(struct adapter *adapter)
3946 {
3947         device_t dev = adapter->dev;
3948
3949         device_printf(dev, "Excessive collisions = %lld\n",
3950             (long long)adapter->stats.ecol);
3951 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3952         device_printf(dev, "Symbol errors = %lld\n",
3953             (long long)adapter->stats.symerrs);
3954 #endif
3955         device_printf(dev, "Sequence errors = %lld\n",
3956             (long long)adapter->stats.sec);
3957         device_printf(dev, "Defer count = %lld\n",
3958             (long long)adapter->stats.dc);
3959         device_printf(dev, "Missed Packets = %lld\n",
3960             (long long)adapter->stats.mpc);
3961         device_printf(dev, "Receive No Buffers = %lld\n",
3962             (long long)adapter->stats.rnbc);
3963         /* RLEC is inaccurate on some hardware, calculate our own. */
3964         device_printf(dev, "Receive Length Errors = %lld\n",
3965             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3966         device_printf(dev, "Receive errors = %lld\n",
3967             (long long)adapter->stats.rxerrc);
3968         device_printf(dev, "Crc errors = %lld\n",
3969             (long long)adapter->stats.crcerrs);
3970         device_printf(dev, "Alignment errors = %lld\n",
3971             (long long)adapter->stats.algnerrc);
3972         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3973             (long long)adapter->stats.cexterr);
3974         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3975         device_printf(dev, "watchdog timeouts = %ld\n",
3976             adapter->watchdog_events);
3977         device_printf(dev, "XON Rcvd = %lld\n",
3978             (long long)adapter->stats.xonrxc);
3979         device_printf(dev, "XON Xmtd = %lld\n",
3980             (long long)adapter->stats.xontxc);
3981         device_printf(dev, "XOFF Rcvd = %lld\n",
3982             (long long)adapter->stats.xoffrxc);
3983         device_printf(dev, "XOFF Xmtd = %lld\n",
3984             (long long)adapter->stats.xofftxc);
3985         device_printf(dev, "Good Packets Rcvd = %lld\n",
3986             (long long)adapter->stats.gprc);
3987         device_printf(dev, "Good Packets Xmtd = %lld\n",
3988             (long long)adapter->stats.gptc);
3989 }
3990
3991 static void
3992 em_print_nvm_info(struct adapter *adapter)
3993 {
3994         uint16_t eeprom_data;
3995         int i, j, row = 0;
3996
3997         /* Its a bit crude, but it gets the job done */
3998         kprintf("\nInterface EEPROM Dump:\n");
3999         kprintf("Offset\n0x0000  ");
4000         for (i = 0, j = 0; i < 32; i++, j++) {
4001                 if (j == 8) { /* Make the offset block */
4002                         j = 0; ++row;
4003                         kprintf("\n0x00%x0  ",row);
4004                 }
4005                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
4006                 kprintf("%04x ", eeprom_data);
4007         }
4008         kprintf("\n");
4009 }
4010
4011 static int
4012 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
4013 {
4014         struct adapter *adapter;
4015         struct ifnet *ifp;
4016         int error, result;
4017
4018         result = -1;
4019         error = sysctl_handle_int(oidp, &result, 0, req);
4020         if (error || !req->newptr)
4021                 return (error);
4022
4023         adapter = (struct adapter *)arg1;
4024         ifp = &adapter->arpcom.ac_if;
4025
4026         lwkt_serialize_enter(ifp->if_serializer);
4027
4028         if (result == 1)
4029                 em_print_debug_info(adapter);
4030
4031         /*
4032          * This value will cause a hex dump of the
4033          * first 32 16-bit words of the EEPROM to
4034          * the screen.
4035          */
4036         if (result == 2)
4037                 em_print_nvm_info(adapter);
4038
4039         lwkt_serialize_exit(ifp->if_serializer);
4040
4041         return (error);
4042 }
4043
4044 static int
4045 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4046 {
4047         int error, result;
4048
4049         result = -1;
4050         error = sysctl_handle_int(oidp, &result, 0, req);
4051         if (error || !req->newptr)
4052                 return (error);
4053
4054         if (result == 1) {
4055                 struct adapter *adapter = (struct adapter *)arg1;
4056                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4057
4058                 lwkt_serialize_enter(ifp->if_serializer);
4059                 em_print_hw_stats(adapter);
4060                 lwkt_serialize_exit(ifp->if_serializer);
4061         }
4062         return (error);
4063 }
4064
4065 static void
4066 em_add_sysctl(struct adapter *adapter)
4067 {
4068         struct sysctl_ctx_list *ctx;
4069         struct sysctl_oid *tree;
4070
4071         ctx = device_get_sysctl_ctx(adapter->dev);
4072         tree = device_get_sysctl_tree(adapter->dev);
4073         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4074             OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4075             em_sysctl_debug_info, "I", "Debug Information");
4076
4077         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4078             OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4079             em_sysctl_stats, "I", "Statistics");
4080
4081         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4082             OID_AUTO, "rxd", CTLFLAG_RD,
4083             &adapter->num_rx_desc, 0, NULL);
4084         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4085             OID_AUTO, "txd", CTLFLAG_RD,
4086             &adapter->num_tx_desc, 0, NULL);
4087
4088         if (adapter->hw.mac.type >= e1000_82540) {
4089                 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4090                     OID_AUTO, "int_throttle_ceil",
4091                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4092                     em_sysctl_int_throttle, "I",
4093                     "interrupt throttling rate");
4094         }
4095         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4096             OID_AUTO, "int_tx_nsegs",
4097             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4098             em_sysctl_int_tx_nsegs, "I",
4099             "# segments per TX interrupt");
4100         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4101             OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4102             &adapter->tx_wreg_nsegs, 0,
4103             "# segments before write to hardware register");
4104 }
4105
4106 static int
4107 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4108 {
4109         struct adapter *adapter = (void *)arg1;
4110         struct ifnet *ifp = &adapter->arpcom.ac_if;
4111         int error, throttle;
4112
4113         throttle = adapter->int_throttle_ceil;
4114         error = sysctl_handle_int(oidp, &throttle, 0, req);
4115         if (error || req->newptr == NULL)
4116                 return error;
4117         if (throttle < 0 || throttle > 1000000000 / 256)
4118                 return EINVAL;
4119
4120         if (throttle) {
4121                 /*
4122                  * Set the interrupt throttling rate in 256ns increments,
4123                  * recalculate sysctl value assignment to get exact frequency.
4124                  */
4125                 throttle = 1000000000 / 256 / throttle;
4126
4127                 /* Upper 16bits of ITR is reserved and should be zero */
4128                 if (throttle & 0xffff0000)
4129                         return EINVAL;
4130         }
4131
4132         lwkt_serialize_enter(ifp->if_serializer);
4133
4134         if (throttle)
4135                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4136         else
4137                 adapter->int_throttle_ceil = 0;
4138
4139         if (ifp->if_flags & IFF_RUNNING)
4140                 em_set_itr(adapter, throttle);
4141
4142         lwkt_serialize_exit(ifp->if_serializer);
4143
4144         if (bootverbose) {
4145                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4146                           adapter->int_throttle_ceil);
4147         }
4148         return 0;
4149 }
4150
4151 static int
4152 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4153 {
4154         struct adapter *adapter = (void *)arg1;
4155         struct ifnet *ifp = &adapter->arpcom.ac_if;
4156         int error, segs;
4157
4158         segs = adapter->tx_int_nsegs;
4159         error = sysctl_handle_int(oidp, &segs, 0, req);
4160         if (error || req->newptr == NULL)
4161                 return error;
4162         if (segs <= 0)
4163                 return EINVAL;
4164
4165         lwkt_serialize_enter(ifp->if_serializer);
4166
4167         /*
4168          * Don't allow int_tx_nsegs to become:
4169          * o  Less the oact_tx_desc
4170          * o  Too large that no TX desc will cause TX interrupt to
4171          *    be generated (OACTIVE will never recover)
4172          * o  Too small that will cause tx_dd[] overflow
4173          */
4174         if (segs < adapter->oact_tx_desc ||
4175             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4176             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4177                 error = EINVAL;
4178         } else {
4179                 error = 0;
4180                 adapter->tx_int_nsegs = segs;
4181         }
4182
4183         lwkt_serialize_exit(ifp->if_serializer);
4184
4185         return error;
4186 }
4187
4188 static void
4189 em_set_itr(struct adapter *adapter, uint32_t itr)
4190 {
4191         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4192         if (adapter->hw.mac.type == e1000_82574) {
4193                 int i;
4194
4195                 /*
4196                  * When using MSIX interrupts we need to
4197                  * throttle using the EITR register
4198                  */
4199                 for (i = 0; i < 4; ++i) {
4200                         E1000_WRITE_REG(&adapter->hw,
4201                             E1000_EITR_82574(i), itr);
4202                 }
4203         }
4204 }
4205
4206 static void
4207 em_disable_aspm(struct adapter *adapter)
4208 {
4209         uint16_t link_cap, link_ctrl, disable;
4210         uint8_t pcie_ptr, reg;
4211         device_t dev = adapter->dev;
4212
4213         switch (adapter->hw.mac.type) {
4214         case e1000_82571:
4215         case e1000_82572:
4216         case e1000_82573:
4217                 /*
4218                  * 82573 specification update
4219                  * errata #8 disable L0s
4220                  * errata #41 disable L1
4221                  *
4222                  * 82571/82572 specification update
4223                  # errata #13 disable L1
4224                  * errata #68 disable L0s
4225                  */
4226                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4227                 break;
4228
4229         case e1000_82574:
4230         case e1000_82583:
4231                 /*
4232                  * 82574 specification update errata #20
4233                  * 82583 specification update errata #9
4234                  *
4235                  * There is no need to disable L1
4236                  */
4237                 disable = PCIEM_LNKCTL_ASPM_L0S;
4238                 break;
4239
4240         default:
4241                 return;
4242         }
4243
4244         pcie_ptr = pci_get_pciecap_ptr(dev);
4245         if (pcie_ptr == 0)
4246                 return;
4247
4248         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4249         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4250                 return;
4251
4252         if (bootverbose) {
4253                 if_printf(&adapter->arpcom.ac_if,
4254                     "disable ASPM %#02x\n", disable);
4255         }
4256
4257         reg = pcie_ptr + PCIER_LINKCTRL;
4258         link_ctrl = pci_read_config(dev, reg, 2);
4259         link_ctrl &= ~disable;
4260         pci_write_config(dev, reg, link_ctrl, 2);
4261 }
4262
4263 static int
4264 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4265 {
4266         int iphlen, hoff, thoff, ex = 0;
4267         struct mbuf *m;
4268         struct ip *ip;
4269
4270         m = *mp;
4271         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4272
4273         iphlen = m->m_pkthdr.csum_iphlen;
4274         thoff = m->m_pkthdr.csum_thlen;
4275         hoff = m->m_pkthdr.csum_lhlen;
4276
4277         KASSERT(iphlen > 0, ("invalid ip hlen"));
4278         KASSERT(thoff > 0, ("invalid tcp hlen"));
4279         KASSERT(hoff > 0, ("invalid ether hlen"));
4280
4281         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4282                 ex = 4;
4283
4284         if (m->m_len < hoff + iphlen + thoff + ex) {
4285                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4286                 if (m == NULL) {
4287                         *mp = NULL;
4288                         return ENOBUFS;
4289                 }
4290                 *mp = m;
4291         }
4292         ip = mtodoff(m, struct ip *, hoff);
4293         ip->ip_len = 0;
4294
4295         return 0;
4296 }
4297
4298 static int
4299 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4300     uint32_t *txd_upper, uint32_t *txd_lower)
4301 {
4302         struct e1000_context_desc *TXD;
4303         int hoff, iphlen, thoff, hlen;
4304         int mss, pktlen, curr_txd;
4305
4306         iphlen = mp->m_pkthdr.csum_iphlen;
4307         thoff = mp->m_pkthdr.csum_thlen;
4308         hoff = mp->m_pkthdr.csum_lhlen;
4309         mss = mp->m_pkthdr.tso_segsz;
4310         pktlen = mp->m_pkthdr.len;
4311
4312         if (adapter->csum_flags == CSUM_TSO &&
4313             adapter->csum_iphlen == iphlen &&
4314             adapter->csum_lhlen == hoff &&
4315             adapter->csum_thlen == thoff &&
4316             adapter->csum_mss == mss &&
4317             adapter->csum_pktlen == pktlen) {
4318                 *txd_upper = adapter->csum_txd_upper;
4319                 *txd_lower = adapter->csum_txd_lower;
4320                 return 0;
4321         }
4322         hlen = hoff + iphlen + thoff;
4323
4324         /*
4325          * Setup a new TSO context.
4326          */
4327
4328         curr_txd = adapter->next_avail_tx_desc;
4329         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4330
4331         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4332                      E1000_TXD_DTYP_D |         /* Data descr type */
4333                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4334
4335         /* IP and/or TCP header checksum calculation and insertion. */
4336         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4337
4338         /*
4339          * Start offset for header checksum calculation.
4340          * End offset for header checksum calculation.
4341          * Offset of place put the checksum.
4342          */
4343         TXD->lower_setup.ip_fields.ipcss = hoff;
4344         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4345         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4346
4347         /*
4348          * Start offset for payload checksum calculation.
4349          * End offset for payload checksum calculation.
4350          * Offset of place to put the checksum.
4351          */
4352         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4353         TXD->upper_setup.tcp_fields.tucse = 0;
4354         TXD->upper_setup.tcp_fields.tucso =
4355             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4356
4357         /*
4358          * Payload size per packet w/o any headers.
4359          * Length of all headers up to payload.
4360          */
4361         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4362         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4363         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4364                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4365                                 E1000_TXD_CMD_TSE |     /* TSE context */
4366                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4367                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4368                                 (pktlen - hlen));       /* Total len */
4369
4370         /* Save the information for this TSO context */
4371         adapter->csum_flags = CSUM_TSO;
4372         adapter->csum_lhlen = hoff;
4373         adapter->csum_iphlen = iphlen;
4374         adapter->csum_thlen = thoff;
4375         adapter->csum_mss = mss;
4376         adapter->csum_pktlen = pktlen;
4377         adapter->csum_txd_upper = *txd_upper;
4378         adapter->csum_txd_lower = *txd_lower;
4379
4380         if (++curr_txd == adapter->num_tx_desc)
4381                 curr_txd = 0;
4382
4383         KKASSERT(adapter->num_tx_desc_avail > 0);
4384         adapter->num_tx_desc_avail--;
4385
4386         adapter->next_avail_tx_desc = curr_txd;
4387         return 1;
4388 }