2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
47 #include "opt_directio.h"
50 #include "opt_maxmem.h"
51 #include "opt_msgbuf.h"
52 #include "opt_perfmon.h"
54 #include "opt_userconfig.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
67 #include <sys/reboot.h>
69 #include <sys/msgbuf.h>
70 #include <sys/sysent.h>
71 #include <sys/sysctl.h>
72 #include <sys/vmmeter.h>
74 #include <sys/upcall.h>
75 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
89 #include <sys/mplock2.h>
97 #include <machine/cpu.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
104 #include <machine/smp.h>
106 #include <machine/perfmon.h>
108 #include <machine/cputypes.h>
109 #include <machine/intr_machdep.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/isa_intr.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #include <sys/machintr.h>
122 #include <machine_base/icu/icu_abi.h>
123 #include <machine_base/icu/elcr_var.h>
124 #include <machine_base/apic/ioapic_abi.h>
126 #define PHYSMAP_ENTRIES 10
128 extern void init386(int first);
129 extern void dblfault_handler(void);
131 extern void printcpuinfo(void); /* XXX header file */
132 extern void finishidentcpu(void);
133 extern void panicifcpuunsupported(void);
134 extern void initializecpu(void);
136 static void cpu_startup(void *);
137 #ifndef CPU_DISABLE_SSE
138 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
139 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
140 #endif /* CPU_DISABLE_SSE */
142 extern void ffs_rawread_setup(void);
143 #endif /* DIRECTIO */
144 static void init_locks(void);
146 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
148 int _udatasel, _ucodesel;
151 int64_t tsc_offsets[MAXCPU];
153 int64_t tsc_offsets[1];
156 #if defined(SWTCH_OPTIM_STATS)
157 extern int swtch_optim_stats;
158 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
159 CTLFLAG_RD, &swtch_optim_stats, 0, "");
160 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
161 CTLFLAG_RD, &tlb_flush_count, 0, "");
166 u_long ebda_addr = 0;
169 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
171 u_long pmem = ctob(physmem);
173 int error = sysctl_handle_long(oidp, &pmem, 0, req);
177 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
178 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
181 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
183 int error = sysctl_handle_int(oidp, 0,
184 ctob(physmem - vmstats.v_wire_count), req);
188 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
189 0, 0, sysctl_hw_usermem, "IU", "");
192 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
194 int error = sysctl_handle_int(oidp, 0,
195 i386_btop(avail_end - avail_start), req);
199 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
200 0, 0, sysctl_hw_availpages, "I", "");
205 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
206 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
209 static vm_offset_t buffer_sva, buffer_eva;
210 vm_offset_t clean_sva, clean_eva;
211 static vm_offset_t pager_sva, pager_eva;
212 static struct trapframe proc0_tf;
215 cpu_startup(void *dummy)
219 vm_offset_t firstaddr;
222 * Good {morning,afternoon,evening,night}.
224 kprintf("%s", version);
227 panicifcpuunsupported();
231 kprintf("real memory = %ju (%ju MB)\n",
233 (intmax_t)Realmem / 1024 / 1024);
235 * Display any holes after the first chunk of extended memory.
240 kprintf("Physical memory chunk(s):\n");
241 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
242 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
244 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
245 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
251 * Allocate space for system data structures.
252 * The first available kernel virtual address is in "v".
253 * As pages of kernel virtual memory are allocated, "v" is incremented.
254 * As pages of memory are allocated and cleared,
255 * "firstaddr" is incremented.
256 * An index into the kernel page table corresponding to the
257 * virtual memory address maintained in "v" is kept in "mapaddr".
261 * Make two passes. The first pass calculates how much memory is
262 * needed and allocates it. The second pass assigns virtual
263 * addresses to the various data structures.
267 v = (caddr_t)firstaddr;
269 #define valloc(name, type, num) \
270 (name) = (type *)v; v = (caddr_t)((name)+(num))
271 #define valloclim(name, type, num, lim) \
272 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
275 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
276 * For the first 64MB of ram nominally allocate sufficient buffers to
277 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
278 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
279 * the buffer cache we limit the eventual kva reservation to
282 * factor represents the 1/4 x ram conversion.
285 int factor = 4 * BKVASIZE / 1024;
286 int kbytes = physmem * (PAGE_SIZE / 1024);
290 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
292 nbuf += (kbytes - 65536) * 2 / (factor * 5);
293 if (maxbcache && nbuf > maxbcache / BKVASIZE)
294 nbuf = maxbcache / BKVASIZE;
298 * Do not allow the buffer_map to be more then 1/2 the size of the
301 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
302 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
303 kprintf("Warning: nbufs capped at %d\n", nbuf);
306 /* limit to 128 on i386 */
307 nswbuf = max(min(nbuf/4, 128), 16);
309 if (nswbuf < NSWBUF_MIN)
316 valloc(swbuf, struct buf, nswbuf);
317 valloc(buf, struct buf, nbuf);
320 * End of first pass, size has been calculated so allocate memory
322 if (firstaddr == 0) {
323 size = (vm_size_t)(v - firstaddr);
324 firstaddr = kmem_alloc(&kernel_map, round_page(size));
326 panic("startup: no room for tables");
331 * End of second pass, addresses have been assigned
333 if ((vm_size_t)(v - firstaddr) != size)
334 panic("startup: table size inconsistency");
336 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
337 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
338 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
340 buffer_map.system_map = 1;
341 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
342 (nswbuf*MAXPHYS) + pager_map_size);
343 pager_map.system_map = 1;
345 #if defined(USERCONFIG)
347 cninit(); /* the preferred console may have changed */
350 kprintf("avail memory = %ju (%ju MB)\n",
351 (intmax_t)ptoa(vmstats.v_free_count),
352 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
355 * Set up buffers, so they can be used to read disk labels.
358 vm_pager_bufferinit();
360 /* Log ELCR information */
365 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
367 mp_start(); /* fire up the APs and APICs */
370 MachIntrABI.finalize();
376 * Send an interrupt to process.
378 * Stack is set up to allow sigcode stored
379 * at top to call routine, followed by kcall
380 * to sigreturn routine below. After sigreturn
381 * resets the signal mask, the stack, and the
382 * frame pointer, it returns to the user
386 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
388 struct lwp *lp = curthread->td_lwp;
389 struct proc *p = lp->lwp_proc;
390 struct trapframe *regs;
391 struct sigacts *psp = p->p_sigacts;
392 struct sigframe sf, *sfp;
395 regs = lp->lwp_md.md_regs;
396 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
398 /* save user context */
399 bzero(&sf, sizeof(struct sigframe));
400 sf.sf_uc.uc_sigmask = *mask;
401 sf.sf_uc.uc_stack = lp->lwp_sigstk;
402 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
403 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
405 /* make the size of the saved context visible to userland */
406 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
408 /* save mailbox pending state for syscall interlock semantics */
409 if (p->p_flag & P_MAILBOX)
410 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
412 /* Allocate and validate space for the signal handler context. */
413 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
414 SIGISMEMBER(psp->ps_sigonstack, sig)) {
415 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
416 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
417 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
419 sfp = (struct sigframe *)regs->tf_esp - 1;
422 /* Translate the signal is appropriate */
423 if (p->p_sysent->sv_sigtbl) {
424 if (sig <= p->p_sysent->sv_sigsize)
425 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
428 /* Build the argument list for the signal handler. */
430 sf.sf_ucontext = (register_t)&sfp->sf_uc;
431 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
432 /* Signal handler installed with SA_SIGINFO. */
433 sf.sf_siginfo = (register_t)&sfp->sf_si;
434 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
436 /* fill siginfo structure */
437 sf.sf_si.si_signo = sig;
438 sf.sf_si.si_code = code;
439 sf.sf_si.si_addr = (void*)regs->tf_err;
442 /* Old FreeBSD-style arguments. */
443 sf.sf_siginfo = code;
444 sf.sf_addr = regs->tf_err;
445 sf.sf_ahu.sf_handler = catcher;
449 * If we're a vm86 process, we want to save the segment registers.
450 * We also change eflags to be our emulated eflags, not the actual
453 if (regs->tf_eflags & PSL_VM) {
454 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
455 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
457 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
458 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
459 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
460 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
462 if (vm86->vm86_has_vme == 0)
463 sf.sf_uc.uc_mcontext.mc_eflags =
464 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
465 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
468 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
469 * syscalls made by the signal handler. This just avoids
470 * wasting time for our lazy fixup of such faults. PSL_NT
471 * does nothing in vm86 mode, but vm86 programs can set it
472 * almost legitimately in probes for old cpu types.
474 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
478 * Save the FPU state and reinit the FP unit
480 npxpush(&sf.sf_uc.uc_mcontext);
483 * Copy the sigframe out to the user's stack.
485 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
487 * Something is wrong with the stack pointer.
488 * ...Kill the process.
493 regs->tf_esp = (int)sfp;
494 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
497 * i386 abi specifies that the direction flag must be cleared
500 regs->tf_eflags &= ~(PSL_T|PSL_D);
502 regs->tf_cs = _ucodesel;
503 regs->tf_ds = _udatasel;
504 regs->tf_es = _udatasel;
507 * Allow the signal handler to inherit %fs in addition to %gs as
508 * the userland program might be using both.
510 * However, if a T_PROTFLT occured the segment registers could be
511 * totally broken. They must be reset in order to be able to
512 * return to userland.
514 if (regs->tf_trapno == T_PROTFLT) {
515 regs->tf_fs = _udatasel;
516 regs->tf_gs = _udatasel;
518 regs->tf_ss = _udatasel;
522 * Sanitize the trapframe for a virtual kernel passing control to a custom
523 * VM context. Remove any items that would otherwise create a privilage
526 * XXX at the moment we allow userland to set the resume flag. Is this a
530 cpu_sanitize_frame(struct trapframe *frame)
532 frame->tf_cs = _ucodesel;
533 frame->tf_ds = _udatasel;
534 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
536 frame->tf_fs = _udatasel;
537 frame->tf_gs = _udatasel;
539 frame->tf_ss = _udatasel;
540 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
541 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
546 cpu_sanitize_tls(struct savetls *tls)
548 struct segment_descriptor *desc;
551 for (i = 0; i < NGTLS; ++i) {
553 if (desc->sd_dpl == 0 && desc->sd_type == 0)
555 if (desc->sd_def32 == 0)
557 if (desc->sd_type != SDT_MEMRWA)
559 if (desc->sd_dpl != SEL_UPL)
561 if (desc->sd_xx != 0 || desc->sd_p != 1)
568 * sigreturn(ucontext_t *sigcntxp)
570 * System call to cleanup state after a signal
571 * has been taken. Reset signal mask and
572 * stack state from context left by sendsig (above).
573 * Return to previous pc and psl as specified by
574 * context left by sendsig. Check carefully to
575 * make sure that the user has not modified the
576 * state to gain improper privileges.
580 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
581 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
584 sys_sigreturn(struct sigreturn_args *uap)
586 struct lwp *lp = curthread->td_lwp;
587 struct proc *p = lp->lwp_proc;
588 struct trapframe *regs;
596 * We have to copy the information into kernel space so userland
597 * can't modify it while we are sniffing it.
599 regs = lp->lwp_md.md_regs;
600 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
604 eflags = ucp->uc_mcontext.mc_eflags;
606 if (eflags & PSL_VM) {
607 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
608 struct vm86_kernel *vm86;
611 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
612 * set up the vm86 area, and we can't enter vm86 mode.
614 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
616 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
617 if (vm86->vm86_inited == 0)
620 /* go back to user mode if both flags are set */
621 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
622 trapsignal(lp, SIGBUS, 0);
624 if (vm86->vm86_has_vme) {
625 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
626 (eflags & VME_USERCHANGE) | PSL_VM;
628 vm86->vm86_eflags = eflags; /* save VIF, VIP */
629 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
630 (eflags & VM_USERCHANGE) | PSL_VM;
632 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
633 tf->tf_eflags = eflags;
634 tf->tf_vm86_ds = tf->tf_ds;
635 tf->tf_vm86_es = tf->tf_es;
636 tf->tf_vm86_fs = tf->tf_fs;
637 tf->tf_vm86_gs = tf->tf_gs;
638 tf->tf_ds = _udatasel;
639 tf->tf_es = _udatasel;
641 tf->tf_fs = _udatasel;
642 tf->tf_gs = _udatasel;
646 * Don't allow users to change privileged or reserved flags.
649 * XXX do allow users to change the privileged flag PSL_RF.
650 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
651 * should sometimes set it there too. tf_eflags is kept in
652 * the signal context during signal handling and there is no
653 * other place to remember it, so the PSL_RF bit may be
654 * corrupted by the signal handler without us knowing.
655 * Corruption of the PSL_RF bit at worst causes one more or
656 * one less debugger trap, so allowing it is fairly harmless.
658 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
659 kprintf("sigreturn: eflags = 0x%x\n", eflags);
664 * Don't allow users to load a valid privileged %cs. Let the
665 * hardware check for invalid selectors, excess privilege in
666 * other selectors, invalid %eip's and invalid %esp's.
668 cs = ucp->uc_mcontext.mc_cs;
669 if (!CS_SECURE(cs)) {
670 kprintf("sigreturn: cs = 0x%x\n", cs);
671 trapsignal(lp, SIGBUS, T_PROTFLT);
674 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
678 * Restore the FPU state from the frame
681 npxpop(&ucp->uc_mcontext);
684 * Merge saved signal mailbox pending flag to maintain interlock
685 * semantics against system calls.
687 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
688 p->p_flag |= P_MAILBOX;
690 if (ucp->uc_mcontext.mc_onstack & 1)
691 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
693 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
695 lp->lwp_sigmask = ucp->uc_sigmask;
696 SIG_CANTMASK(lp->lwp_sigmask);
702 * Stack frame on entry to function. %eax will contain the function vector,
703 * %ecx will contain the function data. flags, ecx, and eax will have
704 * already been pushed on the stack.
715 sendupcall(struct vmupcall *vu, int morepending)
717 struct lwp *lp = curthread->td_lwp;
718 struct trapframe *regs;
719 struct upcall upcall;
720 struct upc_frame upc_frame;
724 * If we are a virtual kernel running an emulated user process
725 * context, switch back to the virtual kernel context before
726 * trying to post the signal.
728 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
729 lp->lwp_md.md_regs->tf_trapno = 0;
730 vkernel_trap(lp, lp->lwp_md.md_regs);
734 * Get the upcall data structure
736 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
737 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
740 kprintf("bad upcall address\n");
745 * If the data structure is already marked pending or has a critical
746 * section count, mark the data structure as pending and return
747 * without doing an upcall. vu_pending is left set.
749 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
750 if (upcall.upc_pending < vu->vu_pending) {
751 upcall.upc_pending = vu->vu_pending;
752 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
753 sizeof(upcall.upc_pending));
759 * We can run this upcall now, clear vu_pending.
761 * Bump our critical section count and set or clear the
762 * user pending flag depending on whether more upcalls are
763 * pending. The user will be responsible for calling
764 * upc_dispatch(-1) to process remaining upcalls.
767 upcall.upc_pending = morepending;
769 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
770 sizeof(upcall.upc_pending));
771 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
775 * Construct a stack frame and issue the upcall
777 regs = lp->lwp_md.md_regs;
778 upc_frame.eax = regs->tf_eax;
779 upc_frame.ecx = regs->tf_ecx;
780 upc_frame.edx = regs->tf_edx;
781 upc_frame.flags = regs->tf_eflags;
782 upc_frame.oldip = regs->tf_eip;
783 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
784 sizeof(upc_frame)) != 0) {
785 kprintf("bad stack on upcall\n");
787 regs->tf_eax = (register_t)vu->vu_func;
788 regs->tf_ecx = (register_t)vu->vu_data;
789 regs->tf_edx = (register_t)lp->lwp_upcall;
790 regs->tf_eip = (register_t)vu->vu_ctx;
791 regs->tf_esp -= sizeof(upc_frame);
796 * fetchupcall occurs in the context of a system call, which means that
797 * we have to return EJUSTRETURN in order to prevent eax and edx from
798 * being overwritten by the syscall return value.
800 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
801 * and the function pointer in %eax.
804 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
806 struct upc_frame upc_frame;
807 struct lwp *lp = curthread->td_lwp;
808 struct trapframe *regs;
810 struct upcall upcall;
813 regs = lp->lwp_md.md_regs;
815 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
819 * This jumps us to the next ready context.
822 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
825 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
828 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
829 regs->tf_eax = (register_t)vu->vu_func;
830 regs->tf_ecx = (register_t)vu->vu_data;
831 regs->tf_edx = (register_t)lp->lwp_upcall;
832 regs->tf_eip = (register_t)vu->vu_ctx;
833 regs->tf_esp = (register_t)rsp;
836 * This returns us to the originally interrupted code.
838 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
839 regs->tf_eax = upc_frame.eax;
840 regs->tf_ecx = upc_frame.ecx;
841 regs->tf_edx = upc_frame.edx;
842 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
843 (upc_frame.flags & PSL_USERCHANGE);
844 regs->tf_eip = upc_frame.oldip;
845 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
854 * Machine dependent boot() routine
856 * I haven't seen anything to put here yet
857 * Possibly some stuff might be grafted back here from boot()
865 * Shutdown the CPU as much as possible
871 __asm__ __volatile("hlt");
875 * cpu_idle() represents the idle LWKT. You cannot return from this function
876 * (unless you want to blow things up!). Instead we look for runnable threads
877 * and loop or halt as appropriate. Giant is not held on entry to the thread.
879 * The main loop is entered with a critical section held, we must release
880 * the critical section before doing anything else. lwkt_switch() will
881 * check for pending interrupts due to entering and exiting its own
884 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
885 * However, there are cases where the idlethread will be entered with
886 * the possibility that no IPI will occur and in such cases
887 * lwkt_switch() sets RQF_WAKEUP. We usually check
888 * RQF_IDLECHECK_WK_MASK.
890 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
891 * 1 to just use hlt and for debugging purposes.
893 static int cpu_idle_hlt = 2;
894 static int cpu_idle_hltcnt;
895 static int cpu_idle_spincnt;
896 static u_int cpu_idle_repeat = 4;
897 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
898 &cpu_idle_hlt, 0, "Idle loop HLT enable");
899 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
900 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
901 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
902 &cpu_idle_spincnt, 0, "Idle loop entry spins");
903 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
904 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
907 cpu_idle_default_hook(void)
910 * We must guarentee that hlt is exactly the instruction
913 __asm __volatile("sti; hlt");
916 /* Other subsystems (e.g., ACPI) can hook this later. */
917 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
922 globaldata_t gd = mycpu;
923 struct thread *td __debugvar = gd->gd_curthread;
928 KKASSERT(td->td_critcount == 0);
931 * See if there are any LWKTs ready to go.
936 * When halting inside a cli we must check for reqflags
937 * races, particularly [re]schedule requests. Running
938 * splz() does the job.
941 * 0 Never halt, just spin
943 * 1 Always use HLT (or MONITOR/MWAIT if avail).
944 * This typically eats more power than the
947 * 2 Use HLT/MONITOR/MWAIT up to a point and then
948 * use the ACPI halt (default). This is a hybrid
949 * approach. See machdep.cpu_idle_repeat.
951 * 3 Always use the ACPI halt. This typically
952 * eats the least amount of power but the cpu
953 * will be slow waking up. Slows down e.g.
954 * compiles and other pipe/event oriented stuff.
957 * NOTE: Interrupts are enabled and we are not in a critical
960 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
961 * don't bother capping gd_idle_repeat, it is ok if
964 ++gd->gd_idle_repeat;
965 reqflags = gd->gd_reqflags;
966 quick = (cpu_idle_hlt == 1) ||
968 gd->gd_idle_repeat < cpu_idle_repeat);
970 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
971 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
972 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
974 } else if (cpu_idle_hlt) {
975 __asm __volatile("cli");
977 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
979 cpu_idle_default_hook();
983 __asm __volatile("sti");
987 __asm __volatile("sti");
996 * This routine is called if a spinlock has been held through the
997 * exponential backoff period and is seriously contested. On a real cpu
1001 cpu_spinlock_contested(void)
1009 * Clear registers on exec
1012 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1014 struct thread *td = curthread;
1015 struct lwp *lp = td->td_lwp;
1016 struct pcb *pcb = td->td_pcb;
1017 struct trapframe *regs = lp->lwp_md.md_regs;
1019 /* was i386_user_cleanup() in NetBSD */
1022 bzero((char *)regs, sizeof(struct trapframe));
1023 regs->tf_eip = entry;
1024 regs->tf_esp = stack;
1025 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1026 regs->tf_ss = _udatasel;
1027 regs->tf_ds = _udatasel;
1028 regs->tf_es = _udatasel;
1029 regs->tf_fs = _udatasel;
1030 regs->tf_gs = _udatasel;
1031 regs->tf_cs = _ucodesel;
1033 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1034 regs->tf_ebx = ps_strings;
1037 * Reset the hardware debug registers if they were in use.
1038 * They won't have any meaning for the newly exec'd process.
1040 if (pcb->pcb_flags & PCB_DBREGS) {
1047 if (pcb == td->td_pcb) {
1049 * Clear the debug registers on the running
1050 * CPU, otherwise they will end up affecting
1051 * the next process we switch to.
1055 pcb->pcb_flags &= ~PCB_DBREGS;
1059 * Initialize the math emulator (if any) for the current process.
1060 * Actually, just clear the bit that says that the emulator has
1061 * been initialized. Initialization is delayed until the process
1062 * traps to the emulator (if it is done at all) mainly because
1063 * emulators don't provide an entry point for initialization.
1065 pcb->pcb_flags &= ~FP_SOFTFP;
1068 * note: do not set CR0_TS here. npxinit() must do it after clearing
1069 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1073 load_cr0(rcr0() | CR0_MP);
1076 /* Initialize the npx (if any) for the current process. */
1077 npxinit(__INITIAL_NPXCW__);
1082 * note: linux emulator needs edx to be 0x0 on entry, which is
1083 * handled in execve simply by setting the 64 bit syscall
1084 * return value to 0.
1094 cr0 |= CR0_NE; /* Done by npxinit() */
1095 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1096 cr0 |= CR0_WP | CR0_AM;
1102 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1105 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1107 if (!error && req->newptr)
1112 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1113 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1115 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1116 CTLFLAG_RW, &disable_rtc_set, 0, "");
1118 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1119 CTLFLAG_RD, &bootinfo, bootinfo, "");
1121 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1122 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1124 extern u_long bootdev; /* not a cdev_t - encoding is different */
1125 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1126 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1129 * Initialize 386 and configure to run kernel
1133 * Initialize segments & interrupt table
1137 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1138 static struct gate_descriptor idt0[NIDT];
1139 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1140 union descriptor ldt[NLDT]; /* local descriptor table */
1142 /* table descriptors - used to load tables by cpu */
1143 struct region_descriptor r_gdt, r_idt;
1145 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1146 extern int has_f00f_bug;
1149 static struct i386tss dblfault_tss;
1150 static char dblfault_stack[PAGE_SIZE];
1152 extern struct user *proc0paddr;
1155 /* software prototypes -- in more palatable form */
1156 struct soft_segment_descriptor gdt_segs[] = {
1157 /* GNULL_SEL 0 Null Descriptor */
1158 { 0x0, /* segment base address */
1160 0, /* segment type */
1161 0, /* segment descriptor priority level */
1162 0, /* segment descriptor present */
1164 0, /* default 32 vs 16 bit size */
1165 0 /* limit granularity (byte/page units)*/ },
1166 /* GCODE_SEL 1 Code Descriptor for kernel */
1167 { 0x0, /* segment base address */
1168 0xfffff, /* length - all address space */
1169 SDT_MEMERA, /* segment type */
1170 0, /* segment descriptor priority level */
1171 1, /* segment descriptor present */
1173 1, /* default 32 vs 16 bit size */
1174 1 /* limit granularity (byte/page units)*/ },
1175 /* GDATA_SEL 2 Data Descriptor for kernel */
1176 { 0x0, /* segment base address */
1177 0xfffff, /* length - all address space */
1178 SDT_MEMRWA, /* segment type */
1179 0, /* segment descriptor priority level */
1180 1, /* segment descriptor present */
1182 1, /* default 32 vs 16 bit size */
1183 1 /* limit granularity (byte/page units)*/ },
1184 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1185 { 0x0, /* segment base address */
1186 0xfffff, /* length - all address space */
1187 SDT_MEMRWA, /* segment type */
1188 0, /* segment descriptor priority level */
1189 1, /* segment descriptor present */
1191 1, /* default 32 vs 16 bit size */
1192 1 /* limit granularity (byte/page units)*/ },
1193 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1195 0x0, /* segment base address */
1196 sizeof(struct i386tss)-1,/* length - all address space */
1197 SDT_SYS386TSS, /* segment type */
1198 0, /* segment descriptor priority level */
1199 1, /* segment descriptor present */
1201 0, /* unused - default 32 vs 16 bit size */
1202 0 /* limit granularity (byte/page units)*/ },
1203 /* GLDT_SEL 5 LDT Descriptor */
1204 { (int) ldt, /* segment base address */
1205 sizeof(ldt)-1, /* length - all address space */
1206 SDT_SYSLDT, /* segment type */
1207 SEL_UPL, /* segment descriptor priority level */
1208 1, /* segment descriptor present */
1210 0, /* unused - default 32 vs 16 bit size */
1211 0 /* limit granularity (byte/page units)*/ },
1212 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1213 { (int) ldt, /* segment base address */
1214 (512 * sizeof(union descriptor)-1), /* length */
1215 SDT_SYSLDT, /* segment type */
1216 0, /* segment descriptor priority level */
1217 1, /* segment descriptor present */
1219 0, /* unused - default 32 vs 16 bit size */
1220 0 /* limit granularity (byte/page units)*/ },
1221 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1222 { 0x0, /* segment base address */
1223 0x0, /* length - all address space */
1224 0, /* segment type */
1225 0, /* segment descriptor priority level */
1226 0, /* segment descriptor present */
1228 0, /* default 32 vs 16 bit size */
1229 0 /* limit granularity (byte/page units)*/ },
1230 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1231 { 0x400, /* segment base address */
1232 0xfffff, /* length */
1233 SDT_MEMRWA, /* segment type */
1234 0, /* segment descriptor priority level */
1235 1, /* segment descriptor present */
1237 1, /* default 32 vs 16 bit size */
1238 1 /* limit granularity (byte/page units)*/ },
1239 /* GPANIC_SEL 9 Panic Tss Descriptor */
1240 { (int) &dblfault_tss, /* segment base address */
1241 sizeof(struct i386tss)-1,/* length - all address space */
1242 SDT_SYS386TSS, /* segment type */
1243 0, /* segment descriptor priority level */
1244 1, /* segment descriptor present */
1246 0, /* unused - default 32 vs 16 bit size */
1247 0 /* limit granularity (byte/page units)*/ },
1248 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1249 { 0, /* segment base address (overwritten) */
1250 0xfffff, /* length */
1251 SDT_MEMERA, /* segment type */
1252 0, /* segment descriptor priority level */
1253 1, /* segment descriptor present */
1255 0, /* default 32 vs 16 bit size */
1256 1 /* limit granularity (byte/page units)*/ },
1257 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1258 { 0, /* segment base address (overwritten) */
1259 0xfffff, /* length */
1260 SDT_MEMERA, /* segment type */
1261 0, /* segment descriptor priority level */
1262 1, /* segment descriptor present */
1264 0, /* default 32 vs 16 bit size */
1265 1 /* limit granularity (byte/page units)*/ },
1266 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1267 { 0, /* segment base address (overwritten) */
1268 0xfffff, /* length */
1269 SDT_MEMRWA, /* segment type */
1270 0, /* segment descriptor priority level */
1271 1, /* segment descriptor present */
1273 1, /* default 32 vs 16 bit size */
1274 1 /* limit granularity (byte/page units)*/ },
1275 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1276 { 0, /* segment base address (overwritten) */
1277 0xfffff, /* length */
1278 SDT_MEMRWA, /* segment type */
1279 0, /* segment descriptor priority level */
1280 1, /* segment descriptor present */
1282 0, /* default 32 vs 16 bit size */
1283 1 /* limit granularity (byte/page units)*/ },
1284 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1285 { 0, /* segment base address (overwritten) */
1286 0xfffff, /* length */
1287 SDT_MEMRWA, /* segment type */
1288 0, /* segment descriptor priority level */
1289 1, /* segment descriptor present */
1291 0, /* default 32 vs 16 bit size */
1292 1 /* limit granularity (byte/page units)*/ },
1293 /* GTLS_START 15 TLS */
1294 { 0x0, /* segment base address */
1296 0, /* segment type */
1297 0, /* segment descriptor priority level */
1298 0, /* segment descriptor present */
1300 0, /* default 32 vs 16 bit size */
1301 0 /* limit granularity (byte/page units)*/ },
1302 /* GTLS_START+1 16 TLS */
1303 { 0x0, /* segment base address */
1305 0, /* segment type */
1306 0, /* segment descriptor priority level */
1307 0, /* segment descriptor present */
1309 0, /* default 32 vs 16 bit size */
1310 0 /* limit granularity (byte/page units)*/ },
1311 /* GTLS_END 17 TLS */
1312 { 0x0, /* segment base address */
1314 0, /* segment type */
1315 0, /* segment descriptor priority level */
1316 0, /* segment descriptor present */
1318 0, /* default 32 vs 16 bit size */
1319 0 /* limit granularity (byte/page units)*/ },
1322 static struct soft_segment_descriptor ldt_segs[] = {
1323 /* Null Descriptor - overwritten by call gate */
1324 { 0x0, /* segment base address */
1325 0x0, /* length - all address space */
1326 0, /* segment type */
1327 0, /* segment descriptor priority level */
1328 0, /* segment descriptor present */
1330 0, /* default 32 vs 16 bit size */
1331 0 /* limit granularity (byte/page units)*/ },
1332 /* Null Descriptor - overwritten by call gate */
1333 { 0x0, /* segment base address */
1334 0x0, /* length - all address space */
1335 0, /* segment type */
1336 0, /* segment descriptor priority level */
1337 0, /* segment descriptor present */
1339 0, /* default 32 vs 16 bit size */
1340 0 /* limit granularity (byte/page units)*/ },
1341 /* Null Descriptor - overwritten by call gate */
1342 { 0x0, /* segment base address */
1343 0x0, /* length - all address space */
1344 0, /* segment type */
1345 0, /* segment descriptor priority level */
1346 0, /* segment descriptor present */
1348 0, /* default 32 vs 16 bit size */
1349 0 /* limit granularity (byte/page units)*/ },
1350 /* Code Descriptor for user */
1351 { 0x0, /* segment base address */
1352 0xfffff, /* length - all address space */
1353 SDT_MEMERA, /* segment type */
1354 SEL_UPL, /* segment descriptor priority level */
1355 1, /* segment descriptor present */
1357 1, /* default 32 vs 16 bit size */
1358 1 /* limit granularity (byte/page units)*/ },
1359 /* Null Descriptor - overwritten by call gate */
1360 { 0x0, /* segment base address */
1361 0x0, /* length - all address space */
1362 0, /* segment type */
1363 0, /* segment descriptor priority level */
1364 0, /* segment descriptor present */
1366 0, /* default 32 vs 16 bit size */
1367 0 /* limit granularity (byte/page units)*/ },
1368 /* Data Descriptor for user */
1369 { 0x0, /* segment base address */
1370 0xfffff, /* length - all address space */
1371 SDT_MEMRWA, /* segment type */
1372 SEL_UPL, /* segment descriptor priority level */
1373 1, /* segment descriptor present */
1375 1, /* default 32 vs 16 bit size */
1376 1 /* limit granularity (byte/page units)*/ },
1380 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1382 struct gate_descriptor *ip;
1385 ip->gd_looffset = (int)func;
1386 ip->gd_selector = selec;
1392 ip->gd_hioffset = ((int)func)>>16 ;
1395 #define IDTVEC(name) __CONCAT(X,name)
1398 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1399 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1400 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1401 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1402 IDTVEC(xmm), IDTVEC(syscall),
1405 IDTVEC(int0x80_syscall);
1407 #ifdef DEBUG_INTERRUPTS
1408 extern inthand_t *Xrsvdary[256];
1412 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1414 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1415 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1416 ssd->ssd_type = sd->sd_type;
1417 ssd->ssd_dpl = sd->sd_dpl;
1418 ssd->ssd_p = sd->sd_p;
1419 ssd->ssd_def32 = sd->sd_def32;
1420 ssd->ssd_gran = sd->sd_gran;
1424 * Populate the (physmap) array with base/bound pairs describing the
1425 * available physical memory in the system, then test this memory and
1426 * build the phys_avail array describing the actually-available memory.
1428 * If we cannot accurately determine the physical memory map, then use
1429 * value from the 0xE801 call, and failing that, the RTC.
1431 * Total memory size may be set by the kernel environment variable
1432 * hw.physmem or the compile-time define MAXMEM.
1435 getmemsize(int first)
1437 int i, physmap_idx, pa_indx, da_indx;
1439 u_int basemem, extmem;
1440 struct vm86frame vmf;
1441 struct vm86context vmc;
1443 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1451 quad_t dcons_addr, dcons_size;
1453 bzero(&vmf, sizeof(struct vm86frame));
1454 bzero(physmap, sizeof(physmap));
1458 * Some newer BIOSes has broken INT 12H implementation which cause
1459 * kernel panic immediately. In this case, we need to scan SMAP
1460 * with INT 15:E820 first, then determine base memory size.
1463 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1464 if (hasbrokenint12) {
1469 * Perform "base memory" related probes & setup. If we get a crazy
1470 * value give the bios some scribble space just in case.
1472 vm86_intcall(0x12, &vmf);
1473 basemem = vmf.vmf_ax;
1474 if (basemem > 640) {
1475 kprintf("Preposterous BIOS basemem of %uK, "
1476 "truncating to < 640K\n", basemem);
1481 * XXX if biosbasemem is now < 640, there is a `hole'
1482 * between the end of base memory and the start of
1483 * ISA memory. The hole may be empty or it may
1484 * contain BIOS code or data. Map it read/write so
1485 * that the BIOS can write to it. (Memory from 0 to
1486 * the physical end of the kernel is mapped read-only
1487 * to begin with and then parts of it are remapped.
1488 * The parts that aren't remapped form holes that
1489 * remain read-only and are unused by the kernel.
1490 * The base memory area is below the physical end of
1491 * the kernel and right now forms a read-only hole.
1492 * The part of it from PAGE_SIZE to
1493 * (trunc_page(biosbasemem * 1024) - 1) will be
1494 * remapped and used by the kernel later.)
1496 * This code is similar to the code used in
1497 * pmap_mapdev, but since no memory needs to be
1498 * allocated we simply change the mapping.
1500 for (pa = trunc_page(basemem * 1024);
1501 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1502 pte = vtopte(pa + KERNBASE);
1503 *pte = pa | PG_RW | PG_V;
1507 * if basemem != 640, map pages r/w into vm86 page table so
1508 * that the bios can scribble on it.
1511 for (i = basemem / 4; i < 160; i++)
1512 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1516 * map page 1 R/W into the kernel page table so we can use it
1517 * as a buffer. The kernel will unmap this page later.
1519 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1520 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1523 * get memory map with INT 15:E820
1525 #define SMAPSIZ sizeof(*smap)
1526 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1529 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1530 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1535 vmf.vmf_eax = 0xE820;
1536 vmf.vmf_edx = SMAP_SIG;
1537 vmf.vmf_ecx = SMAPSIZ;
1538 i = vm86_datacall(0x15, &vmf, &vmc);
1539 if (i || vmf.vmf_eax != SMAP_SIG)
1541 if (boothowto & RB_VERBOSE)
1542 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1544 *(u_int32_t *)((char *)&smap->base + 4),
1545 (u_int32_t)smap->base,
1546 *(u_int32_t *)((char *)&smap->length + 4),
1547 (u_int32_t)smap->length);
1549 if (smap->type != 0x01)
1552 if (smap->length == 0)
1555 Realmem += smap->length;
1557 if (smap->base >= 0xffffffffLLU) {
1558 kprintf("%ju MB of memory above 4GB ignored\n",
1559 (uintmax_t)(smap->length / 1024 / 1024));
1563 for (i = 0; i <= physmap_idx; i += 2) {
1564 if (smap->base < physmap[i + 1]) {
1565 if (boothowto & RB_VERBOSE) {
1566 kprintf("Overlapping or non-montonic "
1567 "memory region, ignoring "
1570 Realmem -= smap->length;
1575 if (smap->base == physmap[physmap_idx + 1]) {
1576 physmap[physmap_idx + 1] += smap->length;
1581 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1582 kprintf("Too many segments in the physical "
1583 "address map, giving up\n");
1586 physmap[physmap_idx] = smap->base;
1587 physmap[physmap_idx + 1] = smap->base + smap->length;
1589 ; /* fix GCC3.x warning */
1590 } while (vmf.vmf_ebx != 0);
1593 * Perform "base memory" related probes & setup based on SMAP
1596 for (i = 0; i <= physmap_idx; i += 2) {
1597 if (physmap[i] == 0x00000000) {
1598 basemem = physmap[i + 1] / 1024;
1607 if (basemem > 640) {
1608 kprintf("Preposterous BIOS basemem of %uK, "
1609 "truncating to 640K\n", basemem);
1613 for (pa = trunc_page(basemem * 1024);
1614 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1615 pte = vtopte(pa + KERNBASE);
1616 *pte = pa | PG_RW | PG_V;
1620 for (i = basemem / 4; i < 160; i++)
1621 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1624 if (physmap[1] != 0)
1628 * If we failed above, try memory map with INT 15:E801
1630 vmf.vmf_ax = 0xE801;
1631 if (vm86_intcall(0x15, &vmf) == 0) {
1632 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1636 vm86_intcall(0x15, &vmf);
1637 extmem = vmf.vmf_ax;
1640 * Prefer the RTC value for extended memory.
1642 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1647 * Special hack for chipsets that still remap the 384k hole when
1648 * there's 16MB of memory - this really confuses people that
1649 * are trying to use bus mastering ISA controllers with the
1650 * "16MB limit"; they only have 16MB, but the remapping puts
1651 * them beyond the limit.
1653 * If extended memory is between 15-16MB (16-17MB phys address range),
1656 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1660 physmap[1] = basemem * 1024;
1662 physmap[physmap_idx] = 0x100000;
1663 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1667 * Now, physmap contains a map of physical memory.
1671 /* make hole for AP bootstrap code YYY */
1672 physmap[1] = mp_bootaddress(physmap[1]);
1674 /* Save EBDA address, if any */
1675 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1680 * Maxmem isn't the "maximum memory", it's one larger than the
1681 * highest page of the physical address space. It should be
1682 * called something like "Maxphyspage". We may adjust this
1683 * based on ``hw.physmem'' and the results of the memory test.
1685 Maxmem = atop(physmap[physmap_idx + 1]);
1688 Maxmem = MAXMEM / 4;
1691 if (kgetenv_quad("hw.physmem", &maxmem))
1692 Maxmem = atop(maxmem);
1694 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1695 (boothowto & RB_VERBOSE))
1696 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1699 * If Maxmem has been increased beyond what the system has detected,
1700 * extend the last memory segment to the new limit.
1702 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1703 physmap[physmap_idx + 1] = ptoa(Maxmem);
1705 /* call pmap initialization to make new kernel address space */
1706 pmap_bootstrap(first, 0);
1709 * Size up each available chunk of physical memory.
1711 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1714 phys_avail[pa_indx++] = physmap[0];
1715 phys_avail[pa_indx] = physmap[0];
1716 dump_avail[da_indx] = physmap[0];
1721 * Get dcons buffer address
1723 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1724 kgetenv_quad("dcons.size", &dcons_size) == 0)
1728 * physmap is in bytes, so when converting to page boundaries,
1729 * round up the start address and round down the end address.
1731 for (i = 0; i <= physmap_idx; i += 2) {
1735 if (physmap[i + 1] < end)
1736 end = trunc_page(physmap[i + 1]);
1737 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1738 int tmp, page_bad, full;
1742 int *ptr = (int *)CADDR1;
1747 * block out kernel memory as not available.
1749 if (pa >= 0x100000 && pa < first)
1753 * block out dcons buffer
1756 && pa >= trunc_page(dcons_addr)
1757 && pa < dcons_addr + dcons_size)
1763 * map page into kernel: valid, read/write,non-cacheable
1765 *pte = pa | PG_V | PG_RW | PG_N;
1770 * Test for alternating 1's and 0's
1772 *(volatile int *)ptr = 0xaaaaaaaa;
1773 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1777 * Test for alternating 0's and 1's
1779 *(volatile int *)ptr = 0x55555555;
1780 if (*(volatile int *)ptr != 0x55555555) {
1786 *(volatile int *)ptr = 0xffffffff;
1787 if (*(volatile int *)ptr != 0xffffffff) {
1793 *(volatile int *)ptr = 0x0;
1794 if (*(volatile int *)ptr != 0x0) {
1798 * Restore original value.
1803 * Adjust array of valid/good pages.
1805 if (page_bad == TRUE) {
1809 * If this good page is a continuation of the
1810 * previous set of good pages, then just increase
1811 * the end pointer. Otherwise start a new chunk.
1812 * Note that "end" points one higher than end,
1813 * making the range >= start and < end.
1814 * If we're also doing a speculative memory
1815 * test and we at or past the end, bump up Maxmem
1816 * so that we keep going. The first bad page
1817 * will terminate the loop.
1819 if (phys_avail[pa_indx] == pa) {
1820 phys_avail[pa_indx] += PAGE_SIZE;
1823 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1824 kprintf("Too many holes in the physical address space, giving up\n");
1829 phys_avail[pa_indx++] = pa; /* start */
1830 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1834 if (dump_avail[da_indx] == pa) {
1835 dump_avail[da_indx] += PAGE_SIZE;
1838 if (da_indx >= PHYSMAP_ENTRIES*2) {
1842 dump_avail[da_indx++] = pa; /* start */
1843 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1856 * The last chunk must contain at least one page plus the message
1857 * buffer to avoid complicating other code (message buffer address
1858 * calculation, etc.).
1860 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1861 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1862 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1863 phys_avail[pa_indx--] = 0;
1864 phys_avail[pa_indx--] = 0;
1867 Maxmem = atop(phys_avail[pa_indx]);
1869 /* Trim off space for the message buffer. */
1870 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1872 avail_end = phys_avail[pa_indx];
1877 int apic_io_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
1879 int apic_io_enable = 0; /* Disabled by default for kernels compiled without */
1883 struct machintr_abi MachIntrABI;
1894 * 7 Device Not Available (x87)
1896 * 9 Coprocessor Segment overrun (unsupported, reserved)
1898 * 11 Segment not present
1900 * 13 General Protection
1903 * 16 x87 FP Exception pending
1904 * 17 Alignment Check
1906 * 19 SIMD floating point
1908 * 32-255 INTn/external sources
1913 struct gate_descriptor *gdp;
1914 int gsel_tss, metadata_missing, off, x;
1915 struct mdglobaldata *gd;
1918 * Prevent lowering of the ipl if we call tsleep() early.
1920 gd = &CPU_prvspace[0].mdglobaldata;
1921 bzero(gd, sizeof(*gd));
1923 gd->mi.gd_curthread = &thread0;
1924 thread0.td_gd = &gd->mi;
1926 atdevbase = ISA_HOLE_START + KERNBASE;
1928 metadata_missing = 0;
1929 if (bootinfo.bi_modulep) {
1930 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1931 preload_bootstrap_relocate(KERNBASE);
1933 metadata_missing = 1;
1935 if (bootinfo.bi_envp)
1936 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1938 if (boothowto & RB_VERBOSE)
1942 * Default MachIntrABI to ICU
1944 MachIntrABI = MachIntrABI_ICU;
1946 TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
1950 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1951 * and ncpus_fit_mask remain 0.
1956 /* Init basic tunables, hz etc */
1960 * make gdt memory segments, the code segment goes up to end of the
1961 * page with etext in it, the data segment goes to the end of
1965 * XXX text protection is temporarily (?) disabled. The limit was
1966 * i386_btop(round_page(etext)) - 1.
1968 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1969 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1971 gdt_segs[GPRIV_SEL].ssd_limit =
1972 atop(sizeof(struct privatespace) - 1);
1973 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1974 gdt_segs[GPROC0_SEL].ssd_base =
1975 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1977 gd->mi.gd_prvspace = &CPU_prvspace[0];
1980 * Note: on both UP and SMP curthread must be set non-NULL
1981 * early in the boot sequence because the system assumes
1982 * that 'curthread' is never NULL.
1985 for (x = 0; x < NGDT; x++) {
1987 /* avoid overwriting db entries with APM ones */
1988 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1991 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1994 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1995 r_gdt.rd_base = (int) gdt;
1998 mi_gdinit(&gd->mi, 0);
2000 mi_proc0init(&gd->mi, proc0paddr);
2001 safepri = TDPRI_MAX;
2003 /* make ldt memory segments */
2005 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2006 * should be spelled ...MAX_USER...
2008 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2009 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2010 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2011 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2013 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2015 gd->gd_currentldt = _default_ldt;
2016 /* spinlocks and the BGL */
2020 * Setup the hardware exception table. Most exceptions use
2021 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2022 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2023 * an 'interrupt trap gate', which disables interrupts on entry,
2024 * in order to be able to poll the appropriate CRn register to
2025 * determine the fault address.
2027 for (x = 0; x < NIDT; x++) {
2028 #ifdef DEBUG_INTERRUPTS
2029 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2031 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2034 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2035 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2036 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2037 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2038 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2039 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2040 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2041 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2042 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2043 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2044 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2045 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2046 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2048 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2049 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2050 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2051 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2052 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2053 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2054 setidt(0x80, &IDTVEC(int0x80_syscall),
2055 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2057 r_idt.rd_limit = sizeof(idt0) - 1;
2058 r_idt.rd_base = (int) idt;
2062 * Initialize the console before we print anything out.
2066 if (metadata_missing)
2067 kprintf("WARNING: loader(8) metadata is missing!\n");
2076 * Initialize IRQ mapping
2079 * SHOULD be after elcr_probe()
2081 MachIntrABI_ICU.initmap();
2083 MachIntrABI_IOAPIC.initmap();
2088 if (boothowto & RB_KDB)
2089 Debugger("Boot flags requested debugger");
2092 finishidentcpu(); /* Final stage of CPU initialization */
2093 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2094 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2095 initializecpu(); /* Initialize CPU registers */
2098 * make an initial tss so cpu can get interrupt stack on syscall!
2099 * The 16 bytes is to save room for a VM86 context.
2101 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2102 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2103 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2104 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2105 gd->gd_common_tssd = *gd->gd_tss_gdt;
2106 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2109 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2110 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2111 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2112 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2113 dblfault_tss.tss_cr3 = (int)IdlePTD;
2114 dblfault_tss.tss_eip = (int) dblfault_handler;
2115 dblfault_tss.tss_eflags = PSL_KERNEL;
2116 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2117 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2118 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2119 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2120 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2124 init_param2(physmem);
2126 /* now running on new page tables, configured,and u/iom is accessible */
2128 /* Map the message buffer. */
2129 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2130 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2132 msgbufinit(msgbufp, MSGBUF_SIZE);
2134 /* make a call gate to reenter kernel with */
2135 gdp = &ldt[LSYS5CALLS_SEL].gd;
2137 x = (int) &IDTVEC(syscall);
2138 gdp->gd_looffset = x++;
2139 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2141 gdp->gd_type = SDT_SYS386CGT;
2142 gdp->gd_dpl = SEL_UPL;
2144 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2146 /* XXX does this work? */
2147 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2148 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2150 /* transfer to user mode */
2152 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2153 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2155 /* setup proc 0's pcb */
2156 thread0.td_pcb->pcb_flags = 0;
2157 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2158 thread0.td_pcb->pcb_ext = 0;
2159 lwp0.lwp_md.md_regs = &proc0_tf;
2163 * Initialize machine-dependant portions of the global data structure.
2164 * Note that the global data area and cpu0's idlestack in the private
2165 * data space were allocated in locore.
2167 * Note: the idlethread's cpl is 0
2169 * WARNING! Called from early boot, 'mycpu' may not work yet.
2172 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2175 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2177 lwkt_init_thread(&gd->mi.gd_idlethread,
2178 gd->mi.gd_prvspace->idlestack,
2179 sizeof(gd->mi.gd_prvspace->idlestack),
2181 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2182 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2183 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2184 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2188 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2190 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2191 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2198 globaldata_find(int cpu)
2200 KKASSERT(cpu >= 0 && cpu < ncpus);
2201 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2204 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2205 static void f00f_hack(void *unused);
2206 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2209 f00f_hack(void *unused)
2211 struct gate_descriptor *new_idt;
2217 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2219 r_idt.rd_limit = sizeof(idt0) - 1;
2221 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2223 panic("kmem_alloc returned 0");
2224 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2225 panic("kmem_alloc returned non-page-aligned memory");
2226 /* Put the first seven entries in the lower page */
2227 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2228 bcopy(idt, new_idt, sizeof(idt0));
2229 r_idt.rd_base = (int)new_idt;
2232 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2233 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2234 panic("vm_map_protect failed");
2237 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2240 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2242 lp->lwp_md.md_regs->tf_eip = addr;
2247 ptrace_single_step(struct lwp *lp)
2249 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2254 fill_regs(struct lwp *lp, struct reg *regs)
2256 struct trapframe *tp;
2258 tp = lp->lwp_md.md_regs;
2259 regs->r_gs = tp->tf_gs;
2260 regs->r_fs = tp->tf_fs;
2261 regs->r_es = tp->tf_es;
2262 regs->r_ds = tp->tf_ds;
2263 regs->r_edi = tp->tf_edi;
2264 regs->r_esi = tp->tf_esi;
2265 regs->r_ebp = tp->tf_ebp;
2266 regs->r_ebx = tp->tf_ebx;
2267 regs->r_edx = tp->tf_edx;
2268 regs->r_ecx = tp->tf_ecx;
2269 regs->r_eax = tp->tf_eax;
2270 regs->r_eip = tp->tf_eip;
2271 regs->r_cs = tp->tf_cs;
2272 regs->r_eflags = tp->tf_eflags;
2273 regs->r_esp = tp->tf_esp;
2274 regs->r_ss = tp->tf_ss;
2279 set_regs(struct lwp *lp, struct reg *regs)
2281 struct trapframe *tp;
2283 tp = lp->lwp_md.md_regs;
2284 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2285 !CS_SECURE(regs->r_cs))
2287 tp->tf_gs = regs->r_gs;
2288 tp->tf_fs = regs->r_fs;
2289 tp->tf_es = regs->r_es;
2290 tp->tf_ds = regs->r_ds;
2291 tp->tf_edi = regs->r_edi;
2292 tp->tf_esi = regs->r_esi;
2293 tp->tf_ebp = regs->r_ebp;
2294 tp->tf_ebx = regs->r_ebx;
2295 tp->tf_edx = regs->r_edx;
2296 tp->tf_ecx = regs->r_ecx;
2297 tp->tf_eax = regs->r_eax;
2298 tp->tf_eip = regs->r_eip;
2299 tp->tf_cs = regs->r_cs;
2300 tp->tf_eflags = regs->r_eflags;
2301 tp->tf_esp = regs->r_esp;
2302 tp->tf_ss = regs->r_ss;
2306 #ifndef CPU_DISABLE_SSE
2308 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2310 struct env87 *penv_87 = &sv_87->sv_env;
2311 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2314 /* FPU control/status */
2315 penv_87->en_cw = penv_xmm->en_cw;
2316 penv_87->en_sw = penv_xmm->en_sw;
2317 penv_87->en_tw = penv_xmm->en_tw;
2318 penv_87->en_fip = penv_xmm->en_fip;
2319 penv_87->en_fcs = penv_xmm->en_fcs;
2320 penv_87->en_opcode = penv_xmm->en_opcode;
2321 penv_87->en_foo = penv_xmm->en_foo;
2322 penv_87->en_fos = penv_xmm->en_fos;
2325 for (i = 0; i < 8; ++i)
2326 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2330 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2332 struct env87 *penv_87 = &sv_87->sv_env;
2333 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2336 /* FPU control/status */
2337 penv_xmm->en_cw = penv_87->en_cw;
2338 penv_xmm->en_sw = penv_87->en_sw;
2339 penv_xmm->en_tw = penv_87->en_tw;
2340 penv_xmm->en_fip = penv_87->en_fip;
2341 penv_xmm->en_fcs = penv_87->en_fcs;
2342 penv_xmm->en_opcode = penv_87->en_opcode;
2343 penv_xmm->en_foo = penv_87->en_foo;
2344 penv_xmm->en_fos = penv_87->en_fos;
2347 for (i = 0; i < 8; ++i)
2348 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2350 #endif /* CPU_DISABLE_SSE */
2353 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2355 #ifndef CPU_DISABLE_SSE
2357 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2358 (struct save87 *)fpregs);
2361 #endif /* CPU_DISABLE_SSE */
2362 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2367 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2369 #ifndef CPU_DISABLE_SSE
2371 set_fpregs_xmm((struct save87 *)fpregs,
2372 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2375 #endif /* CPU_DISABLE_SSE */
2376 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2381 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2384 dbregs->dr0 = rdr0();
2385 dbregs->dr1 = rdr1();
2386 dbregs->dr2 = rdr2();
2387 dbregs->dr3 = rdr3();
2388 dbregs->dr4 = rdr4();
2389 dbregs->dr5 = rdr5();
2390 dbregs->dr6 = rdr6();
2391 dbregs->dr7 = rdr7();
2395 pcb = lp->lwp_thread->td_pcb;
2396 dbregs->dr0 = pcb->pcb_dr0;
2397 dbregs->dr1 = pcb->pcb_dr1;
2398 dbregs->dr2 = pcb->pcb_dr2;
2399 dbregs->dr3 = pcb->pcb_dr3;
2402 dbregs->dr6 = pcb->pcb_dr6;
2403 dbregs->dr7 = pcb->pcb_dr7;
2409 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2412 load_dr0(dbregs->dr0);
2413 load_dr1(dbregs->dr1);
2414 load_dr2(dbregs->dr2);
2415 load_dr3(dbregs->dr3);
2416 load_dr4(dbregs->dr4);
2417 load_dr5(dbregs->dr5);
2418 load_dr6(dbregs->dr6);
2419 load_dr7(dbregs->dr7);
2422 struct ucred *ucred;
2424 uint32_t mask1, mask2;
2427 * Don't let an illegal value for dr7 get set. Specifically,
2428 * check for undefined settings. Setting these bit patterns
2429 * result in undefined behaviour and can lead to an unexpected
2432 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2433 i++, mask1 <<= 2, mask2 <<= 2)
2434 if ((dbregs->dr7 & mask1) == mask2)
2437 pcb = lp->lwp_thread->td_pcb;
2438 ucred = lp->lwp_proc->p_ucred;
2441 * Don't let a process set a breakpoint that is not within the
2442 * process's address space. If a process could do this, it
2443 * could halt the system by setting a breakpoint in the kernel
2444 * (if ddb was enabled). Thus, we need to check to make sure
2445 * that no breakpoints are being enabled for addresses outside
2446 * process's address space, unless, perhaps, we were called by
2449 * XXX - what about when the watched area of the user's
2450 * address space is written into from within the kernel
2451 * ... wouldn't that still cause a breakpoint to be generated
2452 * from within kernel mode?
2455 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2456 if (dbregs->dr7 & 0x3) {
2457 /* dr0 is enabled */
2458 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2462 if (dbregs->dr7 & (0x3<<2)) {
2463 /* dr1 is enabled */
2464 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2468 if (dbregs->dr7 & (0x3<<4)) {
2469 /* dr2 is enabled */
2470 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2474 if (dbregs->dr7 & (0x3<<6)) {
2475 /* dr3 is enabled */
2476 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2481 pcb->pcb_dr0 = dbregs->dr0;
2482 pcb->pcb_dr1 = dbregs->dr1;
2483 pcb->pcb_dr2 = dbregs->dr2;
2484 pcb->pcb_dr3 = dbregs->dr3;
2485 pcb->pcb_dr6 = dbregs->dr6;
2486 pcb->pcb_dr7 = dbregs->dr7;
2488 pcb->pcb_flags |= PCB_DBREGS;
2495 * Return > 0 if a hardware breakpoint has been hit, and the
2496 * breakpoint was in user space. Return 0, otherwise.
2499 user_dbreg_trap(void)
2501 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2502 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2503 int nbp; /* number of breakpoints that triggered */
2504 caddr_t addr[4]; /* breakpoint addresses */
2508 if ((dr7 & 0x000000ff) == 0) {
2510 * all GE and LE bits in the dr7 register are zero,
2511 * thus the trap couldn't have been caused by the
2512 * hardware debug registers
2519 bp = dr6 & 0x0000000f;
2523 * None of the breakpoint bits are set meaning this
2524 * trap was not caused by any of the debug registers
2530 * at least one of the breakpoints were hit, check to see
2531 * which ones and if any of them are user space addresses
2535 addr[nbp++] = (caddr_t)rdr0();
2538 addr[nbp++] = (caddr_t)rdr1();
2541 addr[nbp++] = (caddr_t)rdr2();
2544 addr[nbp++] = (caddr_t)rdr3();
2547 for (i=0; i<nbp; i++) {
2549 (caddr_t)VM_MAX_USER_ADDRESS) {
2551 * addr[i] is in user space
2558 * None of the breakpoints are in user space.
2566 Debugger(const char *msg)
2568 kprintf("Debugger(\"%s\") called.\n", msg);
2575 * Provide inb() and outb() as functions. They are normally only
2576 * available as macros calling inlined functions, thus cannot be
2577 * called inside DDB.
2579 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2585 /* silence compiler warnings */
2587 void outb(u_int, u_char);
2594 * We use %%dx and not %1 here because i/o is done at %dx and not at
2595 * %edx, while gcc generates inferior code (movw instead of movl)
2596 * if we tell it to load (u_short) port.
2598 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2603 outb(u_int port, u_char data)
2607 * Use an unnecessary assignment to help gcc's register allocator.
2608 * This make a large difference for gcc-1.40 and a tiny difference
2609 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2610 * best results. gcc-2.6.0 can't handle this.
2613 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2620 #include "opt_cpu.h"
2624 * initialize all the SMP locks
2627 /* critical region when masking or unmasking interupts */
2628 struct spinlock_deprecated imen_spinlock;
2630 /* critical region for old style disable_intr/enable_intr */
2631 struct spinlock_deprecated mpintr_spinlock;
2633 /* critical region around INTR() routines */
2634 struct spinlock_deprecated intr_spinlock;
2636 /* lock region used by kernel profiling */
2637 struct spinlock_deprecated mcount_spinlock;
2639 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2640 struct spinlock_deprecated com_spinlock;
2642 /* lock regions around the clock hardware */
2643 struct spinlock_deprecated clock_spinlock;
2645 /* lock around the MP rendezvous */
2646 struct spinlock_deprecated smp_rv_spinlock;
2653 * Get the initial mplock with a count of 1 for the BSP.
2654 * This uses a LOGICAL cpu ID, ie BSP == 0.
2656 cpu_get_initial_mplock();
2659 spin_lock_init(&mcount_spinlock);
2660 spin_lock_init(&intr_spinlock);
2661 spin_lock_init(&mpintr_spinlock);
2662 spin_lock_init(&imen_spinlock);
2663 spin_lock_init(&smp_rv_spinlock);
2664 spin_lock_init(&com_spinlock);
2665 spin_lock_init(&clock_spinlock);
2667 /* our token pool needs to work early */
2668 lwkt_token_pool_init();