sys/dev/drm/radeon/radeon_bios.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  *
  28  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_bios.c 255572 2013-09-14 17:22:34Z dumbbell $
  29  */
  30
  31 #include <drm/drmP.h>
  32 #include "radeon_reg.h"
  33 #include "radeon.h"
  34 #include "atom.h"
  35
  36 /*
  37  * BIOS.
  38  */
  39
  40 /* If you boot an IGP board with a discrete card as the primary,
  41  * the IGP rom is not accessible via the rom bar as the IGP rom is
  42  * part of the system bios.  On boot, the system bios puts a
  43  * copy of the igp rom at the start of vram if a discrete card is
  44  * present.
  45  */
  46 static bool igp_read_bios_from_vram(struct radeon_device *rdev)
  47 {
  48         drm_local_map_t bios_map;
  49         uint8_t __iomem *bios;
  50         resource_size_t vram_base;
  51         resource_size_t size = 256 * 1024; /* ??? */
  52
  53         DRM_INFO("%s: ===> Try IGP's VRAM...\n", __func__);
  54
  55         if (!(rdev->flags & RADEON_IS_IGP))
  56                 if (!radeon_card_posted(rdev)) {
  57                         DRM_INFO("%s: not POSTed discrete card detected, skipping this method...\n",
  58                             __func__);
  59                         return false;
  60                 }
  61
  62         rdev->bios = NULL;
  63         vram_base = drm_get_resource_start(rdev->ddev, 0);
  64         DRM_INFO("%s: VRAM base address: 0x%jx\n", __func__, (uintmax_t)vram_base);
  65
  66         bios_map.offset = vram_base;
  67         bios_map.size   = size;
  68         bios_map.type   = 0;
  69         bios_map.flags  = 0;
  70         bios_map.mtrr   = 0;
  71         drm_core_ioremap(&bios_map, rdev->ddev);
  72         if (bios_map.virtual == NULL) {
  73                 DRM_INFO("%s: failed to ioremap\n", __func__);
  74                 return false;
  75         }
  76         bios = bios_map.virtual;
  77         size = bios_map.size;
  78         DRM_INFO("%s: Map address: %p (%ju bytes)\n", __func__, bios, (uintmax_t)size);
  79
  80         if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
  81                 if (size == 0) {
  82                         DRM_INFO("%s: Incorrect BIOS size\n", __func__);
  83                 } else {
  84                         DRM_INFO("%s: Incorrect BIOS signature: 0x%02X%02X\n",
  85                             __func__, bios[0], bios[1]);
  86                 }
  87                 drm_core_ioremapfree(&bios_map, rdev->ddev);
  88                 return false;
  89         }
  90         rdev->bios = kmalloc(size, DRM_MEM_DRIVER, M_WAITOK);
  91         if (rdev->bios == NULL) {
  92                 drm_core_ioremapfree(&bios_map, rdev->ddev);
  93                 return false;
  94         }
  95         memcpy_fromio(rdev->bios, bios, size);
  96         drm_core_ioremapfree(&bios_map, rdev->ddev);
  97         return true;
  98 }
  99
 100 static bool radeon_read_bios(struct radeon_device *rdev)
 101 {
 102         device_t vga_dev;
 103         uint8_t __iomem *bios;
 104         size_t size;
 105
 106         DRM_INFO("%s: ===> Try PCI Expansion ROM...\n", __func__);
 107
 108         vga_dev = device_get_parent(rdev->dev);
 109         rdev->bios = NULL;
 110         /* XXX: some cards may return 0 for rom size? ddx has a workaround */
 111         bios = vga_pci_map_bios(vga_dev, &size);
 112         if (!bios) {
 113                 return false;
 114         }
 115         DRM_INFO("%s: Map address: %p (%zu bytes)\n", __func__, bios, size);
 116
 117         if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
 118                 if (size == 0) {
 119                         DRM_INFO("%s: Incorrect BIOS size\n", __func__);
 120                 } else {
 121                         DRM_INFO("%s: Incorrect BIOS signature: 0x%02X%02X\n",
 122                             __func__, bios[0], bios[1]);
 123                 }
 124                 vga_pci_unmap_bios(vga_dev, bios);
 125         }
 126         rdev->bios = kmalloc(size, DRM_MEM_DRIVER, M_WAITOK);
 127         memcpy(rdev->bios, bios, size);
 128         vga_pci_unmap_bios(vga_dev, bios);
 129         return true;
 130 }
 131
 132 /* ATRM is used to get the BIOS on the discrete cards in
 133  * dual-gpu systems.
 134  */
 135 /* retrieve the ROM in 4k blocks */
 136 #define ATRM_BIOS_PAGE 4096
 137 /**
 138  * radeon_atrm_call - fetch a chunk of the vbios
 139  *
 140  * @atrm_handle: acpi ATRM handle
 141  * @bios: vbios image pointer
 142  * @offset: offset of vbios image data to fetch
 143  * @len: length of vbios image data to fetch
 144  *
 145  * Executes ATRM to fetch a chunk of the discrete
 146  * vbios image on PX systems (all asics).
 147  * Returns the length of the buffer fetched.
 148  */
 149 static int radeon_atrm_call(ACPI_HANDLE atrm_handle, uint8_t *bios,
 150                             int offset, int len)
 151 {
 152         ACPI_STATUS status;
 153         ACPI_OBJECT atrm_arg_elements[2], *obj;
 154         ACPI_OBJECT_LIST atrm_arg;
 155         ACPI_BUFFER buffer = { ACPI_ALLOCATE_BUFFER, NULL};
 156
 157         atrm_arg.Count = 2;
 158         atrm_arg.Pointer = &atrm_arg_elements[0];
 159
 160         atrm_arg_elements[0].Type = ACPI_TYPE_INTEGER;
 161         atrm_arg_elements[0].Integer.Value = offset;
 162
 163         atrm_arg_elements[1].Type = ACPI_TYPE_INTEGER;
 164         atrm_arg_elements[1].Integer.Value = len;
 165
 166         status = AcpiEvaluateObject(atrm_handle, NULL, &atrm_arg, &buffer);
 167         if (ACPI_FAILURE(status)) {
 168                 DRM_ERROR("failed to evaluate ATRM got %s\n", AcpiFormatException(status));
 169                 return -ENODEV;
 170         }
 171
 172         obj = (ACPI_OBJECT *)buffer.Pointer;
 173         memcpy(bios+offset, obj->Buffer.Pointer, obj->Buffer.Length);
 174         len = obj->Buffer.Length;
 175         AcpiOsFree(buffer.Pointer);
 176         return len;
 177 }
 178
 179 static bool radeon_atrm_get_bios(struct radeon_device *rdev)
 180 {
 181         int ret;
 182         int size = 256 * 1024;
 183         int i;
 184         device_t dev;
 185         ACPI_HANDLE dhandle, atrm_handle;
 186         ACPI_STATUS status;
 187         bool found = false;
 188
 189         DRM_INFO("%s: ===> Try ATRM...\n", __func__);
 190
 191         /* ATRM is for the discrete card only */
 192         if (rdev->flags & RADEON_IS_IGP) {
 193                 DRM_INFO("%s: IGP card detected, skipping this method...\n",
 194                     __func__);
 195                 return false;
 196         }
 197
 198 #ifdef DUMBBELL_WIP
 199         while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
 200 #endif /* DUMBBELL_WIP */
 201         if ((dev = pci_find_class(PCIC_DISPLAY, PCIS_DISPLAY_VGA)) != NULL) {
 202                 DRM_INFO("%s: pci_find_class() found: %d:%d:%d:%d, vendor=%04x, device=%04x\n",
 203                     __func__,
 204                     pci_get_domain(dev),
 205                     pci_get_bus(dev),
 206                     pci_get_slot(dev),
 207                     pci_get_function(dev),
 208                     pci_get_vendor(dev),
 209                     pci_get_device(dev));
 210                 DRM_INFO("%s: Get ACPI device handle\n", __func__);
 211                 dhandle = acpi_get_handle(dev);
 212 #ifdef DUMBBELL_WIP
 213                 if (!dhandle)
 214                         continue;
 215 #endif /* DUMBBELL_WIP */
 216                 if (!dhandle)
 217                         return false;
 218
 219                 DRM_INFO("%s: Get ACPI handle for \"ATRM\"\n", __func__);
 220                 status = AcpiGetHandle(dhandle, "ATRM", &atrm_handle);
 221                 if (!ACPI_FAILURE(status)) {
 222                         found = true;
 223 #ifdef DUMBBELL_WIP
 224                         break;
 225 #endif /* DUMBBELL_WIP */
 226                 } else {
 227                         DRM_INFO("%s: Failed to get \"ATRM\" handle: %s\n",
 228                             __func__, AcpiFormatException(status));
 229                 }
 230         }
 231
 232         if (!found)
 233                 return false;
 234
 235         rdev->bios = kmalloc(size, DRM_MEM_DRIVER, M_WAITOK);
 236         if (!rdev->bios) {
 237                 DRM_ERROR("Unable to allocate bios\n");
 238                 return false;
 239         }
 240
 241         for (i = 0; i < size / ATRM_BIOS_PAGE; i++) {
 242                 DRM_INFO("%s: Call radeon_atrm_call()\n", __func__);
 243                 ret = radeon_atrm_call(atrm_handle,
 244                                        rdev->bios,
 245                                        (i * ATRM_BIOS_PAGE),
 246                                        ATRM_BIOS_PAGE);
 247                 if (ret < ATRM_BIOS_PAGE)
 248                         break;
 249         }
 250
 251         if (i == 0 || rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) {
 252                 if (i == 0) {
 253                         DRM_INFO("%s: Incorrect BIOS size\n", __func__);
 254                 } else {
 255                         DRM_INFO("%s: Incorrect BIOS signature: 0x%02X%02X\n",
 256                             __func__, rdev->bios[0], rdev->bios[1]);
 257                 }
 258                 drm_free(rdev->bios, DRM_MEM_DRIVER);
 259                 return false;
 260         }
 261         return true;
 262 }
 263
 264 static bool ni_read_disabled_bios(struct radeon_device *rdev)
 265 {
 266         u32 bus_cntl;
 267         u32 d1vga_control;
 268         u32 d2vga_control;
 269         u32 vga_render_control;
 270         u32 rom_cntl;
 271         bool r;
 272
 273         DRM_INFO("%s: ===> Try disabled BIOS (ni)...\n", __func__);
 274
 275         bus_cntl = RREG32(R600_BUS_CNTL);
 276         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 277         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 278         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 279         rom_cntl = RREG32(R600_ROM_CNTL);
 280
 281         /* enable the rom */
 282         WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 283         /* Disable VGA mode */
 284         WREG32(AVIVO_D1VGA_CONTROL,
 285                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 286                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 287         WREG32(AVIVO_D2VGA_CONTROL,
 288                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 289                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 290         WREG32(AVIVO_VGA_RENDER_CONTROL,
 291                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 292         WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);
 293
 294         r = radeon_read_bios(rdev);
 295
 296         /* restore regs */
 297         WREG32(R600_BUS_CNTL, bus_cntl);
 298         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 299         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 300         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 301         WREG32(R600_ROM_CNTL, rom_cntl);
 302         return r;
 303 }
 304
 305 static bool r700_read_disabled_bios(struct radeon_device *rdev)
 306 {
 307         uint32_t viph_control;
 308         uint32_t bus_cntl;
 309         uint32_t d1vga_control;
 310         uint32_t d2vga_control;
 311         uint32_t vga_render_control;
 312         uint32_t rom_cntl;
 313         uint32_t cg_spll_func_cntl = 0;
 314         uint32_t cg_spll_status;
 315         bool r;
 316
 317         DRM_INFO("%s: ===> Try disabled BIOS (r700)...\n", __func__);
 318
 319         viph_control = RREG32(RADEON_VIPH_CONTROL);
 320         bus_cntl = RREG32(R600_BUS_CNTL);
 321         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 322         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 323         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 324         rom_cntl = RREG32(R600_ROM_CNTL);
 325
 326         /* disable VIP */
 327         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 328         /* enable the rom */
 329         WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 330         /* Disable VGA mode */
 331         WREG32(AVIVO_D1VGA_CONTROL,
 332                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 333                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 334         WREG32(AVIVO_D2VGA_CONTROL,
 335                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 336                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 337         WREG32(AVIVO_VGA_RENDER_CONTROL,
 338                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 339
 340         if (rdev->family == CHIP_RV730) {
 341                 cg_spll_func_cntl = RREG32(R600_CG_SPLL_FUNC_CNTL);
 342
 343                 /* enable bypass mode */
 344                 WREG32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl |
 345                                                 R600_SPLL_BYPASS_EN));
 346
 347                 /* wait for SPLL_CHG_STATUS to change to 1 */
 348                 cg_spll_status = 0;
 349                 while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
 350                         cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
 351
 352                 WREG32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
 353         } else
 354                 WREG32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
 355
 356         r = radeon_read_bios(rdev);
 357
 358         /* restore regs */
 359         if (rdev->family == CHIP_RV730) {
 360                 WREG32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
 361
 362                 /* wait for SPLL_CHG_STATUS to change to 1 */
 363                 cg_spll_status = 0;
 364                 while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
 365                         cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
 366         }
 367         WREG32(RADEON_VIPH_CONTROL, viph_control);
 368         WREG32(R600_BUS_CNTL, bus_cntl);
 369         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 370         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 371         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 372         WREG32(R600_ROM_CNTL, rom_cntl);
 373         return r;
 374 }
 375
 376 static bool r600_read_disabled_bios(struct radeon_device *rdev)
 377 {
 378         uint32_t viph_control;
 379         uint32_t bus_cntl;
 380         uint32_t d1vga_control;
 381         uint32_t d2vga_control;
 382         uint32_t vga_render_control;
 383         uint32_t rom_cntl;
 384         uint32_t general_pwrmgt;
 385         uint32_t low_vid_lower_gpio_cntl;
 386         uint32_t medium_vid_lower_gpio_cntl;
 387         uint32_t high_vid_lower_gpio_cntl;
 388         uint32_t ctxsw_vid_lower_gpio_cntl;
 389         uint32_t lower_gpio_enable;
 390         bool r;
 391
 392         DRM_INFO("%s: ===> Try disabled BIOS (r600)...\n", __func__);
 393
 394         viph_control = RREG32(RADEON_VIPH_CONTROL);
 395         bus_cntl = RREG32(R600_BUS_CNTL);
 396         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 397         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 398         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 399         rom_cntl = RREG32(R600_ROM_CNTL);
 400         general_pwrmgt = RREG32(R600_GENERAL_PWRMGT);
 401         low_vid_lower_gpio_cntl = RREG32(R600_LOW_VID_LOWER_GPIO_CNTL);
 402         medium_vid_lower_gpio_cntl = RREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
 403         high_vid_lower_gpio_cntl = RREG32(R600_HIGH_VID_LOWER_GPIO_CNTL);
 404         ctxsw_vid_lower_gpio_cntl = RREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
 405         lower_gpio_enable = RREG32(R600_LOWER_GPIO_ENABLE);
 406
 407         /* disable VIP */
 408         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 409         /* enable the rom */
 410         WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 411         /* Disable VGA mode */
 412         WREG32(AVIVO_D1VGA_CONTROL,
 413                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 414                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 415         WREG32(AVIVO_D2VGA_CONTROL,
 416                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 417                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 418         WREG32(AVIVO_VGA_RENDER_CONTROL,
 419                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 420
 421         WREG32(R600_ROM_CNTL,
 422                ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) |
 423                 (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) |
 424                 R600_SCK_OVERWRITE));
 425
 426         WREG32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));
 427         WREG32(R600_LOW_VID_LOWER_GPIO_CNTL,
 428                (low_vid_lower_gpio_cntl & ~0x400));
 429         WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL,
 430                (medium_vid_lower_gpio_cntl & ~0x400));
 431         WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL,
 432                (high_vid_lower_gpio_cntl & ~0x400));
 433         WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL,
 434                (ctxsw_vid_lower_gpio_cntl & ~0x400));
 435         WREG32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
 436
 437         r = radeon_read_bios(rdev);
 438
 439         /* restore regs */
 440         WREG32(RADEON_VIPH_CONTROL, viph_control);
 441         WREG32(R600_BUS_CNTL, bus_cntl);
 442         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 443         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 444         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 445         WREG32(R600_ROM_CNTL, rom_cntl);
 446         WREG32(R600_GENERAL_PWRMGT, general_pwrmgt);
 447         WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);
 448         WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);
 449         WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
 450         WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
 451         WREG32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
 452         return r;
 453 }
 454
 455 static bool avivo_read_disabled_bios(struct radeon_device *rdev)
 456 {
 457         uint32_t seprom_cntl1;
 458         uint32_t viph_control;
 459         uint32_t bus_cntl;
 460         uint32_t d1vga_control;
 461         uint32_t d2vga_control;
 462         uint32_t vga_render_control;
 463         uint32_t gpiopad_a;
 464         uint32_t gpiopad_en;
 465         uint32_t gpiopad_mask;
 466         bool r;
 467
 468         DRM_INFO("%s: ===> Try disabled BIOS (avivo)...\n", __func__);
 469
 470         seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);
 471         viph_control = RREG32(RADEON_VIPH_CONTROL);
 472         bus_cntl = RREG32(RV370_BUS_CNTL);
 473         d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 474         d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 475         vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
 476         gpiopad_a = RREG32(RADEON_GPIOPAD_A);
 477         gpiopad_en = RREG32(RADEON_GPIOPAD_EN);
 478         gpiopad_mask = RREG32(RADEON_GPIOPAD_MASK);
 479
 480         WREG32(RADEON_SEPROM_CNTL1,
 481                ((seprom_cntl1 & ~RADEON_SCK_PRESCALE_MASK) |
 482                 (0xc << RADEON_SCK_PRESCALE_SHIFT)));
 483         WREG32(RADEON_GPIOPAD_A, 0);
 484         WREG32(RADEON_GPIOPAD_EN, 0);
 485         WREG32(RADEON_GPIOPAD_MASK, 0);
 486
 487         /* disable VIP */
 488         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 489
 490         /* enable the rom */
 491         WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));
 492
 493         /* Disable VGA mode */
 494         WREG32(AVIVO_D1VGA_CONTROL,
 495                (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 496                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 497         WREG32(AVIVO_D2VGA_CONTROL,
 498                (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
 499                 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
 500         WREG32(AVIVO_VGA_RENDER_CONTROL,
 501                (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
 502
 503         r = radeon_read_bios(rdev);
 504
 505         /* restore regs */
 506         WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);
 507         WREG32(RADEON_VIPH_CONTROL, viph_control);
 508         WREG32(RV370_BUS_CNTL, bus_cntl);
 509         WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 510         WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 511         WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
 512         WREG32(RADEON_GPIOPAD_A, gpiopad_a);
 513         WREG32(RADEON_GPIOPAD_EN, gpiopad_en);
 514         WREG32(RADEON_GPIOPAD_MASK, gpiopad_mask);
 515         return r;
 516 }
 517
 518 static bool legacy_read_disabled_bios(struct radeon_device *rdev)
 519 {
 520         uint32_t seprom_cntl1;
 521         uint32_t viph_control;
 522         uint32_t bus_cntl;
 523         uint32_t crtc_gen_cntl;
 524         uint32_t crtc2_gen_cntl;
 525         uint32_t crtc_ext_cntl;
 526         uint32_t fp2_gen_cntl;
 527         bool r;
 528
 529         DRM_INFO("%s: ===> Try disabled BIOS (legacy)...\n", __func__);
 530
 531         seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);
 532         viph_control = RREG32(RADEON_VIPH_CONTROL);
 533         if (rdev->flags & RADEON_IS_PCIE)
 534                 bus_cntl = RREG32(RV370_BUS_CNTL);
 535         else
 536                 bus_cntl = RREG32(RADEON_BUS_CNTL);
 537         crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL);
 538         crtc2_gen_cntl = 0;
 539         crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);
 540         fp2_gen_cntl = 0;
 541
 542 #define PCI_DEVICE_ID_ATI_RADEON_QY     0x5159
 543
 544         if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
 545                 fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
 546         }
 547
 548         if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
 549                 crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
 550         }
 551
 552         WREG32(RADEON_SEPROM_CNTL1,
 553                ((seprom_cntl1 & ~RADEON_SCK_PRESCALE_MASK) |
 554                 (0xc << RADEON_SCK_PRESCALE_SHIFT)));
 555
 556         /* disable VIP */
 557         WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 558
 559         /* enable the rom */
 560         if (rdev->flags & RADEON_IS_PCIE)
 561                 WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));
 562         else
 563                 WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
 564
 565         /* Turn off mem requests and CRTC for both controllers */
 566         WREG32(RADEON_CRTC_GEN_CNTL,
 567                ((crtc_gen_cntl & ~RADEON_CRTC_EN) |
 568                 (RADEON_CRTC_DISP_REQ_EN_B |
 569                  RADEON_CRTC_EXT_DISP_EN)));
 570         if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
 571                 WREG32(RADEON_CRTC2_GEN_CNTL,
 572                        ((crtc2_gen_cntl & ~RADEON_CRTC2_EN) |
 573                         RADEON_CRTC2_DISP_REQ_EN_B));
 574         }
 575         /* Turn off CRTC */
 576         WREG32(RADEON_CRTC_EXT_CNTL,
 577                ((crtc_ext_cntl & ~RADEON_CRTC_CRT_ON) |
 578                 (RADEON_CRTC_SYNC_TRISTAT |
 579                  RADEON_CRTC_DISPLAY_DIS)));
 580
 581         if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
 582                 WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON));
 583         }
 584
 585         r = radeon_read_bios(rdev);
 586
 587         /* restore regs */
 588         WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);
 589         WREG32(RADEON_VIPH_CONTROL, viph_control);
 590         if (rdev->flags & RADEON_IS_PCIE)
 591                 WREG32(RV370_BUS_CNTL, bus_cntl);
 592         else
 593                 WREG32(RADEON_BUS_CNTL, bus_cntl);
 594         WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);
 595         if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
 596                 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
 597         }
 598         WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
 599         if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
 600                 WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
 601         }
 602         return r;
 603 }
 604
 605 static bool radeon_read_disabled_bios(struct radeon_device *rdev)
 606 {
 607         if (rdev->flags & RADEON_IS_IGP)
 608                 return igp_read_bios_from_vram(rdev);
 609         else if (rdev->family >= CHIP_BARTS)
 610                 return ni_read_disabled_bios(rdev);
 611         else if (rdev->family >= CHIP_RV770)
 612                 return r700_read_disabled_bios(rdev);
 613         else if (rdev->family >= CHIP_R600)
 614                 return r600_read_disabled_bios(rdev);
 615         else if (rdev->family >= CHIP_RS600)
 616                 return avivo_read_disabled_bios(rdev);
 617         else
 618                 return legacy_read_disabled_bios(rdev);
 619 }
 620
 621 static bool radeon_acpi_vfct_bios(struct radeon_device *rdev)
 622 {
 623         bool ret = false;
 624         ACPI_TABLE_HEADER *hdr;
 625         ACPI_SIZE tbl_size;
 626         UEFI_ACPI_VFCT *vfct;
 627         GOP_VBIOS_CONTENT *vbios;
 628         VFCT_IMAGE_HEADER *vhdr;
 629         ACPI_STATUS status;
 630
 631         DRM_INFO("%s: ===> Try VFCT...\n", __func__);
 632
 633         DRM_INFO("%s: Get \"VFCT\" ACPI table\n", __func__);
 634         status = AcpiGetTable("VFCT", 1, &hdr);
 635         if (!ACPI_SUCCESS(status)) {
 636                 DRM_INFO("%s: Failed to get \"VFCT\" table: %s\n",
 637                     __func__, AcpiFormatException(status));
 638                 return false;
 639         }
 640         tbl_size = hdr->Length;
 641         if (tbl_size < sizeof(UEFI_ACPI_VFCT)) {
 642                 DRM_ERROR("ACPI VFCT table present but broken (too short #1)\n");
 643                 goto out_unmap;
 644         }
 645
 646         vfct = (UEFI_ACPI_VFCT *)hdr;
 647         if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) > tbl_size) {
 648                 DRM_ERROR("ACPI VFCT table present but broken (too short #2)\n");
 649                 goto out_unmap;
 650         }
 651
 652         vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + vfct->VBIOSImageOffset);
 653         vhdr = &vbios->VbiosHeader;
 654         DRM_INFO("ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d\n",
 655                         vhdr->PCIBus, vhdr->PCIDevice, vhdr->PCIFunction,
 656                         vhdr->VendorID, vhdr->DeviceID, vhdr->ImageLength);
 657
 658         if (vhdr->PCIBus != rdev->ddev->pci_bus ||
 659             vhdr->PCIDevice != rdev->ddev->pci_slot ||
 660             vhdr->PCIFunction != rdev->ddev->pci_func ||
 661             vhdr->VendorID != rdev->ddev->pci_vendor ||
 662             vhdr->DeviceID != rdev->ddev->pci_device) {
 663                 DRM_INFO("ACPI VFCT table is not for this card\n");
 664                 goto out_unmap;
 665         };
 666
 667         if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) + vhdr->ImageLength > tbl_size) {
 668                 DRM_ERROR("ACPI VFCT image truncated\n");
 669                 goto out_unmap;
 670         }
 671
 672         rdev->bios = kmalloc(vhdr->ImageLength, DRM_MEM_DRIVER, M_WAITOK);
 673         memcpy(rdev->bios, &vbios->VbiosContent, vhdr->ImageLength);
 674         ret = !!rdev->bios;
 675
 676 out_unmap:
 677         return ret;
 678 }
 679
 680 bool radeon_get_bios(struct radeon_device *rdev)
 681 {
 682         bool r;
 683         uint16_t tmp;
 684
 685         r = radeon_atrm_get_bios(rdev);
 686         if (r == false)
 687                 r = radeon_acpi_vfct_bios(rdev);
 688         if (r == false)
 689                 r = igp_read_bios_from_vram(rdev);
 690         if (r == false)
 691                 r = radeon_read_bios(rdev);
 692         if (r == false) {
 693                 r = radeon_read_disabled_bios(rdev);
 694         }
 695         if (r == false || rdev->bios == NULL) {
 696                 DRM_ERROR("Unable to locate a BIOS ROM\n");
 697                 rdev->bios = NULL;
 698                 return false;
 699         }
 700         if (rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) {
 701                 DRM_ERROR("BIOS signature incorrect %x %x\n", rdev->bios[0], rdev->bios[1]);
 702                 goto free_bios;
 703         }
 704
 705         tmp = RBIOS16(0x18);
 706         if (RBIOS8(tmp + 0x14) != 0x0) {
 707                 DRM_INFO("Not an x86 BIOS ROM, not using.\n");
 708                 goto free_bios;
 709         }
 710
 711         rdev->bios_header_start = RBIOS16(0x48);
 712         if (!rdev->bios_header_start) {
 713                 goto free_bios;
 714         }
 715         tmp = rdev->bios_header_start + 4;
 716         if (!memcmp(rdev->bios + tmp, "ATOM", 4) ||
 717             !memcmp(rdev->bios + tmp, "MOTA", 4)) {
 718                 rdev->is_atom_bios = true;
 719         } else {
 720                 rdev->is_atom_bios = false;
 721         }
 722
 723         DRM_DEBUG("%sBIOS detected\n", rdev->is_atom_bios ? "ATOM" : "COM");
 724         return true;
 725 free_bios:
 726         drm_free(rdev->bios, DRM_MEM_DRIVER);
 727         rdev->bios = NULL;
 728         return false;
 729 }