2 * Copyright (c) 1990 The Regents of the University of California.
4 * LWKT threads Copyright (c) 2003 Matthew Dillon
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
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13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
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17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
38 * $DragonFly: src/sys/i386/i386/Attic/swtch.s,v 1.22 2003/07/08 06:27:26 dillon Exp $
42 #include "opt_user_ldt.h"
44 #include <sys/rtprio.h>
46 #include <machine/asmacros.h>
47 #include <machine/ipl.h>
50 #include <machine/pmap.h>
51 #include <machine/smptests.h> /** GRAB_LOPRIO */
52 #include <machine/apic.h>
53 #include <machine/lock.h>
62 #if defined(SWTCH_OPTIM_STATS)
63 .globl swtch_optim_stats, tlb_flush_count
64 swtch_optim_stats: .long 0 /* number of _swtch_optims */
65 tlb_flush_count: .long 0
72 * cpu_heavy_switch(next_thread)
74 * Switch from the current thread to a new thread. This entry
75 * is normally called via the thread->td_switch function, and will
76 * only be called when the current thread is a heavy weight process.
78 * YYY disable interrupts once giant is removed.
80 ENTRY(cpu_heavy_switch)
81 movl PCPU(curthread),%ecx
82 movl TD_PROC(%ecx),%ecx
85 movl P_VMSPACE(%ecx), %edx
86 movl PCPU(cpuid), %eax
87 btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
92 movl P_THREAD(%ecx),%edx
93 movl TD_PCB(%edx),%edx
94 movl (%esp),%eax /* Hardware registers */
95 movl %eax,PCB_EIP(%edx)
96 movl %ebx,PCB_EBX(%edx)
97 movl %esp,PCB_ESP(%edx)
98 movl %ebp,PCB_EBP(%edx)
99 movl %esi,PCB_ESI(%edx)
100 movl %edi,PCB_EDI(%edx)
101 movl %gs,PCB_GS(%edx)
104 * Push the LWKT switch restore function, which resumes a heavy
105 * weight process. Note that the LWKT switcher is based on
106 * TD_SP, while the heavy weight process switcher is based on
107 * PCB_ESP. TD_SP is usually one pointer pushed relative to
110 movl P_THREAD(%ecx),%eax
111 pushl $cpu_heavy_restore
112 movl %esp,TD_SP(%eax)
115 * Save debug regs if necessary
117 movb PCB_FLAGS(%edx),%al
119 jz 1f /* no, skip over */
120 movl %dr7,%eax /* yes, do the save */
121 movl %eax,PCB_DR7(%edx)
122 andl $0x0000fc00, %eax /* disable all watchpoints */
125 movl %eax,PCB_DR6(%edx)
127 movl %eax,PCB_DR3(%edx)
129 movl %eax,PCB_DR2(%edx)
131 movl %eax,PCB_DR1(%edx)
133 movl %eax,PCB_DR0(%edx)
137 * Save the FP state if we have used the FP.
140 movl P_THREAD(%ecx),%ecx
141 cmpl %ecx,PCPU(npxthread)
143 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
145 call npxsave /* do it in a big C function */
148 /* %ecx,%edx trashed */
149 #endif /* NNPX > 0 */
152 * Switch to the next thread, which was passed as an argument
153 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
154 * the argument is at 8(%esp). Set the current thread, load the
155 * stack pointer, and 'ret' into the switch-restore function.
158 movl %eax,PCPU(curthread)
159 movl TD_SP(%eax),%esp
165 * The switch function is changed to this when a thread is going away
166 * for good. We have to ensure that the MMU state is not cached, and
167 * we don't bother saving the existing thread state before switching.
169 * At this point we are in a critical section and this cpu owns the
170 * thread's token, which serves as an interlock until the switchout is
173 ENTRY(cpu_exit_switch)
175 * Get us out of the vmspace
183 movl PCPU(curthread),%ecx
185 * Switch to the next thread.
189 movl %eax,PCPU(curthread)
190 movl TD_SP(%eax),%esp
193 * We are now the next thread, set the exited flag and wakeup
196 orl $TDF_EXITED,TD_FLAGS(%ecx)
197 #if 0 /* YYY MP lock may not be held by new target */
199 pushl %ecx /* wakeup(oldthread) */
202 popl %eax /* note: next thread expects curthread in %eax */
206 * Restore the next thread's state and resume it. Note: the
207 * restore function assumes that the next thread's address is
213 * cpu_heavy_restore() (current thread in %eax on entry)
215 * Restore the thread after an LWKT switch. This entry is normally
216 * called via the LWKT switch restore function, which was pulled
217 * off the thread stack and jumped to.
219 * This entry is only called if the thread was previously saved
220 * using cpu_heavy_switch() (the heavy weight process thread switcher).
222 * YYY theoretically we do not have to restore everything here, a lot
223 * of this junk can wait until we return to usermode. But for now
224 * we restore everything.
226 * YYY STI/CLI sequencing.
227 * YYY the PCB crap is really crap, it makes startup a bitch because
228 * we can't switch away.
230 * YYY note: spl check is done in mi_switch when it splx()'s.
233 ENTRY(cpu_heavy_restore)
234 /* interrupts are disabled */
235 movl TD_PCB(%eax),%edx
236 movl TD_PROC(%eax),%ecx
238 cmpb $SRUN,P_STAT(%ecx)
242 #if defined(SWTCH_OPTIM_STATS)
243 incl _swtch_optim_stats
246 * Restore the MMU address space
249 cmpl PCB_CR3(%edx),%ebx
251 #if defined(SWTCH_OPTIM_STATS)
252 decl _swtch_optim_stats
253 incl _tlb_flush_count
255 movl PCB_CR3(%edx),%ebx
260 * Deal with the PCB extension, restore the private tss
262 movl PCPU(cpuid), %esi
263 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
265 btsl %esi, private_tss /* mark use of private tss */
266 movl PCB_EXT(%edx), %edi /* new tss descriptor */
271 * update common_tss.tss_esp0 pointer. This is the supervisor
272 * stack pointer on entry from user mode. Since the pcb is
273 * at the top of the supervisor stack esp0 starts just below it.
274 * We leave enough space for vm86 (16 bytes).
276 * common_tss.tss_esp0 is needed when user mode traps into the
280 movl %ebx, PCPU(common_tss) + TSS_ESP0
282 btrl %esi, private_tss
286 * There is no way to get the address of a segment-accessed variable
287 * so we store a self-referential pointer at the base of the per-cpu
288 * data area and add the appropriate offset.
290 movl $gd_common_tssd, %edi
294 * Move the correct TSS descriptor into the GDT slot, then reload
295 * tr. YYY not sure what is going on here
298 movl PCPU(tss_gdt), %ebx /* entry in GDT */
303 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
307 * Tell the pmap that our cpu is using the VMSPACE now.
310 movl P_VMSPACE(%ecx), %ebx
311 movl PCPU(cpuid), %eax
312 btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
315 * Restore general registers.
317 movl PCB_EBX(%edx),%ebx
318 movl PCB_ESP(%edx),%esp
319 movl PCB_EBP(%edx),%ebp
320 movl PCB_ESI(%edx),%esi
321 movl PCB_EDI(%edx),%edi
322 movl PCB_EIP(%edx),%eax
326 * Restore the user LDT if we have one
329 cmpl $0, PCB_USERLDT(%edx)
331 movl _default_ldt,%eax
332 cmpl PCPU(currentldt),%eax
335 movl %eax,PCPU(currentldt)
343 * Restore the %gs segment register, which must be done after
344 * loading the user LDT. Since user processes can modify the
345 * register via procfs, this may result in a fault which is
346 * detected by checking the fault address against cpu_switch_load_gs
347 * in i386/i386/trap.c
349 .globl cpu_switch_load_gs
351 movl PCB_GS(%edx),%gs
354 * Restore the DEBUG register state if necessary.
356 movb PCB_FLAGS(%edx),%al
358 jz 1f /* no, skip over */
359 movl PCB_DR6(%edx),%eax /* yes, do the restore */
361 movl PCB_DR3(%edx),%eax
363 movl PCB_DR2(%edx),%eax
365 movl PCB_DR1(%edx),%eax
367 movl PCB_DR0(%edx),%eax
369 movl %dr7,%eax /* load dr7 so as not to disturb */
370 andl $0x0000fc00,%eax /* reserved bits */
372 movl PCB_DR7(%edx),%ebx
373 andl $~0x0000fc00,%ebx
382 CROSSJUMPTARGET(sw1a)
389 sw0_1: .asciz "cpu_switch: panic: %p"
396 sw0_1: .asciz "cpu_switch: has wchan"
402 sw0_2: .asciz "cpu_switch: not SRUN"
405 #if defined(SMP) && defined(DIAGNOSTIC)
410 sw0_4: .asciz "cpu_switch: do not have lock"
411 #endif /* SMP && DIAGNOSTIC */
413 string: .asciz "SWITCHING\n"
417 * Update pcb, saving current processor state.
423 /* caller's return address - child won't execute this routine */
425 movl %eax,PCB_EIP(%ecx)
428 movl %eax,PCB_CR3(%ecx)
430 movl %ebx,PCB_EBX(%ecx)
431 movl %esp,PCB_ESP(%ecx)
432 movl %ebp,PCB_EBP(%ecx)
433 movl %esi,PCB_ESI(%ecx)
434 movl %edi,PCB_EDI(%ecx)
435 movl %gs,PCB_GS(%ecx)
439 * If npxthread == NULL, then the npx h/w state is irrelevant and the
440 * state had better already be in the pcb. This is true for forks
441 * but not for dumps (the old book-keeping with FP flags in the pcb
442 * always lost for dumps because the dump pcb has 0 flags).
444 * If npxthread != NULL, then we have to save the npx h/w state to
445 * npxthread's pcb and copy it to the requested pcb, or save to the
446 * requested pcb and reload. Copying is easier because we would
447 * have to handle h/w bugs for reloading. We used to lose the
448 * parent's npx state for forks by forgetting to reload.
450 movl PCPU(npxthread),%eax
455 movl TD_PCB(%eax),%eax
456 leal PCB_SAVEFPU(%eax),%eax
464 pushl $PCB_SAVEFPU_SIZE
465 leal PCB_SAVEFPU(%ecx),%ecx
470 #endif /* NNPX > 0 */
476 * cpu_idle_restore() (current thread in %eax on entry)
478 * Don't bother setting up any regs other then %ebp so backtraces
479 * don't die. This restore function is used to bootstrap into the
480 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
483 * If we are an AP we have to call ap_init() before jumping to
484 * cpu_idle(). ap_init() will synchronize with the BP and finish
485 * setting up various ncpu-dependant globaldata fields. This may
486 * happen on UP as well as SMP if we happen to be simulating multiple
489 ENTRY(cpu_idle_restore)
502 * cpu_kthread_restore() (current thread is %eax on entry)
504 * Don't bother setting up any regs other then %ebp so backtraces
505 * don't die. This restore function is used to bootstrap into an
506 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
509 * Since all of our context is on the stack we are reentrant and
510 * we can release our critical section and enable interrupts early.
512 ENTRY(cpu_kthread_restore)
513 movl TD_PCB(%eax),%ebx
515 subl $TDPRI_CRIT,TD_PRI(%eax)
517 popl %edx /* kthread exit function */
518 pushl PCB_EBX(%ebx) /* argument to ESI function */
519 pushl %edx /* set exit func as return address */
520 movl PCB_ESI(%ebx),%eax
526 * Standard LWKT switching function. Only non-scratch registers are
527 * saved and we don't bother with the MMU state or anything else.
529 * This function is always called while in a critical section.
533 ENTRY(cpu_lwkt_switch)
540 movl PCPU(curthread),%ecx
541 pushl $cpu_lwkt_restore
543 movl %esp,TD_SP(%ecx)
544 movl %eax,PCPU(curthread)
545 movl TD_SP(%eax),%esp
549 * cpu_lwkt_restore() (current thread in %eax on entry)
551 * Standard LWKT restore function. This function is always called
552 * while in a critical section.
554 * Warning: due to preemption the restore function can be used to
555 * 'return' to the original thread. Interrupt disablement must be
556 * protected through the switch so we cannot run splz here.
558 ENTRY(cpu_lwkt_restore)