2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $
27 * $DragonFly: src/sys/cpu/i386/include/atomic.h,v 1.25 2008/06/26 23:06:50 dillon Exp $
29 #ifndef _CPU_ATOMIC_H_
30 #define _CPU_ATOMIC_H_
33 #include <sys/types.h>
37 * Various simple arithmetic on memory which is atomic in the presence
38 * of interrupts and multiple processors.
40 * atomic_set_char(P, V) (*(u_char*)(P) |= (V))
41 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
42 * atomic_add_char(P, V) (*(u_char*)(P) += (V))
43 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
45 * atomic_set_short(P, V) (*(u_short*)(P) |= (V))
46 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
47 * atomic_add_short(P, V) (*(u_short*)(P) += (V))
48 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
50 * atomic_set_int(P, V) (*(u_int*)(P) |= (V))
51 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
52 * atomic_add_int(P, V) (*(u_int*)(P) += (V))
53 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
55 * atomic_set_long(P, V) (*(u_long*)(P) |= (V))
56 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
57 * atomic_add_long(P, V) (*(u_long*)(P) += (V))
58 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
62 * The above functions are expanded inline in the statically-linked
63 * kernel. Lock prefixes are generated if an SMP kernel is being
64 * built, or if user code is using these functions.
66 * Kernel modules call real functions which are built into the kernel.
67 * This allows kernel modules to be portable between UP and SMP systems.
69 #if defined(KLD_MODULE)
70 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
71 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
72 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v);
73 #else /* !KLD_MODULE */
74 #if defined(SMP) || !defined(_KERNEL)
75 #define MPLOCKED "lock ; "
81 * The assembly is volatilized to demark potential before-and-after side
82 * effects if an interrupt or SMP collision were to occur. The primary
83 * atomic instructions are MP safe, the nonlocked instructions are
84 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an
85 * atomic instruction).
87 * +m - memory is read and written (=m - memory is only written)
88 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg)
89 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq
90 * is good enough for our needs so don't get fancy.
93 /* egcs 1.1.2+ version */
94 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
95 static __inline void \
96 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
98 __asm __volatile(MPLOCKED OP \
102 static __inline void \
103 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\
105 __asm __volatile(OP \
110 #endif /* KLD_MODULE */
112 /* egcs 1.1.2+ version */
113 ATOMIC_ASM(set, char, "orb %b1,%0", v)
114 ATOMIC_ASM(clear, char, "andb %b1,%0", ~v)
115 ATOMIC_ASM(add, char, "addb %b1,%0", v)
116 ATOMIC_ASM(subtract, char, "subb %b1,%0", v)
118 ATOMIC_ASM(set, short, "orw %w1,%0", v)
119 ATOMIC_ASM(clear, short, "andw %w1,%0", ~v)
120 ATOMIC_ASM(add, short, "addw %w1,%0", v)
121 ATOMIC_ASM(subtract, short, "subw %w1,%0", v)
123 ATOMIC_ASM(set, int, "orl %1,%0", v)
124 ATOMIC_ASM(clear, int, "andl %1,%0", ~v)
125 ATOMIC_ASM(add, int, "addl %1,%0", v)
126 ATOMIC_ASM(subtract, int, "subl %1,%0", v)
128 ATOMIC_ASM(set, long, "orl %1,%0", v)
129 ATOMIC_ASM(clear, long, "andl %1,%0", ~v)
130 ATOMIC_ASM(add, long, "addl %1,%0", v)
131 ATOMIC_ASM(subtract, long, "subl %1,%0", v)
134 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock
135 * has already been acquired.
136 * atomic_poll_release_int(P)
138 * These support the NDIS driver and are also used for IPIQ interlocks
139 * between cpus. Both the acquisition and release must be
140 * cache-synchronizing instructions.
143 #if defined(KLD_MODULE)
145 extern int atomic_swap_int(volatile int *addr, int value);
146 extern int atomic_poll_acquire_int(volatile u_int *p);
147 extern void atomic_poll_release_int(volatile u_int *p);
152 atomic_swap_int(volatile int *addr, int value)
154 __asm __volatile("xchgl %0, %1" :
155 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
161 atomic_poll_acquire_int(volatile u_int *p)
165 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data));
171 atomic_poll_release_int(volatile u_int *p)
173 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p));
179 * These functions operate on a 32 bit interrupt interlock which is defined
182 * bit 0-30 interrupt handler disabled bits (counter)
183 * bit 31 interrupt handler currently running bit (1 = run)
185 * atomic_intr_cond_test(P) Determine if the interlock is in an
186 * acquired state. Returns 0 if it not
187 * acquired, non-zero if it is.
189 * atomic_intr_cond_try(P)
190 * Increment the request counter and attempt to
191 * set bit 31 to acquire the interlock. If
192 * we are unable to set bit 31 the request
193 * counter is decremented and we return -1,
194 * otherwise we return 0.
196 * atomic_intr_cond_enter(P, func, arg)
197 * Increment the request counter and attempt to
198 * set bit 31 to acquire the interlock. If
199 * we are unable to set bit 31 func(arg) is
200 * called in a loop until we are able to set
203 * atomic_intr_cond_exit(P, func, arg)
204 * Decrement the request counter and clear bit
205 * 31. If the request counter is still non-zero
206 * call func(arg) once.
208 * atomic_intr_handler_disable(P)
209 * Set bit 30, indicating that the interrupt
210 * handler has been disabled. Must be called
211 * after the hardware is disabled.
213 * Returns bit 31 indicating whether a serialized
214 * accessor is active (typically the interrupt
215 * handler is running). 0 == not active,
216 * non-zero == active.
218 * atomic_intr_handler_enable(P)
219 * Clear bit 30, indicating that the interrupt
220 * handler has been enabled. Must be called
221 * before the hardware is actually enabled.
223 * atomic_intr_handler_is_enabled(P)
224 * Returns bit 30, 0 indicates that the handler
225 * is enabled, non-zero indicates that it is
226 * disabled. The request counter portion of
227 * the field is ignored.
230 #if defined(KLD_MODULE)
232 void atomic_intr_init(__atomic_intr_t *p);
233 int atomic_intr_handler_disable(__atomic_intr_t *p);
234 void atomic_intr_handler_enable(__atomic_intr_t *p);
235 int atomic_intr_handler_is_enabled(__atomic_intr_t *p);
236 int atomic_intr_cond_test(__atomic_intr_t *p);
237 int atomic_intr_cond_try(__atomic_intr_t *p);
238 void atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg);
239 void atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg);
245 atomic_intr_init(__atomic_intr_t *p)
252 atomic_intr_handler_disable(__atomic_intr_t *p)
256 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
257 "andl $0x80000000,%%eax" \
258 : "=a"(data) , "+m"(*p));
264 atomic_intr_handler_enable(__atomic_intr_t *p)
266 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
271 atomic_intr_handler_is_enabled(__atomic_intr_t *p)
275 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
276 : "=a"(data) : "m"(*p));
282 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg)
284 __asm __volatile(MPLOCKED "incl %0; " \
286 MPLOCKED "btsl $31,%0; jnc 2f; " \
287 "pushl %2; call *%1; addl $4,%%esp; " \
291 : "r"(func), "m"(arg) \
296 * Attempt to enter the interrupt condition variable. Returns zero on
297 * success, 1 on failure.
301 atomic_intr_cond_try(__atomic_intr_t *p)
305 __asm __volatile(MPLOCKED "incl %0; " \
307 "subl %%eax,%%eax; " \
308 MPLOCKED "btsl $31,%0; jnc 2f; " \
309 MPLOCKED "decl %0; " \
312 : "+m" (*p), "=a"(ret)
314 : : "ax", "cx", "dx");
324 atomic_intr_cond_test(__atomic_intr_t *p)
326 return((int)(*p & 0x80000000));
331 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg)
333 __asm __volatile(MPLOCKED "decl %0; " \
334 MPLOCKED "btrl $31,%0; " \
335 "testl $0x3FFFFFFF,%0; jz 1f; " \
336 "pushl %2; call *%1; addl $4,%%esp; " \
339 : "r"(func), "m"(arg) \
346 * Atomic compare and set
348 * if (*_dst == _old) *_dst = _new (all 32 bit words)
350 * Returns 0 on failure, non-zero on success
352 #if defined(KLD_MODULE)
354 extern int atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new);
355 extern int atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src);
356 extern u_int atomic_fetchadd_int(volatile u_int *p, u_int v);
361 atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new)
365 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \
368 : "+a" (res), "=m" (*_dst) \
369 : "r" (_new), "m" (*_dst) \
375 atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src)
377 return (atomic_cmpset_int((volatile u_int *)dst, (u_int)exp,
382 * Atomically add the value of v to the integer pointed to by p and return
383 * the previous value of *p.
385 static __inline u_int
386 atomic_fetchadd_int(volatile u_int *p, u_int v)
388 __asm __volatile(MPLOCKED "xaddl %0,%1; " \
389 : "+r" (v), "=m" (*p) \
395 #endif /* KLD_MODULE */
397 #if defined(KLD_MODULE)
399 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
400 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
401 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
403 #else /* !KLD_MODULE */
405 #if defined(_KERNEL) && !defined(SMP)
407 * We assume that a = b will do atomic loads and stores. However, on a
408 * PentiumPro or higher, reads may pass writes, so for that case we have
409 * to use a serializing instruction (i.e. with LOCK) to do the load in
410 * SMP kernels. For UP kernels, however, the cache of the single processor
411 * is always consistent, so we don't need any memory barriers.
413 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
414 static __inline u_##TYPE \
415 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
420 static __inline void \
421 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
427 #else /* !(_KERNEL && !SMP) */
429 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
430 static __inline u_##TYPE \
431 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
435 __asm __volatile(MPLOCKED LOP \
436 : "=a" (res), /* 0 */ \
445 * The XCHG instruction asserts LOCK automagically. \
447 static __inline void \
448 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
450 __asm __volatile(SOP \
451 : "=m" (*p), /* 0 */ \
453 : "m" (*p)); /* 2 */ \
457 #endif /* _KERNEL && !SMP */
459 #endif /* !KLD_MODULE */
461 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
462 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
463 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
464 ATOMIC_STORE_LOAD(long, "cmpxchgl %0,%1", "xchgl %1,%0");
466 /* Acquire and release variants are identical to the normal ones. */
467 #define atomic_set_acq_char atomic_set_char
468 #define atomic_set_rel_char atomic_set_char
469 #define atomic_clear_acq_char atomic_clear_char
470 #define atomic_clear_rel_char atomic_clear_char
471 #define atomic_add_acq_char atomic_add_char
472 #define atomic_add_rel_char atomic_add_char
473 #define atomic_subtract_acq_char atomic_subtract_char
474 #define atomic_subtract_rel_char atomic_subtract_char
476 #define atomic_set_acq_short atomic_set_short
477 #define atomic_set_rel_short atomic_set_short
478 #define atomic_clear_acq_short atomic_clear_short
479 #define atomic_clear_rel_short atomic_clear_short
480 #define atomic_add_acq_short atomic_add_short
481 #define atomic_add_rel_short atomic_add_short
482 #define atomic_subtract_acq_short atomic_subtract_short
483 #define atomic_subtract_rel_short atomic_subtract_short
485 #define atomic_set_acq_int atomic_set_int
486 #define atomic_set_rel_int atomic_set_int
487 #define atomic_clear_acq_int atomic_clear_int
488 #define atomic_clear_rel_int atomic_clear_int
489 #define atomic_add_acq_int atomic_add_int
490 #define atomic_add_rel_int atomic_add_int
491 #define atomic_subtract_acq_int atomic_subtract_int
492 #define atomic_subtract_rel_int atomic_subtract_int
493 #define atomic_cmpset_acq_int atomic_cmpset_int
494 #define atomic_cmpset_rel_int atomic_cmpset_int
496 #define atomic_set_acq_long atomic_set_long
497 #define atomic_set_rel_long atomic_set_long
498 #define atomic_clear_acq_long atomic_clear_long
499 #define atomic_clear_rel_long atomic_clear_long
500 #define atomic_add_acq_long atomic_add_long
501 #define atomic_add_rel_long atomic_add_long
502 #define atomic_subtract_acq_long atomic_subtract_long
503 #define atomic_subtract_rel_long atomic_subtract_long
504 #define atomic_cmpset_acq_long atomic_cmpset_long
505 #define atomic_cmpset_rel_long atomic_cmpset_long
507 /* Operations on 8-bit bytes. */
508 #define atomic_set_8 atomic_set_char
509 #define atomic_set_acq_8 atomic_set_acq_char
510 #define atomic_set_rel_8 atomic_set_rel_char
511 #define atomic_clear_8 atomic_clear_char
512 #define atomic_clear_acq_8 atomic_clear_acq_char
513 #define atomic_clear_rel_8 atomic_clear_rel_char
514 #define atomic_add_8 atomic_add_char
515 #define atomic_add_acq_8 atomic_add_acq_char
516 #define atomic_add_rel_8 atomic_add_rel_char
517 #define atomic_subtract_8 atomic_subtract_char
518 #define atomic_subtract_acq_8 atomic_subtract_acq_char
519 #define atomic_subtract_rel_8 atomic_subtract_rel_char
520 #define atomic_load_acq_8 atomic_load_acq_char
521 #define atomic_store_rel_8 atomic_store_rel_char
523 /* Operations on 16-bit words. */
524 #define atomic_set_16 atomic_set_short
525 #define atomic_set_acq_16 atomic_set_acq_short
526 #define atomic_set_rel_16 atomic_set_rel_short
527 #define atomic_clear_16 atomic_clear_short
528 #define atomic_clear_acq_16 atomic_clear_acq_short
529 #define atomic_clear_rel_16 atomic_clear_rel_short
530 #define atomic_add_16 atomic_add_short
531 #define atomic_add_acq_16 atomic_add_acq_short
532 #define atomic_add_rel_16 atomic_add_rel_short
533 #define atomic_subtract_16 atomic_subtract_short
534 #define atomic_subtract_acq_16 atomic_subtract_acq_short
535 #define atomic_subtract_rel_16 atomic_subtract_rel_short
536 #define atomic_load_acq_16 atomic_load_acq_short
537 #define atomic_store_rel_16 atomic_store_rel_short
539 /* Operations on 32-bit double words. */
540 #define atomic_set_32 atomic_set_int
541 #define atomic_set_acq_32 atomic_set_acq_int
542 #define atomic_set_rel_32 atomic_set_rel_int
543 #define atomic_clear_32 atomic_clear_int
544 #define atomic_clear_acq_32 atomic_clear_acq_int
545 #define atomic_clear_rel_32 atomic_clear_rel_int
546 #define atomic_add_32 atomic_add_int
547 #define atomic_add_acq_32 atomic_add_acq_int
548 #define atomic_add_rel_32 atomic_add_rel_int
549 #define atomic_subtract_32 atomic_subtract_int
550 #define atomic_subtract_acq_32 atomic_subtract_acq_int
551 #define atomic_subtract_rel_32 atomic_subtract_rel_int
552 #define atomic_load_acq_32 atomic_load_acq_int
553 #define atomic_store_rel_32 atomic_store_rel_int
554 #define atomic_cmpset_32 atomic_cmpset_int
555 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
556 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
557 #define atomic_readandclear_32 atomic_readandclear_int
558 #define atomic_fetchadd_32 atomic_fetchadd_int
560 /* Operations on pointers. */
561 #define atomic_set_ptr(p, v) \
562 atomic_set_int((volatile u_int *)(p), (u_int)(v))
563 #define atomic_set_acq_ptr(p, v) \
564 atomic_set_acq_int((volatile u_int *)(p), (u_int)(v))
565 #define atomic_set_rel_ptr(p, v) \
566 atomic_set_rel_int((volatile u_int *)(p), (u_int)(v))
567 #define atomic_clear_ptr(p, v) \
568 atomic_clear_int((volatile u_int *)(p), (u_int)(v))
569 #define atomic_clear_acq_ptr(p, v) \
570 atomic_clear_acq_int((volatile u_int *)(p), (u_int)(v))
571 #define atomic_clear_rel_ptr(p, v) \
572 atomic_clear_rel_int((volatile u_int *)(p), (u_int)(v))
573 #define atomic_add_ptr(p, v) \
574 atomic_add_int((volatile u_int *)(p), (u_int)(v))
575 #define atomic_add_acq_ptr(p, v) \
576 atomic_add_acq_int((volatile u_int *)(p), (u_int)(v))
577 #define atomic_add_rel_ptr(p, v) \
578 atomic_add_rel_int((volatile u_int *)(p), (u_int)(v))
579 #define atomic_subtract_ptr(p, v) \
580 atomic_subtract_int((volatile u_int *)(p), (u_int)(v))
581 #define atomic_subtract_acq_ptr(p, v) \
582 atomic_subtract_acq_int((volatile u_int *)(p), (u_int)(v))
583 #define atomic_subtract_rel_ptr(p, v) \
584 atomic_subtract_rel_int((volatile u_int *)(p), (u_int)(v))
585 #define atomic_load_acq_ptr(p) \
586 atomic_load_acq_int((volatile u_int *)(p))
587 #define atomic_store_rel_ptr(p, v) \
588 atomic_store_rel_int((volatile u_int *)(p), (v))
589 #define atomic_cmpset_ptr(dst, old, new) \
590 atomic_cmpset_int((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
591 #define atomic_cmpset_acq_ptr(dst, old, new) \
592 atomic_cmpset_acq_int((volatile u_int *)(dst), (u_int)(old), \
594 #define atomic_cmpset_rel_ptr(dst, old, new) \
595 atomic_cmpset_rel_int((volatile u_int *)(dst), (u_int)(old), \
597 #define atomic_readandclear_ptr(p) \
598 atomic_readandclear_int((volatile u_int *)(p))
600 #endif /* ! _CPU_ATOMIC_H_ */