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32 .Nd ppbus microsequencer developer's guide
35 .In dev/ppbus/ppbconf.h
36 .In dev/ppbus/ppb_msq.h
40 for ppbus description and general info about the microsequencer.
42 The purpose of this document is to encourage developers to use the
43 microsequencer mechanism in order to have:
44 .Bl -enum -offset indent
46 a uniform programming model
51 Before using microsequences, you are encouraged to look at
53 microsequencer implementation and an example of how using it in
55 .Sh PPBUS register model
57 The parallel port model chosen for ppbus is the PC parallel port model.
58 Thus, any register described later has the same semantic than its counterpart
59 in a PC parallel port.
60 For more info about ISA/ECP programming, get the
61 Microsoft standard referenced as "Extended Capabilities Port Protocol and
62 ISA interface Standard". Registers described later are standard parallel port
65 Mask macros are defined in the standard ppbus include files for each valid
66 bit of parallel port registers.
68 In compatible or nibble mode, writing to this register will drive data to the
69 parallel port data lines.
70 In any other mode, drivers may be tri-stated by
71 setting the direction bit (PCD) in the control register.
72 Reads to this register
73 return the value on the data lines.
74 .Ss Device status register
75 This read-only register reflects the inputs on the parallel port interface.
77 .Bl -column "Bit" "Name" "Description" -compact
78 .It Em Bit Ta Em Name Ta Em Description
79 .It 7 Ta nBUSY Ta "inverted version of parallel port Busy signal"
80 .It 6 Ta nACK Ta "version of parallel port nAck signal"
81 .It 5 Ta PERROR Ta "version of parallel port PERROR signal"
82 .It 4 Ta SELECT Ta "version of parallel port Select signal"
83 .It 3 Ta nFAULT Ta "version of parallel port nFault signal"
86 Others are reserved and return undefined result when read.
87 .Ss Device control register
88 This register directly controls several output signals as well as enabling
91 .Bl -column "Bit" "Name " "Description" -compact
92 .It Em Bit Ta Em Name Ta Em Description
93 .It 5 Ta PCD Ta "direction bit in extended modes"
94 .It 4 Ta IRQENABLE Ta "1 enables an interrupt on the rising edge of nAck"
95 .It 3 Ta SELECTIN Ta "inverted and driven as parallel port nSelectin signal"
96 .It 2 Ta nINIT Ta "driven as parallel port nInit signal"
97 .It 1 Ta AUTOFEED Ta "inverted and driven as parallel port nAutoFd signal"
98 .It 0 Ta STROBE Ta "inverted and driven as parallel port nStrobe signal"
100 .Sh MICROINSTRUCTIONS
102 .Em Microinstructions
103 are either parallel port accesses, program iterations, submicrosequence or
105 The parallel port must be considered as the logical model described in
108 Available microinstructions are:
110 #define MS_OP_GET 0 /* get <ptr>, <len> */
111 #define MS_OP_PUT 1 /* put <ptr>, <len> */
112 #define MS_OP_RFETCH 2 /* rfetch <reg>, <mask>, <ptr> */
113 #define MS_OP_RSET 3 /* rset <reg>, <mask>, <mask> */
114 #define MS_OP_RASSERT 4 /* rassert <reg>, <mask> */
115 #define MS_OP_DELAY 5 /* delay <val> */
116 #define MS_OP_SET 6 /* set <val> */
117 #define MS_OP_DBRA 7 /* dbra <offset> */
118 #define MS_OP_BRSET 8 /* brset <mask>, <offset> */
119 #define MS_OP_BRCLEAR 9 /* brclear <mask>, <offset> */
120 #define MS_OP_RET 10 /* ret <retcode> */
121 #define MS_OP_C_CALL 11 /* c_call <function>, <parameter> */
122 #define MS_OP_PTR 12 /* ptr <pointer> */
123 #define MS_OP_ADELAY 13 /* adelay <val> */
124 #define MS_OP_BRSTAT 14 /* brstat <mask>, <mask>, <offset> */
125 #define MS_OP_SUBRET 15 /* subret <code> */
126 #define MS_OP_CALL 16 /* call <microsequence> */
127 #define MS_OP_RASSERT_P 17 /* rassert_p <iter>, <reg> */
128 #define MS_OP_RFETCH_P 18 /* rfetch_p <iter>, <reg>, <mask> */
129 #define MS_OP_TRIG 19 /* trigger <reg>, <len>, <array> */
131 .Ss Execution context
133 .Em execution context
134 of microinstructions is:
135 .Bl -bullet -offset indent
139 which points to the next microinstruction to execute either in the main
140 microsequence or in a subcall
144 which points to the next char to send/receive
146 the current value of the internal
150 This data is modified by some of the microinstructions, not all.
151 .Ss MS_OP_GET and MS_OP_PUT
152 are microinstructions used to do either predefined standard IEEE1284-1994
153 transfers or programmed non-standard io.
154 .Ss MS_OP_RFETCH - Register FETCH
155 is used to retrieve the current value of a parallel port register, apply a
156 mask and save it in a buffer.
159 .Bl -enum -offset indent
165 pointer to the buffer
168 Predefined macro: MS_RFETCH(reg,mask,ptr)
169 .Ss MS_OP_RSET - Register SET
170 is used to assert/clear some bits of a particular parallel port register,
171 two masks are applied.
174 .Bl -enum -offset indent
178 mask of bits to assert
180 mask of bits to clear
183 Predefined macro: MS_RSET(reg,assert,clear)
184 .Ss MS_OP_RASSERT - Register ASSERT
185 is used to assert all bits of a particular parallel port register.
188 .Bl -enum -offset indent
195 Predefined macro: MS_RASSERT(reg,byte)
196 .Ss MS_OP_DELAY - microsecond DELAY
197 is used to delay the execution of the microsequence.
200 .Bl -enum -offset indent
202 delay in microseconds
205 Predefined macro: MS_DELAY(delay)
206 .Ss MS_OP_SET - SET internal branch register
207 is used to set the value of the internal branch register.
210 .Bl -enum -offset indent
215 Predefined macro: MS_SET(accum)
216 .Ss MS_OP_DBRA - \&Do BRAnch
217 is used to branch if internal branch register decremented by one result value
221 .Bl -enum -offset indent
223 integer offset in the current executed (sub)microsequence.
225 the index of the next microinstruction to execute.
228 Predefined macro: MS_DBRA(offset)
229 .Ss MS_OP_BRSET - BRanch on SET
230 is used to branch if some of the status register bits of the parallel port
234 .Bl -enum -offset indent
236 bits of the status register
238 integer offset in the current executed (sub)microsequence.
240 the index of the next microinstruction to execute.
243 Predefined macro: MS_BRSET(mask,offset)
244 .Ss MS_OP_BRCLEAR - BRanch on CLEAR
245 is used to branch if some of the status register bits of the parallel port
249 .Bl -enum -offset indent
251 bits of the status register
253 integer offset in the current executed (sub)microsequence.
255 the index of the next microinstruction to execute.
258 Predefined macro: MS_BRCLEAR(mask,offset)
259 .Ss MS_OP_RET - RETurn
260 is used to return from a microsequence.
261 This instruction is mandatory.
263 is the only way for the microsequencer to detect the end of the microsequence.
264 The return code is returned in the integer pointed by the (int *) parameter
265 of the ppb_MS_microseq().
268 .Bl -enum -offset indent
273 Predefined macro: MS_RET(code)
274 .Ss MS_OP_C_CALL - C function CALL
275 is used to call C functions from microsequence execution.
277 when a non-standard i/o is performed to retrieve a data character from the
281 .Bl -enum -offset indent
283 the C function to call
285 the parameter to pass to the function call
288 The C function shall be declared as a
289 .Ft int(*)(void *p, char *ptr) .
290 The ptr parameter is the current position in the buffer currently scanned.
292 Predefined macro: MS_C_CALL(func,param)
293 .Ss MS_OP_PTR - initialize internal PTR
294 is used to initialize the internal pointer to the currently scanned buffer.
295 This pointer is passed to any C call (see above).
298 .Bl -enum -offset indent
300 pointer to the buffer that shall be accessed by xxx_P() microsequence calls.
301 Note that this pointer is automatically incremented during xxx_P() calls
304 Predefined macro: MS_PTR(ptr)
305 .Ss MS_OP_ADELAY - do an Asynchronous DELAY
306 is used to make a tsleep() during microsequence execution.
308 executed at PPBPRI level.
311 .Bl -enum -offset indent
316 Predefined macro: MS_ADELAY(delay)
317 .Ss MS_OP_BRSTAT - BRanch on STATe
318 is used to branch on status register state condition.
321 .Bl -enum -offset indent
323 mask of asserted bits.
324 Bits that shall be asserted in the status register
327 mask of cleared bits.
328 Bits that shall be cleared in the status register
331 integer offset in the current executed (sub)microsequence.
333 to the index of the next microinstruction to execute.
336 Predefined macro: MS_BRSTAT(asserted_bits,clear_bits,offset)
337 .Ss MS_OP_SUBRET - SUBmicrosequence RETurn
338 is used to return from the submicrosequence call.
339 This action is mandatory
341 Some microinstructions (PUT, GET) may not be callable
342 within a submicrosequence.
346 Predefined macro: MS_SUBRET()
347 .Ss MS_OP_CALL - submicrosequence CALL
348 is used to call a submicrosequence.
349 A submicrosequence is a microsequence with
352 .Bl -enum -offset indent
354 the submicrosequence to execute
357 Predefined macro: MS_CALL(microseq)
358 .Ss MS_OP_RASSERT_P - Register ASSERT from internal PTR
359 is used to assert a register with data currently pointed by the internal PTR
362 .Bl -enum -offset indent
364 amount of data to write to the register
369 Predefined macro: MS_RASSERT_P(iter,reg)
370 .Ss MS_OP_RFETCH_P - Register FETCH to internal PTR
371 is used to fetch data from a register.
372 Data is stored in the buffer currently
373 pointed by the internal PTR pointer.
375 .Bl -enum -offset indent
377 amount of data to read from the register
381 mask applied to fetched data
384 Predefined macro: MS_RFETCH_P(iter,reg,mask)
385 .Ss MS_OP_TRIG - TRIG register
386 is used to trigger the parallel port.
387 This microinstruction is intended to
388 provide a very efficient control of the parallel port.
389 Triggering a register
390 is writing data, wait a while, write data, wait a while...
392 write magic sequences to the port.
394 .Bl -enum -offset indent
396 amount of data to read from the register
402 array of unsigned chars.
403 Each couple of u_chars define the data to write to
404 the register and the delay in us to wait.
405 The delay is limited to 255 us to
406 simplify and reduce the size of the array.
409 Predefined macro: MS_TRIG(reg,len,array)
417 int (* f)(void *, char *);
420 struct ppb_microseq {
421 int opcode; /* microins. opcode */
422 union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */
425 .Ss Using microsequences
426 To instantiate a microsequence, just declare an array of ppb_microseq
427 structures and initialize it as needed.
428 You may either use predefined macros
429 or code directly your microinstructions according to the ppb_microseq
433 struct ppb_microseq select_microseq[] = {
437 #define SELECT_TARGET MS_PARAM(0, 1, MS_TYP_INT)
438 #define SELECT_INITIATOR MS_PARAM(3, 1, MS_TYP_INT)
440 /* send the select command to the drive */
442 MS_CASS(H_nAUTO | H_nSELIN | H_INIT | H_STROBE),
443 MS_CASS( H_AUTO | H_nSELIN | H_INIT | H_STROBE),
445 MS_CASS( H_AUTO | H_nSELIN | H_nINIT | H_STROBE),
447 /* now, wait until the drive is ready */
449 /* loop: */ MS_BRSET(H_ACK, 2 /* ready */),
450 MS_DBRA(-2 /* loop */),
451 /* error: */ MS_RET(1),
452 /* ready: */ MS_RET(0)
456 Here, some parameters are undefined and must be filled before executing
458 In order to initialize each microsequence, one
459 should use the ppb_MS_init_msq() function like this:
461 ppb_MS_init_msq(select_microseq, 2,
462 SELECT_TARGET, 1 << target,
463 SELECT_INITIATOR, 1 << initiator);
466 and then execute the microsequence.
467 .Ss The microsequencer
468 The microsequencer is executed either at ppbus or adapter level (see
470 for info about ppbus system layers). Most of the microsequencer is executed
471 at ppc level to avoid ppbus to adapter function call overhead.
473 actions like deciding whereas the transfer is IEEE1284-1994 compliant are
474 executed at ppbus layer.
476 Only one level of submicrosequences is allowed.
478 When triggering the port, maximum delay allowed is 255 us.
486 manual page first appeared in
490 manual page was written by