2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software withough specific prior written permission
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * $FreeBSD: src/sys/dev/pdq/if_fpa.c,v 1.13 1999/08/28 00:50:50 peter Exp $
29 * DEC PDQ FDDI Controller; code for BSD derived operating systems
31 * This module supports the DEC DEFPA PCI FDDI Controller
34 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/socket.h>
37 #if defined(__bsdi__) || defined(__NetBSD__)
38 #include <sys/device.h>
43 #if defined(__FreeBSD__)
45 #include <sys/eventhandler.h>
46 #include <net/ethernet.h>
47 #include <net/if_arp.h>
48 #include <pci/pcivar.h>
49 #include <dev/pdq/pdqvar.h>
50 #include <dev/pdq/pdqreg.h>
51 #elif defined(__bsdi__)
52 #include <i386/isa/isavar.h>
53 #include <i386/isa/icu.h>
57 #if _BSDI_VERSION < 199401
60 #elif defined(__NetBSD__)
61 #include <dev/pci/pcivar.h>
62 #include <dev/ic/pdqvar.h>
63 #include <dev/ic/pdqreg.h>
64 #endif /* __NetBSD__ */
67 #define DEC_VENDORID 0x1011
68 #define DEFPA_CHIPID 0x000F
69 #define PCI_VENDORID(x) ((x) & 0xFFFF)
70 #define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF)
72 #define DEFPA_LATENCY 0x88
74 #define PCI_CFLT 0x0C /* Configuration Latency */
75 #define PCI_CBMA 0x10 /* Configuration Base Memory Address */
76 #define PCI_CBIO 0x14 /* Configuration Base I/O Address */
78 #if defined(__FreeBSD__)
83 static pdq_softc_t *pdqs_pci[NFPA];
84 #define PDQ_PCI_UNIT_TO_SOFTC(unit) (pdqs_pci[unit])
86 #define pdq_pci_ifwatchdog NULL
89 #elif defined(__bsdi__)
90 extern struct cfdriver fpacd;
91 #define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)fpacd.cd_devs[unit])
93 #elif defined(__NetBSD__)
94 extern struct cfattach fpa_ca;
95 extern struct cfdriver fpa_cd;
96 #define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)fpa_cd.cd_devs[unit])
97 #define pdq_pci_ifwatchdog NULL
100 #ifndef pdq_pci_ifwatchdog
105 pdq_ifwatchdog(&PDQ_PCI_UNIT_TO_SOFTC(unit)->sc_if);
109 #if defined(__FreeBSD__) && BSD >= 199506
114 (void) pdq_interrupt(((pdq_softc_t *) arg)->sc_pdq);
121 pdq_softc_t * const sc = (pdq_softc_t *) arg;
123 return pdq_interrupt(sc->sc_pdq);
124 #elif defined(__bsdi__) || defined(__NetBSD__)
125 (void) pdq_interrupt(sc->sc_pdq);
129 #endif /* __FreeBSD && BSD */
131 #if defined(__FreeBSD__)
132 static void pdq_pci_shutdown(void *, int);
135 * This is the PCI configuration support. Since the PDQ is available
136 * on both EISA and PCI boards, one must be careful in how defines the
137 * PDQ in the config file.
144 if (PCI_VENDORID(device_id) == DEC_VENDORID &&
145 PCI_CHIPID(device_id) == DEFPA_CHIPID)
146 return "Digital DEFPA PCI FDDI Controller";
156 vm_offset_t va_csrs, pa_csrs;
160 printf("fpa%d: not configured; kernel is built for only %d device%s.\n",
161 unit, NFPA, NFPA == 1 ? "" : "s");
165 data = pci_conf_read(config_id, PCI_CFLT);
166 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
168 data |= DEFPA_LATENCY << 8;
169 pci_conf_write(config_id, PCI_CFLT, data);
172 sc = (pdq_softc_t *) malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
176 bzero(sc, sizeof(pdq_softc_t)); /* Zero out the softc*/
177 if (!pci_map_mem(config_id, PCI_CBMA, &va_csrs, &pa_csrs)) {
178 free((void *) sc, M_DEVBUF);
182 sc->sc_if.if_name = "fpa";
183 sc->sc_if.if_unit = unit;
184 sc->sc_membase = (pdq_bus_memaddr_t) va_csrs;
185 sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase,
186 sc->sc_if.if_name, sc->sc_if.if_unit,
187 (void *) sc, PDQ_DEFPA);
188 if (sc->sc_pdq == NULL) {
189 free((void *) sc, M_DEVBUF);
192 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
194 pdq_ifattach(sc, pdq_pci_ifwatchdog);
195 pci_map_int(config_id, pdq_pci_ifintr, (void*) sc, &net_imask);
196 EVENTHANDLER_REGISTER(shutdown_post_sync, pdq_pci_shutdown, sc,
197 SHUTDOWN_PRI_DEFAULT);
206 pdq_hwreset(((pdq_softc_t *)sc)->sc_pdq);
209 static u_long pdq_pci_count;
211 static struct pci_device fpadevice = {
219 COMPAT_PCI_DRIVER (fpa, fpadevice);
221 #elif defined(__bsdi__)
230 id = pci_inl(pa, PCI_VENDOR_ID);
231 if (PCI_VENDORID(id) != DEC_VENDORID || PCI_CHIPID(id) != DEFPA_CHIPID)
234 irq = pci_inl(pa, PCI_I_LINE) & 0xFF;
235 if (irq == 0 || irq >= 16)
243 struct device *parent,
247 struct isa_attach_args *ia = (struct isa_attach_args *) aux;
248 pdq_uint32_t irq, data;
251 pa = pci_scan(pdq_pci_match);
255 irq = (1 << (pci_inl(pa, PCI_I_LINE) & 0xFF));
257 if (ia->ia_irq != IRQUNK && irq != ia->ia_irq) {
258 printf("fpa%d: error: desired IRQ of %d does not match device's actual IRQ of %d\n",
260 ffs(ia->ia_irq) - 1, ffs(irq) - 1);
263 if (ia->ia_irq == IRQUNK) {
264 (void) isa_irqalloc(irq);
268 /* PCI bus masters don't use host DMA channels */
269 ia->ia_drq = DRQNONE;
271 /* Get the memory base address; assume the BIOS set it up correctly */
272 ia->ia_maddr = (caddr_t) (pci_inl(pa, PCI_CBMA) & ~7);
273 pci_outl(pa, PCI_CBMA, 0xFFFFFFFF);
274 ia->ia_msize = ((~pci_inl(pa, PCI_CBMA)) | 7) + 1;
275 pci_outl(pa, PCI_CBMA, (int) ia->ia_maddr);
277 /* Disable I/O space access */
278 pci_outl(pa, PCI_COMMAND, pci_inl(pa, PCI_COMMAND) & ~1);
282 /* Make sure the latency timer is what the DEFPA likes */
283 data = pci_inl(pa, PCI_CFLT);
284 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
286 data |= DEFPA_LATENCY << 8;
287 pci_outl(pa, PCI_CFLT, data);
289 ia->ia_irq |= IRQSHARE;
296 struct device *parent,
300 pdq_softc_t *sc = (pdq_softc_t *) self;
301 register struct isa_attach_args *ia = (struct isa_attach_args *) aux;
302 register struct ifnet *ifp = &sc->sc_if;
305 sc->sc_if.if_unit = sc->sc_dev.dv_unit;
306 sc->sc_if.if_name = "fpa";
307 sc->sc_if.if_flags = 0;
308 sc->sc_membase = (pdq_bus_memaddr_t) mapphys((vm_offset_t)ia->ia_maddr, ia->ia_msize);
310 sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase,
311 sc->sc_if.if_name, sc->sc_if.if_unit,
312 (void *) sc, PDQ_DEFPA);
313 if (sc->sc_pdq == NULL) {
314 printf("fpa%d: initialization failed\n", sc->sc_if.if_unit);
318 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
320 pdq_ifattach(sc, pdq_pci_ifwatchdog);
322 isa_establish(&sc->sc_id, &sc->sc_dev);
324 sc->sc_ih.ih_fun = pdq_pci_ifintr;
325 sc->sc_ih.ih_arg = (void *)sc;
326 intr_establish(ia->ia_irq, &sc->sc_ih, DV_NET);
328 sc->sc_ats.func = (void (*)(void *)) pdq_hwreset;
329 sc->sc_ats.arg = (void *) sc->sc_pdq;
330 atshutdown(&sc->sc_ats, ATSH_ADD);
333 struct cfdriver fpacd = {
334 0, "fpa", pdq_pci_probe, pdq_pci_attach,
335 #if _BSDI_VERSION >= 199401
341 #elif defined(__NetBSD__)
345 struct device *parent,
349 struct pci_attach_args *pa = (struct pci_attach_args *) aux;
351 if (PCI_VENDORID(pa->pa_id) != DEC_VENDORID)
353 if (PCI_CHIPID(pa->pa_id) == DEFPA_CHIPID)
361 struct device * const parent,
362 struct device * const self,
365 pdq_softc_t * const sc = (pdq_softc_t *) self;
366 struct pci_attach_args * const pa = (struct pci_attach_args *) aux;
368 pci_intr_handle_t intrhandle;
371 bus_io_addr_t iobase;
372 bus_io_size_t iosize;
374 bus_mem_addr_t membase;
375 bus_mem_size_t memsize;
378 data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFLT);
379 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
381 data |= DEFPA_LATENCY << 8;
382 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CFLT, data);
385 sc->sc_bc = pa->pa_bc;
386 bcopy(sc->sc_dev.dv_xname, sc->sc_if.if_xname, IFNAMSIZ);
387 sc->sc_if.if_flags = 0;
388 sc->sc_if.if_softc = sc;
391 if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_CBIO, &iobase, &iosize)
392 || bus_io_map(pa->pa_bc, iobase, iosize, &sc->sc_iobase))
395 if (pci_mem_find(pa->pa_pc, pa->pa_tag, PCI_CBMA, &membase, &memsize, NULL)
396 || bus_mem_map(pa->pa_bc, membase, memsize, 0, &sc->sc_membase))
400 sc->sc_pdq = pdq_initialize(sc->sc_bc, sc->sc_membase,
401 sc->sc_if.if_xname, 0,
402 (void *) sc, PDQ_DEFPA);
403 if (sc->sc_pdq == NULL) {
404 printf("%s: initialization failed\n", sc->sc_dev.dv_xname);
408 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
409 pdq_ifattach(sc, pdq_pci_ifwatchdog);
411 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
412 pa->pa_intrline, &intrhandle)) {
413 printf("%s: couldn't map interrupt\n", self->dv_xname);
416 intrstr = pci_intr_string(pa->pa_pc, intrhandle);
417 sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET, pdq_pci_ifintr, sc);
418 if (sc->sc_ih == NULL) {
419 printf("%s: couldn't establish interrupt", self->dv_xname);
421 printf(" at %s", intrstr);
426 sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset, sc->sc_pdq);
427 if (sc->sc_ats == NULL)
428 printf("%s: warning: couldn't establish shutdown hook\n", self->dv_xname);
430 printf("%s: interrupting at %s\n", self->dv_xname, intrstr);
433 struct cfattach fpa_ca = {
434 sizeof(pdq_softc_t), pdq_pci_match, pdq_pci_attach
437 struct cfdriver fpa_cd = {
441 #endif /* __NetBSD__ */