2 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 #include <sys/interrupt.h>
37 #include <sys/kernel.h>
38 #include <sys/memrange.h>
40 #include <sys/types.h>
42 #include <vm/vm_extern.h>
43 #include <vm/vm_kern.h>
44 #include <vm/vm_object.h>
45 #include <vm/vm_page.h>
47 #include <sys/mplock2.h>
49 #include <machine/cpu.h>
50 #include <machine/cpufunc.h>
51 #include <machine/globaldata.h>
52 #include <machine/md_var.h>
53 #include <machine/pmap.h>
54 #include <machine/smp.h>
55 #include <machine/tls.h>
62 extern pt_entry_t *KPTphys;
64 volatile cpumask_t stopped_cpus;
65 cpumask_t smp_active_mask = 1; /* which cpus are ready for IPIs etc? */
66 static int boot_address;
67 static cpumask_t smp_startup_mask = 1; /* which cpus have been started */
68 int mp_naps; /* # of Applications processors */
71 /* Local data for detecting CPU TOPOLOGY */
72 static int core_bits = 0;
73 static int logical_CPU_bits = 0;
75 /* function prototypes XXX these should go elsewhere */
76 void bootstrap_idle(void);
77 void single_cpu_ipi(int, int, int);
78 void selected_cpu_ipi(cpumask_t, int, int);
80 void ipi_handler(int);
85 /* AP uses this during bootstrap. Do not staticize. */
90 /* XXX these need to go into the appropriate header file */
91 static int start_all_aps(u_int);
92 void init_secondary(void);
93 void *start_ap(void *);
96 * Get SMP fully working before we start initializing devices.
103 cpumask_t ncpus_mask = 0;
105 for (i = 1; i <= ncpus; i++)
106 ncpus_mask |= CPUMASK(i);
110 kprintf("Finish MP startup\n");
112 /* build our map of 'other' CPUs */
113 mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid);
116 * Let the other cpu's finish initializing and build their map
120 while (smp_active_mask != smp_startup_mask) {
125 while (try_mplock() == 0)
128 kprintf("Active CPU Mask: %08lx\n", (long)smp_active_mask);
131 SYSINIT(finishsmp, SI_BOOT2_FINISH_SMP, SI_ORDER_FIRST, ap_finish, NULL)
135 start_ap(void *arg __unused)
141 return(NULL); /* NOTREACHED */
144 /* storage for AP thread IDs */
145 pthread_t ap_tids[MAXCPU];
156 /* ncpus2 -- ncpus rounded down to the nearest power of 2 */
157 for (shift = 0; (1 << shift) <= ncpus; ++shift)
160 ncpus2_shift = shift;
162 ncpus2_mask = ncpus2 - 1;
164 /* ncpus_fit -- ncpus rounded up to the nearest power of 2 */
165 if ((1 << shift) < ncpus)
167 ncpus_fit = 1 << shift;
168 ncpus_fit_mask = ncpus_fit - 1;
171 * cpu0 initialization
173 mycpu->gd_ipiq = (void *)kmem_alloc(&kernel_map,
174 sizeof(lwkt_ipiq) * ncpus);
175 bzero(mycpu->gd_ipiq, sizeof(lwkt_ipiq) * ncpus);
180 start_all_aps(boot_address);
189 kprintf("DragonFly/MP: Multiprocessor\n");
190 kprintf(" cpu0 (BSP)\n");
192 for (x = 1; x <= mp_naps; ++x)
193 kprintf(" cpu%d (AP)\n", x);
197 cpu_send_ipiq(int dcpu)
199 if (CPUMASK(dcpu) & smp_active_mask) {
200 if (pthread_kill(ap_tids[dcpu], SIGUSR1) != 0)
201 panic("pthread_kill failed in cpu_send_ipiq");
204 panic("XXX cpu_send_ipiq()");
216 single_cpu_ipi(int cpu, int vector, int delivery_mode)
218 kprintf("XXX single_cpu_ipi\n");
222 selected_cpu_ipi(cpumask_t target, int vector, int delivery_mode)
226 int n = BSFCPUMASK(target);
227 target &= ~CPUMASK(n);
228 single_cpu_ipi(n, vector, delivery_mode);
234 stop_cpus(cpumask_t map)
236 map &= smp_active_mask;
240 int n = BSFCPUMASK(map);
242 stopped_cpus |= CPUMASK(n);
243 if (pthread_kill(ap_tids[n], SIGXCPU) != 0)
244 panic("stop_cpus: pthread_kill failed");
248 panic("XXX stop_cpus()");
255 restart_cpus(cpumask_t map)
257 map &= smp_active_mask;
261 int n = BSFCPUMASK(map);
263 stopped_cpus &= ~CPUMASK(n);
264 if (pthread_kill(ap_tids[n], SIGXCPU) != 0)
265 panic("restart_cpus: pthread_kill failed");
269 panic("XXX restart_cpus()");
279 * Adjust smp_startup_mask to signal the BSP that we have started
280 * up successfully. Note that we do not yet hold the BGL. The BSP
281 * is waiting for our signal.
283 * We can't set our bit in smp_active_mask yet because we are holding
284 * interrupts physically disabled and remote cpus could deadlock
285 * trying to send us an IPI.
287 smp_startup_mask |= CPUMASK(mycpu->gd_cpuid);
291 * Interlock for finalization. Wait until mp_finish is non-zero,
292 * then get the MP lock.
294 * Note: We are in a critical section.
296 * Note: we are the idle thread, we can only spin.
298 * Note: The load fence is memory volatile and prevents the compiler
299 * from improperly caching mp_finish, and the cpu from improperly
303 while (mp_finish == 0) {
307 while (try_mplock() == 0)
310 /* BSP may have changed PTD while we're waiting for the lock */
313 /* Build our map of 'other' CPUs. */
314 mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid);
316 kprintf("SMP: AP CPU #%d Launched!\n", mycpu->gd_cpuid);
319 /* Set memory range attributes for this CPU to match the BSP */
322 * Once we go active we must process any IPIQ messages that may
323 * have been queued, because no actual IPI will occur until we
324 * set our bit in the smp_active_mask. If we don't the IPI
325 * message interlock could be left set which would also prevent
328 * The idle loop doesn't expect the BGL to be held and while
329 * lwkt_switch() normally cleans things up this is a special case
330 * because we returning almost directly into the idle loop.
332 * The idle thread is never placed on the runq, make sure
333 * nothing we've done put it there.
335 KKASSERT(get_mplock_count(curthread) == 1);
336 smp_active_mask |= CPUMASK(mycpu->gd_cpuid);
338 mdcpu->gd_fpending = 0;
339 mdcpu->gd_ipending = 0;
340 initclocks_pcpu(); /* clock interrupts (via IPIs) */
344 * Releasing the mp lock lets the BSP finish up the SMP init
347 KKASSERT((curthread->td_flags & TDF_RUNQ) == 0);
354 struct mdglobaldata *md;
355 struct privatespace *ps;
357 ps = &CPU_prvspace[myid];
359 KKASSERT(ps->mdglobaldata.mi.gd_prvspace == ps);
362 * Setup the %gs for cpu #n. The mycpu macro works after this
363 * point. Note that %fs is used by pthreads.
365 tls_set_gs(&CPU_prvspace[myid], sizeof(struct privatespace));
367 md = mdcpu; /* loaded through %gs:0 (mdglobaldata.mi.gd_prvspace)*/
370 md->gd_common_tss.tss_rsp0 = 0; /* not used until after switch */
371 //md->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
372 //md->gd_common_tss.tss_ioopt = (sizeof md->gd_common_tss) << 16;
375 * Set to a known state:
376 * Set by mpboot.s: CR0_PG, CR0_PE
377 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
382 start_all_aps(u_int boot_addr)
385 struct mdglobaldata *gd;
386 struct privatespace *ps;
390 struct lwp_params params;
394 * needed for ipis to initial thread
395 * FIXME: rename ap_tids?
397 ap_tids[0] = pthread_self();
399 vm_object_hold(&kernel_object);
400 for (x = 1; x <= mp_naps; x++)
402 /* Allocate space for the CPU's private space. */
403 for (i = 0; i < sizeof(struct mdglobaldata); i += PAGE_SIZE) {
404 va =(vm_offset_t)&CPU_prvspace[x].mdglobaldata + i;
405 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM);
406 pmap_kenter_quick(va, m->phys_addr);
409 for (i = 0; i < sizeof(CPU_prvspace[x].idlestack); i += PAGE_SIZE) {
410 va =(vm_offset_t)&CPU_prvspace[x].idlestack + i;
411 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM);
412 pmap_kenter_quick(va, m->phys_addr);
415 gd = &CPU_prvspace[x].mdglobaldata; /* official location */
416 bzero(gd, sizeof(*gd));
417 gd->mi.gd_prvspace = ps = &CPU_prvspace[x];
419 /* prime data page for it to use */
420 mi_gdinit(&gd->mi, x);
424 gd->gd_CMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE1);
425 gd->gd_CMAP2 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE2);
426 gd->gd_CMAP3 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE3);
427 gd->gd_PMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].PPAGE1);
428 gd->gd_CADDR1 = ps->CPAGE1;
429 gd->gd_CADDR2 = ps->CPAGE2;
430 gd->gd_CADDR3 = ps->CPAGE3;
431 gd->gd_PADDR1 = (vpte_t *)ps->PPAGE1;
434 gd->mi.gd_ipiq = (void *)kmem_alloc(&kernel_map, sizeof(lwkt_ipiq) * (mp_naps + 1));
435 bzero(gd->mi.gd_ipiq, sizeof(lwkt_ipiq) * (mp_naps + 1));
438 * Setup the AP boot stack
440 bootSTK = &ps->idlestack[UPAGES*PAGE_SIZE/2];
444 * Setup the AP's lwp, this is the 'cpu'
446 * We have to make sure our signals are masked or the new LWP
447 * may pick up a signal that it isn't ready for yet. SMP
448 * startup occurs after SI_BOOT2_LEAVE_CRIT so interrupts
449 * have already been enabled.
452 pthread_create(&ap_tids[x], NULL, start_ap, NULL);
455 while((smp_startup_mask & CPUMASK(x)) == 0) {
456 cpu_lfence(); /* XXX spin until the AP has started */
460 vm_object_drop(&kernel_object);
466 * CPU TOPOLOGY DETECTION FUNCTIONS.
470 detect_cpu_topology(void)
472 logical_CPU_bits = vkernel_b_arg;
473 core_bits = vkernel_B_arg;
477 get_chip_ID(int cpuid)
479 return get_apicid_from_cpuid(cpuid) >>
480 (logical_CPU_bits + core_bits);
484 get_core_number_within_chip(int cpuid)
486 return (get_apicid_from_cpuid(cpuid) >> logical_CPU_bits) &
487 ( (1 << core_bits) -1);
491 get_logical_CPU_number_within_core(int cpuid)
493 return get_apicid_from_cpuid(cpuid) &
494 ( (1 << logical_CPU_bits) -1);