1 .\" Copyright (c) 2008 Pyun YongHyeon
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25 .\" $FreeBSD: src/share/man/man4/jme.4,v 1.1 2008/05/27 01:59:17 yongari Exp $
32 .Nd JMicron Gigabit/Fast Ethernet driver
34 To compile this driver into the kernel,
35 place the following lines in your
36 kernel configuration file:
37 .Bd -ragged -offset indent
42 Alternatively, to load the driver as a
43 module at boot time, place the following line in
45 .Bd -literal -offset indent
51 device driver provides support for JMicron JMC250 PCI Express
52 Gigabit Ethernet controllers and JMicron JMC260 PCI Express Fast
55 All LOMs supported by the
57 driver have TCP/UDP/IP checksum offload for both transmit and receive,
58 TCP segmentation offload (TSO),
59 receive side scaling (RSS),
60 multiple vector MSI-X,
61 hardware VLAN tag stripping/insertion features,
63 an interrupt coalescing/moderation mechanism as well as
64 a 64-bit multicast hash filter.
65 Up to 4 reception queues can be enabled.
68 driver will try enabling as many reception queues as allowed by
69 the number of CPUs in the system.
71 The JMC250 also supports Jumbo Frames (up to 9216 bytes), which can be
72 configured via the interface MTU setting.
73 Selecting an MTU larger than 1500 bytes with the
75 utility configures the adapter to receive and transmit Jumbo Frames.
79 driver supports the following media types:
80 .Bl -tag -width ".Cm 10baseT/UTP"
82 Enable autoselection of the media type and options.
83 The user can manually override
84 the autoselected mode by adding media options to
89 Set 100Mbps (Fast Ethernet) operation.
91 Set 1000baseT operation over twisted pair.
96 driver supports the following media options:
97 .Bl -tag -width ".Cm full-duplex"
99 Force full duplex operation.
101 Force half duplex operation.
104 For more information on configuring this device, see
111 By default, the driver will use MSI-X if it is supported.
112 This behavior can be turned off by setting the following tunable:
114 is the device unit number):
115 .Bd -literal -offset indent
117 hw.jmeX.msix.enable=0
120 If MSI-X is disabled,
121 the driver will use MSI if it is supported.
122 This behavior can be turned off by setting the following tunable:
123 .Bd -literal -offset indent
129 MSI's target CPU can be changed by the following tunable:
130 .Bd -literal -offset indent
134 The maximum allowed value for this tunable is the number of CPUs minus one.
136 Number of reception queues that can be enabled:
137 .Bd -literal -offset indent
139 hw.jmeX.rx_ring_count
142 Maximum allowed value for these tunables is 4.
143 Setting these tunables to 0 allows driver to enable as many reception queues
144 as allowed by the number of CPUs.
146 Number of reception descriptors that can be used:
147 .Bd -literal -offset indent
149 hw.jmeX.rx_desc_count
152 Maximum allowed value for these tunables is 1024.
154 Number of transmission descriptors that can be used:
155 .Bd -literal -offset indent
157 hw.jmeX.tx_desc_count
160 Maximum allowed value for these tunables is 1024.
162 A number of per-interface variables are implemented in the
167 .Bl -tag -width "rx_ring_count"
169 Maximum amount of time to delay for TX completion interrupt in
171 The accepted range is 1 to 65535, the default is 250 (250us).
173 Maximum number of packets to fire TX completion interrupt.
174 The accepted range is 0 to 255, the default is 128.
175 Packet count based TX interrupt coalescing could be disabled
176 by setting this variable to 0.
178 Maximum amount of time to delay for RX completion interrupt in
180 The accepted range is 1 to 65535, the default is 150 (150us).
182 Maximum number of packets to fire RX completion interrupt.
183 The accepted range is 0 to 255, the default is 64.
184 Packet count based RX interrupt coalescing could be disabled
185 by setting this variable to 0.
187 Number of RX descriptors per-ring (read-only).
189 .Va hw.jme.rx_desc_count
192 Number of TX descriptors (read-only).
194 .Va hw.jme.tx_desc_count
197 Number of RX rings (read-only).
199 .Va hw.jme.rx_ring_count
202 The number of transmission descriptors should be setup
203 before the hardware register is written.
204 Setting this value too high will have negative effect on
205 transmission timeliness.
206 Setting this value too low will hurt overall transmission
207 due to the frequent hardware register writing.
222 driver was written by
223 .An Pyun YongHyeon Aq Mt yongari@FreeBSD.org .
226 and was imported into
229 added the receive side scaling and
230 multiple vector MSI-X support to