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3 Copyright (c) 2001-2015, Intel Corporation
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32 ******************************************************************************/
34 #ifndef _DRAGONFLY_OS_H_
35 #define _DRAGONFLY_OS_H_
37 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
42 #include <bus/pci/pcivar.h>
43 #include <bus/pci/pcireg.h>
45 #define usec_delay(x) DELAY(x)
46 #define usec_delay_irq(x) usec_delay(x)
47 #define msec_delay(x) DELAY(1000*(x))
48 #define msec_delay_irq(x) DELAY(1000*(x))
50 extern int e1000_debug;
52 #define DEBUGOUT(S, args...) \
57 #define DEBUGOUT1(S, args...) DEBUGOUT(S, ##args)
58 #define DEBUGOUT2(S, args...) DEBUGOUT(S, ##args)
59 #define DEBUGOUT3(S, args...) DEBUGOUT(S, ##args)
60 #define DEBUGOUT7(S, args...) DEBUGOUT(S, ##args)
61 #define DEBUGFUNC(F) DEBUGOUT(F "\n")
63 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
64 #define PCI_COMMAND_REGISTER PCIR_COMMAND
67 * These typedefs are necessary due to the new
68 * shared code, they are native to Linux.
84 bus_space_tag_t mem_bus_space_tag;
85 bus_space_handle_t mem_bus_space_handle;
86 bus_space_tag_t io_bus_space_tag;
87 bus_space_handle_t io_bus_space_handle;
88 bus_space_tag_t flash_bus_space_tag;
89 bus_space_handle_t flash_bus_space_handle;
93 #define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \
94 ? reg : e1000_translate_register_82542(reg))
96 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
98 /* Read from an absolute offset in the adapter's memory space */
99 #define E1000_READ_OFFSET(hw, offset) \
100 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
101 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset)
103 /* Write to an absolute offset in the adapter's memory space */
104 #define E1000_WRITE_OFFSET(hw, offset, value) \
105 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
106 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)
108 /* Register READ/WRITE macros */
110 #define E1000_READ_REG(hw, reg) \
111 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
112 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
113 E1000_REGISTER(hw, reg))
115 #define E1000_WRITE_REG(hw, reg, value) \
116 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
117 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
118 E1000_REGISTER(hw, reg), value)
120 #define E1000_READ_REG_ARRAY(hw, reg, index) \
121 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
122 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
123 E1000_REGISTER(hw, reg) + ((index)<< 2))
125 #define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \
126 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
127 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
128 E1000_REGISTER(hw, reg) + ((index)<< 2), value)
130 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
131 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
133 #define E1000_READ_REG_ARRAY_BYTE(hw, reg, index) \
134 bus_space_read_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
135 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
136 E1000_REGISTER(hw, reg) + index)
138 #define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \
139 bus_space_write_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
140 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
141 E1000_REGISTER(hw, reg) + index, value)
143 #define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \
144 bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
145 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
146 E1000_REGISTER(hw, reg) + (index << 1), value)
148 #define E1000_WRITE_REG_IO(hw, reg, value) do {\
149 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \
150 ((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \
151 (hw)->io_base, reg); \
152 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \
153 ((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \
154 (hw)->io_base + 4, value); } while (0)
156 #define E1000_READ_FLASH_REG(hw, reg) \
157 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
158 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)
160 #define E1000_READ_FLASH_REG16(hw, reg) \
161 bus_space_read_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
162 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)
164 #define E1000_WRITE_FLASH_REG(hw, reg, value) \
165 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
166 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)
168 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
169 bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
170 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)
172 #endif /* _DRAGONFLY_OS_H_ */