sys/dev/netif/wx/if_wx.c

   1 /* $FreeBSD: src/sys/pci/if_wx.c,v 1.5.2.12 2003/03/05 18:42:34 njl Exp $ */
   2 /* $DragonFly: src/sys/dev/netif/wx/Attic/if_wx.c,v 1.8 2004/03/23 22:19:05 hsu Exp $ */
   3 /*
   4  * Principal Author: Matthew Jacob <mjacob@feral.com>
   5  * Copyright (c) 1999, 2001 by Traakan Software
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice unmodified, this list of conditions, and the following
  13  *    disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * Additional Copyright (c) 2001 by Parag Patel
  31  * under same licence for MII PHY code.
  32  */
  33
  34 /*
  35  * Intel Gigabit Ethernet (82452/82453) Driver.
  36  * Inspired by fxp driver by David Greenman for FreeBSD, and by
  37  * Bill Paul's work in other FreeBSD network drivers.
  38  */
  39
  40 /*
  41  * Many bug fixes gratefully acknowledged from:
  42  *
  43  *      The folks at Sitara Networks
  44  */
  45
  46 /*
  47  * Options
  48  */
  49
  50 /*
  51  * Use only every other 16 byte receive descriptor, leaving the ones
  52  * in between empty. This card is most efficient at reading/writing
  53  * 32 byte cache lines, so avoid all the (not working for early rev
  54  * cards) MWI and/or READ/MODIFY/WRITE cycles updating one descriptor
  55  * would have you do.
  56  *
  57  * This isn't debugged yet.
  58  */
  59 /* #define      PADDED_CELL     1 */
  60
  61 /*
  62  * Since the includes are a mess, they'll all be in if_wxvar.h
  63  */
  64
  65 #include "if_wxvar.h"
  66
  67 #ifdef __alpha__
  68 #undef vtophys
  69 #define vtophys(va)     alpha_XXX_dmamap((vm_offset_t)(va))
  70 #endif /* __alpha__ */
  71
  72 /*
  73  * Function Prototpes, yadda yadda...
  74  */
  75
  76 static int wx_intr(void *);
  77 static void wx_handle_link_intr(wx_softc_t *);
  78 static void wx_check_link(wx_softc_t *);
  79 static void wx_handle_rxint(wx_softc_t *);
  80 static void wx_gc(wx_softc_t *);
  81 static void wx_start(struct ifnet *);
  82 static int wx_ioctl(struct ifnet *, IOCTL_CMD_TYPE, caddr_t, struct ucred *);
  83 static int wx_ifmedia_upd(struct ifnet *);
  84 static void wx_ifmedia_sts(struct ifnet *, struct ifmediareq *);
  85 static int wx_init(void *);
  86 static void wx_hw_stop(wx_softc_t *);
  87 static void wx_set_addr(wx_softc_t *, int, u_int8_t *);
  88 static int wx_hw_initialize(wx_softc_t *);
  89 static void wx_stop(wx_softc_t *);
  90 static void wx_txwatchdog(struct ifnet *);
  91 static int wx_get_rbuf(wx_softc_t *, rxpkt_t *);
  92 static void wx_rxdma_map(wx_softc_t *, rxpkt_t *, struct mbuf *);
  93
  94 static INLINE void wx_eeprom_raise_clk(wx_softc_t *, u_int32_t);
  95 static INLINE void wx_eeprom_lower_clk(wx_softc_t *, u_int32_t);
  96 static INLINE void wx_eeprom_sobits(wx_softc_t *, u_int16_t, u_int16_t);
  97 static INLINE u_int16_t wx_eeprom_sibits(wx_softc_t *);
  98 static INLINE void wx_eeprom_cleanup(wx_softc_t *);
  99 static INLINE u_int16_t wx_read_eeprom_word(wx_softc_t *, int);
 100 static void wx_read_eeprom(wx_softc_t *, u_int16_t *, int, int);
 101
 102 static int wx_attach_common(wx_softc_t *);
 103 static void wx_watchdog(void *);
 104
 105 static INLINE void wx_mwi_whackon(wx_softc_t *);
 106 static INLINE void wx_mwi_unwhack(wx_softc_t *);
 107 static int wx_dring_setup(wx_softc_t *);
 108 static void wx_dring_teardown(wx_softc_t *);
 109
 110 static int wx_attach_phy(wx_softc_t *);
 111 static int wx_miibus_readreg(void *, int, int);
 112 static int wx_miibus_writereg(void *, int, int, int);
 113 static void wx_miibus_statchg(void *);
 114 static void wx_miibus_mediainit(void *);
 115
 116 static u_int32_t wx_mii_shift_in(wx_softc_t *);
 117 static void wx_mii_shift_out(wx_softc_t *, u_int32_t, u_int32_t);
 118
 119 #define WX_DISABLE_INT(sc)      WRITE_CSR(sc, WXREG_IMCLR, WXDISABLE)
 120 #define WX_ENABLE_INT(sc)       WRITE_CSR(sc, WXREG_IMASK, sc->wx_ienable)
 121
 122 /*
 123  * Until we do a bit more work, we can get no bigger than MCLBYTES
 124  */
 125 #if     0
 126 #define WX_MAXMTU       (WX_MAX_PKT_SIZE_JUMBO - sizeof (struct ether_header))
 127 #else
 128 #define WX_MAXMTU       (MCLBYTES - sizeof (struct ether_header))
 129 #endif
 130
 131 #define DPRINTF(sc, x)  if (sc->wx_debug) printf x
 132 #define IPRINTF(sc, x)  if (sc->wx_verbose) printf x
 133
 134 static const char ldn[] = "%s: link down\n";
 135 static const char lup[] = "%s: link up\n";
 136 static const char sqe[] = "%s: receive sequence error\n";
 137 static const char ane[] = "%s: /C/ ordered sets seen- enabling ANE\n";
 138 static const char inane[] = "%s: no /C/ ordered sets seen- disabling ANE\n";
 139
 140 static int wx_txint_delay = 5000;       /* ~5ms */
 141 TUNABLE_INT("hw.wx.txint_delay", &wx_txint_delay);
 142
 143 SYSCTL_NODE(_hw, OID_AUTO, wx, CTLFLAG_RD, 0, "WX driver parameters");
 144 SYSCTL_INT(_hw_wx, OID_AUTO, txint_delay, CTLFLAG_RW,
 145         &wx_txint_delay, 0, "");
 146 static int wx_dump_stats = -1;
 147 SYSCTL_INT(_hw_wx, OID_AUTO, dump_stats, CTLFLAG_RW,
 148         &wx_dump_stats, 0, "");
 149 static int wx_clr_stats = -1;
 150 SYSCTL_INT(_hw_wx, OID_AUTO, clear_stats, CTLFLAG_RW,
 151         &wx_clr_stats, 0, "");
 152
 153 /*
 154  * Program multicast addresses.
 155  *
 156  * This function must be called at splimp, but it may sleep.
 157  */
 158 static int
 159 wx_mc_setup(wx_softc_t *sc)
 160 {
 161         struct ifnet *ifp = &sc->wx_if;
 162         struct ifmultiaddr *ifma;
 163
 164         /*
 165          * XXX: drain TX queue
 166          */
 167         if (sc->tactive) {
 168                 return (EBUSY);
 169         }
 170
 171         wx_stop(sc);
 172
 173         if ((ifp->if_flags & IFF_ALLMULTI) || (ifp->if_flags & IFF_PROMISC)) {
 174                 sc->all_mcasts = 1;
 175                 return (wx_init(sc));
 176         }
 177
 178         sc->wx_nmca = 0;
 179         for (ifma = ifp->if_multiaddrs.lh_first, sc->wx_nmca = 0;
 180             ifma != NULL; ifma = ifma->ifma_link.le_next) {
 181
 182                 if (ifma->ifma_addr->sa_family != AF_LINK) {
 183                         continue;
 184                 }
 185                 if (sc->wx_nmca >= WX_RAL_TAB_SIZE-1) {
 186                         sc->wx_nmca = 0;
 187                         sc->all_mcasts = 1;
 188                         break;
 189                 }
 190                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
 191                     (void *) &sc->wx_mcaddr[sc->wx_nmca++][0], 6);
 192         }
 193         return (wx_init(sc));
 194 }
 195
 196 /*
 197  * Return identification string if this is device is ours.
 198  */
 199 static int
 200 wx_probe(device_t dev)
 201 {
 202         if (pci_get_vendor(dev) != WX_VENDOR_INTEL) {
 203                 return (ENXIO);
 204         }
 205         switch (pci_get_device(dev)) {
 206         case WX_PRODUCT_82452:
 207                 device_set_desc(dev, "Intel PRO/1000 Gigabit (WISEMAN)");
 208                 break;
 209         case WX_PRODUCT_LIVENGOOD:
 210                 device_set_desc(dev, "Intel PRO/1000 (LIVENGOOD)");
 211                 break;
 212         case WX_PRODUCT_82452_SC:
 213                 device_set_desc(dev, "Intel PRO/1000 F Gigabit Ethernet");
 214                 break;
 215         case WX_PRODUCT_82543:
 216                 device_set_desc(dev, "Intel PRO/1000 T Gigabit Ethernet");
 217                 break;
 218         default:
 219                 return (ENXIO);
 220         }
 221         return (0);
 222 }
 223
 224 static int
 225 wx_attach(device_t dev)
 226 {
 227         int error = 0;
 228         wx_softc_t *sc = device_get_softc(dev);
 229         struct ifnet *ifp;
 230         u_int32_t val;
 231         int rid;
 232
 233         bzero(sc, sizeof (wx_softc_t));
 234
 235         callout_handle_init(&sc->w.sch);
 236         sc->w.dev = dev;
 237
 238         if (bootverbose)
 239                 sc->wx_verbose = 1;
 240
 241         if (getenv_int ("wx_debug", &rid)) {
 242                 if (rid & (1 << device_get_unit(dev))) {
 243                         sc->wx_debug = 1;
 244                 }
 245         }
 246
 247         if (getenv_int("wx_no_ilos", &rid)) {
 248                 if (rid & (1 << device_get_unit(dev))) {
 249                         sc->wx_no_ilos = 1;
 250                 }
 251         }
 252
 253         if (getenv_int("wx_ilos", &rid)) {
 254                 if (rid & (1 << device_get_unit(dev))) {
 255                         sc->wx_ilos = 1;
 256                 }
 257         }
 258
 259         if (getenv_int("wx_no_flow", &rid)) {
 260                 if (rid & (1 << device_get_unit(dev))) {
 261                         sc->wx_no_flow = 1;
 262                 }
 263         }
 264
 265 #ifdef  SMPNG
 266         mtx_init(&sc->wx_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE);
 267 #endif
 268         WX_LOCK(sc);
 269         /*
 270          * get revision && id...
 271          */
 272         sc->wx_idnrev = (pci_get_device(dev) << 16) | (pci_get_revid(dev));
 273
 274         /*
 275          * Enable bus mastering, make sure that the cache line size is right.
 276          */
 277         pci_enable_busmaster(dev);
 278         pci_enable_io(dev, SYS_RES_MEMORY);
 279         val = pci_read_config(dev, PCIR_COMMAND, 4);
 280         if ((val & PCIM_CMD_MEMEN) == 0) {
 281                 device_printf(dev, "failed to enable memory mapping\n");
 282                 error = ENXIO;
 283                 goto out;
 284         }
 285
 286         /*
 287          * Let the BIOS do it's job- but check for sanity.
 288          */
 289         val = pci_read_config(dev, PCIR_CACHELNSZ, 1);
 290         if (val < 4 || val > 32) {
 291                 pci_write_config(dev, PCIR_CACHELNSZ, 8, 1);
 292         }
 293
 294         /*
 295          * Map control/status registers.
 296          */
 297         rid = WX_MMBA;
 298         sc->w.mem = bus_alloc_resource(dev, SYS_RES_MEMORY,
 299             &rid, 0, ~0, 1, RF_ACTIVE);
 300         if (!sc->w.mem) {
 301                 device_printf(dev, "could not map memory\n");
 302                 error = ENXIO;
 303                 goto out;
 304         }
 305         sc->w.st = rman_get_bustag(sc->w.mem);
 306         sc->w.sh = rman_get_bushandle(sc->w.mem);
 307
 308         rid = 0;
 309         sc->w.irq = bus_alloc_resource(dev, SYS_RES_IRQ,
 310             &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE);
 311         if (sc->w.irq == NULL) {
 312                 device_printf(dev, "could not map interrupt\n");
 313                 error = ENXIO;
 314                 goto out;
 315         }
 316         error = bus_setup_intr(dev, sc->w.irq, INTR_TYPE_NET,
 317             (void (*)(void *))wx_intr, sc, &sc->w.ih);
 318         if (error) {
 319                 device_printf(dev, "could not setup irq\n");
 320                 goto out;
 321         }
 322         (void) snprintf(sc->wx_name, sizeof (sc->wx_name) - 1, "wx%d",
 323             device_get_unit(dev));
 324         if (wx_attach_common(sc)) {
 325                 bus_teardown_intr(dev, sc->w.irq, sc->w.ih);
 326                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->w.irq);
 327                 bus_release_resource(dev, SYS_RES_MEMORY, WX_MMBA, sc->w.mem);
 328                 error = ENXIO;
 329                 goto out;
 330         }
 331         device_printf(dev, "Ethernet address %6D\n", sc->w.arpcom.ac_enaddr, ":");
 332
 333         ifp = &sc->w.arpcom.ac_if;
 334         if_initname(ifp, "wx", device_get_unit(dev));
 335         ifp->if_mtu = ETHERMTU; /* we always start at ETHERMTU size */
 336         ifp->if_output = ether_output;
 337         ifp->if_baudrate = 1000000000;
 338         ifp->if_init = (void (*)(void *))wx_init;
 339         ifp->if_softc = sc;
 340         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 341         ifp->if_ioctl = wx_ioctl;
 342         ifp->if_start = wx_start;
 343         ifp->if_watchdog = wx_txwatchdog;
 344         ifp->if_snd.ifq_maxlen = WX_MAX_TDESC - 1;
 345         ether_ifattach(ifp, sc->w.arpcom.ac_enaddr);
 346 out:
 347         WX_UNLOCK(sc);
 348         return (error);
 349 }
 350
 351 static int
 352 wx_attach_phy(wx_softc_t *sc)
 353 {
 354         if (mii_phy_probe(sc->w.dev, &sc->w.miibus, wx_ifmedia_upd,
 355             wx_ifmedia_sts)) {
 356                 printf("%s: no PHY probed!\n", sc->wx_name);
 357                 return (-1);
 358         }
 359         sc->wx_mii = 1;
 360         return 0;
 361 }
 362
 363 static int
 364 wx_detach(device_t dev)
 365 {
 366         wx_softc_t *sc = device_get_softc(dev);
 367
 368         WX_LOCK(sc);
 369         wx_stop(sc);
 370
 371         ether_ifdetach(&sc->w.arpcom.ac_if);
 372         if (sc->w.miibus) {
 373                 bus_generic_detach(dev);
 374                 device_delete_child(dev, sc->w.miibus);
 375         } else {
 376                 ifmedia_removeall(&sc->wx_media);
 377         }
 378         bus_teardown_intr(dev, sc->w.irq, sc->w.ih);
 379         bus_release_resource(dev, SYS_RES_IRQ, 0, sc->w.irq);
 380         bus_release_resource(dev, SYS_RES_MEMORY, WX_MMBA, sc->w.mem);
 381
 382         wx_dring_teardown(sc);
 383         if (sc->rbase) {
 384                 WXFREE(sc->rbase);
 385                 sc->rbase = NULL;
 386         }
 387         if (sc->tbase) {
 388                 WXFREE(sc->tbase);
 389                 sc->tbase = NULL;
 390         }
 391         WX_UNLOCK(sc);
 392 #ifdef  SMPNG
 393         mtx_destroy(&sc->wx_mtx);
 394 #endif
 395         return (0);
 396 }
 397
 398 static int
 399 wx_shutdown(device_t dev)
 400 {
 401         wx_hw_stop((wx_softc_t *) device_get_softc(dev));
 402         return (0);
 403 }
 404
 405 static INLINE void
 406 wx_mwi_whackon(wx_softc_t *sc)
 407 {
 408         sc->wx_cmdw = pci_read_config(sc->w.dev, PCIR_COMMAND, 2);
 409         pci_write_config(sc->w.dev, PCIR_COMMAND, sc->wx_cmdw & ~MWI, 2);
 410 }
 411
 412 static INLINE void
 413 wx_mwi_unwhack(wx_softc_t *sc)
 414 {
 415         if (sc->wx_cmdw & MWI) {
 416                 pci_write_config(sc->w.dev, PCIR_COMMAND, sc->wx_cmdw, 2);
 417         }
 418 }
 419
 420 static int
 421 wx_dring_setup(wx_softc_t *sc)
 422 {
 423         size_t len;
 424
 425         len = sizeof (wxrd_t) * WX_MAX_RDESC;
 426         sc->rdescriptors = (wxrd_t *)
 427             contigmalloc(len, M_DEVBUF, M_NOWAIT, 0, ~0, 4096, 0);
 428         if (sc->rdescriptors == NULL) {
 429                 printf("%s: could not allocate rcv descriptors\n", sc->wx_name);
 430                 return (-1);
 431         }
 432         if (((intptr_t)sc->rdescriptors) & 0xfff) {
 433                 contigfree(sc->rdescriptors, len, M_DEVBUF);
 434                 sc->rdescriptors = NULL;
 435                 printf("%s: rcv descriptors not 4KB aligned\n", sc->wx_name);
 436                 return (-1);
 437         }
 438         bzero(sc->rdescriptors, len);
 439
 440         len = sizeof (wxtd_t) * WX_MAX_TDESC;
 441         sc->tdescriptors = (wxtd_t *)
 442             contigmalloc(len, M_DEVBUF, M_NOWAIT, 0, ~0, 4096, 0);
 443         if (sc->tdescriptors == NULL) {
 444                 contigfree(sc->rdescriptors,
 445                     sizeof (wxrd_t) * WX_MAX_RDESC, M_DEVBUF);
 446                 sc->rdescriptors = NULL;
 447                 printf("%s: could not allocate xmt descriptors\n", sc->wx_name);
 448                 return (-1);
 449         }
 450         if (((intptr_t)sc->tdescriptors) & 0xfff) {
 451                 contigfree(sc->rdescriptors,
 452                     sizeof (wxrd_t) * WX_MAX_RDESC, M_DEVBUF);
 453                 contigfree(sc->tdescriptors, len, M_DEVBUF);
 454                 sc->rdescriptors = NULL;
 455                 sc->tdescriptors = NULL;
 456                 printf("%s: xmt descriptors not 4KB aligned\n", sc->wx_name);
 457                 return (-1);
 458         }
 459         bzero(sc->tdescriptors, len);
 460         return (0);
 461 }
 462
 463 static void
 464 wx_dring_teardown(wx_softc_t *sc)
 465 {
 466         if (sc->rdescriptors) {
 467                 contigfree(sc->rdescriptors,
 468                     sizeof (wxrd_t) * WX_MAX_RDESC, M_DEVBUF);
 469                 sc->rdescriptors = NULL;
 470         }
 471         if (sc->tdescriptors) {
 472                 contigfree(sc->tdescriptors,
 473                     sizeof (wxtd_t) * WX_MAX_TDESC, M_DEVBUF);
 474                 sc->tdescriptors = NULL;
 475         }
 476 }
 477
 478 static device_method_t wx_methods[] = {
 479         /* Device interface */
 480         DEVMETHOD(device_probe,         wx_probe),
 481         DEVMETHOD(device_attach,        wx_attach),
 482         DEVMETHOD(device_detach,        wx_detach),
 483         DEVMETHOD(device_shutdown,      wx_shutdown),
 484
 485         /* bus interface */
 486         DEVMETHOD(bus_print_child,      bus_generic_print_child),
 487         DEVMETHOD(bus_driver_added,     bus_generic_driver_added),
 488
 489         /* MII interface */
 490         DEVMETHOD(miibus_readreg,       wx_miibus_readreg),
 491         DEVMETHOD(miibus_writereg,      wx_miibus_writereg),
 492         DEVMETHOD(miibus_statchg,       wx_miibus_statchg),
 493         DEVMETHOD(miibus_mediainit,     wx_miibus_mediainit),
 494
 495         { 0, 0 }
 496 };
 497
 498 static driver_t wx_driver = {
 499         "wx", wx_methods, sizeof(wx_softc_t),
 500 };
 501 static devclass_t wx_devclass;
 502
 503 DECLARE_DUMMY_MODULE(if_wx);
 504 MODULE_DEPEND(if_wx, miibus, 1, 1, 1);
 505 DRIVER_MODULE(if_wx, pci, wx_driver, wx_devclass, 0, 0);
 506 DRIVER_MODULE(miibus, wx, miibus_driver, miibus_devclass, 0, 0);
 507
 508 /*
 509  * Do generic parts of attach. Our registers have been mapped
 510  * and our interrupt registered.
 511  */
 512 static int
 513 wx_attach_common(wx_softc_t *sc)
 514 {
 515         size_t len;
 516         u_int32_t tmp;
 517         int ll = 0;
 518
 519         /*
 520          * First, check for revision support.
 521          */
 522         if (sc->wx_idnrev < WX_WISEMAN_2_0) {
 523                 printf("%s: cannot support ID 0x%x, revision %d chips\n",
 524                     sc->wx_name, sc->wx_idnrev >> 16, sc->wx_idnrev & 0xffff);
 525                 return (ENXIO);
 526         }
 527
 528         /*
 529          * Second, reset the chip.
 530          */
 531         wx_hw_stop(sc);
 532
 533         /*
 534          * Third, validate our EEPROM.
 535          */
 536
 537         /* TBD */
 538
 539         /*
 540          * Fourth, read eeprom for our MAC address and other things.
 541          */
 542         wx_read_eeprom(sc, (u_int16_t *)sc->wx_enaddr, WX_EEPROM_MAC_OFF, 3);
 543
 544         /*
 545          * Fifth, establish some adapter parameters.
 546          */
 547         sc->wx_dcr = 0;
 548
 549         if (IS_LIVENGOOD_CU(sc)) {
 550
 551                 /* settings to talk to PHY */
 552                 sc->wx_dcr |= WXDCR_FRCSPD | WXDCR_FRCDPX | WXDCR_SLU;
 553                 WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
 554
 555                 /*
 556                  * Raise the PHY's reset line to make it operational.
 557                  */
 558                 tmp = READ_CSR(sc, WXREG_EXCT);
 559                 tmp |= WXPHY_RESET_DIR4;
 560                 WRITE_CSR(sc, WXREG_EXCT, tmp);
 561                 DELAY(20*1000);
 562
 563                 tmp = READ_CSR(sc, WXREG_EXCT);
 564                 tmp &= ~WXPHY_RESET4;
 565                 WRITE_CSR(sc, WXREG_EXCT, tmp);
 566                 DELAY(20*1000);
 567
 568                 tmp = READ_CSR(sc, WXREG_EXCT);
 569                 tmp |= WXPHY_RESET4;
 570                 WRITE_CSR(sc, WXREG_EXCT, tmp);
 571                 DELAY(20*1000);
 572
 573                 if (wx_attach_phy(sc)) {
 574                         goto fail;
 575                 }
 576         } else {
 577                 ifmedia_init(&sc->wx_media, IFM_IMASK,
 578                     wx_ifmedia_upd, wx_ifmedia_sts);
 579
 580                 ifmedia_add(&sc->wx_media, IFM_ETHER|IFM_1000_SX, 0, NULL);
 581                 ifmedia_add(&sc->wx_media,
 582                     IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL);
 583                 ifmedia_set(&sc->wx_media, IFM_ETHER|IFM_1000_SX|IFM_FDX);
 584
 585                 sc->wx_media.ifm_media = sc->wx_media.ifm_cur->ifm_media;
 586         }
 587
 588         /*
 589          * Sixth, establish a default device control register word.
 590          */
 591         ll += 1;
 592         if (sc->wx_cfg1 & WX_EEPROM_CTLR1_FD)
 593                 sc->wx_dcr |= WXDCR_FD;
 594         if (sc->wx_cfg1 & WX_EEPROM_CTLR1_ILOS)
 595                 sc->wx_dcr |= WXDCR_ILOS;
 596
 597         tmp = (sc->wx_cfg1 >> WX_EEPROM_CTLR1_SWDPIO_SHIFT) & WXDCR_SWDPIO_MASK;
 598         sc->wx_dcr |= (tmp << WXDCR_SWDPIO_SHIFT);
 599
 600         if (sc->wx_no_ilos)
 601                 sc->wx_dcr &= ~WXDCR_ILOS;
 602         if (sc->wx_ilos)
 603                 sc->wx_dcr |= WXDCR_ILOS;
 604         if (sc->wx_no_flow == 0)
 605                 sc->wx_dcr |= WXDCR_RFCE | WXDCR_TFCE;
 606
 607         /*
 608          * Seventh, allocate various sw structures...
 609          */
 610         len = sizeof (rxpkt_t) * WX_MAX_RDESC;
 611         sc->rbase = (rxpkt_t *) WXMALLOC(len);
 612         if (sc->rbase == NULL) {
 613                 goto fail;
 614         }
 615         bzero(sc->rbase, len);
 616         ll += 1;
 617
 618         len = sizeof (txpkt_t) * WX_MAX_TDESC;
 619         sc->tbase = (txpkt_t *) WXMALLOC(len);
 620         if (sc->tbase == NULL) {
 621                 goto fail;
 622         }
 623         bzero(sc->tbase, len);
 624         ll += 1;
 625
 626         /*
 627          * Eighth, allocate and dma map (platform dependent) descriptor rings.
 628          * They have to be aligned on a 4KB boundary.
 629          */
 630         if (wx_dring_setup(sc) == 0) {
 631                 return (0);
 632         }
 633
 634 fail:
 635         printf("%s: failed to do common attach (%d)\n", sc->wx_name, ll);
 636         wx_dring_teardown(sc);
 637         if (sc->rbase) {
 638                 WXFREE(sc->rbase);
 639                 sc->rbase = NULL;
 640         }
 641         if (sc->tbase) {
 642                 WXFREE(sc->tbase);
 643                 sc->tbase = NULL;
 644         }
 645         return (ENOMEM);
 646 }
 647
 648 /*
 649  * EEPROM functions.
 650  */
 651
 652 static INLINE void
 653 wx_eeprom_raise_clk(wx_softc_t *sc, u_int32_t regval)
 654 {
 655         WRITE_CSR(sc, WXREG_EECDR, regval | WXEECD_SK);
 656         DELAY(50);
 657 }
 658
 659 static INLINE void
 660 wx_eeprom_lower_clk(wx_softc_t *sc, u_int32_t regval)
 661 {
 662         WRITE_CSR(sc, WXREG_EECDR, regval & ~WXEECD_SK);
 663         DELAY(50);
 664 }
 665
 666 static INLINE void
 667 wx_eeprom_sobits(wx_softc_t *sc, u_int16_t data, u_int16_t count)
 668 {
 669         u_int32_t regval, mask;
 670
 671         mask = 1 << (count - 1);
 672         regval = READ_CSR(sc, WXREG_EECDR) & ~(WXEECD_DI|WXEECD_DO);
 673
 674         do {
 675                 if (data & mask)
 676                         regval |= WXEECD_DI;
 677                 else
 678                         regval &= ~WXEECD_DI;
 679                 WRITE_CSR(sc, WXREG_EECDR, regval); DELAY(50);
 680                 wx_eeprom_raise_clk(sc, regval);
 681                 wx_eeprom_lower_clk(sc, regval);
 682                 mask >>= 1;
 683         } while (mask != 0);
 684         WRITE_CSR(sc, WXREG_EECDR, regval & ~WXEECD_DI);
 685 }
 686
 687 static INLINE u_int16_t
 688 wx_eeprom_sibits(wx_softc_t *sc)
 689 {
 690         unsigned int regval, i;
 691         u_int16_t data;
 692
 693         data = 0;
 694         regval = READ_CSR(sc, WXREG_EECDR) & ~(WXEECD_DI|WXEECD_DO);
 695         for (i = 0; i != 16; i++) {
 696                 data <<= 1;
 697                 wx_eeprom_raise_clk(sc, regval);
 698                 regval = READ_CSR(sc, WXREG_EECDR) & ~WXEECD_DI;
 699                 if (regval & WXEECD_DO) {
 700                         data |= 1;
 701                 }
 702                 wx_eeprom_lower_clk(sc, regval);
 703         }
 704         return (data);
 705 }
 706
 707 static INLINE void
 708 wx_eeprom_cleanup(wx_softc_t *sc)
 709 {
 710         u_int32_t regval;
 711         regval = READ_CSR(sc, WXREG_EECDR) & ~(WXEECD_DI|WXEECD_CS);
 712         WRITE_CSR(sc, WXREG_EECDR, regval); DELAY(50);
 713         wx_eeprom_raise_clk(sc, regval);
 714         wx_eeprom_lower_clk(sc, regval);
 715 }
 716
 717 static u_int16_t INLINE
 718 wx_read_eeprom_word(wx_softc_t *sc, int offset)
 719 {
 720         u_int16_t       data;
 721         WRITE_CSR(sc, WXREG_EECDR, WXEECD_CS);
 722         wx_eeprom_sobits(sc, EEPROM_READ_OPCODE, 3);
 723         wx_eeprom_sobits(sc, offset, 6);
 724         data = wx_eeprom_sibits(sc);
 725         wx_eeprom_cleanup(sc);
 726         return (data);
 727 }
 728
 729 static void
 730 wx_read_eeprom(wx_softc_t *sc, u_int16_t *data, int offset, int words)
 731 {
 732         int i;
 733         for (i = 0; i < words; i++) {
 734                 *data++ = wx_read_eeprom_word(sc, offset++);
 735         }
 736         sc->wx_cfg1 = wx_read_eeprom_word(sc, WX_EEPROM_CTLR1_OFF);
 737 }
 738
 739 /*
 740  * Start packet transmission on the interface.
 741  */
 742
 743 static void
 744 wx_start(struct ifnet *ifp)
 745 {
 746         wx_softc_t *sc = SOFTC_IFP(ifp);
 747         u_int16_t widx = WX_MAX_TDESC, cidx, nactv;
 748
 749         WX_LOCK(sc);
 750         DPRINTF(sc, ("%s: wx_start\n", sc->wx_name));
 751         nactv = sc->tactive;
 752         while (nactv < WX_MAX_TDESC - 1) {
 753                 int ndesc, plen;
 754                 int gctried = 0;
 755                 struct mbuf *m, *mb_head;
 756
 757                 IF_DEQUEUE(&ifp->if_snd, mb_head);
 758                 if (mb_head == NULL) {
 759                         break;
 760                 }
 761                 sc->wx_xmitwanted++;
 762
 763                 /*
 764                  * If we have a packet less than ethermin, pad it out.
 765                  */
 766                 if (mb_head->m_pkthdr.len < WX_MIN_RPKT_SIZE) {
 767                         if (mb_head->m_next == NULL) {
 768                                 mb_head->m_len = WX_MIN_RPKT_SIZE;
 769                         } else {
 770                                 MGETHDR(m, M_DONTWAIT, MT_DATA);
 771                                 if (m == NULL) {
 772                                         m_freem(mb_head);
 773                                         break;
 774                                 }
 775                                 m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
 776                                     mtod(m, caddr_t));
 777                                 m->m_pkthdr.len = m->m_len = WX_MIN_RPKT_SIZE;
 778                                 bzero(mtod(m, char *) + mb_head->m_pkthdr.len,
 779                                      WX_MIN_RPKT_SIZE - mb_head->m_pkthdr.len);
 780                                 sc->wx_xmitpullup++;
 781                                 m_freem(mb_head);
 782                                 mb_head = m;
 783                         }
 784                 }
 785         again:
 786                 cidx = sc->tnxtfree;
 787                 nactv = sc->tactive;
 788
 789
 790                 /*
 791                  * Go through each of the mbufs in the chain and initialize
 792                  * the transmit buffer descriptors with the physical address
 793                  * and size of that mbuf. If we have a length less than our
 794                  * minimum transmit size, we bail (to do a pullup). If we run
 795                  * out of descriptors, we also bail and try and do a pullup.
 796                  */
 797                 for (plen = ndesc = 0, m = mb_head; m != NULL; m = m->m_next) {
 798                         vm_offset_t vptr;
 799                         wxtd_t *td;
 800
 801                         /*
 802                          * If this mbuf has no data, skip it.
 803                          */
 804                         if (m->m_len == 0) {
 805                                 continue;
 806                         }
 807
 808                         /*
 809                          * This appears to be a bogus check the PRO1000T.
 810                          * I think they meant that the minimum packet size
 811                          * is in fact WX_MIN_XPKT_SIZE (all data loaded)
 812                          */
 813 #if     0
 814                         /*
 815                          * If this mbuf is too small for the chip's minimum,
 816                          * break out to cluster it.
 817                          */
 818                         if (m->m_len < WX_MIN_XPKT_SIZE) {
 819                                 sc->wx_xmitrunt++;
 820                                 break;
 821                         }
 822 #endif
 823
 824                         /*
 825                          * Do we have a descriptor available for this mbuf?
 826                          */
 827                         if (++nactv == WX_MAX_TDESC) {
 828                                 if (gctried++ == 0) {
 829                                         sc->wx_xmitgc++;
 830                                         wx_gc(sc);
 831                                         goto again;
 832                                 }
 833                                 break;
 834                         }
 835                         sc->tbase[cidx].dptr = m;
 836                         td = &sc->tdescriptors[cidx];
 837                         td->length = m->m_len;
 838                         plen += m->m_len;
 839
 840                         vptr = mtod(m, vm_offset_t);
 841                         td->address.highpart = 0;
 842                         td->address.lowpart = vtophys(vptr);
 843
 844                         td->cso = 0;
 845                         td->status = 0;
 846                         td->special = 0;
 847                         td->cmd = 0;
 848                         td->css = 0;
 849
 850                         if (sc->wx_debug) {
 851                                 printf("%s: XMIT[%d] %p vptr %lx (length %d "
 852                                     "DMA addr %x) idx %d\n", sc->wx_name,
 853                                     ndesc, m, (long) vptr, td->length,
 854                                     td->address.lowpart, cidx);
 855                         }
 856                         ndesc++;
 857                         cidx = T_NXT_IDX(cidx);
 858                 }
 859
 860                 /*
 861                  * If we get here and m is NULL, we can send
 862                  * the the packet chain described by mb_head.
 863                  */
 864                 if (m == NULL) {
 865                         /*
 866                          * Mark the last descriptor with EOP and tell the
 867                          * chip to insert a final checksum.
 868                          */
 869                         wxtd_t *td = &sc->tdescriptors[T_PREV_IDX(cidx)];
 870                         td->cmd = TXCMD_EOP|TXCMD_IFCS;
 871                         /*
 872                          * Set up a delayed interrupt when this packet
 873                          * is sent and the descriptor written back.
 874                          * Additional packets completing will cause
 875                          * interrupt to be delayed further. Therefore,
 876                          * after the *last* packet is sent, after the delay
 877                          * period in TIDV, an interrupt will be generated
 878                          * which will cause us to garbage collect.
 879                          */
 880                         td->cmd |= TXCMD_IDE|TXCMD_RPS;
 881
 882                         /*
 883                          * Don't xmit odd length packets.
 884                          * We're okay with bumping things
 885                          * up as long as our mbuf allocation
 886                          * is always larger than our MTU
 887                          * by a comfortable amount.
 888                          *
 889                          * Yes, it's a hole to run past the end
 890                          * of a packet.
 891                          */
 892                         if (plen & 0x1) {
 893                                 sc->wx_oddpkt++;
 894                                 td->length++;
 895                         }
 896
 897                         sc->tbase[sc->tnxtfree].sidx = sc->tnxtfree;
 898                         sc->tbase[sc->tnxtfree].eidx = cidx;
 899                         sc->tbase[sc->tnxtfree].next = NULL;
 900                         if (sc->tbsyf) {
 901                                 sc->tbsyl->next = &sc->tbase[sc->tnxtfree];
 902                         } else {
 903                                 sc->tbsyf = &sc->tbase[sc->tnxtfree];
 904                         }
 905                         sc->tbsyl = &sc->tbase[sc->tnxtfree];
 906                         sc->tnxtfree = cidx;
 907                         sc->tactive = nactv;
 908                         ifp->if_timer = 10;
 909                         if (ifp->if_bpf)
 910                                 bpf_mtap(WX_BPFTAP_ARG(ifp), mb_head);
 911                         /* defer xmit until we've got them all */
 912                         widx = cidx;
 913                         continue;
 914                 }
 915
 916                 /*
 917                  * Otherwise, we couldn't send this packet for some reason.
 918                  *
 919                  * If don't have a descriptor available, and this is a
 920                  * single mbuf packet, freeze output so that later we
 921                  * can restart when we have more room. Otherwise, we'll
 922                  * try and cluster the request. We've already tried to
 923                  * garbage collect completed descriptors.
 924                  */
 925                 if (nactv == WX_MAX_TDESC && mb_head->m_next == NULL) {
 926                         sc->wx_xmitputback++;
 927                         ifp->if_flags |= IFF_OACTIVE;
 928                         IF_PREPEND(&ifp->if_snd, mb_head);
 929                         break;
 930                 }
 931
 932                 /*
 933                  * Otherwise, it's either a fragment length somewhere in the
 934                  * chain that isn't at least WX_MIN_XPKT_SIZE in length or
 935                  * the number of fragments exceeds the number of descriptors
 936                  * available.
 937                  *
 938                  * We could try a variety of strategies here- if this is
 939                  * a length problem for single mbuf packet or a length problem
 940                  * for the last mbuf in a chain (we could just try and adjust
 941                  * it), but it's just simpler to try and cluster it.
 942                  */
 943                 MGETHDR(m, M_DONTWAIT, MT_DATA);
 944                 if (m == NULL) {
 945                         m_freem(mb_head);
 946                         break;
 947                 }
 948                 MCLGET(m, M_DONTWAIT);
 949                 if ((m->m_flags & M_EXT) == 0) {
 950                         m_freem(m);
 951                         m_freem(mb_head);
 952                         break;
 953                 }
 954                 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, mtod(m, caddr_t));
 955                 m->m_pkthdr.len = m->m_len = mb_head->m_pkthdr.len;
 956                 m_freem(mb_head);
 957                 mb_head = m;
 958                 sc->wx_xmitcluster++;
 959                 goto again;
 960         }
 961
 962         if (widx < WX_MAX_TDESC) {
 963                 if (IS_WISEMAN(sc)) {
 964                         WRITE_CSR(sc, WXREG_TDT, widx);
 965                 } else {
 966                         WRITE_CSR(sc, WXREG_TDT_LIVENGOOD, widx);
 967                 }
 968         }
 969
 970         if (sc->tactive == WX_MAX_TDESC - 1) {
 971                 sc->wx_xmitgc++;
 972                 wx_gc(sc);
 973                 if (sc->tactive >= WX_MAX_TDESC - 1) {
 974                         sc->wx_xmitblocked++;
 975                         ifp->if_flags |= IFF_OACTIVE;
 976                 }
 977         }
 978
 979         /* used SW LED to indicate transmission active */
 980         if (sc->tactive > 0 && sc->wx_mii) {
 981                 WRITE_CSR(sc, WXREG_DCR,
 982                     READ_CSR(sc, WXREG_DCR) | (WXDCR_SWDPIO0|WXDCR_SWDPIN0));
 983         }
 984         WX_UNLOCK(sc);
 985 }
 986
 987 /*
 988  * Process interface interrupts.
 989  */
 990 static int
 991 wx_intr(void *arg)
 992 {
 993         wx_softc_t *sc = arg;
 994         int claimed = 0;
 995
 996         WX_ILOCK(sc);
 997         /*
 998          * Read interrupt cause register. Reading it clears bits.
 999          */
1000         sc->wx_icr = READ_CSR(sc, WXREG_ICR);
1001         if (sc->wx_icr) {
1002                 claimed++;
1003                 WX_DISABLE_INT(sc);
1004                 sc->wx_intr++;
1005                 if (sc->wx_icr & (WXISR_LSC|WXISR_RXSEQ|WXISR_GPI_EN1)) {
1006                         sc->wx_linkintr++;
1007                         wx_handle_link_intr(sc);
1008                 }
1009                 wx_handle_rxint(sc);
1010                 if (sc->wx_icr & WXISR_TXDW) {
1011                         sc->wx_txqe++;
1012                         wx_gc(sc);
1013                 }
1014 #if     0
1015                 if (sc->wx_icr & WXISR_TXQE) {
1016                         sc->wx_txqe++;
1017                         wx_gc(sc);
1018                 }
1019 #endif
1020                 if (sc->wx_if.if_snd.ifq_head != NULL) {
1021                         wx_start(&sc->wx_if);
1022                 }
1023                 WX_ENABLE_INT(sc);
1024         }
1025         WX_IUNLK(sc);
1026         return (claimed);
1027 }
1028
1029 static void
1030 wx_handle_link_intr(wx_softc_t *sc)
1031 {
1032         u_int32_t txcw, rxcw, dcr, dsr;
1033
1034
1035         dcr = READ_CSR(sc, WXREG_DCR);
1036         DPRINTF(sc, ("%s: handle_link_intr: icr=%#x dcr=%#x\n",
1037             sc->wx_name, sc->wx_icr, dcr));
1038         if (sc->wx_mii) {
1039                 mii_data_t *mii = WX_MII_FROM_SOFTC(sc);
1040                 mii_pollstat(mii);
1041                 if (mii->mii_media_status & IFM_ACTIVE) {
1042                         if (IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE) {
1043                                 IPRINTF(sc, (ldn, sc->wx_name));
1044                                 sc->linkup = 0;
1045                         } else {
1046                                 IPRINTF(sc, (lup, sc->wx_name));
1047                                 sc->linkup = 1;
1048                         }
1049                         WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
1050                 } else if (sc->wx_icr & WXISR_RXSEQ) {
1051                         DPRINTF(sc, (sqe, sc->wx_name));
1052                 }
1053                 return;
1054         }
1055
1056         txcw = READ_CSR(sc, WXREG_XMIT_CFGW);
1057         rxcw = READ_CSR(sc, WXREG_RECV_CFGW);
1058         dsr = READ_CSR(sc, WXREG_DSR);
1059
1060         /*
1061          * If we have LOS or are now receiving Ordered Sets and are not
1062          * doing auto-negotiation, restore autonegotiation.
1063          */
1064
1065         if (((dcr & WXDCR_SWDPIN1) || (rxcw & WXRXCW_C)) &&
1066             ((txcw & WXTXCW_ANE) == 0)) {
1067                 DPRINTF(sc, (ane, sc->wx_name));
1068                 WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT);
1069                 sc->wx_dcr &= ~WXDCR_SLU;
1070                 WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
1071                 sc->ane_failed = 0;
1072         }
1073
1074         if (sc->wx_icr & WXISR_LSC) {
1075                 if (READ_CSR(sc, WXREG_DSR) & WXDSR_LU) {
1076                         IPRINTF(sc, (lup, sc->wx_name));
1077                         sc->linkup = 1;
1078                         sc->wx_dcr |= (WXDCR_SWDPIO0|WXDCR_SWDPIN0);
1079                 } else {
1080                         IPRINTF(sc, (ldn, sc->wx_name));
1081                         sc->linkup = 0;
1082                         sc->wx_dcr &= ~(WXDCR_SWDPIO0|WXDCR_SWDPIN0);
1083                 }
1084                 WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
1085         } else {
1086                 DPRINTF(sc, (sqe, sc->wx_name));
1087         }
1088 }
1089
1090 static void
1091 wx_check_link(wx_softc_t *sc)
1092 {
1093         u_int32_t rxcw, dcr, dsr;
1094
1095         if (sc->wx_mii) {
1096                 mii_pollstat(WX_MII_FROM_SOFTC(sc));
1097                 return;
1098         }
1099
1100         rxcw = READ_CSR(sc, WXREG_RECV_CFGW);
1101         dcr = READ_CSR(sc, WXREG_DCR);
1102         dsr = READ_CSR(sc, WXREG_DSR);
1103
1104         if ((dsr & WXDSR_LU) == 0 && (dcr & WXDCR_SWDPIN1) == 0 &&
1105             (rxcw & WXRXCW_C) == 0) {
1106                 if (sc->ane_failed == 0) {
1107                         sc->ane_failed = 1;
1108                         return;
1109                 }
1110                 DPRINTF(sc, (inane, sc->wx_name));
1111                 WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT & ~WXTXCW_ANE);
1112                 if (sc->wx_idnrev < WX_WISEMAN_2_1)
1113                         sc->wx_dcr &= ~WXDCR_TFCE;
1114                 sc->wx_dcr |= WXDCR_SLU;
1115                 WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
1116         } else if ((rxcw & WXRXCW_C) != 0 && (dcr & WXDCR_SLU) != 0) {
1117                 DPRINTF(sc, (ane, sc->wx_name));
1118                 WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT);
1119                 sc->wx_dcr &= ~WXDCR_SLU;
1120                 WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
1121         }
1122 }
1123
1124 static void
1125 wx_handle_rxint(wx_softc_t *sc)
1126 {
1127         struct ether_header *eh;
1128         struct mbuf *m0, *mb, *pending[WX_MAX_RDESC];
1129         struct ifnet *ifp = &sc->wx_if;
1130         int npkts, ndesc, lidx, idx, tlen;
1131
1132         DPRINTF(sc, ("%s: wx_handle_rxint\n", sc->wx_name));
1133
1134         for (m0 = sc->rpending, tlen = ndesc = npkts = 0, idx = sc->rnxt,
1135             lidx = R_PREV_IDX(idx); ndesc < WX_MAX_RDESC;
1136             ndesc++, lidx = idx, idx = R_NXT_IDX(idx)) {
1137                 wxrd_t *rd;
1138                 rxpkt_t *rxpkt;
1139                 int length, offset, lastframe;
1140
1141                 rd = &sc->rdescriptors[idx];
1142                 /*
1143                  * XXX: DMA Flush descriptor
1144                  */
1145                 if ((rd->status & RDSTAT_DD) == 0) {
1146                         if (m0) {
1147                                 if (sc->rpending == NULL) {
1148                                         m0->m_pkthdr.len = tlen;
1149                                         sc->rpending = m0;
1150                                 } else {
1151                                         m_freem(m0);
1152                                 }
1153                                 m0 = NULL;
1154                         }
1155                         DPRINTF(sc, ("%s: WXRX: ndesc %d idx %d lidx %d\n",
1156                             sc->wx_name, ndesc, idx, lidx));
1157                         break;
1158                 }
1159
1160                 if (rd->errors != 0) {
1161                         printf("%s: packet with errors (%x)\n",
1162                             sc->wx_name, rd->errors);
1163                         rd->status = 0;
1164                         ifp->if_ierrors++;
1165                         if (m0) {
1166                                 m_freem(m0);
1167                                 m0 = NULL;
1168                                 if (sc->rpending) {
1169                                         m_freem(sc->rpending);
1170                                         sc->rpending = NULL;
1171                                 }
1172                         }
1173                         continue;
1174                 }
1175
1176
1177                 rxpkt = &sc->rbase[idx];
1178                 mb = rxpkt->dptr;
1179                 if (mb == NULL) {
1180                         printf("%s: receive descriptor with no mbuf\n",
1181                             sc->wx_name);
1182                         (void) wx_get_rbuf(sc, rxpkt);
1183                         rd->status = 0;
1184                         ifp->if_ierrors++;
1185                         if (m0) {
1186                                 m_freem(m0);
1187                                 m0 = NULL;
1188                                 if (sc->rpending) {
1189                                         m_freem(sc->rpending);
1190                                         sc->rpending = NULL;
1191                                 }
1192                         }
1193                         continue;
1194                 }
1195
1196                 /* XXX: Flush DMA for rxpkt */
1197
1198                 if (wx_get_rbuf(sc, rxpkt)) {
1199                         sc->wx_rxnobuf++;
1200                         wx_rxdma_map(sc, rxpkt, mb);
1201                         ifp->if_ierrors++;
1202                         rd->status = 0;
1203                         if (m0) {
1204                                 m_freem(m0);
1205                                 m0 = NULL;
1206                                 if (sc->rpending) {
1207                                         m_freem(sc->rpending);
1208                                         sc->rpending = NULL;
1209                                 }
1210                         }
1211                         continue;
1212                 }
1213
1214                 /*
1215                  * Save the completing packet's offset value and length
1216                  * and install the new one into the descriptor.
1217                  */
1218                 lastframe = (rd->status & RDSTAT_EOP) != 0;
1219                 length = rd->length;
1220                 offset = rd->address.lowpart & 0xff;
1221                 bzero (rd, sizeof (*rd));
1222                 rd->address.lowpart = rxpkt->dma_addr + WX_RX_OFFSET_VALUE;
1223
1224                 mb->m_len = length;
1225                 mb->m_data += offset;
1226                 mb->m_next = NULL;
1227                 if (m0 == NULL) {
1228                         m0 = mb;
1229                         tlen = length;
1230                 } else if (m0 == sc->rpending) {
1231                         /*
1232                          * Pick up where we left off before. If
1233                          * we have an offset (we're assuming the
1234                          * first frame has an offset), then we've
1235                          * lost sync somewhere along the line.
1236                          */
1237                         if (offset) {
1238                                 printf("%s: lost sync with partial packet\n",
1239                                     sc->wx_name);
1240                                 m_freem(sc->rpending);
1241                                 sc->rpending = NULL;
1242                                 m0 = mb;
1243                                 tlen = length;
1244                         } else {
1245                                 sc->rpending = NULL;
1246                                 tlen = m0->m_pkthdr.len;
1247                         }
1248                 } else {
1249                         tlen += length;
1250                 }
1251
1252                 DPRINTF(sc, ("%s: RDESC[%d] len %d off %d lastframe %d\n",
1253                     sc->wx_name, idx, mb->m_len, offset, lastframe));
1254                 if (m0 != mb)
1255                         m_cat(m0, mb);
1256                 if (lastframe == 0) {
1257                         continue;
1258                 }
1259                 m0->m_pkthdr.rcvif = ifp;
1260                 m0->m_pkthdr.len = tlen - WX_CRC_LENGTH;
1261                 mb->m_len -= WX_CRC_LENGTH;
1262
1263                 eh = mtod(m0, struct ether_header *);
1264                 /*
1265                  * No need to check for promiscous mode since
1266                  * the decision to keep or drop the packet is
1267                  * handled by ether_input()
1268                  */
1269                 pending[npkts++] = m0;
1270                 m0 = NULL;
1271                 tlen = 0;
1272         }
1273
1274         if (ndesc) {
1275                 if (IS_WISEMAN(sc)) {
1276                         WRITE_CSR(sc, WXREG_RDT0, lidx);
1277                 } else {
1278                         WRITE_CSR(sc, WXREG_RDT0_LIVENGOOD, lidx);
1279                 }
1280                 sc->rnxt = idx;
1281         }
1282
1283         if (npkts) {
1284                 sc->wx_rxintr++;
1285         }
1286
1287         for (idx = 0; idx < npkts; idx++) {
1288                 mb = pending[idx];
1289                 if (ifp->if_bpf) {
1290                         bpf_mtap(WX_BPFTAP_ARG(ifp), mb);
1291                 }
1292                 ifp->if_ipackets++;
1293                 DPRINTF(sc, ("%s: RECV packet length %d\n",
1294                     sc->wx_name, mb->m_pkthdr.len));
1295                 eh = mtod(mb, struct ether_header *);
1296                 m_adj(mb, sizeof (struct ether_header));
1297                 ether_input(ifp, eh, mb);
1298         }
1299 }
1300
1301 static void
1302 wx_gc(wx_softc_t *sc)
1303 {
1304         struct ifnet *ifp = &sc->wx_if;
1305         txpkt_t *txpkt;
1306         u_int32_t tdh;
1307
1308         WX_LOCK(sc);
1309         txpkt = sc->tbsyf;
1310         if (IS_WISEMAN(sc)) {
1311                 tdh = READ_CSR(sc, WXREG_TDH);
1312         } else {
1313                 tdh = READ_CSR(sc, WXREG_TDH_LIVENGOOD);
1314         }
1315         while (txpkt != NULL) {
1316                 u_int32_t end = txpkt->eidx, cidx = tdh;
1317
1318                 /*
1319                  * Normalize start..end indices to 2 *
1320                  * WX_MAX_TDESC range to eliminate wrap.
1321                  */
1322                 if (txpkt->eidx < txpkt->sidx) {
1323                         end += WX_MAX_TDESC;
1324                 }
1325
1326                 /*
1327                  * Normalize current chip index to 2 *
1328                  * WX_MAX_TDESC range to eliminate wrap.
1329                  */
1330                 if (cidx < txpkt->sidx) {
1331                         cidx += WX_MAX_TDESC;
1332                 }
1333
1334                 /*
1335                  * If the current chip index is between low and
1336                  * high indices for this packet, it's not finished
1337                  * transmitting yet. Because transmits are done FIFO,
1338                  * this means we're done garbage collecting too.
1339                  */
1340
1341                 if (txpkt->sidx <= cidx && cidx < txpkt->eidx) {
1342                         DPRINTF(sc, ("%s: TXGC %d..%d TDH %d\n", sc->wx_name,
1343                             txpkt->sidx, txpkt->eidx, tdh));
1344                         break;
1345                 }
1346                 ifp->if_opackets++;
1347
1348                 if (txpkt->dptr) {
1349                         (void) m_freem(txpkt->dptr);
1350                 } else {
1351                         printf("%s: null mbuf in gc\n", sc->wx_name);
1352                 }
1353
1354                 for (cidx = txpkt->sidx; cidx != txpkt->eidx;
1355                     cidx = T_NXT_IDX(cidx)) {
1356                         txpkt_t *tmp;
1357                         wxtd_t *td;
1358
1359                         td = &sc->tdescriptors[cidx];
1360                         if (td->status & TXSTS_EC) {
1361                                 IPRINTF(sc, ("%s: excess collisions\n",
1362                                     sc->wx_name));
1363                                 ifp->if_collisions++;
1364                                 ifp->if_oerrors++;
1365                         }
1366                         if (td->status & TXSTS_LC) {
1367                                 IPRINTF(sc,
1368                                     ("%s: lost carrier\n", sc->wx_name));
1369                                 ifp->if_oerrors++;
1370                         }
1371                         tmp = &sc->tbase[cidx];
1372                         DPRINTF(sc, ("%s: TXGC[%d] %p %d..%d done nact %d "
1373                             "TDH %d\n", sc->wx_name, cidx, tmp->dptr,
1374                             txpkt->sidx, txpkt->eidx, sc->tactive, tdh));
1375                         tmp->dptr = NULL;
1376                         if (sc->tactive == 0) {
1377                                 printf("%s: nactive < 0?\n", sc->wx_name);
1378                         } else {
1379                                 sc->tactive -= 1;
1380                         }
1381                         bzero(td, sizeof (*td));
1382                 }
1383                 sc->tbsyf = txpkt->next;
1384                 txpkt = sc->tbsyf;
1385         }
1386         if (sc->tactive < WX_MAX_TDESC - 1) {
1387                 ifp->if_timer = 0;
1388                 ifp->if_flags &= ~IFF_OACTIVE;
1389         }
1390
1391         /* used SW LED to indicate transmission not active */
1392         if (sc->tactive == 0 && sc->wx_mii) {
1393                 WRITE_CSR(sc, WXREG_DCR,
1394                     READ_CSR(sc, WXREG_DCR) & ~(WXDCR_SWDPIO0|WXDCR_SWDPIN0));
1395         }
1396         WX_UNLOCK(sc);
1397 }
1398
1399 /*
1400  * Periodic timer to update packet in/out/collision statistics,
1401  * and, more importantly, garbage collect completed transmissions
1402  * and to handle link status changes.
1403  */
1404 #define WX_PRT_STATS(sc, y)     printf("\t" # y " = %u\n", ((sc)->y))
1405 #define WX_CLR_STATS(sc, y)     ((sc)->y  = 0)
1406
1407 static void
1408 wx_watchdog(void *arg)
1409 {
1410         wx_softc_t *sc = arg;
1411
1412         WX_LOCK(sc);
1413         if (sc->wx_needreinit) {
1414                 WX_UNLOCK(sc);
1415                 if (wx_init(sc) == 0) {
1416                         WX_LOCK(sc);
1417                         sc->wx_needreinit = 0;
1418                 } else {
1419                         WX_LOCK(sc);
1420                 }
1421         } else {
1422                 wx_gc(sc);
1423                 wx_check_link(sc);
1424         }
1425         if (wx_dump_stats == device_get_unit(sc->w.dev)) {
1426                 printf("%s: current statistics\n", sc->wx_name);
1427                 WX_PRT_STATS(sc, wx_intr);
1428                 WX_PRT_STATS(sc, wx_linkintr);
1429                 WX_PRT_STATS(sc, wx_rxintr);
1430                 WX_PRT_STATS(sc, wx_txqe);
1431                 WX_PRT_STATS(sc, wx_xmitgc);
1432                 WX_PRT_STATS(sc, wx_xmitpullup);
1433                 WX_PRT_STATS(sc, wx_xmitcluster);
1434                 WX_PRT_STATS(sc, wx_xmitputback);
1435                 WX_PRT_STATS(sc, wx_xmitwanted);
1436                 WX_PRT_STATS(sc, wx_xmitblocked);
1437                 WX_PRT_STATS(sc, wx_xmitrunt);
1438                 WX_PRT_STATS(sc, wx_rxnobuf);
1439                 WX_PRT_STATS(sc, wx_oddpkt);
1440                 wx_dump_stats = -1;
1441         }
1442         if (wx_clr_stats == device_get_unit(sc->w.dev)) {
1443                 printf("%s: statistics cleared\n", sc->wx_name);
1444                 WX_CLR_STATS(sc, wx_intr);
1445                 WX_CLR_STATS(sc, wx_linkintr);
1446                 WX_CLR_STATS(sc, wx_rxintr);
1447                 WX_CLR_STATS(sc, wx_txqe);
1448                 WX_CLR_STATS(sc, wx_xmitgc);
1449                 WX_CLR_STATS(sc, wx_xmitpullup);
1450                 WX_CLR_STATS(sc, wx_xmitcluster);
1451                 WX_CLR_STATS(sc, wx_xmitputback);
1452                 WX_CLR_STATS(sc, wx_xmitwanted);
1453                 WX_CLR_STATS(sc, wx_xmitblocked);
1454                 WX_CLR_STATS(sc, wx_xmitrunt);
1455                 WX_CLR_STATS(sc, wx_rxnobuf);
1456                 WX_CLR_STATS(sc, wx_oddpkt);
1457                 wx_clr_stats = -1;
1458         }
1459         WX_UNLOCK(sc);
1460
1461         /*
1462          * Schedule another timeout one second from now.
1463          */
1464         TIMEOUT(sc, wx_watchdog, sc, hz);
1465 }
1466
1467 /*
1468  * Stop and reinitialize the hardware
1469  */
1470 static void
1471 wx_hw_stop(wx_softc_t *sc)
1472 {
1473         u_int32_t icr;
1474         DPRINTF(sc, ("%s: wx_hw_stop\n", sc->wx_name));
1475         WX_DISABLE_INT(sc);
1476         if (sc->wx_idnrev < WX_WISEMAN_2_1) {
1477                 wx_mwi_whackon(sc);
1478         }
1479         WRITE_CSR(sc, WXREG_DCR, WXDCR_RST);
1480         DELAY(20 * 1000);
1481         icr = READ_CSR(sc, WXREG_ICR);
1482         if (sc->wx_idnrev < WX_WISEMAN_2_1) {
1483                 wx_mwi_unwhack(sc);
1484         }
1485 }
1486
1487 static void
1488 wx_set_addr(wx_softc_t *sc, int idx, u_int8_t *mac)
1489 {
1490         u_int32_t t0, t1;
1491         DPRINTF(sc, ("%s: wx_set_addr\n", sc->wx_name));
1492         t0 = (mac[0]) | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24);
1493         t1 = (mac[4] << 0) | (mac[5] << 8);
1494         t1 |= WX_RAL_AV;
1495         WRITE_CSR(sc, WXREG_RAL_LO(idx), t0);
1496         WRITE_CSR(sc, WXREG_RAL_HI(idx), t1);
1497 }
1498
1499 static int
1500 wx_hw_initialize(wx_softc_t *sc)
1501 {
1502         int i;
1503
1504         DPRINTF(sc, ("%s: wx_hw_initialize\n", sc->wx_name));
1505
1506         WRITE_CSR(sc, WXREG_VET, 0);
1507         for (i = 0; i < (WX_VLAN_TAB_SIZE << 2); i += 4) {
1508                 WRITE_CSR(sc, (WXREG_VFTA + i), 0);
1509         }
1510         if (sc->wx_idnrev < WX_WISEMAN_2_1) {
1511                 wx_mwi_whackon(sc);
1512                 WRITE_CSR(sc, WXREG_RCTL, WXRCTL_RST);
1513                 DELAY(5 * 1000);
1514         }
1515         /*
1516          * Load the first receiver address with our MAC address,
1517          * and load as many multicast addresses as can fit into
1518          * the receive address array.
1519          */
1520         wx_set_addr(sc, 0, sc->wx_enaddr);
1521         for (i = 1; i <= sc->wx_nmca; i++) {
1522                 if (i >= WX_RAL_TAB_SIZE) {
1523                         break;
1524                 } else {
1525                         wx_set_addr(sc, i, sc->wx_mcaddr[i-1]);
1526                 }
1527         }
1528
1529         while (i < WX_RAL_TAB_SIZE) {
1530                 WRITE_CSR(sc, WXREG_RAL_LO(i), 0);
1531                 WRITE_CSR(sc, WXREG_RAL_HI(i), 0);
1532                 i++;
1533         }
1534
1535         if (sc->wx_idnrev < WX_WISEMAN_2_1) {
1536                 WRITE_CSR(sc, WXREG_RCTL, 0);
1537                 DELAY(1 * 1000);
1538                 wx_mwi_unwhack(sc);
1539         }
1540
1541         /*
1542          * Clear out the hashed multicast table array.
1543          */
1544         for (i = 0; i < WX_MC_TAB_SIZE; i++) {
1545                 WRITE_CSR(sc, WXREG_MTA + (sizeof (u_int32_t) * 4), 0);
1546         }
1547
1548         if (IS_LIVENGOOD_CU(sc)) {
1549                 /*
1550                  * has a PHY - raise its reset line to make it operational
1551                  */
1552                 u_int32_t tmp = READ_CSR(sc, WXREG_EXCT);
1553                 tmp |= WXPHY_RESET_DIR4;
1554                 WRITE_CSR(sc, WXREG_EXCT, tmp);
1555                 DELAY(20*1000);
1556
1557                 tmp = READ_CSR(sc, WXREG_EXCT);
1558                 tmp &= ~WXPHY_RESET4;
1559                 WRITE_CSR(sc, WXREG_EXCT, tmp);
1560                 DELAY(20*1000);
1561
1562                 tmp = READ_CSR(sc, WXREG_EXCT);
1563                 tmp |= WXPHY_RESET4;
1564                 WRITE_CSR(sc, WXREG_EXCT, tmp);
1565                 DELAY(20*1000);
1566         } else if (IS_LIVENGOOD(sc)) {
1567                 u_int16_t tew;
1568
1569                 /*
1570                  * Handle link control
1571                  */
1572                 WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr | WXDCR_LRST);
1573                 DELAY(50 * 1000);
1574
1575                 wx_read_eeprom(sc, &tew, WX_EEPROM_CTLR2_OFF, 1);
1576                 tew = (tew & WX_EEPROM_CTLR2_SWDPIO) << WX_EEPROM_EXT_SHIFT;
1577                 WRITE_CSR(sc, WXREG_EXCT, (u_int32_t)tew);
1578         }
1579
1580         if (sc->wx_dcr & (WXDCR_RFCE|WXDCR_TFCE)) {
1581                 WRITE_CSR(sc, WXREG_FCAL, FC_FRM_CONST_LO);
1582                 WRITE_CSR(sc, WXREG_FCAH, FC_FRM_CONST_HI);
1583                 WRITE_CSR(sc, WXREG_FCT, FC_TYP_CONST);
1584         } else {
1585                 WRITE_CSR(sc, WXREG_FCAL, 0);
1586                 WRITE_CSR(sc, WXREG_FCAH, 0);
1587                 WRITE_CSR(sc, WXREG_FCT, 0);
1588         }
1589         WRITE_CSR(sc, WXREG_FLOW_XTIMER, WX_XTIMER_DFLT);
1590
1591         if (IS_WISEMAN(sc)) {
1592                 if (sc->wx_idnrev < WX_WISEMAN_2_1) {
1593                         WRITE_CSR(sc, WXREG_FLOW_RCV_HI, 0);
1594                         WRITE_CSR(sc, WXREG_FLOW_RCV_LO, 0);
1595                         sc->wx_dcr &= ~(WXDCR_RFCE|WXDCR_TFCE);
1596                 } else {
1597                         WRITE_CSR(sc, WXREG_FLOW_RCV_HI, WX_RCV_FLOW_HI_DFLT);
1598                         WRITE_CSR(sc, WXREG_FLOW_RCV_LO, WX_RCV_FLOW_LO_DFLT);
1599                 }
1600         } else {
1601                 WRITE_CSR(sc, WXREG_FLOW_RCV_HI_LIVENGOOD, WX_RCV_FLOW_HI_DFLT);
1602                 WRITE_CSR(sc, WXREG_FLOW_RCV_LO_LIVENGOOD, WX_RCV_FLOW_LO_DFLT);
1603         }
1604
1605         if (!IS_LIVENGOOD_CU(sc))
1606                 WRITE_CSR(sc, WXREG_XMIT_CFGW, WXTXCW_DEFAULT);
1607
1608         WRITE_CSR(sc, WXREG_DCR, sc->wx_dcr);
1609         DELAY(50 * 1000);
1610
1611         if (!IS_LIVENGOOD_CU(sc)) {
1612                 /*
1613                  * The pin stuff is all FM from the Linux driver.
1614                  */
1615                 if ((READ_CSR(sc, WXREG_DCR) & WXDCR_SWDPIN1) == 0) {
1616                         for (i = 0; i < (WX_LINK_UP_TIMEOUT/10); i++) {
1617                                 DELAY(10 * 1000);
1618                                 if (READ_CSR(sc, WXREG_DSR) & WXDSR_LU) {
1619                                         sc->linkup = 1;
1620                                         break;
1621                                 }
1622                         }
1623                         if (sc->linkup == 0) {
1624                                 sc->ane_failed = 1;
1625                                 wx_check_link(sc);
1626                         }
1627                         sc->ane_failed = 0;
1628                 } else {
1629                         printf("%s: SWDPIO1 did not clear- check for reversed "
1630                                 "or disconnected cable\n", sc->wx_name);
1631                         /* but return okay anyway */
1632                 }
1633         }
1634
1635         sc->wx_ienable = WXIENABLE_DEFAULT;
1636         return (0);
1637 }
1638
1639 /*
1640  * Stop the interface. Cancels the statistics updater and resets the interface.
1641  */
1642 static void
1643 wx_stop(wx_softc_t *sc)
1644 {
1645         txpkt_t *txp;
1646         rxpkt_t *rxp;
1647         struct ifnet *ifp = &sc->wx_if;
1648
1649         DPRINTF(sc, ("%s: wx_stop\n", sc->wx_name));
1650         /*
1651          * Cancel stats updater.
1652          */
1653         UNTIMEOUT(wx_watchdog, sc, sc);
1654
1655         /*
1656          * Reset the chip
1657          */
1658         wx_hw_stop(sc);
1659
1660         /*
1661          * Release any xmit buffers.
1662          */
1663         for (txp = sc->tbase; txp && txp < &sc->tbase[WX_MAX_TDESC]; txp++) {
1664                 if (txp->dptr) {
1665                         m_free(txp->dptr);
1666                         txp->dptr = NULL;
1667                 }
1668         }
1669
1670         /*
1671          * Free all the receive buffers.
1672          */
1673         for (rxp = sc->rbase; rxp && rxp < &sc->rbase[WX_MAX_RDESC]; rxp++) {
1674                 if (rxp->dptr) {
1675                         m_free(rxp->dptr);
1676                         rxp->dptr = NULL;
1677                 }
1678         }
1679
1680         if (sc->rpending) {
1681                 m_freem(sc->rpending);
1682                 sc->rpending = NULL;
1683         }
1684
1685         /*
1686          * And we're outta here...
1687          */
1688
1689         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1690         ifp->if_timer = 0;
1691 }
1692
1693 /*
1694  * Transmit Watchdog
1695  */
1696 static void
1697 wx_txwatchdog(struct ifnet *ifp)
1698 {
1699         wx_softc_t *sc = SOFTC_IFP(ifp);
1700         printf("%s: device timeout\n", sc->wx_name);
1701         ifp->if_oerrors++;
1702         if (wx_init(sc)) {
1703                 printf("%s: could not re-init device\n", sc->wx_name);
1704                 sc->wx_needreinit = 1;
1705         }
1706 }
1707
1708 static int
1709 wx_init(void *xsc)
1710 {
1711         struct ifmedia *ifm;
1712         wx_softc_t *sc = xsc;
1713         struct ifnet *ifp = &sc->wx_if;
1714         rxpkt_t *rxpkt;
1715         wxrd_t *rd;
1716         size_t len;
1717         int i, bflags;
1718
1719         DPRINTF(sc, ("%s: wx_init\n", sc->wx_name));
1720         WX_LOCK(sc);
1721
1722         /*
1723          * Cancel any pending I/O by resetting things.
1724          * wx_stop will free any allocated mbufs.
1725          */
1726         wx_stop(sc);
1727
1728         /*
1729          * Reset the hardware. All network addresses loaded here, but
1730          * neither the receiver nor the transmitter are enabled.
1731          */
1732
1733         if (wx_hw_initialize(sc)) {
1734                 DPRINTF(sc, ("%s: wx_hw_initialize failed\n", sc->wx_name));
1735                 WX_UNLOCK(sc);
1736                 return (EIO);
1737         }
1738
1739         /*
1740          * Set up the receive ring stuff.
1741          */
1742         len = sizeof (wxrd_t) * WX_MAX_RDESC;
1743         bzero(sc->rdescriptors, len);
1744         for (rxpkt = sc->rbase, i = 0; rxpkt != NULL && i < WX_MAX_RDESC;
1745             i += RXINCR, rxpkt++) {
1746                 rd = &sc->rdescriptors[i];
1747                 if (wx_get_rbuf(sc, rxpkt)) {
1748                         break;
1749                 }
1750                 rd->address.lowpart = rxpkt->dma_addr + WX_RX_OFFSET_VALUE;
1751         }
1752         if (i != WX_MAX_RDESC) {
1753                 printf("%s: could not set up rbufs\n", sc->wx_name);
1754                 wx_stop(sc);
1755                 WX_UNLOCK(sc);
1756                 return (ENOMEM);
1757         }
1758
1759         /*
1760          * Set up transmit parameters and enable the transmitter.
1761          */
1762         sc->tnxtfree = sc->tactive = 0;
1763         sc->tbsyf = sc->tbsyl = NULL;
1764         WRITE_CSR(sc, WXREG_TCTL, 0);
1765         DELAY(5 * 1000);
1766         if (IS_WISEMAN(sc)) {
1767                 WRITE_CSR(sc, WXREG_TDBA_LO,
1768                         vtophys((vm_offset_t)&sc->tdescriptors[0]));
1769                 WRITE_CSR(sc, WXREG_TDBA_HI, 0);
1770                 WRITE_CSR(sc, WXREG_TDLEN, WX_MAX_TDESC * sizeof (wxtd_t));
1771                 WRITE_CSR(sc, WXREG_TDH, 0);
1772                 WRITE_CSR(sc, WXREG_TDT, 0);
1773                 WRITE_CSR(sc, WXREG_TQSA_HI, 0);
1774                 WRITE_CSR(sc, WXREG_TQSA_LO, 0);
1775                 WRITE_CSR(sc, WXREG_TIPG, WX_WISEMAN_TIPG_DFLT);
1776                 WRITE_CSR(sc, WXREG_TIDV, wx_txint_delay);
1777         } else {
1778                 WRITE_CSR(sc, WXREG_TDBA_LO_LIVENGOOD,
1779                         vtophys((vm_offset_t)&sc->tdescriptors[0]));
1780                 WRITE_CSR(sc, WXREG_TDBA_HI_LIVENGOOD, 0);
1781                 WRITE_CSR(sc, WXREG_TDLEN_LIVENGOOD,
1782                         WX_MAX_TDESC * sizeof (wxtd_t));
1783                 WRITE_CSR(sc, WXREG_TDH_LIVENGOOD, 0);
1784                 WRITE_CSR(sc, WXREG_TDT_LIVENGOOD, 0);
1785                 WRITE_CSR(sc, WXREG_TQSA_HI, 0);
1786                 WRITE_CSR(sc, WXREG_TQSA_LO, 0);
1787                 WRITE_CSR(sc, WXREG_TIPG, WX_LIVENGOOD_TIPG_DFLT);
1788                 WRITE_CSR(sc, WXREG_TIDV_LIVENGOOD, wx_txint_delay);
1789         }
1790         WRITE_CSR(sc, WXREG_TCTL, (WXTCTL_CT(WX_COLLISION_THRESHOLD) |
1791             WXTCTL_COLD(WX_FDX_COLLISION_DX) | WXTCTL_EN));
1792         /*
1793          * Set up receive parameters and enable the receiver.
1794          */
1795
1796         sc->rnxt = 0;
1797         WRITE_CSR(sc, WXREG_RCTL, 0);
1798         DELAY(5 * 1000);
1799         if (IS_WISEMAN(sc)) {
1800                 WRITE_CSR(sc, WXREG_RDTR0, WXRDTR_FPD);
1801                 WRITE_CSR(sc, WXREG_RDBA0_LO,
1802                     vtophys((vm_offset_t)&sc->rdescriptors[0]));
1803                 WRITE_CSR(sc, WXREG_RDBA0_HI, 0);
1804                 WRITE_CSR(sc, WXREG_RDLEN0, WX_MAX_RDESC * sizeof (wxrd_t));
1805                 WRITE_CSR(sc, WXREG_RDH0, 0);
1806                 WRITE_CSR(sc, WXREG_RDT0, (WX_MAX_RDESC - RXINCR));
1807         } else {
1808                 /*
1809                  * The delay should yield ~10us receive interrupt delay
1810                  */
1811                 WRITE_CSR(sc, WXREG_RDTR0_LIVENGOOD, WXRDTR_FPD | 0x40);
1812                 WRITE_CSR(sc, WXREG_RDBA0_LO_LIVENGOOD,
1813                     vtophys((vm_offset_t)&sc->rdescriptors[0]));
1814                 WRITE_CSR(sc, WXREG_RDBA0_HI_LIVENGOOD, 0);
1815                 WRITE_CSR(sc, WXREG_RDLEN0_LIVENGOOD,
1816                     WX_MAX_RDESC * sizeof (wxrd_t));
1817                 WRITE_CSR(sc, WXREG_RDH0_LIVENGOOD, 0);
1818                 WRITE_CSR(sc, WXREG_RDT0_LIVENGOOD, (WX_MAX_RDESC - RXINCR));
1819         }
1820         WRITE_CSR(sc, WXREG_RDTR1, 0);
1821         WRITE_CSR(sc, WXREG_RDBA1_LO, 0);
1822         WRITE_CSR(sc, WXREG_RDBA1_HI, 0);
1823         WRITE_CSR(sc, WXREG_RDLEN1, 0);
1824         WRITE_CSR(sc, WXREG_RDH1, 0);
1825         WRITE_CSR(sc, WXREG_RDT1, 0);
1826
1827         if (ifp->if_mtu > ETHERMTU) {
1828                 bflags = WXRCTL_EN | WXRCTL_LPE | WXRCTL_2KRBUF;
1829         } else {
1830                 bflags = WXRCTL_EN | WXRCTL_2KRBUF;
1831         }
1832
1833         WRITE_CSR(sc, WXREG_RCTL, bflags |
1834             ((ifp->if_flags & IFF_BROADCAST) ? WXRCTL_BAM : 0) |
1835             ((ifp->if_flags & IFF_PROMISC) ? WXRCTL_UPE : 0) |
1836             ((sc->all_mcasts) ? WXRCTL_MPE : 0));
1837
1838         /*
1839          * Enable Interrupts
1840          */
1841         WX_ENABLE_INT(sc);
1842
1843         if (sc->wx_mii) {
1844                 mii_mediachg(WX_MII_FROM_SOFTC(sc));
1845         } else {
1846                 ifm = &sc->wx_media;
1847                 i = ifm->ifm_media;
1848                 ifm->ifm_media = ifm->ifm_cur->ifm_media;
1849                 wx_ifmedia_upd(ifp);
1850                 ifm->ifm_media = i;
1851         }
1852
1853         /*
1854          * Mark that we're up and running...
1855          */
1856         ifp->if_flags |= IFF_RUNNING;
1857         ifp->if_flags &= ~IFF_OACTIVE;
1858
1859
1860         /*
1861          * Start stats updater.
1862          */
1863         TIMEOUT(sc, wx_watchdog, sc, hz);
1864
1865         WX_UNLOCK(sc);
1866         /*
1867          * And we're outta here...
1868          */
1869         return (0);
1870 }
1871
1872 /*
1873  * Get a receive buffer for our use (and dma map the data area).
1874  *
1875  * The Wiseman chip can have buffers be 256, 512, 1024 or 2048 bytes in size.
1876  * The LIVENGOOD chip can go higher (up to 16K), but what's the point as
1877  * we aren't doing non-MCLGET memory management.
1878  *
1879  * It wants them aligned on 256 byte boundaries, but can actually cope
1880  * with an offset in the first 255 bytes of the head of a receive frame.
1881  *
1882  * We'll allocate a MCLBYTE sized cluster but *not* adjust the data pointer
1883  * by any alignment value. Instead, we'll tell the chip to offset by any
1884  * alignment and we'll catch the alignment on the backend at interrupt time.
1885  */
1886 static void
1887 wx_rxdma_map(wx_softc_t *sc, rxpkt_t *rxpkt, struct mbuf *mb)
1888 {
1889         rxpkt->dptr = mb;
1890         rxpkt->dma_addr = vtophys(mtod(mb, vm_offset_t));
1891 }
1892
1893 static int
1894 wx_get_rbuf(wx_softc_t *sc, rxpkt_t *rxpkt)
1895 {
1896         struct mbuf *mb;
1897         MGETHDR(mb, M_DONTWAIT, MT_DATA);
1898         if (mb == NULL) {
1899                 rxpkt->dptr = NULL;
1900                 return (-1);
1901         }
1902         MCLGET(mb, M_DONTWAIT);
1903         if ((mb->m_flags & M_EXT) == 0) {
1904                 m_freem(mb);
1905                 rxpkt->dptr = NULL;
1906                 return (-1);
1907         }
1908         wx_rxdma_map(sc, rxpkt, mb);
1909         return (0);
1910 }
1911
1912 static int
1913 wx_ioctl(struct ifnet *ifp, IOCTL_CMD_TYPE command, caddr_t data,
1914     struct ucred *cr)
1915 {
1916         wx_softc_t *sc = SOFTC_IFP(ifp);
1917         struct ifreq *ifr = (struct ifreq *) data;
1918         int error = 0;
1919
1920         WX_LOCK(sc);
1921         switch (command) {
1922         case SIOCSIFADDR:
1923         case SIOCGIFADDR:
1924                 error = ether_ioctl(ifp, command, data);
1925                 break;
1926         case SIOCSIFMTU:
1927                 if (ifr->ifr_mtu > WX_MAXMTU || ifr->ifr_mtu < ETHERMIN) {
1928                         error = EINVAL;
1929                 } else if (ifp->if_mtu != ifr->ifr_mtu) {
1930                         ifp->if_mtu = ifr->ifr_mtu;
1931                         error = wx_init(sc);
1932                 }
1933                 break;
1934         case SIOCSIFFLAGS:
1935                 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0;
1936
1937                 /*
1938                  * If interface is marked up and not running, then start it.
1939                  * If it is marked down and running, stop it.
1940                  * If it's up then re-initialize it. This is so flags
1941                  * such as IFF_PROMISC are handled.
1942                  */
1943                 if (ifp->if_flags & IFF_UP) {
1944                         if ((ifp->if_flags & IFF_RUNNING) == 0) {
1945                                 error = wx_init(sc);
1946                         }
1947                 } else {
1948                         if (ifp->if_flags & IFF_RUNNING) {
1949                                 wx_stop(sc);
1950                         }
1951                 }
1952                 break;
1953
1954         case SIOCADDMULTI:
1955         case SIOCDELMULTI:
1956                 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0;
1957                 error = wx_mc_setup(sc);
1958                 break;
1959         case SIOCGIFMEDIA:
1960         case SIOCSIFMEDIA:
1961                 DPRINTF(sc, ("%s: ioctl SIOC[GS]IFMEDIA: command=%#lx\n",
1962                     sc->wx_name, command));
1963                 if (sc->wx_mii) {
1964                         mii_data_t *mii = WX_MII_FROM_SOFTC(sc);
1965                         error = ifmedia_ioctl(ifp, ifr,
1966                             &mii->mii_media, command);
1967                 } else {
1968                         error = ifmedia_ioctl(ifp, ifr, &sc->wx_media, command);
1969                 }
1970
1971                 break;
1972         default:
1973                 error = EINVAL;
1974         }
1975
1976         WX_UNLOCK(sc);
1977         return (error);
1978 }
1979
1980 static int
1981 wx_ifmedia_upd(struct ifnet *ifp)
1982 {
1983         struct wx_softc *sc = SOFTC_IFP(ifp);
1984         struct ifmedia *ifm;
1985
1986         DPRINTF(sc, ("%s: ifmedia_upd\n", sc->wx_name));
1987
1988         if (sc->wx_mii) {
1989                 mii_mediachg(WX_MII_FROM_SOFTC(sc));
1990                 return 0;
1991         }
1992
1993         ifm = &sc->wx_media;
1994
1995         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) {
1996                 return (EINVAL);
1997         }
1998
1999         return (0);
2000 }
2001
2002 static void
2003 wx_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
2004 {
2005         u_int32_t dsr;
2006         struct wx_softc *sc = SOFTC_IFP(ifp);
2007
2008         DPRINTF(sc, ("%s: ifmedia_sts: ", sc->wx_name));
2009
2010         if (sc->wx_mii) {
2011                 mii_data_t *mii = WX_MII_FROM_SOFTC(sc);
2012                 mii_pollstat(mii);
2013                 ifmr->ifm_active = mii->mii_media_active;
2014                 ifmr->ifm_status = mii->mii_media_status;
2015                 DPRINTF(sc, ("active=%#x status=%#x\n",
2016                     ifmr->ifm_active, ifmr->ifm_status));
2017                 return;
2018         }
2019
2020         DPRINTF(sc, ("\n"));
2021         ifmr->ifm_status = IFM_AVALID;
2022         ifmr->ifm_active = IFM_ETHER;
2023
2024         if (sc->linkup == 0)
2025                 return;
2026
2027         ifmr->ifm_status |= IFM_ACTIVE;
2028         dsr = READ_CSR(sc, WXREG_DSR);
2029         if (IS_LIVENGOOD(sc)) {
2030                 if (dsr &  WXDSR_1000BT) {
2031                         if (IS_LIVENGOOD_CU(sc)) {
2032                                 ifmr->ifm_status |= IFM_1000_TX;
2033                         }
2034                         else {
2035                                 ifmr->ifm_status |= IFM_1000_SX;
2036                         }
2037                 } else if (dsr & WXDSR_100BT) {
2038                         ifmr->ifm_status |= IFM_100_FX; /* ?? */
2039                 } else {
2040                         ifmr->ifm_status |= IFM_10_T;   /* ?? */
2041                 }
2042         } else {
2043                 ifmr->ifm_status |= IFM_1000_SX;
2044         }
2045         if (dsr & WXDSR_FD) {
2046                 ifmr->ifm_active |= IFM_FDX;
2047         }
2048 }
2049
2050
2051 #define RAISE_CLOCK(sc, dcr)    \
2052                 WRITE_CSR(sc, WXREG_DCR, (dcr) | WXPHY_MDC), DELAY(2)
2053
2054 #define LOWER_CLOCK(sc, dcr)    \
2055                 WRITE_CSR(sc, WXREG_DCR, (dcr) & ~WXPHY_MDC), DELAY(2)
2056
2057 static u_int32_t
2058 wx_mii_shift_in(wx_softc_t *sc)
2059 {
2060         u_int32_t dcr, i;
2061         u_int32_t data = 0;
2062
2063         dcr = READ_CSR(sc, WXREG_DCR);
2064         dcr &= ~(WXPHY_MDIO_DIR | WXPHY_MDIO);
2065         WRITE_CSR(sc, WXREG_DCR, dcr);
2066         RAISE_CLOCK(sc, dcr);
2067         LOWER_CLOCK(sc, dcr);
2068
2069         for (i = 0; i < 16; i++) {
2070                 data <<= 1;
2071                 RAISE_CLOCK(sc, dcr);
2072                 dcr = READ_CSR(sc, WXREG_DCR);
2073
2074                 if (dcr & WXPHY_MDIO)
2075                         data |= 1;
2076
2077                 LOWER_CLOCK(sc, dcr);
2078         }
2079
2080         RAISE_CLOCK(sc, dcr);
2081         LOWER_CLOCK(sc, dcr);
2082         return (data);
2083 }
2084
2085 static void
2086 wx_mii_shift_out(wx_softc_t *sc, u_int32_t data, u_int32_t count)
2087 {
2088         u_int32_t dcr, mask;
2089
2090         dcr = READ_CSR(sc, WXREG_DCR);
2091         dcr |= WXPHY_MDIO_DIR | WXPHY_MDC_DIR;
2092
2093         for (mask = (1 << (count - 1)); mask; mask >>= 1) {
2094                 if (data & mask)
2095                         dcr |= WXPHY_MDIO;
2096                 else
2097                         dcr &= ~WXPHY_MDIO;
2098
2099                 WRITE_CSR(sc, WXREG_DCR, dcr);
2100                 DELAY(2);
2101                 RAISE_CLOCK(sc, dcr);
2102                 LOWER_CLOCK(sc, dcr);
2103         }
2104 }
2105
2106 static int
2107 wx_miibus_readreg(void *arg, int phy, int reg)
2108 {
2109         wx_softc_t *sc = WX_SOFTC_FROM_MII_ARG(arg);
2110         unsigned int data = 0;
2111
2112         if (!IS_LIVENGOOD_CU(sc)) {
2113                 return 0;
2114         }
2115         wx_mii_shift_out(sc, WXPHYC_PREAMBLE, WXPHYC_PREAMBLE_LEN);
2116         wx_mii_shift_out(sc, reg | (phy << 5) | (WXPHYC_READ << 10) |
2117             (WXPHYC_SOF << 12), 14);
2118         data = wx_mii_shift_in(sc);
2119         return (data & WXMDIC_DATA_MASK);
2120 }
2121
2122 static int
2123 wx_miibus_writereg(void *arg, int phy, int reg, int data)
2124 {
2125         wx_softc_t *sc = WX_SOFTC_FROM_MII_ARG(arg);
2126         if (!IS_LIVENGOOD_CU(sc)) {
2127                 return 0;
2128         }
2129         wx_mii_shift_out(sc, WXPHYC_PREAMBLE, WXPHYC_PREAMBLE_LEN);
2130         wx_mii_shift_out(sc, (u_int32_t)data | (WXPHYC_TURNAROUND << 16) |
2131             (reg << 18) | (phy << 23) | (WXPHYC_WRITE << 28) |
2132             (WXPHYC_SOF << 30), 32);
2133         return (0);
2134 }
2135
2136 static void
2137 wx_miibus_statchg(void *arg)
2138 {
2139         wx_softc_t *sc = WX_SOFTC_FROM_MII_ARG(arg);
2140         mii_data_t *mii = WX_MII_FROM_SOFTC(sc);
2141         u_int32_t dcr, tctl;
2142
2143         if (mii == NULL)
2144                 return;
2145
2146         dcr = sc->wx_dcr;
2147         tctl = READ_CSR(sc, WXREG_TCTL);
2148         DPRINTF(sc, ("%s: statchg dcr=%#x tctl=%#x", sc->wx_name, dcr, tctl));
2149
2150         dcr |= WXDCR_FRCSPD | WXDCR_FRCDPX | WXDCR_SLU;
2151         dcr &= ~(WXDCR_SPEED_MASK | WXDCR_ASDE /* | WXDCR_ILOS */);
2152
2153         if (mii->mii_media_status & IFM_ACTIVE) {
2154                 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE) {
2155                         DPRINTF(sc, (" link-down\n"));
2156                         sc->linkup = 0;
2157                         return;
2158                 }
2159
2160                 sc->linkup = 1;
2161         }
2162
2163         if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_TX) {
2164                 DPRINTF(sc, (" 1000TX"));
2165                 dcr |= WXDCR_1000BT;
2166         } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
2167                 DPRINTF(sc, (" 100TX"));
2168                 dcr |= WXDCR_100BT;
2169         } else  /* assume IFM_10_TX */ {
2170                 DPRINTF(sc, (" 10TX"));
2171                 dcr |= WXDCR_10BT;
2172         }
2173
2174         if (mii->mii_media_active & IFM_FDX) {
2175                 DPRINTF(sc, ("-FD"));
2176                 tctl = WXTCTL_CT(WX_COLLISION_THRESHOLD) |
2177                     WXTCTL_COLD(WX_FDX_COLLISION_DX) | WXTCTL_EN;
2178                 dcr |= WXDCR_FD;
2179         } else {
2180                 DPRINTF(sc, ("-HD"));
2181                 tctl = WXTCTL_CT(WX_COLLISION_THRESHOLD) |
2182                     WXTCTL_COLD(WX_HDX_COLLISION_DX) | WXTCTL_EN;
2183                 dcr &= ~WXDCR_FD;
2184         }
2185
2186         /* FLAG0==rx-flow-control FLAG1==tx-flow-control */
2187         if (mii->mii_media_active & IFM_FLAG0) {
2188                 dcr |= WXDCR_RFCE;
2189         } else {
2190                 dcr &= ~WXDCR_RFCE;
2191         }
2192
2193         if (mii->mii_media_active & IFM_FLAG1) {
2194                 dcr |= WXDCR_TFCE;
2195         } else {
2196                 dcr &= ~WXDCR_TFCE;
2197         }
2198
2199         if (dcr & (WXDCR_RFCE|WXDCR_TFCE)) {
2200                 WRITE_CSR(sc, WXREG_FCAL, FC_FRM_CONST_LO);
2201                 WRITE_CSR(sc, WXREG_FCAH, FC_FRM_CONST_HI);
2202                 WRITE_CSR(sc, WXREG_FCT, FC_TYP_CONST);
2203         } else {
2204                 WRITE_CSR(sc, WXREG_FCAL, 0);
2205                 WRITE_CSR(sc, WXREG_FCAH, 0);
2206                 WRITE_CSR(sc, WXREG_FCT, 0);
2207         }
2208
2209         DPRINTF(sc, (" dcr=%#x tctl=%#x\n", dcr, tctl));
2210         WRITE_CSR(sc, WXREG_TCTL, tctl);
2211         sc->wx_dcr = dcr;
2212         WRITE_CSR(sc, WXREG_DCR, dcr);
2213 }
2214
2215 static void
2216 wx_miibus_mediainit(void *arg)
2217 {
2218 }