2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $
31 #include <sys/param.h>
33 #include <sys/bus_resource.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
38 #include <sys/systm.h>
40 #include <bus/pci/pcireg.h>
41 #include <bus/pci/pcivar.h>
48 static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI");
51 #define IOMASK 0xfffffffc
52 #define ATA_PROBE_OK -10
54 static const struct none_atapci {
59 } none_atapci_table[] = {
60 /* Appears on Intel PRO/1000 PM */
61 { ATA_INTEL_ID, 0x108d, ATA_INTEL_ID, 0x0000 },
66 ata_legacy(device_t dev)
68 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&&
69 ((pci_read_config(dev, PCIR_PROGIF, 1) &
70 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) !=
71 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) ||
72 (!pci_read_config(dev, PCIR_BAR(0), 4) &&
73 !pci_read_config(dev, PCIR_BAR(1), 4) &&
74 !pci_read_config(dev, PCIR_BAR(2), 4) &&
75 !pci_read_config(dev, PCIR_BAR(3), 4) &&
76 !pci_read_config(dev, PCIR_BAR(5), 4)));
80 ata_pci_probe(device_t dev)
82 if (pci_get_class(dev) != PCIC_STORAGE)
85 /* if this is an AHCI chipset grab it */
86 if (pci_get_subclass(dev) == PCIS_STORAGE_SATA) {
87 if (!ata_ahci_ident(dev))
91 /* run through the vendor specific drivers */
92 switch (pci_get_vendor(dev)) {
94 if (!ata_acard_ident(dev))
97 case ATA_ACER_LABS_ID:
98 if (!ata_ali_ident(dev))
102 if (!ata_amd_ident(dev))
106 if (!ata_ati_ident(dev))
110 if (!ata_cyrix_ident(dev))
114 if (!ata_cypress_ident(dev))
117 case ATA_HIGHPOINT_ID:
118 if (!ata_highpoint_ident(dev))
122 if (!ata_intel_ident(dev))
126 if (!ata_ite_ident(dev))
130 if (!ata_jmicron_ident(dev))
134 if (!ata_marvell_ident(dev))
137 case ATA_NATIONAL_ID:
138 if (!ata_national_ident(dev))
142 if (!ata_netcell_ident(dev))
146 if (!ata_nvidia_ident(dev))
150 if (!ata_promise_ident(dev))
153 case ATA_SERVERWORKS_ID:
154 if (!ata_serverworks_ident(dev))
157 case ATA_SILICON_IMAGE_ID:
158 if (!ata_sii_ident(dev))
162 if (!ata_sis_ident(dev))
166 if (!ata_via_ident(dev))
170 if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) {
171 ata_generic_ident(dev);
172 device_set_desc(dev, "Cenatek Rocket Drive controller");
177 if (pci_get_devid(dev) == ATA_MICRON_RZ1000 ||
178 pci_get_devid(dev) == ATA_MICRON_RZ1001) {
179 ata_generic_ident(dev);
181 "RZ 100? ATA controller !WARNING! data loss/corruption risk");
187 /* unknown chipset, try generic AHCI or DMA if it seems possible */
188 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) {
189 uint16_t vendor, device, subvendor, subdevice;
190 const struct none_atapci *e;
192 vendor = pci_get_vendor(dev);
193 device = pci_get_device(dev);
194 subvendor = pci_get_subvendor(dev);
195 subdevice = pci_get_subdevice(dev);
196 for (e = none_atapci_table; e->vendor != 0xffff; ++e) {
197 if (e->vendor == vendor && e->device == device &&
198 e->subvendor == subvendor && e->subdevice == subdevice)
202 if (!ata_generic_ident(dev))
209 ata_pci_attach(device_t dev)
211 struct ata_pci_controller *ctlr = device_get_softc(dev);
215 /* do chipset specific setups only needed once */
216 ctlr->legacy = ata_legacy(dev);
217 if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK)
221 ctlr->allocate = ata_pci_allocate;
224 /* if needed try to enable busmastering */
225 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
226 if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
227 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
228 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
231 /* if busmastering mode "stuck" use it */
232 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
233 ctlr->r_type1 = SYS_RES_IOPORT;
234 ctlr->r_rid1 = ATA_BMADDR_RID;
235 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1,
237 /* Only set a dma init function if the device actually supports it. */
238 ctlr->dmainit = ata_pci_dmainit;
241 if (ctlr->chipinit(dev))
244 /* attach all channels on this controller */
245 for (unit = 0; unit < ctlr->channels; unit++) {
247 if ((unit == 0 || unit == 1) && ctlr->legacy) {
248 device_add_child(dev, "ata", unit);
251 /* XXX TGEN devclass_find_free_unit() implementation */
252 while (freeunit < devclass_get_maxunit(ata_devclass) &&
253 devclass_get_device(ata_devclass, freeunit) != NULL)
255 device_add_child(dev, "ata", freeunit);
257 bus_generic_attach(dev);
262 ata_pci_detach(device_t dev)
264 struct ata_pci_controller *ctlr = device_get_softc(dev);
268 /* detach & delete all children */
269 if (!device_get_children(dev, &children, &nchildren)) {
270 for (i = 0; i < nchildren; i++)
271 device_delete_child(dev, children[i]);
272 kfree(children, M_TEMP);
276 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle);
277 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq);
281 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
285 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1);
293 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
294 u_long start, u_long end, u_long count, u_int flags)
296 struct ata_pci_controller *controller = device_get_softc(dev);
297 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
298 struct resource *res = NULL;
301 if (type == SYS_RES_IOPORT) {
304 if (controller->legacy) {
305 start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
307 end = start + count - 1;
309 myrid = PCIR_BAR(0) + (unit << 3);
310 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
311 SYS_RES_IOPORT, &myrid,
312 start, end, count, flags);
315 case ATA_CTLADDR_RID:
316 if (controller->legacy) {
317 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET;
318 count = ATA_CTLIOSIZE;
319 end = start + count - 1;
321 myrid = PCIR_BAR(1) + (unit << 3);
322 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
323 SYS_RES_IOPORT, &myrid,
324 start, end, count, flags);
328 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
329 if (controller->legacy) {
330 int irq = (unit == 0 ? 14 : 15);
332 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
333 SYS_RES_IRQ, rid, irq, irq, 1, flags);
336 res = controller->r_irq;
342 ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
345 struct ata_pci_controller *controller = device_get_softc(dev);
346 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
348 if (type == SYS_RES_IOPORT) {
351 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
353 PCIR_BAR(0) + (unit << 3), r);
356 case ATA_CTLADDR_RID:
357 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
359 PCIR_BAR(1) + (unit << 3), r);
365 if (type == SYS_RES_IRQ) {
366 if (rid != ATA_IRQ_RID)
369 if (controller->legacy) {
370 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
371 SYS_RES_IRQ, rid, r);
380 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
381 int flags, driver_intr_t *function, void *argument,
384 struct ata_pci_controller *controller = device_get_softc(dev);
386 if (controller->legacy) {
387 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
388 flags, function, argument, cookiep, NULL);
391 struct ata_pci_controller *controller = device_get_softc(dev);
392 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
394 controller->interrupt[unit].function = function;
395 controller->interrupt[unit].argument = argument;
396 *cookiep = controller;
402 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
405 struct ata_pci_controller *controller = device_get_softc(dev);
407 if (controller->legacy) {
408 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
411 struct ata_pci_controller *controller = device_get_softc(dev);
412 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
414 controller->interrupt[unit].function = NULL;
415 controller->interrupt[unit].argument = NULL;
421 ata_pci_allocate(device_t dev)
423 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
424 struct ata_channel *ch = device_get_softc(dev);
425 struct resource *io = NULL, *ctlio = NULL;
428 rid = ATA_IOADDR_RID;
429 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE)))
432 rid = ATA_CTLADDR_RID;
433 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){
434 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
438 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
439 ch->r_io[i].res = io;
440 ch->r_io[i].offset = i;
442 ch->r_io[ATA_CONTROL].res = ctlio;
443 ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2;
444 ch->r_io[ATA_IDX_ADDR].res = io;
445 ata_default_registers(dev);
447 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
448 ch->r_io[i].res = ctlr->r_res1;
449 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE);
458 ata_pci_hw(device_t dev)
460 struct ata_channel *ch = device_get_softc(dev);
463 ch->hw.status = ata_pci_status;
467 ata_pci_status(device_t dev)
469 struct ata_pci_controller *controller =
470 device_get_softc(device_get_parent(dev));
471 struct ata_channel *ch = device_get_softc(dev);
473 if ((dumping || !controller->legacy) &&
474 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) ||
475 (ch->dma->flags & ATA_DMA_ACTIVE))) {
476 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
479 * Strictly speaking the DMA engine should already be stopped
480 * once we receive the interrupt.
481 * However at least ICH controllers seem to have the habbit
482 * of not clearing the active bit even though the interrupt
484 * To make sure we wait a little bit (to make sure that other
485 * buggy systems actually have a chance of finishing their
486 * DMA transaction) and then ignore the active bit.
488 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) ==
489 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) {
491 bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
493 if ((bmstat & ATA_BMSTAT_INTERRUPT) == 0)
495 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
498 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
500 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
507 ata_pci_dmastart(device_t dev)
509 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
512 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
513 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
514 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus);
515 ch->dma->flags |= ATA_DMA_ACTIVE;
516 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT);
517 if (ch->dma->flags & ATA_DMA_READ)
518 val |= ATA_BMCMD_WRITE_READ;
520 val &= ~ATA_BMCMD_WRITE_READ;
521 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val);
524 * Issue the start command separately from configuration setup,
525 * in case the hardware latches portions of the configuration.
527 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP);
533 ata_pci_dmastop(device_t dev)
535 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
538 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
539 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
540 ch->dma->flags &= ~ATA_DMA_ACTIVE;
541 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
542 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
547 ata_pci_dmareset(device_t dev)
549 struct ata_channel *ch = device_get_softc(dev);
551 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
552 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
553 ch->dma->flags &= ~ATA_DMA_ACTIVE;
554 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
555 ch->dma->unload(dev);
559 ata_pci_dmainit(device_t dev)
561 struct ata_channel *ch = device_get_softc(dev);
565 ch->dma->start = ata_pci_dmastart;
566 ch->dma->stop = ata_pci_dmastop;
567 ch->dma->reset = ata_pci_dmareset;
572 ata_pcivendor2str(device_t dev)
574 switch (pci_get_vendor(dev)) {
575 case ATA_ACARD_ID: return "Acard";
576 case ATA_ACER_LABS_ID: return "AcerLabs";
577 case ATA_AMD_ID: return "AMD";
578 case ATA_ATI_ID: return "ATI";
579 case ATA_CYRIX_ID: return "Cyrix";
580 case ATA_CYPRESS_ID: return "Cypress";
581 case ATA_HIGHPOINT_ID: return "HighPoint";
582 case ATA_INTEL_ID: return "Intel";
583 case ATA_ITE_ID: return "ITE";
584 case ATA_JMICRON_ID: return "JMicron";
585 case ATA_MARVELL_ID: return "Marvell";
586 case ATA_NATIONAL_ID: return "National";
587 case ATA_NETCELL_ID: return "Netcell";
588 case ATA_NVIDIA_ID: return "nVidia";
589 case ATA_PROMISE_ID: return "Promise";
590 case ATA_SERVERWORKS_ID: return "ServerWorks";
591 case ATA_SILICON_IMAGE_ID: return "SiI";
592 case ATA_SIS_ID: return "SiS";
593 case ATA_VIA_ID: return "VIA";
594 case ATA_CENATEK_ID: return "Cenatek";
595 case ATA_MICRON_ID: return "Micron";
596 default: return "Generic";
600 static device_method_t ata_pci_methods[] = {
601 /* device interface */
602 DEVMETHOD(device_probe, ata_pci_probe),
603 DEVMETHOD(device_attach, ata_pci_attach),
604 DEVMETHOD(device_detach, ata_pci_detach),
605 DEVMETHOD(device_shutdown, bus_generic_shutdown),
606 DEVMETHOD(device_suspend, bus_generic_suspend),
607 DEVMETHOD(device_resume, bus_generic_resume),
610 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
611 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
612 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
613 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
614 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
615 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
620 devclass_t atapci_devclass;
622 static driver_t ata_pci_driver = {
625 sizeof(struct ata_pci_controller),
628 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, NULL, NULL);
629 MODULE_VERSION(atapci, 1);
630 MODULE_DEPEND(atapci, ata, 1, 1, 1);
633 ata_pcichannel_probe(device_t dev)
635 struct ata_channel *ch = device_get_softc(dev);
640 /* take care of green memory */
641 bzero(ch, sizeof(struct ata_channel));
643 /* find channel number on this controller */
644 device_get_children(device_get_parent(dev), &children, &count);
645 for (i = 0; i < count; i++) {
646 if (children[i] == dev)
649 kfree(children, M_TEMP);
651 ksprintf(buffer, "ATA channel %d", ch->unit);
652 device_set_desc_copy(dev, buffer);
654 return ata_probe(dev);
658 ata_pcichannel_attach(device_t dev)
660 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
661 struct ata_channel *ch = device_get_softc(dev);
669 if ((error = ctlr->allocate(dev))) {
675 return ata_attach(dev);
679 ata_pcichannel_detach(device_t dev)
681 struct ata_channel *ch = device_get_softc(dev);
684 if ((error = ata_detach(dev)))
690 /* XXX SOS free resources for io and ctlio ?? */
696 ata_pcichannel_locking(device_t dev, int mode)
698 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
699 struct ata_channel *ch = device_get_softc(dev);
702 return ctlr->locking(dev, mode);
708 ata_pcichannel_reset(device_t dev)
710 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
711 struct ata_channel *ch = device_get_softc(dev);
713 /* if DMA engine present reset it */
717 ch->dma->unload(dev);
720 /* reset the controller HW */
724 ata_generic_reset(dev);
728 ata_pcichannel_setmode(device_t parent, device_t dev)
730 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev));
731 struct ata_device *atadev = device_get_softc(dev);
732 int mode = atadev->mode;
734 ctlr->setmode(dev, ATA_PIO_MAX);
736 ctlr->setmode(dev, mode);
739 static device_method_t ata_pcichannel_methods[] = {
740 /* device interface */
741 DEVMETHOD(device_probe, ata_pcichannel_probe),
742 DEVMETHOD(device_attach, ata_pcichannel_attach),
743 DEVMETHOD(device_detach, ata_pcichannel_detach),
744 DEVMETHOD(device_shutdown, bus_generic_shutdown),
745 DEVMETHOD(device_suspend, ata_suspend),
746 DEVMETHOD(device_resume, ata_resume),
749 DEVMETHOD(ata_setmode, ata_pcichannel_setmode),
750 DEVMETHOD(ata_locking, ata_pcichannel_locking),
751 DEVMETHOD(ata_reset, ata_pcichannel_reset),
756 driver_t ata_pcichannel_driver = {
758 ata_pcichannel_methods,
759 sizeof(struct ata_channel),
762 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, NULL, NULL);