2 * Copyright (c) 1992, 1993, 1995 Eugene W. Stark
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Eugene W. Stark.
16 * 4. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY EUGENE W. STARK (THE AUTHOR) ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * $FreeBSD: src/sys/i386/isa/tw.c,v 1.38 2000/01/29 16:00:32 peter Exp $
32 * $DragonFly: src/sys/dev/misc/tw/tw.c,v 1.19 2008/08/02 01:14:42 dillon Exp $
39 * Driver configuration parameters
43 * Time for 1/2 of a power line cycle, in microseconds.
44 * Change this to 10000 for 50Hz power. Phil Sampson
45 * (vk2jnt@gw.vk2jnt.ampr.org OR sampson@gidday.enet.dec.com)
46 * reports that this works (at least in Australia) using a
47 * TW7223 module (a local version of the TW523).
49 #define HALFCYCLE 8333 /* 1/2 cycle = 8333us at 60Hz */
52 * Undefine the following if you don't have the high-resolution "microtime"
53 * routines (leave defined for FreeBSD, which has them).
58 * End of driver configuration parameters
62 * FreeBSD Device Driver for X-10 POWERHOUSE (tm)
63 * Two-Way Power Line Interface, Model #TW523
65 * written by Eugene W. Stark (stark@cs.sunysb.edu)
70 * The TW523 is a carrier-current modem for home control/automation purposes.
77 * (201) 784-9700 or 1-800-526-0027
79 * X-10 Home Controls Inc.
80 * 1200 Aerowood Drive, Unit 20
81 * Mississauga, Ontario
82 * (416) 624-4446 or 1-800-387-3346
84 * The TW523 is designed for communications using the X-10 protocol,
85 * which is compatible with a number of home control systems, including
86 * Radio Shack "Plug 'n Power(tm)" and Stanley "Lightmaker(tm)."
87 * I bought my TW523 from:
89 * Home Control Concepts
90 * 9353-C Activity Road
94 * They supplied me with the TW523 (which has an RJ-11 four-wire modular
95 * telephone connector), a modular cable, an RJ-11 to DB-25 connector with
96 * internal wiring, documentation from X-10 on the TW523 (very good),
97 * an instruction manual by Home Control Concepts (not very informative),
98 * and a floppy disk containing binary object code of some demonstration/test
99 * programs and of a C function library suitable for controlling the TW523
100 * by an IBM PC under MS-DOS (not useful to me other than to verify that
101 * the unit worked). I suggest saving money and buying the bare TW523
102 * rather than the TW523 development kit (what I bought), because if you
103 * are running FreeBSD you don't really care about the DOS binaries.
105 * The interface to the TW-523 consists of four wires on the RJ-11 connector,
106 * which are jumpered to somewhat more wires on the DB-25 connector, which
107 * in turn is intended to plug into the PC parallel printer port. I dismantled
108 * the DB-25 connector to find out what they had done:
110 * Signal RJ-11 pin DB-25 pin(s) Parallel Port
111 * Transmit TX 4 (Y) 2, 4, 6, 8 Data out
112 * Receive RX 3 (G) 10, 14 -ACK, -AutoFeed
113 * Common 2 (R) 25 Common
114 * Zero crossing 1 (B) 17 or 12 -Select or +PaperEnd
116 * NOTE: In the original cable I have (which I am still using, May, 1997)
117 * the Zero crossing signal goes to pin 17 (-Select) on the parallel port.
118 * In retrospect, this doesn't make a whole lot of sense, given that the
119 * -Select signal propagates the other direction. Indeed, some people have
120 * reported problems with this, and have had success using pin 12 (+PaperEnd)
121 * instead. This driver searches for the zero crossing signal on either
122 * pin 17 or pin 12, so it should work with either cable configuration.
123 * My suggestion would be to start by making the cable so that the zero
124 * crossing signal goes to pin 12 on the parallel port.
126 * The zero crossing signal is used to synchronize transmission to the
127 * zero crossings of the AC line, as detailed in the X-10 documentation.
128 * It would be nice if one could generate interrupts with this signal,
129 * however one needs interrupts on both the rising and falling edges,
130 * and the -ACK signal to the parallel port interrupts only on the falling
131 * edge, so it can't be done without additional hardware.
133 * In this driver, the transmit function is performed in a non-interrupt-driven
134 * fashion, by polling the zero crossing signal to determine when a transition
135 * has occurred. This wastes CPU time during transmission, but it seems like
136 * the best that can be done without additional hardware. One problem with
137 * the scheme is that preemption of the CPU during transmission can cause loss
138 * of sync. The driver tries to catch this, by noticing that a long delay
139 * loop has somehow become foreshortened, and the transmission is aborted with
140 * an error return. It is up to the user level software to handle this
141 * situation (most likely by retrying the transmission).
144 #include <sys/param.h>
145 #include <sys/systm.h>
146 #include <sys/conf.h>
147 #include <sys/device.h>
148 #include <sys/kernel.h>
150 #include <sys/syslog.h>
151 #include <sys/event.h>
152 #include <sys/thread2.h>
155 #include <sys/time.h>
156 #endif /* HIRESTIME */
158 #include <bus/isa/isa_device.h>
161 * Transmission is done by calling write() to send three byte packets of data.
162 * The first byte contains a four bit house code (0=A to 15=P).
163 * The second byte contains five bit unit/key code (0=unit 1 to 15=unit 16,
164 * 16=All Units Off to 31 = Status Request). The third byte specifies
165 * the number of times the packet is to be transmitted without any
166 * gaps between successive transmissions. Normally this is 2, as per
167 * the X-10 documentation, but sometimes (e.g. for bright and dim codes)
168 * it can be another value. Each call to write can specify an arbitrary
169 * number of data bytes. An incomplete packet is buffered until a subsequent
170 * call to write() provides data to complete it. At most one packet will
171 * actually be processed in any call to write(). Successive calls to write()
172 * leave a three-cycle gap between transmissions, per the X-10 documentation.
174 * Reception is done using read().
175 * The driver produces a series of three-character packets.
176 * In each packet, the first character consists of flags,
177 * the second character is a four bit house code (0-15),
178 * and the third character is a five bit key/function code (0-31).
179 * The flags are the following:
182 #define TW_RCV_LOCAL 1 /* The packet arrived during a local transmission */
183 #define TW_RCV_ERROR 2 /* An invalid/corrupted packet was received */
186 * IBM PC parallel port definitions relevant to TW523
189 #define tw_data 0 /* Data to tw523 (R/W) */
191 #define tw_status 1 /* Status of tw523 (R) */
192 #define TWS_RDATA 0x40 /* tw523 receive data */
193 #define TWS_OUT 0x20 /* pin 12, out of paper */
195 #define tw_control 2 /* Control tw523 (R/W) */
196 #define TWC_SYNC 0x08 /* tw523 sync (pin 17) */
197 #define TWC_ENA 0x10 /* tw523 interrupt enable */
200 * Miscellaneous defines
203 #define TWUNIT(dev) (minor(dev)) /* Extract unit number from device */
205 static int twprobe(struct isa_device *idp);
206 static int twattach(struct isa_device *idp);
208 struct isa_driver twdriver = {
209 twprobe, twattach, "tw"
212 static d_open_t twopen;
213 static d_close_t twclose;
214 static d_read_t twread;
215 static d_write_t twwrite;
216 static d_kqfilter_t twkqfilter;
218 static void twfilter_detach(struct knote *);
219 static int twfilter_read(struct knote *, long);
220 static int twfilter_write(struct knote *, long);
222 #define CDEV_MAJOR 19
223 static struct dev_ops tw_ops = {
224 { "tw", CDEV_MAJOR, 0 },
229 .d_kqfilter = twkqfilter
233 * Software control structure for TW523
236 #define TWS_XMITTING 1 /* Transmission in progress */
237 #define TWS_RCVING 2 /* Reception in progress */
238 #define TWS_WANT 4 /* A process wants received data */
239 #define TWS_OPEN 8 /* Is it currently open? */
241 #define TW_SIZE 3*60 /* Enough for about 10 sec. of input */
242 #define TW_MIN_DELAY 1500 /* Ignore interrupts of lesser latency */
244 static struct tw_sc {
245 u_int sc_port; /* I/O Port */
246 u_int sc_state; /* Current software control state */
247 struct kqinfo sc_kqp; /* Information for select()/poll()/kq() */
248 u_char sc_xphase; /* Current state of sync (for transmitter) */
249 u_char sc_rphase; /* Current state of sync (for receiver) */
250 u_char sc_flags; /* Flags for current reception */
251 short sc_rcount; /* Number of bits received so far */
252 int sc_bits; /* Bits received so far */
253 u_char sc_pkt[3]; /* Packet not yet transmitted */
254 short sc_pktsize; /* How many bytes in the packet? */
255 u_char sc_buf[TW_SIZE]; /* We buffer our own input */
256 int sc_nextin; /* Next free slot in circular buffer */
257 int sc_nextout; /* First used slot in circular buffer */
258 /* Callout for canceling our abortrcv timeout */
259 struct callout abortrcv_ch;
261 int sc_xtimes[22]; /* Times for bits in current xmit packet */
262 int sc_rtimes[22]; /* Times for bits in current rcv packet */
263 int sc_no_rcv; /* number of interrupts received */
264 #define SC_RCV_TIME_LEN 128
265 int sc_rcv_time[SC_RCV_TIME_LEN]; /* usec time stamp on interrupt */
266 #endif /* HIRESTIME */
269 static int tw_zcport; /* offset of port for zero crossing signal */
270 static int tw_zcmask; /* mask for the zero crossing signal */
272 static void twdelay25(void);
273 static void twdelayn(int n);
274 static void twsetuptimes(int *a);
275 static int wait_for_zero(struct tw_sc *sc);
276 static int twputpkt(struct tw_sc *sc, u_char *p);
277 static void twintr(void *);
278 static int twgetbytes(struct tw_sc *sc, u_char *p, int cnt);
279 static timeout_t twabortrcv;
280 static int twsend(struct tw_sc *sc, int h, int k, int cnt);
281 static int next_zero(struct tw_sc *sc);
282 static int twchecktime(int target, int tol);
283 static void twdebugtimes(struct tw_sc *sc);
286 * Counter value for delay loop.
287 * It is adjusted by twprobe so that the delay loop takes about 25us.
290 #define TWDELAYCOUNT 161 /* Works on my 486DX/33 */
291 static int twdelaycount;
294 * Twdelay25 is used for very short delays of about 25us.
295 * It is implemented with a calibrated delay loop, and should be
296 * fairly accurate ... unless we are preempted by an interrupt.
298 * We use this to wait for zero crossings because the X-10 specs say we
299 * are supposed to assert carrier within 25us when one happens.
300 * I don't really believe we can do this, but the X-10 devices seem to be
308 for(cnt = twdelaycount; cnt; cnt--); /* Should take about 25us */
312 * Twdelayn is used to time the length of the 1ms carrier pulse.
313 * This is not very critical, but if we have high-resolution time-of-day
314 * we check it every apparent 200us to make sure we don't get too far off
315 * if we happen to be interrupted during the delay.
327 #endif /* HIRESTIME */
335 if(d >= 0 && d < 1000000) return;
337 #endif /* HIRESTIME */
342 twprobe(struct isa_device *idp)
348 sc.sc_port = idp->id_iobase;
349 /* Search for the zero crossing signal at ports, bit combinations. */
350 tw_zcport = tw_control;
351 tw_zcmask = TWC_SYNC;
352 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
353 if(wait_for_zero(&sc) < 0) {
354 tw_zcport = tw_status;
356 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
358 if(wait_for_zero(&sc) < 0)
361 * Iteratively check the timing of a few sync transitions, and adjust
362 * the loop delay counter, if necessary, to bring the timing reported
363 * by wait_for_zero() close to HALFCYCLE. Give up if anything
364 * ridiculous happens.
366 if(twdelaycount == 0) { /* Only adjust timing for first unit */
367 twdelaycount = TWDELAYCOUNT;
368 for(tries = 0; tries < 10; tries++) {
369 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
370 if(wait_for_zero(&sc) >= 0) {
371 d = wait_for_zero(&sc);
372 if(d <= HALFCYCLE/100 || d >= HALFCYCLE*100) {
376 twdelaycount = (twdelaycount * d)/HALFCYCLE;
381 * Now do a final check, just to make sure
383 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
384 if(wait_for_zero(&sc) >= 0) {
385 d = wait_for_zero(&sc);
386 if(d <= (HALFCYCLE * 110)/100 && d >= (HALFCYCLE * 90)/100) return(8);
392 twattach(struct isa_device *idp)
397 idp->id_intr = (inthand2_t *)twintr;
398 sc = &tw_sc[unit = idp->id_unit];
399 sc->sc_port = idp->id_iobase;
402 callout_init(&sc->abortrcv_ch);
403 make_dev(&tw_ops, unit, 0, 0, 0600, "tw%d", unit);
408 twopen(struct dev_open_args *ap)
410 cdev_t dev = ap->a_head.a_dev;
411 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
414 if(sc->sc_state == 0) {
415 sc->sc_state = TWS_OPEN;
416 sc->sc_nextin = sc->sc_nextout = 0;
418 outb(sc->sc_port+tw_control, TWC_ENA);
425 twclose(struct dev_close_args *ap)
427 cdev_t dev = ap->a_head.a_dev;
428 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
432 outb(sc->sc_port+tw_control, 0);
438 twread(struct dev_read_args *ap)
440 cdev_t dev = ap->a_head.a_dev;
441 struct uio *uio = ap->a_uio;
443 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
447 cnt = MIN(uio->uio_resid, 3);
448 if((error = twgetbytes(sc, buf, cnt)) == 0) {
449 error = uiomove(buf, cnt, uio);
456 twwrite(struct dev_write_args *ap)
458 cdev_t dev = ap->a_head.a_dev;
459 struct uio *uio = ap->a_uio;
461 int house, key, reps;
465 sc = &tw_sc[TWUNIT(dev)];
467 * Note: Although I had intended to allow concurrent transmitters,
468 * there is a potential problem here if two processes both write
469 * into the sc_pkt buffer at the same time. The following code
470 * is an additional critical section that needs to be synchronized.
473 cnt = MIN(3 - sc->sc_pktsize, uio->uio_resid);
474 error = uiomove(&(sc->sc_pkt[sc->sc_pktsize]), cnt, uio);
479 sc->sc_pktsize += cnt;
480 if(sc->sc_pktsize < 3) { /* Only transmit 3-byte packets */
486 * Collect house code, key code, and rep count, and check for sanity.
488 house = sc->sc_pkt[0];
490 reps = sc->sc_pkt[2];
491 if(house >= 16 || key >= 32) {
496 * Synchronize with the receiver operating in the bottom half, and
497 * also with concurrent transmitters.
498 * We don't want to interfere with a packet currently being received,
499 * and we would like the receiver to recognize when a packet has
500 * originated locally.
502 while(sc->sc_state & (TWS_RCVING | TWS_XMITTING)) {
503 error = tsleep((caddr_t)sc, PCATCH, "twwrite", 0);
509 sc->sc_state |= TWS_XMITTING;
511 * Everything looks OK, let's do the transmission.
513 crit_exit(); /* Enable interrupts because this takes a LONG time */
514 error = twsend(sc, house, key, reps);
516 sc->sc_state &= ~TWS_XMITTING;
519 if(error) return(EIO);
524 * Determine if there is data available for reading
527 static struct filterops twfiltops_read =
528 { FILTEROP_ISFD, NULL, twfilter_detach, twfilter_read };
529 static struct filterops twfiltops_write =
530 { FILTEROP_ISFD, NULL, twfilter_detach, twfilter_write };
533 twkqfilter(struct dev_kqfilter_args *ap)
535 cdev_t dev = ap->a_head.a_dev;
536 struct knote *kn = ap->a_kn;
542 switch (kn->kn_filter) {
544 sc = &tw_sc[TWUNIT(dev)];
545 kn->kn_fop = &twfiltops_read;
546 kn->kn_hook = (caddr_t)sc;
549 sc = &tw_sc[TWUNIT(dev)];
550 kn->kn_fop = &twfiltops_write;
551 kn->kn_hook = (caddr_t)sc;
554 ap->a_result = EOPNOTSUPP;
558 klist = &sc->sc_kqp.ki_note;
559 knote_insert(klist, kn);
565 twfilter_detach(struct knote *kn)
567 struct tw_sc *sc = (struct tw_sc *)kn->kn_hook;
570 klist = &sc->sc_kqp.ki_note;
571 knote_remove(klist, kn);
575 twfilter_read(struct knote *kn, long hint)
577 struct tw_sc *sc = (struct tw_sc *)kn->kn_hook;
581 if(sc->sc_nextin != sc->sc_nextout)
589 twfilter_write(struct knote *kn, long hint)
591 /* write() is always OK */
599 #define X10_START_LENGTH 4
600 static char X10_START[] = { 1, 1, 1, 0 };
603 * Each bit of the 4-bit house code and 5-bit key code
604 * is transmitted twice, once in true form, and then in
605 * complemented form. This is already taken into account
606 * in the following tables.
609 #define X10_HOUSE_LENGTH 8
610 static char X10_HOUSE[16][8] = {
611 { 0, 1, 1, 0, 1, 0, 0, 1 }, /* A = 0110 */
612 { 1, 0, 1, 0, 1, 0, 0, 1 }, /* B = 1110 */
613 { 0, 1, 0, 1, 1, 0, 0, 1 }, /* C = 0010 */
614 { 1, 0, 0, 1, 1, 0, 0, 1 }, /* D = 1010 */
615 { 0, 1, 0, 1, 0, 1, 1, 0 }, /* E = 0001 */
616 { 1, 0, 0, 1, 0, 1, 1, 0 }, /* F = 1001 */
617 { 0, 1, 1, 0, 0, 1, 1, 0 }, /* G = 0101 */
618 { 1, 0, 1, 0, 0, 1, 1, 0 }, /* H = 1101 */
619 { 0, 1, 1, 0, 1, 0, 1, 0 }, /* I = 0111 */
620 { 1, 0, 1, 0, 1, 0, 1, 0 }, /* J = 1111 */
621 { 0, 1, 0, 1, 1, 0, 1, 0 }, /* K = 0011 */
622 { 1, 0, 0, 1, 1, 0, 1, 0 }, /* L = 1011 */
623 { 0, 1, 0, 1, 0, 1, 0, 1 }, /* M = 0000 */
624 { 1, 0, 0, 1, 0, 1, 0, 1 }, /* N = 1000 */
625 { 0, 1, 1, 0, 0, 1, 0, 1 }, /* O = 0100 */
626 { 1, 0, 1, 0, 0, 1, 0, 1 } /* P = 1100 */
629 #define X10_KEY_LENGTH 10
630 static char X10_KEY[32][10] = {
631 { 0, 1, 1, 0, 1, 0, 0, 1, 0, 1 }, /* 01100 => 1 */
632 { 1, 0, 1, 0, 1, 0, 0, 1, 0, 1 }, /* 11100 => 2 */
633 { 0, 1, 0, 1, 1, 0, 0, 1, 0, 1 }, /* 00100 => 3 */
634 { 1, 0, 0, 1, 1, 0, 0, 1, 0, 1 }, /* 10100 => 4 */
635 { 0, 1, 0, 1, 0, 1, 1, 0, 0, 1 }, /* 00010 => 5 */
636 { 1, 0, 0, 1, 0, 1, 1, 0, 0, 1 }, /* 10010 => 6 */
637 { 0, 1, 1, 0, 0, 1, 1, 0, 0, 1 }, /* 01010 => 7 */
638 { 1, 0, 1, 0, 0, 1, 1, 0, 0, 1 }, /* 11010 => 8 */
639 { 0, 1, 1, 0, 1, 0, 1, 0, 0, 1 }, /* 01110 => 9 */
640 { 1, 0, 1, 0, 1, 0, 1, 0, 0, 1 }, /* 11110 => 10 */
641 { 0, 1, 0, 1, 1, 0, 1, 0, 0, 1 }, /* 00110 => 11 */
642 { 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 }, /* 10110 => 12 */
643 { 0, 1, 0, 1, 0, 1, 0, 1, 0, 1 }, /* 00000 => 13 */
644 { 1, 0, 0, 1, 0, 1, 0, 1, 0, 1 }, /* 10000 => 14 */
645 { 0, 1, 1, 0, 0, 1, 0, 1, 0, 1 }, /* 01000 => 15 */
646 { 1, 0, 1, 0, 0, 1, 0, 1, 0, 1 }, /* 11000 => 16 */
647 { 0, 1, 0, 1, 0, 1, 0, 1, 1, 0 }, /* 00001 => All Units Off */
648 { 0, 1, 0, 1, 0, 1, 1, 0, 1, 0 }, /* 00011 => All Units On */
649 { 0, 1, 0, 1, 1, 0, 0, 1, 1, 0 }, /* 00101 => On */
650 { 0, 1, 0, 1, 1, 0, 1, 0, 1, 0 }, /* 00111 => Off */
651 { 0, 1, 1, 0, 0, 1, 0, 1, 1, 0 }, /* 01001 => Dim */
652 { 0, 1, 1, 0, 0, 1, 1, 0, 1, 0 }, /* 01011 => Bright */
653 { 0, 1, 1, 0, 1, 0, 0, 1, 1, 0 }, /* 01101 => All LIGHTS Off */
654 { 0, 1, 1, 0, 1, 0, 1, 0, 1, 0 }, /* 01111 => Extended Code */
655 { 1, 0, 0, 1, 0, 1, 0, 1, 1, 0 }, /* 10001 => Hail Request */
656 { 1, 0, 0, 1, 0, 1, 1, 0, 1, 0 }, /* 10011 => Hail Acknowledge */
657 { 1, 0, 0, 1, 1, 0, 0, 1, 1, 0 }, /* 10101 => Preset Dim 0 */
658 { 1, 0, 0, 1, 1, 0, 1, 0, 1, 0 }, /* 10111 => Preset Dim 1 */
659 { 1, 0, 1, 0, 0, 1, 0, 1, 0, 1 }, /* 11000 => Extended Data (analog) */
660 { 1, 0, 1, 0, 0, 1, 1, 0, 1, 0 }, /* 11011 => Status = on */
661 { 1, 0, 1, 0, 1, 0, 0, 1, 1, 0 }, /* 11101 => Status = off */
662 { 1, 0, 1, 0, 1, 0, 1, 0, 1, 0 } /* 11111 => Status request */
666 * Tables for mapping received X-10 code back to house/key number.
669 static short X10_HOUSE_INV[16] = {
670 12, 4, 2, 10, 14, 6, 0, 8,
671 13, 5, 3, 11, 15, 7, 1, 9
674 static short X10_KEY_INV[32] = {
675 12, 16, 4, 17, 2, 18, 10, 19,
676 14, 20, 6, 21, 0, 22, 8, 23,
677 13, 24, 5, 25, 3, 26, 11, 27,
678 15, 28, 7, 29, 1, 30, 9, 31
681 static char *X10_KEY_LABEL[32] = {
710 "Extended Data (analog)",
716 * Transmit a packet containing house code h and key code k
719 #define TWRETRY 10 /* Try 10 times to sync with AC line */
722 twsend(struct tw_sc *sc, int h, int k, int cnt)
725 int port = sc->sc_port;
728 * Make sure we get a reliable sync with a power line zero crossing
730 for(i = 0; i < TWRETRY; i++) {
731 if(wait_for_zero(sc) > 100) goto insync;
733 log(LOG_ERR, "TWXMIT: failed to sync.\n");
738 * Be sure to leave 3 cycles space between transmissions
740 for(i = 6; i > 0; i--)
741 if(next_zero(sc) < 0) return(-1);
743 * The packet is transmitted cnt times, with no gaps.
747 * Transmit the start code
749 for(i = 0; i < X10_START_LENGTH; i++) {
750 outb(port+tw_data, X10_START[i] ? 0xff : 0x00); /* Waste no time! */
752 if(i == 0) twsetuptimes(sc->sc_xtimes);
753 if(twchecktime(sc->sc_xtimes[i], HALFCYCLE/20) == 0) {
754 outb(port+tw_data, 0);
757 #endif /* HIRESTIME */
758 twdelayn(1000); /* 1ms pulse width */
759 outb(port+tw_data, 0);
760 if(next_zero(sc) < 0) return(-1);
763 * Transmit the house code
765 for(i = 0; i < X10_HOUSE_LENGTH; i++) {
766 outb(port+tw_data, X10_HOUSE[h][i] ? 0xff : 0x00); /* Waste no time! */
768 if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH], HALFCYCLE/20) == 0) {
769 outb(port+tw_data, 0);
772 #endif /* HIRESTIME */
773 twdelayn(1000); /* 1ms pulse width */
774 outb(port+tw_data, 0);
775 if(next_zero(sc) < 0) return(-1);
778 * Transmit the unit/key code
780 for(i = 0; i < X10_KEY_LENGTH; i++) {
781 outb(port+tw_data, X10_KEY[k][i] ? 0xff : 0x00);
783 if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH+X10_HOUSE_LENGTH],
784 HALFCYCLE/20) == 0) {
785 outb(port+tw_data, 0);
788 #endif /* HIRESTIME */
789 twdelayn(1000); /* 1ms pulse width */
790 outb(port+tw_data, 0);
791 if(next_zero(sc) < 0) return(-1);
798 * Waste CPU cycles to get in sync with a power line zero crossing.
799 * The value returned is roughly how many microseconds we wasted before
800 * seeing the transition. To avoid wasting time forever, we give up after
801 * waiting patiently for 1/4 sec (15 power line cycles at 60 Hz),
802 * which is more than the 11 cycles it takes to transmit a full
807 wait_for_zero(struct tw_sc *sc)
809 int i, old, new, max;
810 int port = sc->sc_port + tw_zcport;
813 max = 10000; /* 10000 * 25us = 0.25 sec */
816 new = inb(port) & tw_zcmask;
828 * Wait for the next zero crossing transition, and if we don't have
829 * high-resolution time-of-day, check to see that the zero crossing
830 * appears to be arriving on schedule.
831 * We expect to be waiting almost a full half-cycle (8.333ms-1ms = 7.333ms).
832 * If we don't seem to wait very long, something is wrong (like we got
833 * preempted!) and we should abort the transmission because
834 * there's no telling how long it's really been since the
835 * last bit was transmitted.
839 next_zero(struct tw_sc *sc)
843 if((d = wait_for_zero(sc)) < 0) {
845 if((d = wait_for_zero(sc)) < 6000 || d > 8500) {
846 /* No less than 6.0ms, no more than 8.5ms */
847 #endif /* HIRESTIME */
848 log(LOG_ERR, "TWXMIT framing error: %d\n", d);
855 * Put a three-byte packet into the circular buffer
856 * Should be called from a critical section.
860 twputpkt(struct tw_sc *sc, u_char *p)
864 for(i = 0; i < 3; i++) {
865 next = sc->sc_nextin+1;
866 if(next >= TW_SIZE) next = 0;
867 if(next == sc->sc_nextout) { /* Buffer full */
869 log(LOG_ERR, "TWRCV: Buffer overrun\n");
873 sc->sc_buf[sc->sc_nextin] = *p++;
874 sc->sc_nextin = next;
876 if(sc->sc_state & TWS_WANT) {
877 sc->sc_state &= ~TWS_WANT;
878 wakeup((caddr_t)(&sc->sc_buf));
880 KNOTE(&sc->sc_kqp.ki_note, 0);
885 * Get bytes from the circular buffer
886 * Should be called from a critical section.
890 twgetbytes(struct tw_sc *sc, u_char *p, int cnt)
895 while(sc->sc_nextin == sc->sc_nextout) { /* Buffer empty */
896 sc->sc_state |= TWS_WANT;
897 error = tsleep((caddr_t)(&sc->sc_buf), PCATCH, "twread", 0);
902 *p++ = sc->sc_buf[sc->sc_nextout++];
903 if(sc->sc_nextout >= TW_SIZE) sc->sc_nextout = 0;
909 * Abort reception that has failed to complete in the required time.
913 twabortrcv(void *arg)
915 struct tw_sc *sc = arg;
919 sc->sc_state &= ~TWS_RCVING;
920 /* simply ignore single isolated interrupts. */
921 if (sc->sc_no_rcv > 1) {
922 sc->sc_flags |= TW_RCV_ERROR;
923 pkt[0] = sc->sc_flags;
926 log(LOG_ERR, "TWRCV: aborting (%x, %d)\n", sc->sc_bits, sc->sc_rcount);
934 tw_is_within(int value, int expected, int tolerance)
937 diff = value - expected;
940 if (diff < tolerance)
946 * This routine handles interrupts that occur when there is a falling
947 * transition on the RX input. There isn't going to be a transition
948 * on every bit (some are zero), but if we are smart and keep track of
949 * how long it's been since the last interrupt (via the zero crossing
950 * detect line and/or high-resolution time-of-day routine), we can
951 * reconstruct the transmission without having to poll.
958 struct tw_sc *sc = &tw_sc[unit];
967 * Ignore any interrupts that occur if the device is not open.
969 if(sc->sc_state == 0) return;
970 newphase = inb(port + tw_zcport) & tw_zcmask;
975 * If we aren't currently receiving a packet, set up a new packet
976 * and put in the first "1" bit that has just arrived.
977 * Arrange for the reception to be aborted if too much time goes by.
979 if((sc->sc_state & TWS_RCVING) == 0) {
981 twsetuptimes(sc->sc_rtimes);
982 #endif /* HIRESTIME */
983 sc->sc_state |= TWS_RCVING;
985 if(sc->sc_state & TWS_XMITTING) sc->sc_flags = TW_RCV_LOCAL;
986 else sc->sc_flags = 0;
988 sc->sc_rphase = newphase;
989 /* 3 cycles of silence = 3/60 = 1/20 = 50 msec */
990 callout_reset(&sc->abortrcv_ch, hz / 20, twabortrcv, sc);
991 sc->sc_rcv_time[0] = tv.tv_usec;
995 callout_reset(&sc->abortrcv_ch, hz / 20, twabortrcv, sc);
996 newphase = inb(port + tw_zcport) & tw_zcmask;
998 /* enforce a minimum delay since the last interrupt */
999 delay = tv.tv_usec - sc->sc_rcv_time[sc->sc_no_rcv - 1];
1002 if (delay < TW_MIN_DELAY)
1005 sc->sc_rcv_time[sc->sc_no_rcv] = tv.tv_usec;
1006 if (sc->sc_rcv_time[sc->sc_no_rcv] < sc->sc_rcv_time[0])
1007 sc->sc_rcv_time[sc->sc_no_rcv] += 1000000;
1012 * The second and third bits are a special case.
1014 if (sc->sc_rcount < 3) {
1017 tw_is_within(delay, HALFCYCLE, HALFCYCLE / 6)
1019 newphase != sc->sc_rphase
1025 * Invalid start code -- abort reception.
1027 sc->sc_state &= ~TWS_RCVING;
1028 sc->sc_flags |= TW_RCV_ERROR;
1029 callout_stop(&sc->abortrcv_ch);
1030 log(LOG_ERR, "TWRCV: Invalid start code\n");
1035 if(sc->sc_rcount == 3) {
1037 * We've gotten three "1" bits in a row. The start code
1038 * is really 1110, but this might be followed by a zero
1039 * bit from the house code, so if we wait any longer we
1040 * might be confused about the first house code bit.
1041 * So, we guess that the start code is correct and insert
1042 * the trailing zero without actually having seen it.
1043 * We don't change sc_rphase in this case, because two
1044 * bit arrivals in a row preserve parity.
1050 * Update sc_rphase to the current phase before returning.
1052 sc->sc_rphase = newphase;
1057 * Now figure out what the current bit is that just arrived.
1058 * The X-10 protocol transmits each data bit twice: once in
1059 * true form and once in complemented form on the next half
1060 * cycle. So, there will be at least one interrupt per bit.
1061 * By comparing the phase we see at the time of the interrupt
1062 * with the saved sc_rphase, we can tell on which half cycle
1063 * the interrupt occrred. This assumes, of course, that the
1064 * packet is well-formed. We do the best we can at trying to
1065 * catch errors by aborting if too much time has gone by, and
1066 * by tossing out a packet if too many bits arrive, but the
1067 * whole scheme is probably not as robust as if we had a nice
1068 * interrupt on every half cycle of the power line.
1069 * If we have high-resolution time-of-day routines, then we
1070 * can do a bit more sanity checking.
1074 * A complete packet is 22 half cycles.
1076 if(sc->sc_rcount <= 20) {
1078 int bit = 0, last_bit;
1079 if (sc->sc_rcount == 4)
1080 last_bit = 1; /* Start (1110) ends in 10, a 'one' code. */
1082 last_bit = sc->sc_bits & 0x1;
1083 if ( ( (last_bit == 1)
1084 && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6)))
1085 || ( (last_bit == 0)
1086 && (tw_is_within(delay, HALFCYCLE * 1, HALFCYCLE / 6))))
1088 else if ( ( (last_bit == 1)
1089 && (tw_is_within(delay, HALFCYCLE * 3, HALFCYCLE / 6)))
1090 || ( (last_bit == 0)
1091 && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6))))
1094 sc->sc_flags |= TW_RCV_ERROR;
1095 log(LOG_ERR, "TWRCV: %d cycle after %d bit, delay %d%%\n",
1096 sc->sc_rcount, last_bit, 100 * delay / HALFCYCLE);
1098 sc->sc_bits = (sc->sc_bits << 1) | bit;
1100 sc->sc_bits = (sc->sc_bits << 1)
1101 | ((newphase == sc->sc_rphase) ? 0x0 : 0x1);
1102 #endif /* HIRESTIME */
1105 if(sc->sc_rcount >= 22 || sc->sc_flags & TW_RCV_ERROR) {
1106 if(sc->sc_rcount != 22) {
1107 sc->sc_flags |= TW_RCV_ERROR;
1108 pkt[0] = sc->sc_flags;
1109 pkt[1] = pkt[2] = 0;
1111 pkt[0] = sc->sc_flags;
1112 pkt[1] = X10_HOUSE_INV[(sc->sc_bits & 0x1e0) >> 5];
1113 pkt[2] = X10_KEY_INV[sc->sc_bits & 0x1f];
1115 sc->sc_state &= ~TWS_RCVING;
1117 callout_stop(&sc->abortrcv_ch);
1118 if(sc->sc_flags & TW_RCV_ERROR) {
1119 log(LOG_ERR, "TWRCV: invalid packet: (%d, %x) %c %s\n",
1120 sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]);
1123 /* log(LOG_ERR, "TWRCV: valid packet: (%d, %x) %c %s\n",
1124 sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]); */
1127 wakeup((caddr_t)sc);
1132 twdebugtimes(struct tw_sc *sc)
1135 for (i = 0; (i < sc->sc_no_rcv) && (i < SC_RCV_TIME_LEN); i++)
1136 log(LOG_ERR, "TWRCV: interrupt %2d: %d\t%d%%\n", i, sc->sc_rcv_time[i],
1137 (sc->sc_rcv_time[i] - sc->sc_rcv_time[(i?i-1:0)])*100/HALFCYCLE);
1142 * Initialize an array of 22 times, starting from the current
1143 * microtime and continuing for the next 21 half cycles.
1144 * We use the times as a reference to make sure transmission
1145 * or reception is on schedule.
1149 twsetuptimes(int *a)
1156 for(i = 0; i < 22; i++) {
1159 if(t >= 1000000) t -= 1000000;
1164 * Check the current time against a slot in a previously set up
1165 * timing array, and make sure that it looks like we are still
1170 twchecktime(int target, int tol)
1177 d = (target - t) >= 0 ? (target - t) : (t - target);
1178 if(d > 500000) d = 1000000-d;
1179 if(d <= tol && d >= -tol) {
1185 #endif /* HIRESTIME */