3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: src/sys/dev/ral/rt2661.c,v 1.4 2006/03/21 21:15:43 damien Exp $
18 * $DragonFly: src/sys/dev/netif/ral/rt2661.c,v 1.7 2006/11/18 09:41:29 sephe Exp $
22 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
23 * http://www.ralinktech.com/
26 #include <sys/param.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
33 #include <sys/socket.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
36 #include <sys/module.h>
37 #include <sys/serialize.h>
41 #include <net/if_arp.h>
42 #include <net/ethernet.h>
43 #include <net/if_dl.h>
44 #include <net/if_media.h>
45 #include <net/ifq_var.h>
47 #include <netproto/802_11/ieee80211_var.h>
48 #include <netproto/802_11/ieee80211_radiotap.h>
50 #include <dev/netif/ral/if_ralrate.h>
51 #include <dev/netif/ral/rt2661reg.h>
52 #include <dev/netif/ral/rt2661var.h>
53 #include <dev/netif/ral/rt2661_ucode.h>
56 #define DPRINTF(x) do { if (ral_debug > 0) printf x; } while (0)
57 #define DPRINTFN(n, x) do { if (ral_debug >= (n)) printf x; } while (0)
59 SYSCTL_INT(_debug, OID_AUTO, ral, CTLFLAG_RW, &ral_debug, 0, "ral debug level");
62 #define DPRINTFN(n, x)
65 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
67 static void rt2661_dma_map_mbuf(void *, bus_dma_segment_t *, int,
69 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
70 struct rt2661_tx_ring *, int);
71 static void rt2661_reset_tx_ring(struct rt2661_softc *,
72 struct rt2661_tx_ring *);
73 static void rt2661_free_tx_ring(struct rt2661_softc *,
74 struct rt2661_tx_ring *);
75 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
76 struct rt2661_rx_ring *, int);
77 static void rt2661_reset_rx_ring(struct rt2661_softc *,
78 struct rt2661_rx_ring *);
79 static void rt2661_free_rx_ring(struct rt2661_softc *,
80 struct rt2661_rx_ring *);
81 static struct ieee80211_node *rt2661_node_alloc(
82 struct ieee80211_node_table *);
83 static int rt2661_media_change(struct ifnet *);
84 static void rt2661_next_scan(void *);
85 static int rt2661_newstate(struct ieee80211com *,
86 enum ieee80211_state, int);
87 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
88 static void rt2661_rx_intr(struct rt2661_softc *);
89 static void rt2661_tx_intr(struct rt2661_softc *);
90 static void rt2661_tx_dma_intr(struct rt2661_softc *,
91 struct rt2661_tx_ring *);
92 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
93 static void rt2661_mcu_wakeup(struct rt2661_softc *);
94 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
95 static int rt2661_ack_rate(struct ieee80211com *, int);
96 static uint16_t rt2661_txtime(int, int, uint32_t);
97 static uint8_t rt2661_rxrate(struct rt2661_rx_desc *);
98 static uint8_t rt2661_plcp_signal(int);
99 static void rt2661_setup_tx_desc(struct rt2661_softc *,
100 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
101 int, const bus_dma_segment_t *, int, int);
102 static struct mbuf * rt2661_get_rts(struct rt2661_softc *,
103 struct ieee80211_frame *, uint16_t);
104 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
105 struct ieee80211_node *, int);
106 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
107 struct ieee80211_node *);
108 static void rt2661_start(struct ifnet *);
109 static void rt2661_watchdog(struct ifnet *);
110 static int rt2661_reset(struct ifnet *);
111 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t,
113 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
115 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
116 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
118 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
120 static void rt2661_select_antenna(struct rt2661_softc *);
121 static void rt2661_enable_mrr(struct rt2661_softc *);
122 static void rt2661_set_txpreamble(struct rt2661_softc *);
123 static void rt2661_set_basicrates(struct rt2661_softc *,
124 const struct ieee80211_rateset *);
125 static void rt2661_select_band(struct rt2661_softc *,
126 struct ieee80211_channel *);
127 static void rt2661_set_chan(struct rt2661_softc *,
128 struct ieee80211_channel *);
129 static void rt2661_set_bssid(struct rt2661_softc *,
131 static void rt2661_set_macaddr(struct rt2661_softc *,
133 static void rt2661_update_promisc(struct rt2661_softc *);
134 static int rt2661_wme_update(struct ieee80211com *) __unused;
135 static void rt2661_update_slot(struct ifnet *);
136 static const char *rt2661_get_rf(int);
137 static void rt2661_read_eeprom(struct rt2661_softc *);
138 static int rt2661_bbp_init(struct rt2661_softc *);
139 static void rt2661_init(void *);
140 static void rt2661_stop(void *);
141 static void rt2661_intr(void *);
142 static int rt2661_load_microcode(struct rt2661_softc *,
143 const uint8_t *, int);
145 static void rt2661_rx_tune(struct rt2661_softc *);
146 static void rt2661_radar_start(struct rt2661_softc *);
147 static int rt2661_radar_stop(struct rt2661_softc *);
149 static int rt2661_prepare_beacon(struct rt2661_softc *);
150 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
151 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
152 static void rt2661_led_newstate(struct rt2661_softc *,
153 enum ieee80211_state);
156 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
158 static const struct ieee80211_rateset rt2661_rateset_11a =
159 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
161 static const struct ieee80211_rateset rt2661_rateset_11b =
162 { 4, { 2, 4, 11, 22 } };
164 static const struct ieee80211_rateset rt2661_rateset_11g =
165 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
167 static const struct {
170 } rt2661_def_mac[] = {
174 static const struct {
177 } rt2661_def_bbp[] = {
181 static const struct rfprog {
183 uint32_t r1, r2, r3, r4;
184 } rt2661_rf5225_1[] = {
186 }, rt2661_rf5225_2[] = {
190 #define LED_EE2MCU(bit) { \
191 .ee_bit = RT2661_EE_LED_##bit, \
192 .mcu_bit = RT2661_MCU_LED_##bit \
194 static const struct {
209 struct rt2661_dmamap {
210 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
215 rt2661_attach(device_t dev, int id)
217 struct rt2661_softc *sc = device_get_softc(dev);
218 struct ieee80211com *ic = &sc->sc_ic;
219 struct ifnet *ifp = &ic->ic_if;
221 const uint8_t *ucode = NULL;
222 int error, i, ac, ntries, size = 0;
224 callout_init(&sc->scan_ch);
225 callout_init(&sc->rssadapt_ch);
228 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irq_rid,
229 RF_ACTIVE | RF_SHAREABLE);
230 if (sc->sc_irq == NULL) {
231 device_printf(dev, "could not allocate interrupt resource\n");
235 /* wait for NIC to initialize */
236 for (ntries = 0; ntries < 1000; ntries++) {
237 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
241 if (ntries == 1000) {
242 device_printf(sc->sc_dev,
243 "timeout waiting for NIC to initialize\n");
248 /* retrieve RF rev. no and various other things from EEPROM */
249 rt2661_read_eeprom(sc);
251 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
252 rt2661_get_rf(sc->rf_rev));
255 * Load 8051 microcode into NIC.
259 ucode = rt2561s_ucode;
260 size = sizeof rt2561s_ucode;
263 ucode = rt2561_ucode;
264 size = sizeof rt2561_ucode;
267 ucode = rt2661_ucode;
268 size = sizeof rt2661_ucode;
272 error = rt2661_load_microcode(sc, ucode, size);
274 device_printf(sc->sc_dev, "could not load 8051 microcode\n");
279 * Allocate Tx and Rx rings.
281 for (ac = 0; ac < 4; ac++) {
282 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
283 RT2661_TX_RING_COUNT);
285 device_printf(sc->sc_dev,
286 "could not allocate Tx ring %d\n", ac);
291 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
293 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
297 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
299 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
303 sysctl_ctx_init(&sc->sysctl_ctx);
304 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
305 SYSCTL_STATIC_CHILDREN(_hw),
307 device_get_nameunit(dev),
309 if (sc->sysctl_tree == NULL) {
310 device_printf(dev, "could not add sysctl node\n");
316 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
317 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
318 ifp->if_init = rt2661_init;
319 ifp->if_ioctl = rt2661_ioctl;
320 ifp->if_start = rt2661_start;
321 ifp->if_watchdog = rt2661_watchdog;
322 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
323 ifq_set_ready(&ifp->if_snd);
325 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
326 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
327 ic->ic_state = IEEE80211_S_INIT;
328 rt2661_led_newstate(sc, IEEE80211_S_INIT);
330 /* set device capabilities */
332 IEEE80211_C_IBSS | /* IBSS mode supported */
333 IEEE80211_C_MONITOR | /* monitor mode supported */
334 IEEE80211_C_HOSTAP | /* HostAp mode supported */
335 IEEE80211_C_TXPMGT | /* tx power management */
336 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
337 IEEE80211_C_SHSLOT | /* short slot time supported */
339 IEEE80211_C_WME | /* 802.11e */
341 IEEE80211_C_WEP | /* WEP */
342 IEEE80211_C_WPA; /* 802.11i */
344 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
345 /* set supported .11a rates */
346 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2661_rateset_11a;
348 /* set supported .11a channels */
349 for (i = 36; i <= 64; i += 4) {
350 ic->ic_channels[i].ic_freq =
351 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
352 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
354 for (i = 100; i <= 140; i += 4) {
355 ic->ic_channels[i].ic_freq =
356 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
357 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
359 for (i = 149; i <= 165; i += 4) {
360 ic->ic_channels[i].ic_freq =
361 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
362 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
366 /* set supported .11b and .11g rates */
367 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2661_rateset_11b;
368 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2661_rateset_11g;
370 /* set supported .11b and .11g channels (1 through 14) */
371 for (i = 1; i <= 14; i++) {
372 ic->ic_channels[i].ic_freq =
373 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
374 ic->ic_channels[i].ic_flags =
375 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
376 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
379 ieee80211_ifattach(ic);
380 ic->ic_node_alloc = rt2661_node_alloc;
381 /* ic->ic_wme.wme_update = rt2661_wme_update;*/
382 ic->ic_updateslot = rt2661_update_slot;
383 ic->ic_reset = rt2661_reset;
384 /* enable s/w bmiss handling in sta mode */
385 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
387 /* override state transition machine */
388 sc->sc_newstate = ic->ic_newstate;
389 ic->ic_newstate = rt2661_newstate;
390 ieee80211_media_init(ic, rt2661_media_change, ieee80211_media_status);
392 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
393 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
395 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
396 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
397 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
399 sc->sc_txtap_len = sizeof sc->sc_txtapu;
400 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
401 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
404 * Add a few sysctl knobs.
408 SYSCTL_ADD_INT(&sc->sysctl_ctx,
409 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "dwell",
410 CTLFLAG_RW, &sc->dwelltime, 0,
411 "channel dwell time (ms) for AP/station scanning");
413 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, rt2661_intr,
414 sc, &sc->sc_ih, ifp->if_serializer);
416 device_printf(dev, "could not set up interrupt\n");
418 ieee80211_ifdetach(ic);
423 ieee80211_announce(ic);
431 rt2661_detach(void *xsc)
433 struct rt2661_softc *sc = xsc;
434 struct ieee80211com *ic = &sc->sc_ic;
435 struct ifnet *ifp = &ic->ic_if;
437 if (device_is_attached(sc->sc_dev)) {
438 lwkt_serialize_enter(ifp->if_serializer);
440 callout_stop(&sc->scan_ch);
441 callout_stop(&sc->rssadapt_ch);
443 bus_teardown_intr(sc->sc_dev, sc->sc_irq, sc->sc_ih);
445 lwkt_serialize_exit(ifp->if_serializer);
448 ieee80211_ifdetach(ic);
451 rt2661_free_tx_ring(sc, &sc->txq[0]);
452 rt2661_free_tx_ring(sc, &sc->txq[1]);
453 rt2661_free_tx_ring(sc, &sc->txq[2]);
454 rt2661_free_tx_ring(sc, &sc->txq[3]);
455 rt2661_free_tx_ring(sc, &sc->mgtq);
456 rt2661_free_rx_ring(sc, &sc->rxq);
458 if (sc->sc_irq != NULL) {
459 bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->sc_irq_rid,
463 if (sc->sysctl_tree != NULL)
464 sysctl_ctx_free(&sc->sysctl_ctx);
470 rt2661_shutdown(void *xsc)
472 struct rt2661_softc *sc = xsc;
473 struct ifnet *ifp = &sc->sc_ic.ic_if;
475 lwkt_serialize_enter(ifp->if_serializer);
477 lwkt_serialize_exit(ifp->if_serializer);
481 rt2661_suspend(void *xsc)
483 struct rt2661_softc *sc = xsc;
484 struct ifnet *ifp = &sc->sc_ic.ic_if;
486 lwkt_serialize_enter(ifp->if_serializer);
488 lwkt_serialize_exit(ifp->if_serializer);
492 rt2661_resume(void *xsc)
494 struct rt2661_softc *sc = xsc;
495 struct ifnet *ifp = sc->sc_ic.ic_ifp;
497 lwkt_serialize_enter(ifp->if_serializer);
498 if (ifp->if_flags & IFF_UP) {
499 ifp->if_init(ifp->if_softc);
500 if (ifp->if_flags & IFF_RUNNING)
503 lwkt_serialize_exit(ifp->if_serializer);
507 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
512 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
514 *(bus_addr_t *)arg = segs[0].ds_addr;
518 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
525 ring->cur = ring->next = ring->stat = 0;
527 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
528 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_TX_DESC_SIZE, 1,
529 count * RT2661_TX_DESC_SIZE, 0, &ring->desc_dmat);
531 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
535 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
536 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
538 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
542 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
543 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
546 device_printf(sc->sc_dev, "could not load desc DMA map\n");
548 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
553 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
556 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
557 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * RT2661_MAX_SCATTER,
558 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
560 device_printf(sc->sc_dev, "could not create data DMA tag\n");
564 for (i = 0; i < count; i++) {
565 error = bus_dmamap_create(ring->data_dmat, 0,
568 device_printf(sc->sc_dev, "could not create DMA map\n");
574 fail: rt2661_free_tx_ring(sc, ring);
579 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
581 struct rt2661_tx_desc *desc;
582 struct rt2661_tx_data *data;
585 for (i = 0; i < ring->count; i++) {
586 desc = &ring->desc[i];
587 data = &ring->data[i];
589 if (data->m != NULL) {
590 bus_dmamap_sync(ring->data_dmat, data->map,
591 BUS_DMASYNC_POSTWRITE);
592 bus_dmamap_unload(ring->data_dmat, data->map);
597 if (data->ni != NULL) {
598 ieee80211_free_node(data->ni);
605 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
608 ring->cur = ring->next = ring->stat = 0;
612 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
614 struct rt2661_tx_data *data;
617 if (ring->desc != NULL) {
618 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
619 BUS_DMASYNC_POSTWRITE);
620 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
621 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
625 if (ring->desc_dmat != NULL) {
626 bus_dma_tag_destroy(ring->desc_dmat);
627 ring->desc_dmat = NULL;
630 if (ring->data != NULL) {
631 for (i = 0; i < ring->count; i++) {
632 data = &ring->data[i];
634 if (data->m != NULL) {
635 bus_dmamap_sync(ring->data_dmat, data->map,
636 BUS_DMASYNC_POSTWRITE);
637 bus_dmamap_unload(ring->data_dmat, data->map);
642 if (data->ni != NULL) {
643 ieee80211_free_node(data->ni);
647 if (data->map != NULL) {
648 bus_dmamap_destroy(ring->data_dmat, data->map);
653 kfree(ring->data, M_DEVBUF);
657 if (ring->data_dmat != NULL) {
658 bus_dma_tag_destroy(ring->data_dmat);
659 ring->data_dmat = NULL;
664 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
667 struct rt2661_rx_desc *desc;
668 struct rt2661_rx_data *data;
673 ring->cur = ring->next = 0;
675 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
676 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_RX_DESC_SIZE, 1,
677 count * RT2661_RX_DESC_SIZE, 0, &ring->desc_dmat);
679 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
683 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
684 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
686 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
690 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
691 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
694 device_printf(sc->sc_dev, "could not load desc DMA map\n");
696 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
701 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
705 * Pre-allocate Rx buffers and populate Rx ring.
707 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
708 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
711 device_printf(sc->sc_dev, "could not create data DMA tag\n");
715 for (i = 0; i < count; i++) {
716 desc = &sc->rxq.desc[i];
717 data = &sc->rxq.data[i];
719 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
721 device_printf(sc->sc_dev, "could not create DMA map\n");
725 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
726 if (data->m == NULL) {
727 device_printf(sc->sc_dev,
728 "could not allocate rx mbuf\n");
733 error = bus_dmamap_load(ring->data_dmat, data->map,
734 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
737 device_printf(sc->sc_dev,
738 "could not load rx buf DMA map");
745 desc->flags = htole32(RT2661_RX_BUSY);
746 desc->physaddr = htole32(physaddr);
749 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
753 fail: rt2661_free_rx_ring(sc, ring);
758 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
762 for (i = 0; i < ring->count; i++)
763 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
765 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
767 ring->cur = ring->next = 0;
771 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
773 struct rt2661_rx_data *data;
776 if (ring->desc != NULL) {
777 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
778 BUS_DMASYNC_POSTWRITE);
779 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
780 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
784 if (ring->desc_dmat != NULL) {
785 bus_dma_tag_destroy(ring->desc_dmat);
786 ring->desc_dmat = NULL;
789 if (ring->data != NULL) {
790 for (i = 0; i < ring->count; i++) {
791 data = &ring->data[i];
793 if (data->m != NULL) {
794 bus_dmamap_sync(ring->data_dmat, data->map,
795 BUS_DMASYNC_POSTREAD);
796 bus_dmamap_unload(ring->data_dmat, data->map);
801 if (data->map != NULL) {
802 bus_dmamap_destroy(ring->data_dmat, data->map);
807 kfree(ring->data, M_DEVBUF);
811 if (ring->data_dmat != NULL) {
812 bus_dma_tag_destroy(ring->data_dmat);
813 ring->data_dmat = NULL;
817 static struct ieee80211_node *
818 rt2661_node_alloc(struct ieee80211_node_table *nt)
820 struct rt2661_node *rn;
822 rn = kmalloc(sizeof (struct rt2661_node), M_80211_NODE,
825 return (rn != NULL) ? &rn->ni : NULL;
829 rt2661_media_change(struct ifnet *ifp)
831 struct rt2661_softc *sc = ifp->if_softc;
834 error = ieee80211_media_change(ifp);
835 if (error != ENETRESET)
838 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
844 * This function is called periodically (every 200ms) during scanning to
845 * switch from one channel to another.
848 rt2661_next_scan(void *arg)
850 struct rt2661_softc *sc = arg;
851 struct ieee80211com *ic = &sc->sc_ic;
852 struct ifnet *ifp = &ic->ic_if;
854 lwkt_serialize_enter(ifp->if_serializer);
855 if (ic->ic_state == IEEE80211_S_SCAN)
856 ieee80211_next_scan(ic);
857 lwkt_serialize_exit(ifp->if_serializer);
861 * This function is called for each node present in the node station table.
864 rt2661_iter_func(void *arg, struct ieee80211_node *ni)
866 struct rt2661_node *rn = (struct rt2661_node *)ni;
868 ral_rssadapt_updatestats(&rn->rssadapt);
872 * This function is called periodically (every 100ms) in RUN state to update
873 * the rate adaptation statistics.
876 rt2661_update_rssadapt(void *arg)
878 struct rt2661_softc *sc = arg;
879 struct ieee80211com *ic = &sc->sc_ic;
880 struct ifnet *ifp = &ic->ic_if;
882 lwkt_serialize_enter(ifp->if_serializer);
884 ieee80211_iterate_nodes(&ic->ic_sta, rt2661_iter_func, arg);
885 callout_reset(&sc->rssadapt_ch, hz / 10, rt2661_update_rssadapt, sc);
887 lwkt_serialize_exit(ifp->if_serializer);
891 rt2661_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
893 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
894 enum ieee80211_state ostate;
895 struct ieee80211_node *ni;
899 ostate = ic->ic_state;
900 callout_stop(&sc->scan_ch);
902 if (ostate != nstate)
903 rt2661_led_newstate(sc, nstate);
906 case IEEE80211_S_INIT:
907 callout_stop(&sc->rssadapt_ch);
909 if (ostate == IEEE80211_S_RUN) {
910 /* abort TSF synchronization */
911 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
912 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
916 case IEEE80211_S_SCAN:
917 rt2661_set_chan(sc, ic->ic_curchan);
918 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
919 rt2661_next_scan, sc);
922 case IEEE80211_S_AUTH:
923 case IEEE80211_S_ASSOC:
924 rt2661_set_chan(sc, ic->ic_curchan);
927 case IEEE80211_S_RUN:
928 rt2661_set_chan(sc, ic->ic_curchan);
932 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
933 rt2661_enable_mrr(sc);
934 rt2661_set_txpreamble(sc);
935 rt2661_set_basicrates(sc, &ni->ni_rates);
936 rt2661_set_bssid(sc, ni->ni_bssid);
939 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
940 ic->ic_opmode == IEEE80211_M_IBSS) {
941 if ((error = rt2661_prepare_beacon(sc)) != 0)
945 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
946 callout_reset(&sc->rssadapt_ch, hz / 10,
947 rt2661_update_rssadapt, sc);
948 rt2661_enable_tsf_sync(sc);
953 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
957 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
961 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
967 /* clock C once before the first command */
968 RT2661_EEPROM_CTL(sc, 0);
970 RT2661_EEPROM_CTL(sc, RT2661_S);
971 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
972 RT2661_EEPROM_CTL(sc, RT2661_S);
974 /* write start bit (1) */
975 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
976 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
978 /* write READ opcode (10) */
979 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
980 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
981 RT2661_EEPROM_CTL(sc, RT2661_S);
982 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
984 /* write address (A5-A0 or A7-A0) */
985 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
986 for (; n >= 0; n--) {
987 RT2661_EEPROM_CTL(sc, RT2661_S |
988 (((addr >> n) & 1) << RT2661_SHIFT_D));
989 RT2661_EEPROM_CTL(sc, RT2661_S |
990 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
993 RT2661_EEPROM_CTL(sc, RT2661_S);
995 /* read data Q15-Q0 */
997 for (n = 15; n >= 0; n--) {
998 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
999 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
1000 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
1001 RT2661_EEPROM_CTL(sc, RT2661_S);
1004 RT2661_EEPROM_CTL(sc, 0);
1006 /* clear Chip Select and clock C */
1007 RT2661_EEPROM_CTL(sc, RT2661_S);
1008 RT2661_EEPROM_CTL(sc, 0);
1009 RT2661_EEPROM_CTL(sc, RT2661_C);
1015 rt2661_tx_intr(struct rt2661_softc *sc)
1017 struct ieee80211com *ic = &sc->sc_ic;
1018 struct ifnet *ifp = ic->ic_ifp;
1019 struct rt2661_tx_ring *txq;
1020 struct rt2661_tx_data *data;
1021 struct rt2661_node *rn;
1026 val = RAL_READ(sc, RT2661_STA_CSR4);
1027 if (!(val & RT2661_TX_STAT_VALID))
1030 /* retrieve the queue in which this frame was sent */
1031 qid = RT2661_TX_QID(val);
1032 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
1034 /* retrieve rate control algorithm context */
1035 data = &txq->data[txq->stat];
1036 rn = (struct rt2661_node *)data->ni;
1038 switch (RT2661_TX_RESULT(val)) {
1039 case RT2661_TX_SUCCESS:
1040 retrycnt = RT2661_TX_RETRYCNT(val);
1042 DPRINTFN(10, ("data frame sent successfully after "
1043 "%d retries\n", retrycnt));
1044 if (retrycnt == 0 && data->id.id_node != NULL) {
1045 ral_rssadapt_raise_rate(ic, &rn->rssadapt,
1051 case RT2661_TX_RETRY_FAIL:
1052 DPRINTFN(9, ("sending data frame failed (too much "
1054 if (data->id.id_node != NULL) {
1055 ral_rssadapt_lower_rate(ic, data->ni,
1056 &rn->rssadapt, &data->id);
1063 device_printf(sc->sc_dev,
1064 "sending data frame failed 0x%08x\n", val);
1068 ieee80211_free_node(data->ni);
1071 DPRINTFN(15, ("tx done q=%d idx=%u\n", qid, txq->stat));
1074 if (++txq->stat >= txq->count) /* faster than % count */
1078 sc->sc_tx_timer = 0;
1079 ifp->if_flags &= ~IFF_OACTIVE;
1084 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
1086 struct rt2661_tx_desc *desc;
1087 struct rt2661_tx_data *data;
1089 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
1092 desc = &txq->desc[txq->next];
1093 data = &txq->data[txq->next];
1095 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
1096 !(le32toh(desc->flags) & RT2661_TX_VALID))
1099 bus_dmamap_sync(txq->data_dmat, data->map,
1100 BUS_DMASYNC_POSTWRITE);
1101 bus_dmamap_unload(txq->data_dmat, data->map);
1104 /* node reference is released in rt2661_tx_intr() */
1106 /* descriptor is no longer valid */
1107 desc->flags &= ~htole32(RT2661_TX_VALID);
1109 DPRINTFN(15, ("tx dma done q=%p idx=%u\n", txq, txq->next));
1111 if (++txq->next >= txq->count) /* faster than % count */
1115 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1119 rt2661_rx_intr(struct rt2661_softc *sc)
1121 struct ieee80211com *ic = &sc->sc_ic;
1122 struct ifnet *ifp = ic->ic_ifp;
1123 struct rt2661_rx_desc *desc;
1124 struct rt2661_rx_data *data;
1125 bus_addr_t physaddr;
1126 struct ieee80211_frame *wh;
1127 struct ieee80211_node *ni;
1128 struct rt2661_node *rn;
1129 struct mbuf *mnew, *m;
1132 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1133 BUS_DMASYNC_POSTREAD);
1136 desc = &sc->rxq.desc[sc->rxq.cur];
1137 data = &sc->rxq.data[sc->rxq.cur];
1139 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1142 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1143 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1145 * This should not happen since we did not request
1146 * to receive those frames when we filled TXRX_CSR0.
1148 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1149 le32toh(desc->flags)));
1154 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1160 * Try to allocate a new mbuf for this ring element and load it
1161 * before processing the current mbuf. If the ring element
1162 * cannot be loaded, drop the received packet and reuse the old
1163 * mbuf. In the unlikely case that the old mbuf can't be
1164 * reloaded either, explicitly panic.
1166 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1172 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1173 BUS_DMASYNC_POSTREAD);
1174 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1176 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1177 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1182 /* try to reload the old mbuf */
1183 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1184 mtod(data->m, void *), MCLBYTES,
1185 rt2661_dma_map_addr, &physaddr, 0);
1187 /* very unlikely that it will fail... */
1188 panic("%s: could not load old rx mbuf",
1189 device_get_name(sc->sc_dev));
1196 * New mbuf successfully loaded, update Rx ring and continue
1201 desc->physaddr = htole32(physaddr);
1204 m->m_pkthdr.rcvif = ifp;
1205 m->m_pkthdr.len = m->m_len =
1206 (le32toh(desc->flags) >> 16) & 0xfff;
1208 if (sc->sc_drvbpf != NULL) {
1209 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1210 uint32_t tsf_lo, tsf_hi;
1212 /* get timestamp (low and high 32 bits) */
1213 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1214 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1217 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1219 tap->wr_rate = rt2661_rxrate(desc);
1220 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1221 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1222 tap->wr_antsignal = desc->rssi;
1224 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1227 wh = mtod(m, struct ieee80211_frame *);
1228 ni = ieee80211_find_rxnode(ic,
1229 (struct ieee80211_frame_min *)wh);
1231 /* send the frame to the 802.11 layer */
1232 ieee80211_input(ic, m, ni, desc->rssi, 0);
1234 /* give rssi to the rate adatation algorithm */
1235 rn = (struct rt2661_node *)ni;
1236 ral_rssadapt_input(ic, ni, &rn->rssadapt,
1237 rt2661_get_rssi(sc, desc->rssi));
1239 /* node is no longer needed */
1240 ieee80211_free_node(ni);
1242 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1244 DPRINTFN(15, ("rx intr idx=%u\n", sc->rxq.cur));
1246 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1249 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1250 BUS_DMASYNC_PREWRITE);
1255 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1261 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1263 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1265 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1266 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1267 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1269 /* send wakeup command to MCU */
1270 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1274 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1276 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1277 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1281 rt2661_intr(void *arg)
1283 struct rt2661_softc *sc = arg;
1284 struct ifnet *ifp = &sc->sc_ic.ic_if;
1287 /* disable MAC and MCU interrupts */
1288 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1289 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1291 /* don't re-enable interrupts if we're shutting down */
1292 if (!(ifp->if_flags & IFF_RUNNING))
1295 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1296 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1298 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1299 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1301 if (r1 & RT2661_MGT_DONE)
1302 rt2661_tx_dma_intr(sc, &sc->mgtq);
1304 if (r1 & RT2661_RX_DONE)
1307 if (r1 & RT2661_TX0_DMA_DONE)
1308 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1310 if (r1 & RT2661_TX1_DMA_DONE)
1311 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1313 if (r1 & RT2661_TX2_DMA_DONE)
1314 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1316 if (r1 & RT2661_TX3_DMA_DONE)
1317 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1319 if (r1 & RT2661_TX_DONE)
1322 if (r2 & RT2661_MCU_CMD_DONE)
1323 rt2661_mcu_cmd_intr(sc);
1325 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1326 rt2661_mcu_beacon_expire(sc);
1328 if (r2 & RT2661_MCU_WAKEUP)
1329 rt2661_mcu_wakeup(sc);
1331 /* re-enable MAC and MCU interrupts */
1332 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1333 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1336 /* quickly determine if a given rate is CCK or OFDM */
1337 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1339 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
1340 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
1342 #define RAL_SIFS 10 /* us */
1345 * This function is only used by the Rx radiotap code. It returns the rate at
1346 * which a given frame was received.
1349 rt2661_rxrate(struct rt2661_rx_desc *desc)
1351 if (le32toh(desc->flags) & RT2661_RX_OFDM) {
1352 /* reverse function of rt2661_plcp_signal */
1353 switch (desc->rate & 0xf) {
1354 case 0xb: return 12;
1355 case 0xf: return 18;
1356 case 0xa: return 24;
1357 case 0xe: return 36;
1358 case 0x9: return 48;
1359 case 0xd: return 72;
1360 case 0x8: return 96;
1361 case 0xc: return 108;
1364 if (desc->rate == 10)
1366 if (desc->rate == 20)
1368 if (desc->rate == 55)
1370 if (desc->rate == 110)
1373 return 2; /* should not get there */
1377 * Return the expected ack rate for a frame transmitted at rate `rate'.
1378 * XXX: this should depend on the destination node basic rate set.
1381 rt2661_ack_rate(struct ieee80211com *ic, int rate)
1390 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1406 /* default to 1Mbps */
1411 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1412 * The function automatically determines the operating mode depending on the
1413 * given rate. `flags' indicates whether short preamble is in use or not.
1416 rt2661_txtime(int len, int rate, uint32_t flags)
1420 if (RAL_RATE_IS_OFDM(rate)) {
1421 /* IEEE Std 802.11a-1999, pp. 37 */
1422 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1423 txtime = 16 + 4 + 4 * txtime + 6;
1425 /* IEEE Std 802.11b-1999, pp. 28 */
1426 txtime = (16 * len + rate - 1) / rate;
1427 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1437 rt2661_plcp_signal(int rate)
1440 /* CCK rates (returned values are device-dependent) */
1443 case 11: return 0x2;
1444 case 22: return 0x3;
1446 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1447 case 12: return 0xb;
1448 case 18: return 0xf;
1449 case 24: return 0xa;
1450 case 36: return 0xe;
1451 case 48: return 0x9;
1452 case 72: return 0xd;
1453 case 96: return 0x8;
1454 case 108: return 0xc;
1456 /* unsupported rates (should not get there) */
1457 default: return 0xff;
1462 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1463 uint32_t flags, uint16_t xflags, int len, int rate,
1464 const bus_dma_segment_t *segs, int nsegs, int ac)
1466 struct ieee80211com *ic = &sc->sc_ic;
1467 uint16_t plcp_length;
1470 desc->flags = htole32(flags);
1471 desc->flags |= htole32(len << 16);
1472 desc->flags |= htole32(RT2661_TX_VALID);
1474 desc->xflags = htole16(xflags);
1475 desc->xflags |= htole16(nsegs << 13);
1477 desc->wme = htole16(
1480 RT2661_LOGCWMIN(4) |
1481 RT2661_LOGCWMAX(10));
1484 * Remember in which queue this frame was sent. This field is driver
1485 * private data only. It will be made available by the NIC in STA_CSR4
1490 /* setup PLCP fields */
1491 desc->plcp_signal = rt2661_plcp_signal(rate);
1492 desc->plcp_service = 4;
1494 len += IEEE80211_CRC_LEN;
1495 if (RAL_RATE_IS_OFDM(rate)) {
1496 desc->flags |= htole32(RT2661_TX_OFDM);
1498 plcp_length = len & 0xfff;
1499 desc->plcp_length_hi = plcp_length >> 6;
1500 desc->plcp_length_lo = plcp_length & 0x3f;
1502 plcp_length = (16 * len + rate - 1) / rate;
1504 remainder = (16 * len) % 22;
1505 if (remainder != 0 && remainder < 7)
1506 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1508 desc->plcp_length_hi = plcp_length >> 8;
1509 desc->plcp_length_lo = plcp_length & 0xff;
1511 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1512 desc->plcp_signal |= 0x08;
1515 /* RT2x61 supports scatter with up to 5 segments */
1516 for (i = 0; i < nsegs; i++) {
1517 desc->addr[i] = htole32(segs[i].ds_addr);
1518 desc->len [i] = htole16(segs[i].ds_len);
1521 desc->flags |= htole32(RT2661_TX_BUSY);
1525 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1526 struct ieee80211_node *ni)
1528 struct ieee80211com *ic = &sc->sc_ic;
1529 struct rt2661_tx_desc *desc;
1530 struct rt2661_tx_data *data;
1531 struct ieee80211_frame *wh;
1532 struct rt2661_dmamap map;
1534 uint32_t flags = 0; /* XXX HWSEQ */
1537 desc = &sc->mgtq.desc[sc->mgtq.cur];
1538 data = &sc->mgtq.data[sc->mgtq.cur];
1540 /* send mgt frames at the lowest available rate */
1541 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1543 error = bus_dmamap_load_mbuf(sc->mgtq.data_dmat, data->map, m0,
1544 rt2661_dma_map_mbuf, &map, 0);
1546 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1552 if (sc->sc_drvbpf != NULL) {
1553 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1556 tap->wt_rate = rate;
1557 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1558 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1560 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1566 wh = mtod(m0, struct ieee80211_frame *);
1568 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1569 flags |= RT2661_TX_NEED_ACK;
1571 dur = rt2661_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1573 *(uint16_t *)wh->i_dur = htole16(dur);
1575 /* tell hardware to add timestamp in probe responses */
1577 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1578 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1579 flags |= RT2661_TX_TIMESTAMP;
1582 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1583 m0->m_pkthdr.len, rate, map.segs, map.nseg, RT2661_QID_MGT);
1585 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1586 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1587 BUS_DMASYNC_PREWRITE);
1589 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1590 m0->m_pkthdr.len, sc->mgtq.cur, rate));
1594 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1595 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1601 * Build a RTS control frame.
1603 static struct mbuf *
1604 rt2661_get_rts(struct rt2661_softc *sc, struct ieee80211_frame *wh,
1607 struct ieee80211_frame_rts *rts;
1610 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1612 sc->sc_ic.ic_stats.is_tx_nobuf++;
1613 device_printf(sc->sc_dev, "could not allocate RTS frame\n");
1617 rts = mtod(m, struct ieee80211_frame_rts *);
1619 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1620 IEEE80211_FC0_SUBTYPE_RTS;
1621 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1622 *(uint16_t *)rts->i_dur = htole16(dur);
1623 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1624 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1626 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1632 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1633 struct ieee80211_node *ni, int ac)
1635 struct ieee80211com *ic = &sc->sc_ic;
1636 struct rt2661_tx_ring *txq = &sc->txq[ac];
1637 struct rt2661_tx_desc *desc;
1638 struct rt2661_tx_data *data;
1639 struct rt2661_node *rn;
1640 struct ieee80211_rateset *rs;
1641 struct ieee80211_frame *wh;
1642 struct ieee80211_key *k;
1643 const struct chanAccParams *cap;
1645 struct rt2661_dmamap map;
1648 int error, rate, noack = 0;
1650 wh = mtod(m0, struct ieee80211_frame *);
1652 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1653 rs = &ic->ic_sup_rates[ic->ic_curmode];
1654 rate = rs->rs_rates[ic->ic_fixed_rate];
1657 rn = (struct rt2661_node *)ni;
1658 ni->ni_txrate = ral_rssadapt_choose(&rn->rssadapt, rs,
1659 wh, m0->m_pkthdr.len, NULL, 0);
1660 rate = rs->rs_rates[ni->ni_txrate];
1662 rate &= IEEE80211_RATE_VAL;
1664 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1665 cap = &ic->ic_wme.wme_chanParams;
1666 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1669 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1670 k = ieee80211_crypto_encap(ic, ni, m0);
1676 /* packet header may have moved, reset our local pointer */
1677 wh = mtod(m0, struct ieee80211_frame *);
1681 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1682 * for directed frames only when the length of the MPDU is greater
1683 * than the length threshold indicated by [...]" ic_rtsthreshold.
1685 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1686 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1689 int rtsrate, ackrate;
1691 rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1692 ackrate = rt2661_ack_rate(ic, rate);
1694 dur = rt2661_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
1695 rt2661_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
1696 /* XXX: noack (QoS)? */
1697 rt2661_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1700 m = rt2661_get_rts(sc, wh, dur);
1702 desc = &txq->desc[txq->cur];
1703 data = &txq->data[txq->cur];
1705 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m,
1706 rt2661_dma_map_mbuf, &map, 0);
1708 device_printf(sc->sc_dev,
1709 "could not map mbuf (error %d)\n", error);
1715 /* avoid multiple free() of the same node for each fragment */
1716 ieee80211_ref_node(ni);
1721 /* RTS frames are not taken into account for rssadapt */
1722 data->id.id_node = NULL;
1724 rt2661_setup_tx_desc(sc, desc, RT2661_TX_NEED_ACK |
1725 RT2661_TX_MORE_FRAG, 0, m->m_pkthdr.len,
1726 rtsrate, map.segs, map.nseg, ac);
1728 bus_dmamap_sync(txq->data_dmat, data->map,
1729 BUS_DMASYNC_PREWRITE);
1732 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1735 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1736 * asynchronous data frame shall be transmitted after the CTS
1737 * frame and a SIFS period.
1739 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1742 data = &txq->data[txq->cur];
1743 desc = &txq->desc[txq->cur];
1745 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1746 rt2661_dma_map_mbuf, &map, 0);
1747 if (error != 0 && error != EFBIG) {
1748 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1754 mnew = m_defrag(m0, MB_DONTWAIT);
1756 device_printf(sc->sc_dev,
1757 "could not defragment mbuf\n");
1763 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1764 rt2661_dma_map_mbuf, &map, 0);
1766 device_printf(sc->sc_dev,
1767 "could not map mbuf (error %d)\n", error);
1772 /* packet header have moved, reset our local pointer */
1773 wh = mtod(m0, struct ieee80211_frame *);
1776 if (sc->sc_drvbpf != NULL) {
1777 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1780 tap->wt_rate = rate;
1781 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1782 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1784 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1790 /* remember link conditions for rate adaptation algorithm */
1791 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
1792 data->id.id_len = m0->m_pkthdr.len;
1793 data->id.id_rateidx = ni->ni_txrate;
1794 data->id.id_node = ni;
1795 data->id.id_rssi = ni->ni_rssi;
1797 data->id.id_node = NULL;
1799 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1800 flags |= RT2661_TX_NEED_ACK;
1802 dur = rt2661_txtime(RAL_ACK_SIZE, rt2661_ack_rate(ic, rate),
1803 ic->ic_flags) + RAL_SIFS;
1804 *(uint16_t *)wh->i_dur = htole16(dur);
1807 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate,
1808 map.segs, map.nseg, ac);
1810 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1811 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1813 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
1814 m0->m_pkthdr.len, txq->cur, rate));
1818 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1819 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1825 rt2661_start(struct ifnet *ifp)
1827 struct rt2661_softc *sc = ifp->if_softc;
1828 struct ieee80211com *ic = &sc->sc_ic;
1830 struct ether_header *eh;
1831 struct ieee80211_node *ni;
1834 /* prevent management frames from being sent if we're not ready */
1835 if (!(ifp->if_flags & IFF_RUNNING))
1839 IF_POLL(&ic->ic_mgtq, m0);
1841 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1842 ifp->if_flags |= IFF_OACTIVE;
1845 IF_DEQUEUE(&ic->ic_mgtq, m0);
1847 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1848 m0->m_pkthdr.rcvif = NULL;
1850 if (ic->ic_rawbpf != NULL)
1851 bpf_mtap(ic->ic_rawbpf, m0);
1853 if (rt2661_tx_mgt(sc, m0, ni) != 0)
1857 if (ic->ic_state != IEEE80211_S_RUN)
1860 m0 = ifq_dequeue(&ifp->if_snd, NULL);
1864 if (m0->m_len < sizeof (struct ether_header) &&
1865 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1868 eh = mtod(m0, struct ether_header *);
1869 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1876 /* classify mbuf so we can find which tx ring to use */
1877 if (ieee80211_classify(ic, m0, ni) != 0) {
1879 ieee80211_free_node(ni);
1884 /* no QoS encapsulation for EAPOL frames */
1885 ac = (eh->ether_type != htons(ETHERTYPE_PAE)) ?
1886 M_WME_GETAC(m0) : WME_AC_BE;
1888 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1889 /* there is no place left in this ring */
1890 ifp->if_flags |= IFF_OACTIVE;
1892 ieee80211_free_node(ni);
1898 m0 = ieee80211_encap(ic, m0, ni);
1900 ieee80211_free_node(ni);
1905 if (ic->ic_rawbpf != NULL)
1906 bpf_mtap(ic->ic_rawbpf, m0);
1908 if (rt2661_tx_data(sc, m0, ni, ac) != 0) {
1909 ieee80211_free_node(ni);
1915 sc->sc_tx_timer = 5;
1921 rt2661_watchdog(struct ifnet *ifp)
1923 struct rt2661_softc *sc = ifp->if_softc;
1924 struct ieee80211com *ic = &sc->sc_ic;
1928 if (sc->sc_tx_timer > 0) {
1929 if (--sc->sc_tx_timer == 0) {
1930 device_printf(sc->sc_dev, "device timeout\n");
1938 ieee80211_watchdog(ic);
1942 * This function allows for fast channel switching in monitor mode (used by
1943 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1944 * generate a new beacon frame.
1947 rt2661_reset(struct ifnet *ifp)
1949 struct rt2661_softc *sc = ifp->if_softc;
1950 struct ieee80211com *ic = &sc->sc_ic;
1952 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1955 rt2661_set_chan(sc, ic->ic_curchan);
1961 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1963 struct rt2661_softc *sc = ifp->if_softc;
1964 struct ieee80211com *ic = &sc->sc_ic;
1969 if (ifp->if_flags & IFF_UP) {
1970 if (ifp->if_flags & IFF_RUNNING)
1971 rt2661_update_promisc(sc);
1975 if (ifp->if_flags & IFF_RUNNING)
1981 error = ieee80211_ioctl(ic, cmd, data, cr);
1984 if (error == ENETRESET) {
1985 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1986 (IFF_UP | IFF_RUNNING) &&
1987 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
1995 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
2000 for (ntries = 0; ntries < 100; ntries++) {
2001 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
2005 if (ntries == 100) {
2006 device_printf(sc->sc_dev, "could not write to BBP\n");
2010 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
2011 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
2013 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2017 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
2022 for (ntries = 0; ntries < 100; ntries++) {
2023 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
2027 if (ntries == 100) {
2028 device_printf(sc->sc_dev, "could not read from BBP\n");
2032 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
2033 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
2035 for (ntries = 0; ntries < 100; ntries++) {
2036 val = RAL_READ(sc, RT2661_PHY_CSR3);
2037 if (!(val & RT2661_BBP_BUSY))
2042 device_printf(sc->sc_dev, "could not read from BBP\n");
2047 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
2052 for (ntries = 0; ntries < 100; ntries++) {
2053 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
2057 if (ntries == 100) {
2058 device_printf(sc->sc_dev, "could not write to RF\n");
2062 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
2064 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
2066 /* remember last written value in sc */
2067 sc->rf_regs[reg] = val;
2069 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff));
2073 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
2075 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
2076 return EIO; /* there is already a command pending */
2078 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
2079 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
2081 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
2087 rt2661_select_antenna(struct rt2661_softc *sc)
2089 uint8_t bbp4, bbp77;
2092 bbp4 = rt2661_bbp_read(sc, 4);
2093 bbp77 = rt2661_bbp_read(sc, 77);
2097 /* make sure Rx is disabled before switching antenna */
2098 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2099 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2101 rt2661_bbp_write(sc, 4, bbp4);
2102 rt2661_bbp_write(sc, 77, bbp77);
2104 /* restore Rx filter */
2105 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2109 * Enable multi-rate retries for frames sent at OFDM rates.
2110 * In 802.11b/g mode, allow fallback to CCK rates.
2113 rt2661_enable_mrr(struct rt2661_softc *sc)
2115 struct ieee80211com *ic = &sc->sc_ic;
2118 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2120 tmp &= ~RT2661_MRR_CCK_FALLBACK;
2121 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan))
2122 tmp |= RT2661_MRR_CCK_FALLBACK;
2123 tmp |= RT2661_MRR_ENABLED;
2125 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2129 rt2661_set_txpreamble(struct rt2661_softc *sc)
2133 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2135 tmp &= ~RT2661_SHORT_PREAMBLE;
2136 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
2137 tmp |= RT2661_SHORT_PREAMBLE;
2139 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2143 rt2661_set_basicrates(struct rt2661_softc *sc,
2144 const struct ieee80211_rateset *rs)
2146 #define RV(r) ((r) & IEEE80211_RATE_VAL)
2151 for (i = 0; i < rs->rs_nrates; i++) {
2152 rate = rs->rs_rates[i];
2154 if (!(rate & IEEE80211_RATE_BASIC))
2158 * Find h/w rate index. We know it exists because the rate
2159 * set has already been negotiated.
2161 for (j = 0; rt2661_rateset_11g.rs_rates[j] != RV(rate); j++);
2166 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
2168 DPRINTF(("Setting basic rate mask to 0x%x\n", mask));
2173 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
2177 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
2179 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
2182 /* update all BBP registers that depend on the band */
2183 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
2184 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
2185 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2186 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
2187 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
2189 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2190 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2191 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
2194 rt2661_bbp_write(sc, 17, bbp17);
2195 rt2661_bbp_write(sc, 96, bbp96);
2196 rt2661_bbp_write(sc, 104, bbp104);
2198 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2199 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2200 rt2661_bbp_write(sc, 75, 0x80);
2201 rt2661_bbp_write(sc, 86, 0x80);
2202 rt2661_bbp_write(sc, 88, 0x80);
2205 rt2661_bbp_write(sc, 35, bbp35);
2206 rt2661_bbp_write(sc, 97, bbp97);
2207 rt2661_bbp_write(sc, 98, bbp98);
2209 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
2210 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
2211 if (IEEE80211_IS_CHAN_2GHZ(c))
2212 tmp |= RT2661_PA_PE_2GHZ;
2214 tmp |= RT2661_PA_PE_5GHZ;
2215 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
2219 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
2221 struct ieee80211com *ic = &sc->sc_ic;
2222 const struct rfprog *rfprog;
2223 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2227 chan = ieee80211_chan2ieee(ic, c);
2228 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2231 /* select the appropriate RF settings based on what EEPROM says */
2232 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2234 /* find the settings for this channel (we know it exists) */
2235 for (i = 0; rfprog[i].chan != chan; i++);
2237 power = sc->txpow[i];
2241 } else if (power > 31) {
2242 bbp94 += power - 31;
2247 * If we are switching from the 2GHz band to the 5GHz band or
2248 * vice-versa, BBP registers need to be reprogrammed.
2250 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2251 rt2661_select_band(sc, c);
2252 rt2661_select_antenna(sc);
2256 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2257 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2258 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2259 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2263 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2264 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2265 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2266 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2270 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2271 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2272 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2273 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2275 /* enable smart mode for MIMO-capable RFs */
2276 bbp3 = rt2661_bbp_read(sc, 3);
2278 bbp3 &= ~RT2661_SMART_MODE;
2279 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2280 bbp3 |= RT2661_SMART_MODE;
2282 rt2661_bbp_write(sc, 3, bbp3);
2284 if (bbp94 != RT2661_BBPR94_DEFAULT)
2285 rt2661_bbp_write(sc, 94, bbp94);
2287 /* 5GHz radio needs a 1ms delay here */
2288 if (IEEE80211_IS_CHAN_5GHZ(c))
2293 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2297 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2298 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2300 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2301 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2305 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2309 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2310 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2312 tmp = addr[4] | addr[5] << 8;
2313 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2317 rt2661_update_promisc(struct rt2661_softc *sc)
2319 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2322 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2324 tmp &= ~RT2661_DROP_NOT_TO_ME;
2325 if (!(ifp->if_flags & IFF_PROMISC))
2326 tmp |= RT2661_DROP_NOT_TO_ME;
2328 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2330 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2331 "entering" : "leaving"));
2335 * Update QoS (802.11e) settings for each h/w Tx ring.
2338 rt2661_wme_update(struct ieee80211com *ic)
2340 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2341 const struct wmeParams *wmep;
2343 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2345 /* XXX: not sure about shifts. */
2346 /* XXX: the reference driver plays with AC_VI settings too. */
2349 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2350 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2351 wmep[WME_AC_BK].wmep_txopLimit);
2352 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2353 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2354 wmep[WME_AC_VO].wmep_txopLimit);
2357 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2358 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2359 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2360 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2361 wmep[WME_AC_VO].wmep_logcwmin);
2364 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2365 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2366 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2367 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2368 wmep[WME_AC_VO].wmep_logcwmax);
2371 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2372 wmep[WME_AC_BE].wmep_aifsn << 12 |
2373 wmep[WME_AC_BK].wmep_aifsn << 8 |
2374 wmep[WME_AC_VI].wmep_aifsn << 4 |
2375 wmep[WME_AC_VO].wmep_aifsn);
2381 rt2661_update_slot(struct ifnet *ifp)
2383 struct rt2661_softc *sc = ifp->if_softc;
2384 struct ieee80211com *ic = &sc->sc_ic;
2388 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2390 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2391 tmp = (tmp & ~0xff) | slottime;
2392 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2396 rt2661_get_rf(int rev)
2399 case RT2661_RF_5225: return "RT5225";
2400 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2401 case RT2661_RF_2527: return "RT2527";
2402 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2403 default: return "unknown";
2408 rt2661_read_eeprom(struct rt2661_softc *sc)
2410 struct ieee80211com *ic = &sc->sc_ic;
2414 /* read MAC address */
2415 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2416 ic->ic_myaddr[0] = val & 0xff;
2417 ic->ic_myaddr[1] = val >> 8;
2419 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2420 ic->ic_myaddr[2] = val & 0xff;
2421 ic->ic_myaddr[3] = val >> 8;
2423 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2424 ic->ic_myaddr[4] = val & 0xff;
2425 ic->ic_myaddr[5] = val >> 8;
2427 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2428 /* XXX: test if different from 0xffff? */
2429 sc->rf_rev = (val >> 11) & 0x1f;
2430 sc->hw_radio = (val >> 10) & 0x1;
2431 sc->rx_ant = (val >> 4) & 0x3;
2432 sc->tx_ant = (val >> 2) & 0x3;
2433 sc->nb_ant = val & 0x3;
2435 DPRINTF(("RF revision=%d\n", sc->rf_rev));
2437 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2438 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2439 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2441 DPRINTF(("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2442 sc->ext_2ghz_lna, sc->ext_5ghz_lna));
2444 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2445 if ((val & 0xff) != 0xff)
2446 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2448 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2449 if ((val & 0xff) != 0xff)
2450 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2452 /* adjust RSSI correction for external low-noise amplifier */
2453 if (sc->ext_2ghz_lna)
2454 sc->rssi_2ghz_corr -= 14;
2455 if (sc->ext_5ghz_lna)
2456 sc->rssi_5ghz_corr -= 14;
2458 DPRINTF(("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2459 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
2461 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2462 if ((val >> 8) != 0xff)
2463 sc->rfprog = (val >> 8) & 0x3;
2464 if ((val & 0xff) != 0xff)
2465 sc->rffreq = val & 0xff;
2467 DPRINTF(("RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq));
2469 /* read Tx power for all a/b/g channels */
2470 for (i = 0; i < 19; i++) {
2471 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2472 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2473 DPRINTF(("Channel=%d Tx power=%d\n",
2474 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]));
2475 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2476 DPRINTF(("Channel=%d Tx power=%d\n",
2477 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]));
2480 /* read vendor-specific BBP values */
2481 for (i = 0; i < 16; i++) {
2482 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2483 if (val == 0 || val == 0xffff)
2484 continue; /* skip invalid entries */
2485 sc->bbp_prom[i].reg = val >> 8;
2486 sc->bbp_prom[i].val = val & 0xff;
2487 DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2488 sc->bbp_prom[i].val));
2491 val = rt2661_eeprom_read(sc, RT2661_EEPROM_LED_OFFSET);
2492 DPRINTF(("LED %02x\n", val));
2493 if (val == 0xffff) {
2494 sc->mcu_led = RT2661_MCU_LED_DEFAULT;
2496 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
2498 for (i = 0; i < N(led_ee2mcu); ++i) {
2499 if (val & led_ee2mcu[i].ee_bit)
2500 sc->mcu_led |= led_ee2mcu[i].mcu_bit;
2505 sc->mcu_led |= ((val >> RT2661_EE_LED_MODE_SHIFT) &
2506 RT2661_EE_LED_MODE_MASK);
2511 rt2661_bbp_init(struct rt2661_softc *sc)
2513 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2517 /* wait for BBP to be ready */
2518 for (ntries = 0; ntries < 100; ntries++) {
2519 val = rt2661_bbp_read(sc, 0);
2520 if (val != 0 && val != 0xff)
2524 if (ntries == 100) {
2525 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2529 /* initialize BBP registers to default values */
2530 for (i = 0; i < N(rt2661_def_bbp); i++) {
2531 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2532 rt2661_def_bbp[i].val);
2535 /* write vendor-specific BBP values (from EEPROM) */
2536 for (i = 0; i < 16; i++) {
2537 if (sc->bbp_prom[i].reg == 0)
2539 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2547 rt2661_init(void *priv)
2549 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2550 struct rt2661_softc *sc = priv;
2551 struct ieee80211com *ic = &sc->sc_ic;
2552 struct ifnet *ifp = ic->ic_ifp;
2553 uint32_t tmp, sta[3];
2558 /* initialize Tx rings */
2559 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2560 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2561 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2562 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2564 /* initialize Mgt ring */
2565 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2567 /* initialize Rx ring */
2568 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2570 /* initialize Tx rings sizes */
2571 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2572 RT2661_TX_RING_COUNT << 24 |
2573 RT2661_TX_RING_COUNT << 16 |
2574 RT2661_TX_RING_COUNT << 8 |
2575 RT2661_TX_RING_COUNT);
2577 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2578 RT2661_TX_DESC_WSIZE << 16 |
2579 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2580 RT2661_MGT_RING_COUNT);
2582 /* initialize Rx rings */
2583 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2584 RT2661_RX_DESC_BACK << 16 |
2585 RT2661_RX_DESC_WSIZE << 8 |
2586 RT2661_RX_RING_COUNT);
2588 /* XXX: some magic here */
2589 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2591 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2592 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2594 /* load base address of Rx ring */
2595 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2597 /* initialize MAC registers to default values */
2598 for (i = 0; i < N(rt2661_def_mac); i++)
2599 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2601 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2602 rt2661_set_macaddr(sc, ic->ic_myaddr);
2604 /* set host ready */
2605 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2606 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2608 /* wait for BBP/RF to wakeup */
2609 for (ntries = 0; ntries < 1000; ntries++) {
2610 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2614 if (ntries == 1000) {
2615 printf("timeout waiting for BBP/RF to wakeup\n");
2620 if (rt2661_bbp_init(sc) != 0) {
2625 /* select default channel */
2626 sc->sc_curchan = ic->ic_curchan;
2627 rt2661_select_band(sc, sc->sc_curchan);
2628 rt2661_select_antenna(sc);
2629 rt2661_set_chan(sc, sc->sc_curchan);
2631 /* update Rx filter */
2632 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2634 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2635 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2636 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2638 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2639 tmp |= RT2661_DROP_TODS;
2640 if (!(ifp->if_flags & IFF_PROMISC))
2641 tmp |= RT2661_DROP_NOT_TO_ME;
2644 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2646 /* clear STA registers */
2647 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2649 /* initialize ASIC */
2650 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2652 /* clear any pending interrupt */
2653 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2655 /* enable interrupts */
2656 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2657 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2660 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2662 ifp->if_flags &= ~IFF_OACTIVE;
2663 ifp->if_flags |= IFF_RUNNING;
2665 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2666 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2667 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2669 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2674 rt2661_stop(void *priv)
2676 struct rt2661_softc *sc = priv;
2677 struct ieee80211com *ic = &sc->sc_ic;
2678 struct ifnet *ifp = ic->ic_ifp;
2681 sc->sc_tx_timer = 0;
2683 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2685 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2687 /* abort Tx (for all 5 Tx rings) */
2688 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2690 /* disable Rx (value remains after reset!) */
2691 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2692 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2695 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2696 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2698 /* disable interrupts */
2699 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2700 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2702 /* clear any pending interrupt */
2703 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2704 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2706 /* reset Tx and Rx rings */
2707 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2708 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2709 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2710 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2711 rt2661_reset_tx_ring(sc, &sc->mgtq);
2712 rt2661_reset_rx_ring(sc, &sc->rxq);
2716 rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode, int size)
2721 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2723 /* cancel any pending Host to MCU command */
2724 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2725 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2726 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2728 /* write 8051's microcode */
2729 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2730 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, ucode, size);
2731 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2733 /* kick 8051's ass */
2734 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2736 /* wait for 8051 to initialize */
2737 for (ntries = 0; ntries < 500; ntries++) {
2738 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2742 if (ntries == 500) {
2743 printf("timeout waiting for MCU to initialize\n");
2751 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2752 * false CCA count. This function is called periodically (every seconds) when
2753 * in the RUN state. Values taken from the reference driver.
2756 rt2661_rx_tune(struct rt2661_softc *sc)
2763 * Tuning range depends on operating band and on the presence of an
2764 * external low-noise amplifier.
2767 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2769 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2770 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2774 /* retrieve false CCA count since last call (clear on read) */
2775 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2779 } else if (dbm >= -58) {
2781 } else if (dbm >= -66) {
2783 } else if (dbm >= -74) {
2786 /* RSSI < -74dBm, tune using false CCA count */
2788 bbp17 = sc->bbp17; /* current value */
2790 hi -= 2 * (-74 - dbm);
2797 } else if (cca > 512) {
2800 } else if (cca < 100) {
2806 if (bbp17 != sc->bbp17) {
2807 rt2661_bbp_write(sc, 17, bbp17);
2813 * Enter/Leave radar detection mode.
2814 * This is for 802.11h additional regulatory domains.
2817 rt2661_radar_start(struct rt2661_softc *sc)
2822 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2823 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2825 rt2661_bbp_write(sc, 82, 0x20);
2826 rt2661_bbp_write(sc, 83, 0x00);
2827 rt2661_bbp_write(sc, 84, 0x40);
2829 /* save current BBP registers values */
2830 sc->bbp18 = rt2661_bbp_read(sc, 18);
2831 sc->bbp21 = rt2661_bbp_read(sc, 21);
2832 sc->bbp22 = rt2661_bbp_read(sc, 22);
2833 sc->bbp16 = rt2661_bbp_read(sc, 16);
2834 sc->bbp17 = rt2661_bbp_read(sc, 17);
2835 sc->bbp64 = rt2661_bbp_read(sc, 64);
2837 rt2661_bbp_write(sc, 18, 0xff);
2838 rt2661_bbp_write(sc, 21, 0x3f);
2839 rt2661_bbp_write(sc, 22, 0x3f);
2840 rt2661_bbp_write(sc, 16, 0xbd);
2841 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2842 rt2661_bbp_write(sc, 64, 0x21);
2844 /* restore Rx filter */
2845 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2849 rt2661_radar_stop(struct rt2661_softc *sc)
2853 /* read radar detection result */
2854 bbp66 = rt2661_bbp_read(sc, 66);
2856 /* restore BBP registers values */
2857 rt2661_bbp_write(sc, 16, sc->bbp16);
2858 rt2661_bbp_write(sc, 17, sc->bbp17);
2859 rt2661_bbp_write(sc, 18, sc->bbp18);
2860 rt2661_bbp_write(sc, 21, sc->bbp21);
2861 rt2661_bbp_write(sc, 22, sc->bbp22);
2862 rt2661_bbp_write(sc, 64, sc->bbp64);
2869 rt2661_prepare_beacon(struct rt2661_softc *sc)
2871 struct ieee80211com *ic = &sc->sc_ic;
2872 struct ieee80211_beacon_offsets bo;
2873 struct rt2661_tx_desc desc;
2877 m0 = ieee80211_beacon_alloc(ic, ic->ic_bss, &bo);
2879 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2883 /* send beacons at the lowest available rate */
2884 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan) ? 12 : 2;
2886 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2887 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2889 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2890 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2892 /* copy beacon header and payload into NIC memory */
2893 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2894 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2901 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2902 * and HostAP operating modes.
2905 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2907 struct ieee80211com *ic = &sc->sc_ic;
2910 if (ic->ic_opmode != IEEE80211_M_STA) {
2912 * Change default 16ms TBTT adjustment to 8ms.
2913 * Must be done before enabling beacon generation.
2915 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2918 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2920 /* set beacon interval (in 1/16ms unit) */
2921 tmp |= ic->ic_bss->ni_intval * 16;
2923 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2924 if (ic->ic_opmode == IEEE80211_M_STA)
2925 tmp |= RT2661_TSF_MODE(1);
2927 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2929 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2933 * Retrieve the "Received Signal Strength Indicator" from the raw values
2934 * contained in Rx descriptors. The computation depends on which band the
2935 * frame was received. Correction values taken from the reference driver.
2938 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2942 lna = (raw >> 5) & 0x3;
2947 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2948 rssi += sc->rssi_2ghz_corr;
2957 rssi += sc->rssi_5ghz_corr;
2970 rt2661_dma_map_mbuf(void *arg, bus_dma_segment_t *seg, int nseg,
2971 bus_size_t map_size __unused, int error)
2973 struct rt2661_dmamap *map = arg;
2978 KASSERT(nseg <= RT2661_MAX_SCATTER, ("too many DMA segments"));
2980 bcopy(seg, map->segs, nseg * sizeof(bus_dma_segment_t));
2985 rt2661_led_newstate(struct rt2661_softc *sc, enum ieee80211_state nstate)
2987 struct ieee80211com *ic = &sc->sc_ic;
2989 uint32_t mail = sc->mcu_led;
2991 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) {
2992 DPRINTF(("%s failed\n", __func__));
2997 case IEEE80211_S_INIT:
2998 mail &= ~(RT2661_MCU_LED_LINKA | RT2661_MCU_LED_LINKG |
3002 if (ic->ic_curchan == NULL)
3005 on = RT2661_MCU_LED_LINKG;
3006 off = RT2661_MCU_LED_LINKA;
3007 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) {
3008 on = RT2661_MCU_LED_LINKA;
3009 off = RT2661_MCU_LED_LINKG;
3012 mail |= RT2661_MCU_LED_RF | on;
3017 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
3018 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | mail);
3019 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | RT2661_MCU_SET_LED);