sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2008, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - If the driver uses the same serializer for the interrupt as for the
  71  *   ifnet, most of the serialization will be done automatically for the
  72  *   driver.
  73  *
  74  * - ifmedia entry points will be serialized by the ifmedia code using the
  75  *   ifnet serializer.
  76  *
  77  * - if_* entry points except for if_input will be serialized by the IF
  78  *   and protocol layers.
  79  *
  80  * - The device driver must be sure to serialize access from timeout code
  81  *   installed by the device driver.
  82  *
  83  * - The device driver typically holds the serializer at the time it wishes
  84  *   to call if_input.
  85  *
  86  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  87  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  88  *   the hardware interrupt in order to avoid handler execution races from
  89  *   scheduled interrupt threads.
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_ifpoll.h"
  97
  98 #include <sys/param.h>
  99 #include <sys/bus.h>
 100 #include <sys/endian.h>
 101 #include <sys/interrupt.h>
 102 #include <sys/kernel.h>
 103 #include <sys/ktr.h>
 104 #include <sys/malloc.h>
 105 #include <sys/mbuf.h>
 106 #include <sys/proc.h>
 107 #include <sys/rman.h>
 108 #include <sys/serialize.h>
 109 #include <sys/socket.h>
 110 #include <sys/sockio.h>
 111 #include <sys/sysctl.h>
 112 #include <sys/systm.h>
 113
 114 #include <net/bpf.h>
 115 #include <net/ethernet.h>
 116 #include <net/if.h>
 117 #include <net/if_arp.h>
 118 #include <net/if_dl.h>
 119 #include <net/if_media.h>
 120 #include <net/if_poll.h>
 121 #include <net/ifq_var.h>
 122 #include <net/vlan/if_vlan_var.h>
 123 #include <net/vlan/if_vlan_ether.h>
 124
 125 #include <netinet/ip.h>
 126 #include <netinet/tcp.h>
 127 #include <netinet/udp.h>
 128
 129 #include <bus/pci/pcivar.h>
 130 #include <bus/pci/pcireg.h>
 131
 132 #include <dev/netif/ig_hal/e1000_api.h>
 133 #include <dev/netif/ig_hal/e1000_82571.h>
 134 #include <dev/netif/em/if_em.h>
 135
 136 #define DEBUG_HW 0
 137
 138 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 139 #define EM_VER  " 7.3.4"
 140
 141 #define _EM_DEVICE(id, ret)     \
 142         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 143 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 144 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 145 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 146
 147 static const struct em_vendor_info em_vendor_info_array[] = {
 148         EM_DEVICE(82540EM),
 149         EM_DEVICE(82540EM_LOM),
 150         EM_DEVICE(82540EP),
 151         EM_DEVICE(82540EP_LOM),
 152         EM_DEVICE(82540EP_LP),
 153
 154         EM_DEVICE(82541EI),
 155         EM_DEVICE(82541ER),
 156         EM_DEVICE(82541ER_LOM),
 157         EM_DEVICE(82541EI_MOBILE),
 158         EM_DEVICE(82541GI),
 159         EM_DEVICE(82541GI_LF),
 160         EM_DEVICE(82541GI_MOBILE),
 161
 162         EM_DEVICE(82542),
 163
 164         EM_DEVICE(82543GC_FIBER),
 165         EM_DEVICE(82543GC_COPPER),
 166
 167         EM_DEVICE(82544EI_COPPER),
 168         EM_DEVICE(82544EI_FIBER),
 169         EM_DEVICE(82544GC_COPPER),
 170         EM_DEVICE(82544GC_LOM),
 171
 172         EM_DEVICE(82545EM_COPPER),
 173         EM_DEVICE(82545EM_FIBER),
 174         EM_DEVICE(82545GM_COPPER),
 175         EM_DEVICE(82545GM_FIBER),
 176         EM_DEVICE(82545GM_SERDES),
 177
 178         EM_DEVICE(82546EB_COPPER),
 179         EM_DEVICE(82546EB_FIBER),
 180         EM_DEVICE(82546EB_QUAD_COPPER),
 181         EM_DEVICE(82546GB_COPPER),
 182         EM_DEVICE(82546GB_FIBER),
 183         EM_DEVICE(82546GB_SERDES),
 184         EM_DEVICE(82546GB_PCIE),
 185         EM_DEVICE(82546GB_QUAD_COPPER),
 186         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 187
 188         EM_DEVICE(82547EI),
 189         EM_DEVICE(82547EI_MOBILE),
 190         EM_DEVICE(82547GI),
 191
 192         EM_EMX_DEVICE(82571EB_COPPER),
 193         EM_EMX_DEVICE(82571EB_FIBER),
 194         EM_EMX_DEVICE(82571EB_SERDES),
 195         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 196         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 197         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 198         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 199         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 200         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 201         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 202
 203         EM_EMX_DEVICE(82572EI_COPPER),
 204         EM_EMX_DEVICE(82572EI_FIBER),
 205         EM_EMX_DEVICE(82572EI_SERDES),
 206         EM_EMX_DEVICE(82572EI),
 207
 208         EM_EMX_DEVICE(82573E),
 209         EM_EMX_DEVICE(82573E_IAMT),
 210         EM_EMX_DEVICE(82573L),
 211
 212         EM_DEVICE(82583V),
 213
 214         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 215         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 216         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 217         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 218
 219         EM_DEVICE(ICH8_IGP_M_AMT),
 220         EM_DEVICE(ICH8_IGP_AMT),
 221         EM_DEVICE(ICH8_IGP_C),
 222         EM_DEVICE(ICH8_IFE),
 223         EM_DEVICE(ICH8_IFE_GT),
 224         EM_DEVICE(ICH8_IFE_G),
 225         EM_DEVICE(ICH8_IGP_M),
 226         EM_DEVICE(ICH8_82567V_3),
 227
 228         EM_DEVICE(ICH9_IGP_M_AMT),
 229         EM_DEVICE(ICH9_IGP_AMT),
 230         EM_DEVICE(ICH9_IGP_C),
 231         EM_DEVICE(ICH9_IGP_M),
 232         EM_DEVICE(ICH9_IGP_M_V),
 233         EM_DEVICE(ICH9_IFE),
 234         EM_DEVICE(ICH9_IFE_GT),
 235         EM_DEVICE(ICH9_IFE_G),
 236         EM_DEVICE(ICH9_BM),
 237
 238         EM_EMX_DEVICE(82574L),
 239         EM_EMX_DEVICE(82574LA),
 240
 241         EM_DEVICE(ICH10_R_BM_LM),
 242         EM_DEVICE(ICH10_R_BM_LF),
 243         EM_DEVICE(ICH10_R_BM_V),
 244         EM_DEVICE(ICH10_D_BM_LM),
 245         EM_DEVICE(ICH10_D_BM_LF),
 246         EM_DEVICE(ICH10_D_BM_V),
 247
 248         EM_DEVICE(PCH_M_HV_LM),
 249         EM_DEVICE(PCH_M_HV_LC),
 250         EM_DEVICE(PCH_D_HV_DM),
 251         EM_DEVICE(PCH_D_HV_DC),
 252
 253         EM_DEVICE(PCH2_LV_LM),
 254         EM_DEVICE(PCH2_LV_V),
 255
 256         /* required last entry */
 257         EM_DEVICE_NULL
 258 };
 259
 260 static int      em_probe(device_t);
 261 static int      em_attach(device_t);
 262 static int      em_detach(device_t);
 263 static int      em_shutdown(device_t);
 264 static int      em_suspend(device_t);
 265 static int      em_resume(device_t);
 266
 267 static void     em_init(void *);
 268 static void     em_stop(struct adapter *);
 269 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 270 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 271 #ifdef IFPOLL_ENABLE
 272 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 273 static void     em_npoll_compat(struct ifnet *, void *, int);
 274 #endif
 275 static void     em_watchdog(struct ifnet *);
 276 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 277 static int      em_media_change(struct ifnet *);
 278 static void     em_timer(void *);
 279
 280 static void     em_intr(void *);
 281 static void     em_intr_mask(void *);
 282 static void     em_intr_body(struct adapter *, boolean_t);
 283 static void     em_rxeof(struct adapter *, int);
 284 static void     em_txeof(struct adapter *);
 285 static void     em_tx_collect(struct adapter *);
 286 static void     em_tx_purge(struct adapter *);
 287 static void     em_enable_intr(struct adapter *);
 288 static void     em_disable_intr(struct adapter *);
 289
 290 static int      em_dma_malloc(struct adapter *, bus_size_t,
 291                     struct em_dma_alloc *);
 292 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 293 static void     em_init_tx_ring(struct adapter *);
 294 static int      em_init_rx_ring(struct adapter *);
 295 static int      em_create_tx_ring(struct adapter *);
 296 static int      em_create_rx_ring(struct adapter *);
 297 static void     em_destroy_tx_ring(struct adapter *, int);
 298 static void     em_destroy_rx_ring(struct adapter *, int);
 299 static int      em_newbuf(struct adapter *, int, int);
 300 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 301 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 302                     struct mbuf *);
 303 static int      em_txcsum(struct adapter *, struct mbuf *,
 304                     uint32_t *, uint32_t *);
 305 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 306 static int      em_tso_setup(struct adapter *, struct mbuf *,
 307                     uint32_t *, uint32_t *);
 308
 309 static int      em_get_hw_info(struct adapter *);
 310 static int      em_is_valid_eaddr(const uint8_t *);
 311 static int      em_alloc_pci_res(struct adapter *);
 312 static void     em_free_pci_res(struct adapter *);
 313 static int      em_reset(struct adapter *);
 314 static void     em_setup_ifp(struct adapter *);
 315 static void     em_init_tx_unit(struct adapter *);
 316 static void     em_init_rx_unit(struct adapter *);
 317 static void     em_update_stats(struct adapter *);
 318 static void     em_set_promisc(struct adapter *);
 319 static void     em_disable_promisc(struct adapter *);
 320 static void     em_set_multi(struct adapter *);
 321 static void     em_update_link_status(struct adapter *);
 322 static void     em_smartspeed(struct adapter *);
 323 static void     em_set_itr(struct adapter *, uint32_t);
 324 static void     em_disable_aspm(struct adapter *);
 325
 326 /* Hardware workarounds */
 327 static int      em_82547_fifo_workaround(struct adapter *, int);
 328 static void     em_82547_update_fifo_head(struct adapter *, int);
 329 static int      em_82547_tx_fifo_reset(struct adapter *);
 330 static void     em_82547_move_tail(void *);
 331 static void     em_82547_move_tail_serialized(struct adapter *);
 332 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 333
 334 static void     em_print_debug_info(struct adapter *);
 335 static void     em_print_nvm_info(struct adapter *);
 336 static void     em_print_hw_stats(struct adapter *);
 337
 338 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 339 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 340 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 341 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 342 static void     em_add_sysctl(struct adapter *adapter);
 343
 344 /* Management and WOL Support */
 345 static void     em_get_mgmt(struct adapter *);
 346 static void     em_rel_mgmt(struct adapter *);
 347 static void     em_get_hw_control(struct adapter *);
 348 static void     em_rel_hw_control(struct adapter *);
 349 static void     em_enable_wol(device_t);
 350
 351 static device_method_t em_methods[] = {
 352         /* Device interface */
 353         DEVMETHOD(device_probe,         em_probe),
 354         DEVMETHOD(device_attach,        em_attach),
 355         DEVMETHOD(device_detach,        em_detach),
 356         DEVMETHOD(device_shutdown,      em_shutdown),
 357         DEVMETHOD(device_suspend,       em_suspend),
 358         DEVMETHOD(device_resume,        em_resume),
 359         DEVMETHOD_END
 360 };
 361
 362 static driver_t em_driver = {
 363         "em",
 364         em_methods,
 365         sizeof(struct adapter),
 366 };
 367
 368 static devclass_t em_devclass;
 369
 370 DECLARE_DUMMY_MODULE(if_em);
 371 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 372 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 373
 374 /*
 375  * Tunables
 376  */
 377 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 378 static int      em_rxd = EM_DEFAULT_RXD;
 379 static int      em_txd = EM_DEFAULT_TXD;
 380 static int      em_smart_pwr_down = 0;
 381
 382 /* Controls whether promiscuous also shows bad packets */
 383 static int      em_debug_sbp = FALSE;
 384
 385 static int      em_82573_workaround = 1;
 386 static int      em_msi_enable = 1;
 387
 388 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 389 TUNABLE_INT("hw.em.rxd", &em_rxd);
 390 TUNABLE_INT("hw.em.txd", &em_txd);
 391 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 392 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 393 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 394 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 395
 396 /* Global used in WOL setup with multiport cards */
 397 static int      em_global_quad_port_a = 0;
 398
 399 /* Set this to one to display debug statistics */
 400 static int      em_display_debug_stats = 0;
 401
 402 #if !defined(KTR_IF_EM)
 403 #define KTR_IF_EM       KTR_ALL
 404 #endif
 405 KTR_INFO_MASTER(if_em);
 406 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 407 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 408 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 409 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 410 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 411 #define logif(name)     KTR_LOG(if_em_ ## name)
 412
 413 static int
 414 em_probe(device_t dev)
 415 {
 416         const struct em_vendor_info *ent;
 417         uint16_t vid, did;
 418
 419         vid = pci_get_vendor(dev);
 420         did = pci_get_device(dev);
 421
 422         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 423                 if (vid == ent->vendor_id && did == ent->device_id) {
 424                         device_set_desc(dev, ent->desc);
 425                         device_set_async_attach(dev, TRUE);
 426                         return (ent->ret);
 427                 }
 428         }
 429         return (ENXIO);
 430 }
 431
 432 static int
 433 em_attach(device_t dev)
 434 {
 435         struct adapter *adapter = device_get_softc(dev);
 436         struct ifnet *ifp = &adapter->arpcom.ac_if;
 437         int tsize, rsize;
 438         int error = 0;
 439         uint16_t eeprom_data, device_id, apme_mask;
 440         driver_intr_t *intr_func;
 441
 442         adapter->dev = adapter->osdep.dev = dev;
 443
 444         callout_init_mp(&adapter->timer);
 445         callout_init_mp(&adapter->tx_fifo_timer);
 446
 447         /* Determine hardware and mac info */
 448         error = em_get_hw_info(adapter);
 449         if (error) {
 450                 device_printf(dev, "Identify hardware failed\n");
 451                 goto fail;
 452         }
 453
 454         /* Setup PCI resources */
 455         error = em_alloc_pci_res(adapter);
 456         if (error) {
 457                 device_printf(dev, "Allocation of PCI resources failed\n");
 458                 goto fail;
 459         }
 460
 461         /*
 462          * For ICH8 and family we need to map the flash memory,
 463          * and this must happen after the MAC is identified.
 464          */
 465         if (adapter->hw.mac.type == e1000_ich8lan ||
 466             adapter->hw.mac.type == e1000_ich9lan ||
 467             adapter->hw.mac.type == e1000_ich10lan ||
 468             adapter->hw.mac.type == e1000_pchlan ||
 469             adapter->hw.mac.type == e1000_pch2lan) {
 470                 adapter->flash_rid = EM_BAR_FLASH;
 471
 472                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 473                                         &adapter->flash_rid, RF_ACTIVE);
 474                 if (adapter->flash == NULL) {
 475                         device_printf(dev, "Mapping of Flash failed\n");
 476                         error = ENXIO;
 477                         goto fail;
 478                 }
 479                 adapter->osdep.flash_bus_space_tag =
 480                     rman_get_bustag(adapter->flash);
 481                 adapter->osdep.flash_bus_space_handle =
 482                     rman_get_bushandle(adapter->flash);
 483
 484                 /*
 485                  * This is used in the shared code
 486                  * XXX this goof is actually not used.
 487                  */
 488                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 489         }
 490
 491         switch (adapter->hw.mac.type) {
 492         case e1000_82571:
 493         case e1000_82572:
 494                 /*
 495                  * Pullup extra 4bytes into the first data segment, see:
 496                  * 82571/82572 specification update errata #7
 497                  *
 498                  * NOTE:
 499                  * 4bytes instead of 2bytes, which are mentioned in the
 500                  * errata, are pulled; mainly to keep rest of the data
 501                  * properly aligned.
 502                  */
 503                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 504                 /* FALL THROUGH */
 505
 506         case e1000_82573:
 507         case e1000_82574:
 508         case e1000_80003es2lan:
 509                 adapter->flags |= EM_FLAG_TSO;
 510                 break;
 511
 512         default:
 513                 break;
 514         }
 515
 516         /* Do Shared Code initialization */
 517         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 518                 device_printf(dev, "Setup of Shared code failed\n");
 519                 error = ENXIO;
 520                 goto fail;
 521         }
 522
 523         e1000_get_bus_info(&adapter->hw);
 524
 525         /*
 526          * Validate number of transmit and receive descriptors.  It
 527          * must not exceed hardware maximum, and must be multiple
 528          * of E1000_DBA_ALIGN.
 529          */
 530         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 531             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 532             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 533             em_txd < EM_MIN_TXD) {
 534                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 535                     EM_DEFAULT_TXD, em_txd);
 536                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 537         } else {
 538                 adapter->num_tx_desc = em_txd;
 539         }
 540         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 541             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 542             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 543             em_rxd < EM_MIN_RXD) {
 544                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 545                     EM_DEFAULT_RXD, em_rxd);
 546                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 547         } else {
 548                 adapter->num_rx_desc = em_rxd;
 549         }
 550
 551         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 552         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 553         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 554         adapter->rx_buffer_len = MCLBYTES;
 555
 556         /*
 557          * Interrupt throttle rate
 558          */
 559         if (em_int_throttle_ceil == 0) {
 560                 adapter->int_throttle_ceil = 0;
 561         } else {
 562                 int throttle = em_int_throttle_ceil;
 563
 564                 if (throttle < 0)
 565                         throttle = EM_DEFAULT_ITR;
 566
 567                 /* Recalculate the tunable value to get the exact frequency. */
 568                 throttle = 1000000000 / 256 / throttle;
 569
 570                 /* Upper 16bits of ITR is reserved and should be zero */
 571                 if (throttle & 0xffff0000)
 572                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 573
 574                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 575         }
 576
 577         e1000_init_script_state_82541(&adapter->hw, TRUE);
 578         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 579
 580         /* Copper options */
 581         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 582                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 583                 adapter->hw.phy.disable_polarity_correction = FALSE;
 584                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 585         }
 586
 587         /* Set the frame limits assuming standard ethernet sized frames. */
 588         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 589         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 590
 591         /* This controls when hardware reports transmit completion status. */
 592         adapter->hw.mac.report_tx_early = 1;
 593
 594         /*
 595          * Create top level busdma tag
 596          */
 597         error = bus_dma_tag_create(NULL, 1, 0,
 598                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 599                         NULL, NULL,
 600                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 601                         0, &adapter->parent_dtag);
 602         if (error) {
 603                 device_printf(dev, "could not create top level DMA tag\n");
 604                 goto fail;
 605         }
 606
 607         /*
 608          * Allocate Transmit Descriptor ring
 609          */
 610         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 611                          EM_DBA_ALIGN);
 612         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 613         if (error) {
 614                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 615                 goto fail;
 616         }
 617         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 618
 619         /*
 620          * Allocate Receive Descriptor ring
 621          */
 622         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 623                          EM_DBA_ALIGN);
 624         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 625         if (error) {
 626                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 627                 goto fail;
 628         }
 629         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 630
 631         /* Allocate multicast array memory. */
 632         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 633             M_DEVBUF, M_WAITOK);
 634
 635         /* Indicate SOL/IDER usage */
 636         if (e1000_check_reset_block(&adapter->hw)) {
 637                 device_printf(dev,
 638                     "PHY reset is blocked due to SOL/IDER session.\n");
 639         }
 640
 641         /*
 642          * Start from a known state, this is important in reading the
 643          * nvm and mac from that.
 644          */
 645         e1000_reset_hw(&adapter->hw);
 646
 647         /* Make sure we have a good EEPROM before we read from it */
 648         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 649                 /*
 650                  * Some PCI-E parts fail the first check due to
 651                  * the link being in sleep state, call it again,
 652                  * if it fails a second time its a real issue.
 653                  */
 654                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 655                         device_printf(dev,
 656                             "The EEPROM Checksum Is Not Valid\n");
 657                         error = EIO;
 658                         goto fail;
 659                 }
 660         }
 661
 662         /* Copy the permanent MAC address out of the EEPROM */
 663         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 664                 device_printf(dev, "EEPROM read error while reading MAC"
 665                     " address\n");
 666                 error = EIO;
 667                 goto fail;
 668         }
 669         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 670                 device_printf(dev, "Invalid MAC address\n");
 671                 error = EIO;
 672                 goto fail;
 673         }
 674
 675         /* Allocate transmit descriptors and buffers */
 676         error = em_create_tx_ring(adapter);
 677         if (error) {
 678                 device_printf(dev, "Could not setup transmit structures\n");
 679                 goto fail;
 680         }
 681
 682         /* Allocate receive descriptors and buffers */
 683         error = em_create_rx_ring(adapter);
 684         if (error) {
 685                 device_printf(dev, "Could not setup receive structures\n");
 686                 goto fail;
 687         }
 688
 689         /* Manually turn off all interrupts */
 690         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 691
 692         /* Determine if we have to control management hardware */
 693         if (e1000_enable_mng_pass_thru(&adapter->hw))
 694                 adapter->flags |= EM_FLAG_HAS_MGMT;
 695
 696         /*
 697          * Setup Wake-on-Lan
 698          */
 699         apme_mask = EM_EEPROM_APME;
 700         eeprom_data = 0;
 701         switch (adapter->hw.mac.type) {
 702         case e1000_82542:
 703         case e1000_82543:
 704                 break;
 705
 706         case e1000_82573:
 707         case e1000_82583:
 708                 adapter->flags |= EM_FLAG_HAS_AMT;
 709                 /* FALL THROUGH */
 710
 711         case e1000_82546:
 712         case e1000_82546_rev_3:
 713         case e1000_82571:
 714         case e1000_82572:
 715         case e1000_80003es2lan:
 716                 if (adapter->hw.bus.func == 1) {
 717                         e1000_read_nvm(&adapter->hw,
 718                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 719                 } else {
 720                         e1000_read_nvm(&adapter->hw,
 721                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 722                 }
 723                 break;
 724
 725         case e1000_ich8lan:
 726         case e1000_ich9lan:
 727         case e1000_ich10lan:
 728         case e1000_pchlan:
 729         case e1000_pch2lan:
 730                 apme_mask = E1000_WUC_APME;
 731                 adapter->flags |= EM_FLAG_HAS_AMT;
 732                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 733                 break;
 734
 735         default:
 736                 e1000_read_nvm(&adapter->hw,
 737                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 738                 break;
 739         }
 740         if (eeprom_data & apme_mask)
 741                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 742
 743         /*
 744          * We have the eeprom settings, now apply the special cases
 745          * where the eeprom may be wrong or the board won't support
 746          * wake on lan on a particular port
 747          */
 748         device_id = pci_get_device(dev);
 749         switch (device_id) {
 750         case E1000_DEV_ID_82546GB_PCIE:
 751                 adapter->wol = 0;
 752                 break;
 753
 754         case E1000_DEV_ID_82546EB_FIBER:
 755         case E1000_DEV_ID_82546GB_FIBER:
 756         case E1000_DEV_ID_82571EB_FIBER:
 757                 /*
 758                  * Wake events only supported on port A for dual fiber
 759                  * regardless of eeprom setting
 760                  */
 761                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 762                     E1000_STATUS_FUNC_1)
 763                         adapter->wol = 0;
 764                 break;
 765
 766         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 767         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 768         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 769         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 770                 /* if quad port adapter, disable WoL on all but port A */
 771                 if (em_global_quad_port_a != 0)
 772                         adapter->wol = 0;
 773                 /* Reset for multiple quad port adapters */
 774                 if (++em_global_quad_port_a == 4)
 775                         em_global_quad_port_a = 0;
 776                 break;
 777         }
 778
 779         /* XXX disable wol */
 780         adapter->wol = 0;
 781
 782         /* Setup OS specific network interface */
 783         em_setup_ifp(adapter);
 784
 785         /* Add sysctl tree, must after em_setup_ifp() */
 786         em_add_sysctl(adapter);
 787
 788 #ifdef IFPOLL_ENABLE
 789         /* Polling setup */
 790         ifpoll_compat_setup(&adapter->npoll,
 791             &adapter->sysctl_ctx, adapter->sysctl_tree, device_get_unit(dev),
 792             ifp->if_serializer);
 793 #endif
 794
 795         /* Reset the hardware */
 796         error = em_reset(adapter);
 797         if (error) {
 798                 device_printf(dev, "Unable to reset the hardware\n");
 799                 goto fail;
 800         }
 801
 802         /* Initialize statistics */
 803         em_update_stats(adapter);
 804
 805         adapter->hw.mac.get_link_status = 1;
 806         em_update_link_status(adapter);
 807
 808         /* Do we need workaround for 82544 PCI-X adapter? */
 809         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 810             adapter->hw.mac.type == e1000_82544)
 811                 adapter->pcix_82544 = TRUE;
 812         else
 813                 adapter->pcix_82544 = FALSE;
 814
 815         if (adapter->pcix_82544) {
 816                 /*
 817                  * 82544 on PCI-X may split one TX segment
 818                  * into two TX descs, so we double its number
 819                  * of spare TX desc here.
 820                  */
 821                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 822         } else {
 823                 adapter->spare_tx_desc = EM_TX_SPARE;
 824         }
 825         if (adapter->flags & EM_FLAG_TSO)
 826                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 827         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 828
 829         /*
 830          * Keep following relationship between spare_tx_desc, oact_tx_desc
 831          * and tx_int_nsegs:
 832          * (spare_tx_desc + EM_TX_RESERVED) <=
 833          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 834          */
 835         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 836         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 837                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 838         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 839                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 840
 841         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 842         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 843                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 844
 845         /* Non-AMT based hardware can now take control from firmware */
 846         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 847             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 848                 em_get_hw_control(adapter);
 849
 850         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 851
 852         /*
 853          * Missing Interrupt Following ICR read:
 854          *
 855          * 82571/82572 specification update errata #76
 856          * 82573 specification update errata #31
 857          * 82574 specification update errata #12
 858          * 82583 specification update errata #4
 859          */
 860         intr_func = em_intr;
 861         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 862             (adapter->hw.mac.type == e1000_82571 ||
 863              adapter->hw.mac.type == e1000_82572 ||
 864              adapter->hw.mac.type == e1000_82573 ||
 865              adapter->hw.mac.type == e1000_82574 ||
 866              adapter->hw.mac.type == e1000_82583))
 867                 intr_func = em_intr_mask;
 868
 869         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 870                                intr_func, adapter, &adapter->intr_tag,
 871                                ifp->if_serializer);
 872         if (error) {
 873                 device_printf(dev, "Failed to register interrupt handler");
 874                 ether_ifdetach(&adapter->arpcom.ac_if);
 875                 goto fail;
 876         }
 877         return (0);
 878 fail:
 879         em_detach(dev);
 880         return (error);
 881 }
 882
 883 static int
 884 em_detach(device_t dev)
 885 {
 886         struct adapter *adapter = device_get_softc(dev);
 887
 888         if (device_is_attached(dev)) {
 889                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 890
 891                 lwkt_serialize_enter(ifp->if_serializer);
 892
 893                 em_stop(adapter);
 894
 895                 e1000_phy_hw_reset(&adapter->hw);
 896
 897                 em_rel_mgmt(adapter);
 898                 em_rel_hw_control(adapter);
 899
 900                 if (adapter->wol) {
 901                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 902                                         E1000_WUC_PME_EN);
 903                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 904                         em_enable_wol(dev);
 905                 }
 906
 907                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 908
 909                 lwkt_serialize_exit(ifp->if_serializer);
 910
 911                 ether_ifdetach(ifp);
 912         } else if (adapter->memory != NULL) {
 913                 em_rel_hw_control(adapter);
 914         }
 915         bus_generic_detach(dev);
 916
 917         em_free_pci_res(adapter);
 918
 919         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 920         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 921
 922         /* Free Transmit Descriptor ring */
 923         if (adapter->tx_desc_base)
 924                 em_dma_free(adapter, &adapter->txdma);
 925
 926         /* Free Receive Descriptor ring */
 927         if (adapter->rx_desc_base)
 928                 em_dma_free(adapter, &adapter->rxdma);
 929
 930         /* Free top level busdma tag */
 931         if (adapter->parent_dtag != NULL)
 932                 bus_dma_tag_destroy(adapter->parent_dtag);
 933
 934         /* Free sysctl tree */
 935         if (adapter->sysctl_tree != NULL)
 936                 sysctl_ctx_free(&adapter->sysctl_ctx);
 937
 938         if (adapter->mta != NULL)
 939                 kfree(adapter->mta, M_DEVBUF);
 940
 941         return (0);
 942 }
 943
 944 static int
 945 em_shutdown(device_t dev)
 946 {
 947         return em_suspend(dev);
 948 }
 949
 950 static int
 951 em_suspend(device_t dev)
 952 {
 953         struct adapter *adapter = device_get_softc(dev);
 954         struct ifnet *ifp = &adapter->arpcom.ac_if;
 955
 956         lwkt_serialize_enter(ifp->if_serializer);
 957
 958         em_stop(adapter);
 959
 960         em_rel_mgmt(adapter);
 961         em_rel_hw_control(adapter);
 962
 963         if (adapter->wol) {
 964                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 965                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 966                 em_enable_wol(dev);
 967         }
 968
 969         lwkt_serialize_exit(ifp->if_serializer);
 970
 971         return bus_generic_suspend(dev);
 972 }
 973
 974 static int
 975 em_resume(device_t dev)
 976 {
 977         struct adapter *adapter = device_get_softc(dev);
 978         struct ifnet *ifp = &adapter->arpcom.ac_if;
 979
 980         lwkt_serialize_enter(ifp->if_serializer);
 981
 982         if (adapter->hw.mac.type == e1000_pch2lan)
 983                 e1000_resume_workarounds_pchlan(&adapter->hw);
 984
 985         em_init(adapter);
 986         em_get_mgmt(adapter);
 987         if_devstart(ifp);
 988
 989         lwkt_serialize_exit(ifp->if_serializer);
 990
 991         return bus_generic_resume(dev);
 992 }
 993
 994 static void
 995 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
 996 {
 997         struct adapter *adapter = ifp->if_softc;
 998         struct mbuf *m_head;
 999         int idx = -1, nsegs = 0;
1000
1001         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1002         ASSERT_SERIALIZED(ifp->if_serializer);
1003
1004         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1005                 return;
1006
1007         if (!adapter->link_active) {
1008                 ifq_purge(&ifp->if_snd);
1009                 return;
1010         }
1011
1012         while (!ifq_is_empty(&ifp->if_snd)) {
1013                 /* Now do we at least have a minimal? */
1014                 if (EM_IS_OACTIVE(adapter)) {
1015                         em_tx_collect(adapter);
1016                         if (EM_IS_OACTIVE(adapter)) {
1017                                 ifq_set_oactive(&ifp->if_snd);
1018                                 adapter->no_tx_desc_avail1++;
1019                                 break;
1020                         }
1021                 }
1022
1023                 logif(pkt_txqueue);
1024                 m_head = ifq_dequeue(&ifp->if_snd, NULL);
1025                 if (m_head == NULL)
1026                         break;
1027
1028                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1029                         IFNET_STAT_INC(ifp, oerrors, 1);
1030                         em_tx_collect(adapter);
1031                         continue;
1032                 }
1033
1034                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1035                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1036                         nsegs = 0;
1037                         idx = -1;
1038                 }
1039
1040                 /* Send a copy of the frame to the BPF listener */
1041                 ETHER_BPF_MTAP(ifp, m_head);
1042
1043                 /* Set timeout in case hardware has problems transmitting. */
1044                 ifp->if_timer = EM_TX_TIMEOUT;
1045         }
1046         if (idx >= 0)
1047                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1048 }
1049
1050 static int
1051 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1052 {
1053         struct adapter *adapter = ifp->if_softc;
1054         struct ifreq *ifr = (struct ifreq *)data;
1055         uint16_t eeprom_data = 0;
1056         int max_frame_size, mask, reinit;
1057         int error = 0;
1058
1059         ASSERT_SERIALIZED(ifp->if_serializer);
1060
1061         switch (command) {
1062         case SIOCSIFMTU:
1063                 switch (adapter->hw.mac.type) {
1064                 case e1000_82573:
1065                         /*
1066                          * 82573 only supports jumbo frames
1067                          * if ASPM is disabled.
1068                          */
1069                         e1000_read_nvm(&adapter->hw,
1070                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1071                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1072                                 max_frame_size = ETHER_MAX_LEN;
1073                                 break;
1074                         }
1075                         /* FALL THROUGH */
1076
1077                 /* Limit Jumbo Frame size */
1078                 case e1000_82571:
1079                 case e1000_82572:
1080                 case e1000_ich9lan:
1081                 case e1000_ich10lan:
1082                 case e1000_pch2lan:
1083                 case e1000_82574:
1084                 case e1000_82583:
1085                 case e1000_80003es2lan:
1086                         max_frame_size = 9234;
1087                         break;
1088
1089                 case e1000_pchlan:
1090                         max_frame_size = 4096;
1091                         break;
1092
1093                 /* Adapters that do not support jumbo frames */
1094                 case e1000_82542:
1095                 case e1000_ich8lan:
1096                         max_frame_size = ETHER_MAX_LEN;
1097                         break;
1098
1099                 default:
1100                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1101                         break;
1102                 }
1103                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1104                     ETHER_CRC_LEN) {
1105                         error = EINVAL;
1106                         break;
1107                 }
1108
1109                 ifp->if_mtu = ifr->ifr_mtu;
1110                 adapter->max_frame_size =
1111                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1112
1113                 if (ifp->if_flags & IFF_RUNNING)
1114                         em_init(adapter);
1115                 break;
1116
1117         case SIOCSIFFLAGS:
1118                 if (ifp->if_flags & IFF_UP) {
1119                         if ((ifp->if_flags & IFF_RUNNING)) {
1120                                 if ((ifp->if_flags ^ adapter->if_flags) &
1121                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1122                                         em_disable_promisc(adapter);
1123                                         em_set_promisc(adapter);
1124                                 }
1125                         } else {
1126                                 em_init(adapter);
1127                         }
1128                 } else if (ifp->if_flags & IFF_RUNNING) {
1129                         em_stop(adapter);
1130                 }
1131                 adapter->if_flags = ifp->if_flags;
1132                 break;
1133
1134         case SIOCADDMULTI:
1135         case SIOCDELMULTI:
1136                 if (ifp->if_flags & IFF_RUNNING) {
1137                         em_disable_intr(adapter);
1138                         em_set_multi(adapter);
1139                         if (adapter->hw.mac.type == e1000_82542 &&
1140                             adapter->hw.revision_id == E1000_REVISION_2)
1141                                 em_init_rx_unit(adapter);
1142 #ifdef IFPOLL_ENABLE
1143                         if (!(ifp->if_flags & IFF_NPOLLING))
1144 #endif
1145                                 em_enable_intr(adapter);
1146                 }
1147                 break;
1148
1149         case SIOCSIFMEDIA:
1150                 /* Check SOL/IDER usage */
1151                 if (e1000_check_reset_block(&adapter->hw)) {
1152                         device_printf(adapter->dev, "Media change is"
1153                             " blocked due to SOL/IDER session.\n");
1154                         break;
1155                 }
1156                 /* FALL THROUGH */
1157
1158         case SIOCGIFMEDIA:
1159                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1160                 break;
1161
1162         case SIOCSIFCAP:
1163                 reinit = 0;
1164                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1165                 if (mask & IFCAP_RXCSUM) {
1166                         ifp->if_capenable ^= IFCAP_RXCSUM;
1167                         reinit = 1;
1168                 }
1169                 if (mask & IFCAP_TXCSUM) {
1170                         ifp->if_capenable ^= IFCAP_TXCSUM;
1171                         if (ifp->if_capenable & IFCAP_TXCSUM)
1172                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1173                         else
1174                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1175                 }
1176                 if (mask & IFCAP_TSO) {
1177                         ifp->if_capenable ^= IFCAP_TSO;
1178                         if (ifp->if_capenable & IFCAP_TSO)
1179                                 ifp->if_hwassist |= CSUM_TSO;
1180                         else
1181                                 ifp->if_hwassist &= ~CSUM_TSO;
1182                 }
1183                 if (mask & IFCAP_VLAN_HWTAGGING) {
1184                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1185                         reinit = 1;
1186                 }
1187                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1188                         em_init(adapter);
1189                 break;
1190
1191         default:
1192                 error = ether_ioctl(ifp, command, data);
1193                 break;
1194         }
1195         return (error);
1196 }
1197
1198 static void
1199 em_watchdog(struct ifnet *ifp)
1200 {
1201         struct adapter *adapter = ifp->if_softc;
1202
1203         ASSERT_SERIALIZED(ifp->if_serializer);
1204
1205         /*
1206          * The timer is set to 5 every time start queues a packet.
1207          * Then txeof keeps resetting it as long as it cleans at
1208          * least one descriptor.
1209          * Finally, anytime all descriptors are clean the timer is
1210          * set to 0.
1211          */
1212
1213         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1214             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1215                 /*
1216                  * If we reach here, all TX jobs are completed and
1217                  * the TX engine should have been idled for some time.
1218                  * We don't need to call if_devstart() here.
1219                  */
1220                 ifq_clr_oactive(&ifp->if_snd);
1221                 ifp->if_timer = 0;
1222                 return;
1223         }
1224
1225         /*
1226          * If we are in this routine because of pause frames, then
1227          * don't reset the hardware.
1228          */
1229         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1230             E1000_STATUS_TXOFF) {
1231                 ifp->if_timer = EM_TX_TIMEOUT;
1232                 return;
1233         }
1234
1235         if (e1000_check_for_link(&adapter->hw) == 0)
1236                 if_printf(ifp, "watchdog timeout -- resetting\n");
1237
1238         IFNET_STAT_INC(ifp, oerrors, 1);
1239         adapter->watchdog_events++;
1240
1241         em_init(adapter);
1242
1243         if (!ifq_is_empty(&ifp->if_snd))
1244                 if_devstart(ifp);
1245 }
1246
1247 static void
1248 em_init(void *xsc)
1249 {
1250         struct adapter *adapter = xsc;
1251         struct ifnet *ifp = &adapter->arpcom.ac_if;
1252         device_t dev = adapter->dev;
1253
1254         ASSERT_SERIALIZED(ifp->if_serializer);
1255
1256         em_stop(adapter);
1257
1258         /* Get the latest mac address, User can use a LAA */
1259         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1260
1261         /* Put the address into the Receive Address Array */
1262         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1263
1264         /*
1265          * With the 82571 adapter, RAR[0] may be overwritten
1266          * when the other port is reset, we make a duplicate
1267          * in RAR[14] for that eventuality, this assures
1268          * the interface continues to function.
1269          */
1270         if (adapter->hw.mac.type == e1000_82571) {
1271                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1272                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1273                     E1000_RAR_ENTRIES - 1);
1274         }
1275
1276         /* Reset the hardware */
1277         if (em_reset(adapter)) {
1278                 device_printf(dev, "Unable to reset the hardware\n");
1279                 /* XXX em_stop()? */
1280                 return;
1281         }
1282         em_update_link_status(adapter);
1283
1284         /* Setup VLAN support, basic and offload if available */
1285         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1286
1287         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1288                 uint32_t ctrl;
1289
1290                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1291                 ctrl |= E1000_CTRL_VME;
1292                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1293         }
1294
1295         /* Configure for OS presence */
1296         em_get_mgmt(adapter);
1297
1298         /* Prepare transmit descriptors and buffers */
1299         em_init_tx_ring(adapter);
1300         em_init_tx_unit(adapter);
1301
1302         /* Setup Multicast table */
1303         em_set_multi(adapter);
1304
1305         /* Prepare receive descriptors and buffers */
1306         if (em_init_rx_ring(adapter)) {
1307                 device_printf(dev, "Could not setup receive structures\n");
1308                 em_stop(adapter);
1309                 return;
1310         }
1311         em_init_rx_unit(adapter);
1312
1313         /* Don't lose promiscuous settings */
1314         em_set_promisc(adapter);
1315
1316         ifp->if_flags |= IFF_RUNNING;
1317         ifq_clr_oactive(&ifp->if_snd);
1318
1319         callout_reset(&adapter->timer, hz, em_timer, adapter);
1320         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1321
1322         /* MSI/X configuration for 82574 */
1323         if (adapter->hw.mac.type == e1000_82574) {
1324                 int tmp;
1325
1326                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1327                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1328                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1329                 /*
1330                  * XXX MSIX
1331                  * Set the IVAR - interrupt vector routing.
1332                  * Each nibble represents a vector, high bit
1333                  * is enable, other 3 bits are the MSIX table
1334                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1335                  * Link (other) to 2, hence the magic number.
1336                  */
1337                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1338         }
1339
1340 #ifdef IFPOLL_ENABLE
1341         /*
1342          * Only enable interrupts if we are not polling, make sure
1343          * they are off otherwise.
1344          */
1345         if (ifp->if_flags & IFF_NPOLLING)
1346                 em_disable_intr(adapter);
1347         else
1348 #endif /* IFPOLL_ENABLE */
1349                 em_enable_intr(adapter);
1350
1351         /* AMT based hardware can now take control from firmware */
1352         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1353             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1354             adapter->hw.mac.type >= e1000_82571)
1355                 em_get_hw_control(adapter);
1356 }
1357
1358 #ifdef IFPOLL_ENABLE
1359
1360 static void
1361 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1362 {
1363         struct adapter *adapter = ifp->if_softc;
1364
1365         ASSERT_SERIALIZED(ifp->if_serializer);
1366
1367         if (adapter->npoll.ifpc_stcount-- == 0) {
1368                 uint32_t reg_icr;
1369
1370                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1371
1372                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1373                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1374                         callout_stop(&adapter->timer);
1375                         adapter->hw.mac.get_link_status = 1;
1376                         em_update_link_status(adapter);
1377                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1378                 }
1379         }
1380
1381         em_rxeof(adapter, count);
1382         em_txeof(adapter);
1383
1384         if (!ifq_is_empty(&ifp->if_snd))
1385                 if_devstart(ifp);
1386 }
1387
1388 static void
1389 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1390 {
1391         struct adapter *adapter = ifp->if_softc;
1392
1393         ASSERT_SERIALIZED(ifp->if_serializer);
1394
1395         if (info != NULL) {
1396                 int cpuid = adapter->npoll.ifpc_cpuid;
1397
1398                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1399                 info->ifpi_rx[cpuid].arg = NULL;
1400                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1401
1402                 if (ifp->if_flags & IFF_RUNNING)
1403                         em_disable_intr(adapter);
1404                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1405         } else {
1406                 if (ifp->if_flags & IFF_RUNNING)
1407                         em_enable_intr(adapter);
1408                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1409         }
1410 }
1411
1412 #endif /* IFPOLL_ENABLE */
1413
1414 static void
1415 em_intr(void *xsc)
1416 {
1417         em_intr_body(xsc, TRUE);
1418 }
1419
1420 static void
1421 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1422 {
1423         struct ifnet *ifp = &adapter->arpcom.ac_if;
1424         uint32_t reg_icr;
1425
1426         logif(intr_beg);
1427         ASSERT_SERIALIZED(ifp->if_serializer);
1428
1429         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1430
1431         if (chk_asserted &&
1432             ((adapter->hw.mac.type >= e1000_82571 &&
1433               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1434              reg_icr == 0)) {
1435                 logif(intr_end);
1436                 return;
1437         }
1438
1439         /*
1440          * XXX: some laptops trigger several spurious interrupts
1441          * on em(4) when in the resume cycle. The ICR register
1442          * reports all-ones value in this case. Processing such
1443          * interrupts would lead to a freeze. I don't know why.
1444          */
1445         if (reg_icr == 0xffffffff) {
1446                 logif(intr_end);
1447                 return;
1448         }
1449
1450         if (ifp->if_flags & IFF_RUNNING) {
1451                 if (reg_icr &
1452                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1453                         em_rxeof(adapter, -1);
1454                 if (reg_icr & E1000_ICR_TXDW) {
1455                         em_txeof(adapter);
1456                         if (!ifq_is_empty(&ifp->if_snd))
1457                                 if_devstart(ifp);
1458                 }
1459         }
1460
1461         /* Link status change */
1462         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1463                 callout_stop(&adapter->timer);
1464                 adapter->hw.mac.get_link_status = 1;
1465                 em_update_link_status(adapter);
1466
1467                 /* Deal with TX cruft when link lost */
1468                 em_tx_purge(adapter);
1469
1470                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1471         }
1472
1473         if (reg_icr & E1000_ICR_RXO)
1474                 adapter->rx_overruns++;
1475
1476         logif(intr_end);
1477 }
1478
1479 static void
1480 em_intr_mask(void *xsc)
1481 {
1482         struct adapter *adapter = xsc;
1483
1484         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1485         /*
1486          * NOTE:
1487          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1488          * so don't check it.
1489          */
1490         em_intr_body(adapter, FALSE);
1491         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1492 }
1493
1494 static void
1495 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1496 {
1497         struct adapter *adapter = ifp->if_softc;
1498         u_char fiber_type = IFM_1000_SX;
1499
1500         ASSERT_SERIALIZED(ifp->if_serializer);
1501
1502         em_update_link_status(adapter);
1503
1504         ifmr->ifm_status = IFM_AVALID;
1505         ifmr->ifm_active = IFM_ETHER;
1506
1507         if (!adapter->link_active)
1508                 return;
1509
1510         ifmr->ifm_status |= IFM_ACTIVE;
1511
1512         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1513             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1514                 if (adapter->hw.mac.type == e1000_82545)
1515                         fiber_type = IFM_1000_LX;
1516                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1517         } else {
1518                 switch (adapter->link_speed) {
1519                 case 10:
1520                         ifmr->ifm_active |= IFM_10_T;
1521                         break;
1522                 case 100:
1523                         ifmr->ifm_active |= IFM_100_TX;
1524                         break;
1525
1526                 case 1000:
1527                         ifmr->ifm_active |= IFM_1000_T;
1528                         break;
1529                 }
1530                 if (adapter->link_duplex == FULL_DUPLEX)
1531                         ifmr->ifm_active |= IFM_FDX;
1532                 else
1533                         ifmr->ifm_active |= IFM_HDX;
1534         }
1535 }
1536
1537 static int
1538 em_media_change(struct ifnet *ifp)
1539 {
1540         struct adapter *adapter = ifp->if_softc;
1541         struct ifmedia *ifm = &adapter->media;
1542
1543         ASSERT_SERIALIZED(ifp->if_serializer);
1544
1545         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1546                 return (EINVAL);
1547
1548         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1549         case IFM_AUTO:
1550                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1551                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1552                 break;
1553
1554         case IFM_1000_LX:
1555         case IFM_1000_SX:
1556         case IFM_1000_T:
1557                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1558                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1559                 break;
1560
1561         case IFM_100_TX:
1562                 adapter->hw.mac.autoneg = FALSE;
1563                 adapter->hw.phy.autoneg_advertised = 0;
1564                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1565                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1566                 else
1567                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1568                 break;
1569
1570         case IFM_10_T:
1571                 adapter->hw.mac.autoneg = FALSE;
1572                 adapter->hw.phy.autoneg_advertised = 0;
1573                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1574                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1575                 else
1576                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1577                 break;
1578
1579         default:
1580                 if_printf(ifp, "Unsupported media type\n");
1581                 break;
1582         }
1583
1584         em_init(adapter);
1585
1586         return (0);
1587 }
1588
1589 static int
1590 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1591     int *segs_used, int *idx)
1592 {
1593         bus_dma_segment_t segs[EM_MAX_SCATTER];
1594         bus_dmamap_t map;
1595         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1596         struct e1000_tx_desc *ctxd = NULL;
1597         struct mbuf *m_head = *m_headp;
1598         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1599         int maxsegs, nsegs, i, j, first, last = 0, error;
1600
1601         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1602                 error = em_tso_pullup(adapter, m_headp);
1603                 if (error)
1604                         return error;
1605                 m_head = *m_headp;
1606         }
1607
1608         txd_upper = txd_lower = 0;
1609         txd_used = 0;
1610
1611         /*
1612          * Capture the first descriptor index, this descriptor
1613          * will have the index of the EOP which is the only one
1614          * that now gets a DONE bit writeback.
1615          */
1616         first = adapter->next_avail_tx_desc;
1617         tx_buffer = &adapter->tx_buffer_area[first];
1618         tx_buffer_mapped = tx_buffer;
1619         map = tx_buffer->map;
1620
1621         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1622         KASSERT(maxsegs >= adapter->spare_tx_desc,
1623                 ("not enough spare TX desc"));
1624         if (adapter->pcix_82544) {
1625                 /* Half it; see the comment in em_attach() */
1626                 maxsegs >>= 1;
1627         }
1628         if (maxsegs > EM_MAX_SCATTER)
1629                 maxsegs = EM_MAX_SCATTER;
1630
1631         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1632                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1633         if (error) {
1634                 if (error == ENOBUFS)
1635                         adapter->mbuf_alloc_failed++;
1636                 else
1637                         adapter->no_tx_dma_setup++;
1638
1639                 m_freem(*m_headp);
1640                 *m_headp = NULL;
1641                 return error;
1642         }
1643         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1644
1645         m_head = *m_headp;
1646         adapter->tx_nsegs += nsegs;
1647         *segs_used += nsegs;
1648
1649         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1650                 /* TSO will consume one TX desc */
1651                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1652                 adapter->tx_nsegs += i;
1653                 *segs_used += i;
1654         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1655                 /* TX csum offloading will consume one TX desc */
1656                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1657                 adapter->tx_nsegs += i;
1658                 *segs_used += i;
1659         }
1660         i = adapter->next_avail_tx_desc;
1661
1662         /* Set up our transmit descriptors */
1663         for (j = 0; j < nsegs; j++) {
1664                 /* If adapter is 82544 and on PCIX bus */
1665                 if(adapter->pcix_82544) {
1666                         DESC_ARRAY desc_array;
1667                         uint32_t array_elements, counter;
1668
1669                         /*
1670                          * Check the Address and Length combination and
1671                          * split the data accordingly
1672                          */
1673                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1674                                                 segs[j].ds_len, &desc_array);
1675                         for (counter = 0; counter < array_elements; counter++) {
1676                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1677
1678                                 tx_buffer = &adapter->tx_buffer_area[i];
1679                                 ctxd = &adapter->tx_desc_base[i];
1680
1681                                 ctxd->buffer_addr = htole64(
1682                                     desc_array.descriptor[counter].address);
1683                                 ctxd->lower.data = htole32(
1684                                     E1000_TXD_CMD_IFCS | txd_lower |
1685                                     desc_array.descriptor[counter].length);
1686                                 ctxd->upper.data = htole32(txd_upper);
1687
1688                                 last = i;
1689                                 if (++i == adapter->num_tx_desc)
1690                                         i = 0;
1691
1692                                 txd_used++;
1693                         }
1694                 } else {
1695                         tx_buffer = &adapter->tx_buffer_area[i];
1696                         ctxd = &adapter->tx_desc_base[i];
1697
1698                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1699                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1700                                                    txd_lower | segs[j].ds_len);
1701                         ctxd->upper.data = htole32(txd_upper);
1702
1703                         last = i;
1704                         if (++i == adapter->num_tx_desc)
1705                                 i = 0;
1706                 }
1707         }
1708
1709         adapter->next_avail_tx_desc = i;
1710         if (adapter->pcix_82544) {
1711                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1712                 adapter->num_tx_desc_avail -= txd_used;
1713         } else {
1714                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1715                 adapter->num_tx_desc_avail -= nsegs;
1716         }
1717
1718         /* Handle VLAN tag */
1719         if (m_head->m_flags & M_VLANTAG) {
1720                 /* Set the vlan id. */
1721                 ctxd->upper.fields.special =
1722                     htole16(m_head->m_pkthdr.ether_vlantag);
1723
1724                 /* Tell hardware to add tag */
1725                 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1726         }
1727
1728         tx_buffer->m_head = m_head;
1729         tx_buffer_mapped->map = tx_buffer->map;
1730         tx_buffer->map = map;
1731
1732         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1733                 adapter->tx_nsegs = 0;
1734
1735                 /*
1736                  * Report Status (RS) is turned on
1737                  * every tx_int_nsegs descriptors.
1738                  */
1739                 cmd = E1000_TXD_CMD_RS;
1740
1741                 /*
1742                  * Keep track of the descriptor, which will
1743                  * be written back by hardware.
1744                  */
1745                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1746                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1747                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1748         }
1749
1750         /*
1751          * Last Descriptor of Packet needs End Of Packet (EOP)
1752          */
1753         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1754
1755         if (adapter->hw.mac.type == e1000_82547) {
1756                 /*
1757                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1758                  * E1000 that this frame is available to transmit.
1759                  */
1760                 if (adapter->link_duplex == HALF_DUPLEX) {
1761                         em_82547_move_tail_serialized(adapter);
1762                 } else {
1763                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1764                         em_82547_update_fifo_head(adapter,
1765                             m_head->m_pkthdr.len);
1766                 }
1767         } else {
1768                 /*
1769                  * Defer TDT updating, until enough descriptors are setup
1770                  */
1771                 *idx = i;
1772         }
1773         return (0);
1774 }
1775
1776 /*
1777  * 82547 workaround to avoid controller hang in half-duplex environment.
1778  * The workaround is to avoid queuing a large packet that would span
1779  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1780  * in this case.  We do that only when FIFO is quiescent.
1781  */
1782 static void
1783 em_82547_move_tail_serialized(struct adapter *adapter)
1784 {
1785         struct e1000_tx_desc *tx_desc;
1786         uint16_t hw_tdt, sw_tdt, length = 0;
1787         bool eop = 0;
1788
1789         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1790
1791         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1792         sw_tdt = adapter->next_avail_tx_desc;
1793
1794         while (hw_tdt != sw_tdt) {
1795                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1796                 length += tx_desc->lower.flags.length;
1797                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1798                 if (++hw_tdt == adapter->num_tx_desc)
1799                         hw_tdt = 0;
1800
1801                 if (eop) {
1802                         if (em_82547_fifo_workaround(adapter, length)) {
1803                                 adapter->tx_fifo_wrk_cnt++;
1804                                 callout_reset(&adapter->tx_fifo_timer, 1,
1805                                         em_82547_move_tail, adapter);
1806                                 break;
1807                         }
1808                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1809                         em_82547_update_fifo_head(adapter, length);
1810                         length = 0;
1811                 }
1812         }
1813 }
1814
1815 static void
1816 em_82547_move_tail(void *xsc)
1817 {
1818         struct adapter *adapter = xsc;
1819         struct ifnet *ifp = &adapter->arpcom.ac_if;
1820
1821         lwkt_serialize_enter(ifp->if_serializer);
1822         em_82547_move_tail_serialized(adapter);
1823         lwkt_serialize_exit(ifp->if_serializer);
1824 }
1825
1826 static int
1827 em_82547_fifo_workaround(struct adapter *adapter, int len)
1828 {
1829         int fifo_space, fifo_pkt_len;
1830
1831         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1832
1833         if (adapter->link_duplex == HALF_DUPLEX) {
1834                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1835
1836                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1837                         if (em_82547_tx_fifo_reset(adapter))
1838                                 return (0);
1839                         else
1840                                 return (1);
1841                 }
1842         }
1843         return (0);
1844 }
1845
1846 static void
1847 em_82547_update_fifo_head(struct adapter *adapter, int len)
1848 {
1849         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1850
1851         /* tx_fifo_head is always 16 byte aligned */
1852         adapter->tx_fifo_head += fifo_pkt_len;
1853         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1854                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1855 }
1856
1857 static int
1858 em_82547_tx_fifo_reset(struct adapter *adapter)
1859 {
1860         uint32_t tctl;
1861
1862         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1863              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1864             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1865              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1866             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1867              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1868             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1869                 /* Disable TX unit */
1870                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1871                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1872                     tctl & ~E1000_TCTL_EN);
1873
1874                 /* Reset FIFO pointers */
1875                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1876                     adapter->tx_head_addr);
1877                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1878                     adapter->tx_head_addr);
1879                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1880                     adapter->tx_head_addr);
1881                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1882                     adapter->tx_head_addr);
1883
1884                 /* Re-enable TX unit */
1885                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1886                 E1000_WRITE_FLUSH(&adapter->hw);
1887
1888                 adapter->tx_fifo_head = 0;
1889                 adapter->tx_fifo_reset_cnt++;
1890
1891                 return (TRUE);
1892         } else {
1893                 return (FALSE);
1894         }
1895 }
1896
1897 static void
1898 em_set_promisc(struct adapter *adapter)
1899 {
1900         struct ifnet *ifp = &adapter->arpcom.ac_if;
1901         uint32_t reg_rctl;
1902
1903         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1904
1905         if (ifp->if_flags & IFF_PROMISC) {
1906                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1907                 /* Turn this on if you want to see bad packets */
1908                 if (em_debug_sbp)
1909                         reg_rctl |= E1000_RCTL_SBP;
1910                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1911         } else if (ifp->if_flags & IFF_ALLMULTI) {
1912                 reg_rctl |= E1000_RCTL_MPE;
1913                 reg_rctl &= ~E1000_RCTL_UPE;
1914                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1915         }
1916 }
1917
1918 static void
1919 em_disable_promisc(struct adapter *adapter)
1920 {
1921         uint32_t reg_rctl;
1922
1923         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1924
1925         reg_rctl &= ~E1000_RCTL_UPE;
1926         reg_rctl &= ~E1000_RCTL_MPE;
1927         reg_rctl &= ~E1000_RCTL_SBP;
1928         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1929 }
1930
1931 static void
1932 em_set_multi(struct adapter *adapter)
1933 {
1934         struct ifnet *ifp = &adapter->arpcom.ac_if;
1935         struct ifmultiaddr *ifma;
1936         uint32_t reg_rctl = 0;
1937         uint8_t *mta;
1938         int mcnt = 0;
1939
1940         mta = adapter->mta;
1941         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1942
1943         if (adapter->hw.mac.type == e1000_82542 &&
1944             adapter->hw.revision_id == E1000_REVISION_2) {
1945                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1946                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1947                         e1000_pci_clear_mwi(&adapter->hw);
1948                 reg_rctl |= E1000_RCTL_RST;
1949                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1950                 msec_delay(5);
1951         }
1952
1953         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1954                 if (ifma->ifma_addr->sa_family != AF_LINK)
1955                         continue;
1956
1957                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1958                         break;
1959
1960                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1961                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1962                 mcnt++;
1963         }
1964
1965         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1966                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1967                 reg_rctl |= E1000_RCTL_MPE;
1968                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1969         } else {
1970                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1971         }
1972
1973         if (adapter->hw.mac.type == e1000_82542 &&
1974             adapter->hw.revision_id == E1000_REVISION_2) {
1975                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1976                 reg_rctl &= ~E1000_RCTL_RST;
1977                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1978                 msec_delay(5);
1979                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1980                         e1000_pci_set_mwi(&adapter->hw);
1981         }
1982 }
1983
1984 /*
1985  * This routine checks for link status and updates statistics.
1986  */
1987 static void
1988 em_timer(void *xsc)
1989 {
1990         struct adapter *adapter = xsc;
1991         struct ifnet *ifp = &adapter->arpcom.ac_if;
1992
1993         lwkt_serialize_enter(ifp->if_serializer);
1994
1995         em_update_link_status(adapter);
1996         em_update_stats(adapter);
1997
1998         /* Reset LAA into RAR[0] on 82571 */
1999         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2000                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2001
2002         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2003                 em_print_hw_stats(adapter);
2004
2005         em_smartspeed(adapter);
2006
2007         callout_reset(&adapter->timer, hz, em_timer, adapter);
2008
2009         lwkt_serialize_exit(ifp->if_serializer);
2010 }
2011
2012 static void
2013 em_update_link_status(struct adapter *adapter)
2014 {
2015         struct e1000_hw *hw = &adapter->hw;
2016         struct ifnet *ifp = &adapter->arpcom.ac_if;
2017         device_t dev = adapter->dev;
2018         uint32_t link_check = 0;
2019
2020         /* Get the cached link value or read phy for real */
2021         switch (hw->phy.media_type) {
2022         case e1000_media_type_copper:
2023                 if (hw->mac.get_link_status) {
2024                         /* Do the work to read phy */
2025                         e1000_check_for_link(hw);
2026                         link_check = !hw->mac.get_link_status;
2027                         if (link_check) /* ESB2 fix */
2028                                 e1000_cfg_on_link_up(hw);
2029                 } else {
2030                         link_check = TRUE;
2031                 }
2032                 break;
2033
2034         case e1000_media_type_fiber:
2035                 e1000_check_for_link(hw);
2036                 link_check =
2037                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2038                 break;
2039
2040         case e1000_media_type_internal_serdes:
2041                 e1000_check_for_link(hw);
2042                 link_check = adapter->hw.mac.serdes_has_link;
2043                 break;
2044
2045         case e1000_media_type_unknown:
2046         default:
2047                 break;
2048         }
2049
2050         /* Now check for a transition */
2051         if (link_check && adapter->link_active == 0) {
2052                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2053                     &adapter->link_duplex);
2054
2055                 /*
2056                  * Check if we should enable/disable SPEED_MODE bit on
2057                  * 82571/82572
2058                  */
2059                 if (adapter->link_speed != SPEED_1000 &&
2060                     (hw->mac.type == e1000_82571 ||
2061                      hw->mac.type == e1000_82572)) {
2062                         int tarc0;
2063
2064                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2065                         tarc0 &= ~SPEED_MODE_BIT;
2066                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2067                 }
2068                 if (bootverbose) {
2069                         device_printf(dev, "Link is up %d Mbps %s\n",
2070                             adapter->link_speed,
2071                             ((adapter->link_duplex == FULL_DUPLEX) ?
2072                             "Full Duplex" : "Half Duplex"));
2073                 }
2074                 adapter->link_active = 1;
2075                 adapter->smartspeed = 0;
2076                 ifp->if_baudrate = adapter->link_speed * 1000000;
2077                 ifp->if_link_state = LINK_STATE_UP;
2078                 if_link_state_change(ifp);
2079         } else if (!link_check && adapter->link_active == 1) {
2080                 ifp->if_baudrate = adapter->link_speed = 0;
2081                 adapter->link_duplex = 0;
2082                 if (bootverbose)
2083                         device_printf(dev, "Link is Down\n");
2084                 adapter->link_active = 0;
2085 #if 0
2086                 /* Link down, disable watchdog */
2087                 if->if_timer = 0;
2088 #endif
2089                 ifp->if_link_state = LINK_STATE_DOWN;
2090                 if_link_state_change(ifp);
2091         }
2092 }
2093
2094 static void
2095 em_stop(struct adapter *adapter)
2096 {
2097         struct ifnet *ifp = &adapter->arpcom.ac_if;
2098         int i;
2099
2100         ASSERT_SERIALIZED(ifp->if_serializer);
2101
2102         em_disable_intr(adapter);
2103
2104         callout_stop(&adapter->timer);
2105         callout_stop(&adapter->tx_fifo_timer);
2106
2107         ifp->if_flags &= ~IFF_RUNNING;
2108         ifq_clr_oactive(&ifp->if_snd);
2109         ifp->if_timer = 0;
2110
2111         e1000_reset_hw(&adapter->hw);
2112         if (adapter->hw.mac.type >= e1000_82544)
2113                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2114
2115         for (i = 0; i < adapter->num_tx_desc; i++) {
2116                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2117
2118                 if (tx_buffer->m_head != NULL) {
2119                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2120                         m_freem(tx_buffer->m_head);
2121                         tx_buffer->m_head = NULL;
2122                 }
2123         }
2124
2125         for (i = 0; i < adapter->num_rx_desc; i++) {
2126                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2127
2128                 if (rx_buffer->m_head != NULL) {
2129                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2130                         m_freem(rx_buffer->m_head);
2131                         rx_buffer->m_head = NULL;
2132                 }
2133         }
2134
2135         if (adapter->fmp != NULL)
2136                 m_freem(adapter->fmp);
2137         adapter->fmp = NULL;
2138         adapter->lmp = NULL;
2139
2140         adapter->csum_flags = 0;
2141         adapter->csum_lhlen = 0;
2142         adapter->csum_iphlen = 0;
2143         adapter->csum_thlen = 0;
2144         adapter->csum_mss = 0;
2145         adapter->csum_pktlen = 0;
2146
2147         adapter->tx_dd_head = 0;
2148         adapter->tx_dd_tail = 0;
2149         adapter->tx_nsegs = 0;
2150 }
2151
2152 static int
2153 em_get_hw_info(struct adapter *adapter)
2154 {
2155         device_t dev = adapter->dev;
2156
2157         /* Save off the information about this board */
2158         adapter->hw.vendor_id = pci_get_vendor(dev);
2159         adapter->hw.device_id = pci_get_device(dev);
2160         adapter->hw.revision_id = pci_get_revid(dev);
2161         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2162         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2163
2164         /* Do Shared Code Init and Setup */
2165         if (e1000_set_mac_type(&adapter->hw))
2166                 return ENXIO;
2167         return 0;
2168 }
2169
2170 static int
2171 em_alloc_pci_res(struct adapter *adapter)
2172 {
2173         device_t dev = adapter->dev;
2174         u_int intr_flags;
2175         int val, rid, msi_enable;
2176
2177         /* Enable bus mastering */
2178         pci_enable_busmaster(dev);
2179
2180         adapter->memory_rid = EM_BAR_MEM;
2181         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2182                                 &adapter->memory_rid, RF_ACTIVE);
2183         if (adapter->memory == NULL) {
2184                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2185                 return (ENXIO);
2186         }
2187         adapter->osdep.mem_bus_space_tag =
2188             rman_get_bustag(adapter->memory);
2189         adapter->osdep.mem_bus_space_handle =
2190             rman_get_bushandle(adapter->memory);
2191
2192         /* XXX This is quite goofy, it is not actually used */
2193         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2194
2195         /* Only older adapters use IO mapping */
2196         if (adapter->hw.mac.type > e1000_82543 &&
2197             adapter->hw.mac.type < e1000_82571) {
2198                 /* Figure our where our IO BAR is ? */
2199                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2200                         val = pci_read_config(dev, rid, 4);
2201                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2202                                 adapter->io_rid = rid;
2203                                 break;
2204                         }
2205                         rid += 4;
2206                         /* check for 64bit BAR */
2207                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2208                                 rid += 4;
2209                 }
2210                 if (rid >= PCIR_CARDBUSCIS) {
2211                         device_printf(dev, "Unable to locate IO BAR\n");
2212                         return (ENXIO);
2213                 }
2214                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2215                                         &adapter->io_rid, RF_ACTIVE);
2216                 if (adapter->ioport == NULL) {
2217                         device_printf(dev, "Unable to allocate bus resource: "
2218                             "ioport\n");
2219                         return (ENXIO);
2220                 }
2221                 adapter->hw.io_base = 0;
2222                 adapter->osdep.io_bus_space_tag =
2223                     rman_get_bustag(adapter->ioport);
2224                 adapter->osdep.io_bus_space_handle =
2225                     rman_get_bushandle(adapter->ioport);
2226         }
2227
2228         /*
2229          * Don't enable MSI-X on 82574, see:
2230          * 82574 specification update errata #15
2231          *
2232          * Don't enable MSI on PCI/PCI-X chips, see:
2233          * 82540 specification update errata #6
2234          * 82545 specification update errata #4
2235          *
2236          * Don't enable MSI on 82571/82572, see:
2237          * 82571/82572 specification update errata #63
2238          */
2239         msi_enable = em_msi_enable;
2240         if (msi_enable &&
2241             (!pci_is_pcie(dev) ||
2242              adapter->hw.mac.type == e1000_82571 ||
2243              adapter->hw.mac.type == e1000_82572))
2244                 msi_enable = 0;
2245
2246         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2247             &adapter->intr_rid, &intr_flags);
2248
2249         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2250                 int unshared;
2251
2252                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2253                 if (!unshared) {
2254                         adapter->flags |= EM_FLAG_SHARED_INTR;
2255                         if (bootverbose)
2256                                 device_printf(dev, "IRQ shared\n");
2257                 } else {
2258                         intr_flags &= ~RF_SHAREABLE;
2259                         if (bootverbose)
2260                                 device_printf(dev, "IRQ unshared\n");
2261                 }
2262         }
2263
2264         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2265             &adapter->intr_rid, intr_flags);
2266         if (adapter->intr_res == NULL) {
2267                 device_printf(dev, "Unable to allocate bus resource: "
2268                     "interrupt\n");
2269                 return (ENXIO);
2270         }
2271
2272         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2273         adapter->hw.back = &adapter->osdep;
2274         return (0);
2275 }
2276
2277 static void
2278 em_free_pci_res(struct adapter *adapter)
2279 {
2280         device_t dev = adapter->dev;
2281
2282         if (adapter->intr_res != NULL) {
2283                 bus_release_resource(dev, SYS_RES_IRQ,
2284                     adapter->intr_rid, adapter->intr_res);
2285         }
2286
2287         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2288                 pci_release_msi(dev);
2289
2290         if (adapter->memory != NULL) {
2291                 bus_release_resource(dev, SYS_RES_MEMORY,
2292                     adapter->memory_rid, adapter->memory);
2293         }
2294
2295         if (adapter->flash != NULL) {
2296                 bus_release_resource(dev, SYS_RES_MEMORY,
2297                     adapter->flash_rid, adapter->flash);
2298         }
2299
2300         if (adapter->ioport != NULL) {
2301                 bus_release_resource(dev, SYS_RES_IOPORT,
2302                     adapter->io_rid, adapter->ioport);
2303         }
2304 }
2305
2306 static int
2307 em_reset(struct adapter *adapter)
2308 {
2309         device_t dev = adapter->dev;
2310         uint16_t rx_buffer_size;
2311         uint32_t pba;
2312
2313         /* When hardware is reset, fifo_head is also reset */
2314         adapter->tx_fifo_head = 0;
2315
2316         /* Set up smart power down as default off on newer adapters. */
2317         if (!em_smart_pwr_down &&
2318             (adapter->hw.mac.type == e1000_82571 ||
2319              adapter->hw.mac.type == e1000_82572)) {
2320                 uint16_t phy_tmp = 0;
2321
2322                 /* Speed up time to link by disabling smart power down. */
2323                 e1000_read_phy_reg(&adapter->hw,
2324                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2325                 phy_tmp &= ~IGP02E1000_PM_SPD;
2326                 e1000_write_phy_reg(&adapter->hw,
2327                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2328         }
2329
2330         /*
2331          * Packet Buffer Allocation (PBA)
2332          * Writing PBA sets the receive portion of the buffer
2333          * the remainder is used for the transmit buffer.
2334          *
2335          * Devices before the 82547 had a Packet Buffer of 64K.
2336          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2337          * After the 82547 the buffer was reduced to 40K.
2338          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2339          *   Note: default does not leave enough room for Jumbo Frame >10k.
2340          */
2341         switch (adapter->hw.mac.type) {
2342         case e1000_82547:
2343         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2344                 if (adapter->max_frame_size > 8192)
2345                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2346                 else
2347                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2348                 adapter->tx_fifo_head = 0;
2349                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2350                 adapter->tx_fifo_size =
2351                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2352                 break;
2353
2354         /* Total Packet Buffer on these is 48K */
2355         case e1000_82571:
2356         case e1000_82572:
2357         case e1000_80003es2lan:
2358                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2359                 break;
2360
2361         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2362                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2363                 break;
2364
2365         case e1000_82574:
2366         case e1000_82583:
2367                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2368                 break;
2369
2370         case e1000_ich8lan:
2371                 pba = E1000_PBA_8K;
2372                 break;
2373
2374         case e1000_ich9lan:
2375         case e1000_ich10lan:
2376 #define E1000_PBA_10K   0x000A
2377                 pba = E1000_PBA_10K;
2378                 break;
2379
2380         case e1000_pchlan:
2381         case e1000_pch2lan:
2382                 pba = E1000_PBA_26K;
2383                 break;
2384
2385         default:
2386                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2387                 if (adapter->max_frame_size > 8192)
2388                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2389                 else
2390                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2391         }
2392         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2393
2394         /*
2395          * These parameters control the automatic generation (Tx) and
2396          * response (Rx) to Ethernet PAUSE frames.
2397          * - High water mark should allow for at least two frames to be
2398          *   received after sending an XOFF.
2399          * - Low water mark works best when it is very near the high water mark.
2400          *   This allows the receiver to restart by sending XON when it has
2401          *   drained a bit. Here we use an arbitary value of 1500 which will
2402          *   restart after one full frame is pulled from the buffer. There
2403          *   could be several smaller frames in the buffer and if so they will
2404          *   not trigger the XON until their total number reduces the buffer
2405          *   by 1500.
2406          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2407          */
2408         rx_buffer_size =
2409                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2410
2411         adapter->hw.fc.high_water = rx_buffer_size -
2412                                     roundup2(adapter->max_frame_size, 1024);
2413         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2414
2415         if (adapter->hw.mac.type == e1000_80003es2lan)
2416                 adapter->hw.fc.pause_time = 0xFFFF;
2417         else
2418                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2419
2420         adapter->hw.fc.send_xon = TRUE;
2421
2422         adapter->hw.fc.requested_mode = e1000_fc_full;
2423
2424         /*
2425          * Device specific overrides/settings
2426          */
2427         switch (adapter->hw.mac.type) {
2428         case e1000_pchlan:
2429                 /* Workaround: no TX flow ctrl for PCH */
2430                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2431                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2432                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2433                         adapter->hw.fc.high_water = 0x3500;
2434                         adapter->hw.fc.low_water = 0x1500;
2435                 } else {
2436                         adapter->hw.fc.high_water = 0x5000;
2437                         adapter->hw.fc.low_water = 0x3000;
2438                 }
2439                 adapter->hw.fc.refresh_time = 0x1000;
2440                 break;
2441
2442         case e1000_pch2lan:
2443                 adapter->hw.fc.high_water = 0x5C20;
2444                 adapter->hw.fc.low_water = 0x5048;
2445                 adapter->hw.fc.pause_time = 0x0650;
2446                 adapter->hw.fc.refresh_time = 0x0400;
2447                 /* Jumbos need adjusted PBA */
2448                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2449                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2450                 else
2451                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2452                 break;
2453
2454         case e1000_ich9lan:
2455         case e1000_ich10lan:
2456                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2457                         adapter->hw.fc.high_water = 0x2800;
2458                         adapter->hw.fc.low_water =
2459                             adapter->hw.fc.high_water - 8;
2460                         break;
2461                 }
2462                 /* FALL THROUGH */
2463         default:
2464                 if (adapter->hw.mac.type == e1000_80003es2lan)
2465                         adapter->hw.fc.pause_time = 0xFFFF;
2466                 break;
2467         }
2468
2469         /* Issue a global reset */
2470         e1000_reset_hw(&adapter->hw);
2471         if (adapter->hw.mac.type >= e1000_82544)
2472                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2473         em_disable_aspm(adapter);
2474
2475         if (e1000_init_hw(&adapter->hw) < 0) {
2476                 device_printf(dev, "Hardware Initialization Failed\n");
2477                 return (EIO);
2478         }
2479
2480         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2481         e1000_get_phy_info(&adapter->hw);
2482         e1000_check_for_link(&adapter->hw);
2483
2484         return (0);
2485 }
2486
2487 static void
2488 em_setup_ifp(struct adapter *adapter)
2489 {
2490         struct ifnet *ifp = &adapter->arpcom.ac_if;
2491
2492         if_initname(ifp, device_get_name(adapter->dev),
2493                     device_get_unit(adapter->dev));
2494         ifp->if_softc = adapter;
2495         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2496         ifp->if_init =  em_init;
2497         ifp->if_ioctl = em_ioctl;
2498         ifp->if_start = em_start;
2499 #ifdef IFPOLL_ENABLE
2500         ifp->if_npoll = em_npoll;
2501 #endif
2502         ifp->if_watchdog = em_watchdog;
2503         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2504         ifq_set_ready(&ifp->if_snd);
2505
2506         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2507
2508         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2509         if (adapter->hw.mac.type >= e1000_82543)
2510                 ifp->if_capabilities |= IFCAP_HWCSUM;
2511         if (adapter->flags & EM_FLAG_TSO)
2512                 ifp->if_capabilities |= IFCAP_TSO;
2513         ifp->if_capenable = ifp->if_capabilities;
2514
2515         if (ifp->if_capenable & IFCAP_TXCSUM)
2516                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2517         if (ifp->if_capenable & IFCAP_TSO)
2518                 ifp->if_hwassist |= CSUM_TSO;
2519
2520         /*
2521          * Tell the upper layer(s) we support long frames.
2522          */
2523         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2524
2525         /*
2526          * Specify the media types supported by this adapter and register
2527          * callbacks to update media and link information
2528          */
2529         ifmedia_init(&adapter->media, IFM_IMASK,
2530                      em_media_change, em_media_status);
2531         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2532             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2533                 u_char fiber_type = IFM_1000_SX; /* default type */
2534
2535                 if (adapter->hw.mac.type == e1000_82545)
2536                         fiber_type = IFM_1000_LX;
2537                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2538                             0, NULL);
2539                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2540         } else {
2541                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2542                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2543                             0, NULL);
2544                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2545                             0, NULL);
2546                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2547                             0, NULL);
2548                 if (adapter->hw.phy.type != e1000_phy_ife) {
2549                         ifmedia_add(&adapter->media,
2550                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2551                         ifmedia_add(&adapter->media,
2552                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2553                 }
2554         }
2555         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2556         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2557 }
2558
2559
2560 /*
2561  * Workaround for SmartSpeed on 82541 and 82547 controllers
2562  */
2563 static void
2564 em_smartspeed(struct adapter *adapter)
2565 {
2566         uint16_t phy_tmp;
2567
2568         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2569             adapter->hw.mac.autoneg == 0 ||
2570             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2571                 return;
2572
2573         if (adapter->smartspeed == 0) {
2574                 /*
2575                  * If Master/Slave config fault is asserted twice,
2576                  * we assume back-to-back
2577                  */
2578                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2579                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2580                         return;
2581                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2582                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2583                         e1000_read_phy_reg(&adapter->hw,
2584                             PHY_1000T_CTRL, &phy_tmp);
2585                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2586                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2587                                 e1000_write_phy_reg(&adapter->hw,
2588                                     PHY_1000T_CTRL, phy_tmp);
2589                                 adapter->smartspeed++;
2590                                 if (adapter->hw.mac.autoneg &&
2591                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2592                                     !e1000_read_phy_reg(&adapter->hw,
2593                                      PHY_CONTROL, &phy_tmp)) {
2594                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2595                                                    MII_CR_RESTART_AUTO_NEG;
2596                                         e1000_write_phy_reg(&adapter->hw,
2597                                             PHY_CONTROL, phy_tmp);
2598                                 }
2599                         }
2600                 }
2601                 return;
2602         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2603                 /* If still no link, perhaps using 2/3 pair cable */
2604                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2605                 phy_tmp |= CR_1000T_MS_ENABLE;
2606                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2607                 if (adapter->hw.mac.autoneg &&
2608                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2609                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2610                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2611                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2612                 }
2613         }
2614
2615         /* Restart process after EM_SMARTSPEED_MAX iterations */
2616         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2617                 adapter->smartspeed = 0;
2618 }
2619
2620 static int
2621 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2622               struct em_dma_alloc *dma)
2623 {
2624         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2625                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2626                                 &dma->dma_tag, &dma->dma_map,
2627                                 &dma->dma_paddr);
2628         if (dma->dma_vaddr == NULL)
2629                 return ENOMEM;
2630         else
2631                 return 0;
2632 }
2633
2634 static void
2635 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2636 {
2637         if (dma->dma_tag == NULL)
2638                 return;
2639         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2640         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2641         bus_dma_tag_destroy(dma->dma_tag);
2642 }
2643
2644 static int
2645 em_create_tx_ring(struct adapter *adapter)
2646 {
2647         device_t dev = adapter->dev;
2648         struct em_buffer *tx_buffer;
2649         int error, i;
2650
2651         adapter->tx_buffer_area =
2652                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2653                         M_DEVBUF, M_WAITOK | M_ZERO);
2654
2655         /*
2656          * Create DMA tags for tx buffers
2657          */
2658         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2659                         1, 0,                   /* alignment, bounds */
2660                         BUS_SPACE_MAXADDR,      /* lowaddr */
2661                         BUS_SPACE_MAXADDR,      /* highaddr */
2662                         NULL, NULL,             /* filter, filterarg */
2663                         EM_TSO_SIZE,            /* maxsize */
2664                         EM_MAX_SCATTER,         /* nsegments */
2665                         PAGE_SIZE,              /* maxsegsize */
2666                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2667                         BUS_DMA_ONEBPAGE,       /* flags */
2668                         &adapter->txtag);
2669         if (error) {
2670                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2671                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2672                 adapter->tx_buffer_area = NULL;
2673                 return error;
2674         }
2675
2676         /*
2677          * Create DMA maps for tx buffers
2678          */
2679         for (i = 0; i < adapter->num_tx_desc; i++) {
2680                 tx_buffer = &adapter->tx_buffer_area[i];
2681
2682                 error = bus_dmamap_create(adapter->txtag,
2683                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2684                                           &tx_buffer->map);
2685                 if (error) {
2686                         device_printf(dev, "Unable to create TX DMA map\n");
2687                         em_destroy_tx_ring(adapter, i);
2688                         return error;
2689                 }
2690         }
2691         return (0);
2692 }
2693
2694 static void
2695 em_init_tx_ring(struct adapter *adapter)
2696 {
2697         /* Clear the old ring contents */
2698         bzero(adapter->tx_desc_base,
2699             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2700
2701         /* Reset state */
2702         adapter->next_avail_tx_desc = 0;
2703         adapter->next_tx_to_clean = 0;
2704         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2705 }
2706
2707 static void
2708 em_init_tx_unit(struct adapter *adapter)
2709 {
2710         uint32_t tctl, tarc, tipg = 0;
2711         uint64_t bus_addr;
2712
2713         /* Setup the Base and Length of the Tx Descriptor Ring */
2714         bus_addr = adapter->txdma.dma_paddr;
2715         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2716             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2717         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2718             (uint32_t)(bus_addr >> 32));
2719         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2720             (uint32_t)bus_addr);
2721         /* Setup the HW Tx Head and Tail descriptor pointers */
2722         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2723         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2724
2725         /* Set the default values for the Tx Inter Packet Gap timer */
2726         switch (adapter->hw.mac.type) {
2727         case e1000_82542:
2728                 tipg = DEFAULT_82542_TIPG_IPGT;
2729                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2730                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2731                 break;
2732
2733         case e1000_80003es2lan:
2734                 tipg = DEFAULT_82543_TIPG_IPGR1;
2735                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2736                     E1000_TIPG_IPGR2_SHIFT;
2737                 break;
2738
2739         default:
2740                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2741                     adapter->hw.phy.media_type ==
2742                     e1000_media_type_internal_serdes)
2743                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2744                 else
2745                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2746                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2747                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2748                 break;
2749         }
2750
2751         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2752
2753         /* NOTE: 0 is not allowed for TIDV */
2754         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2755         if(adapter->hw.mac.type >= e1000_82540)
2756                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2757
2758         if (adapter->hw.mac.type == e1000_82571 ||
2759             adapter->hw.mac.type == e1000_82572) {
2760                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2761                 tarc |= SPEED_MODE_BIT;
2762                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2763         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2764                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2765                 tarc |= 1;
2766                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2767                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2768                 tarc |= 1;
2769                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2770         }
2771
2772         /* Program the Transmit Control Register */
2773         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2774         tctl &= ~E1000_TCTL_CT;
2775         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2776                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2777
2778         if (adapter->hw.mac.type >= e1000_82571)
2779                 tctl |= E1000_TCTL_MULR;
2780
2781         /* This write will effectively turn on the transmit unit. */
2782         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2783
2784         if (adapter->hw.mac.type == e1000_82571 ||
2785             adapter->hw.mac.type == e1000_82572 ||
2786             adapter->hw.mac.type == e1000_80003es2lan) {
2787                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2788                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2789                 tarc &= ~(1 << 28);
2790                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2791         }
2792 }
2793
2794 static void
2795 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2796 {
2797         struct em_buffer *tx_buffer;
2798         int i;
2799
2800         if (adapter->tx_buffer_area == NULL)
2801                 return;
2802
2803         for (i = 0; i < ndesc; i++) {
2804                 tx_buffer = &adapter->tx_buffer_area[i];
2805
2806                 KKASSERT(tx_buffer->m_head == NULL);
2807                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2808         }
2809         bus_dma_tag_destroy(adapter->txtag);
2810
2811         kfree(adapter->tx_buffer_area, M_DEVBUF);
2812         adapter->tx_buffer_area = NULL;
2813 }
2814
2815 /*
2816  * The offload context needs to be set when we transfer the first
2817  * packet of a particular protocol (TCP/UDP).  This routine has been
2818  * enhanced to deal with inserted VLAN headers.
2819  *
2820  * If the new packet's ether header length, ip header length and
2821  * csum offloading type are same as the previous packet, we should
2822  * avoid allocating a new csum context descriptor; mainly to take
2823  * advantage of the pipeline effect of the TX data read request.
2824  *
2825  * This function returns number of TX descrptors allocated for
2826  * csum context.
2827  */
2828 static int
2829 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2830           uint32_t *txd_upper, uint32_t *txd_lower)
2831 {
2832         struct e1000_context_desc *TXD;
2833         int curr_txd, ehdrlen, csum_flags;
2834         uint32_t cmd, hdr_len, ip_hlen;
2835
2836         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2837         ip_hlen = mp->m_pkthdr.csum_iphlen;
2838         ehdrlen = mp->m_pkthdr.csum_lhlen;
2839
2840         if (adapter->csum_lhlen == ehdrlen &&
2841             adapter->csum_iphlen == ip_hlen &&
2842             adapter->csum_flags == csum_flags) {
2843                 /*
2844                  * Same csum offload context as the previous packets;
2845                  * just return.
2846                  */
2847                 *txd_upper = adapter->csum_txd_upper;
2848                 *txd_lower = adapter->csum_txd_lower;
2849                 return 0;
2850         }
2851
2852         /*
2853          * Setup a new csum offload context.
2854          */
2855
2856         curr_txd = adapter->next_avail_tx_desc;
2857         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2858
2859         cmd = 0;
2860
2861         /* Setup of IP header checksum. */
2862         if (csum_flags & CSUM_IP) {
2863                 /*
2864                  * Start offset for header checksum calculation.
2865                  * End offset for header checksum calculation.
2866                  * Offset of place to put the checksum.
2867                  */
2868                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2869                 TXD->lower_setup.ip_fields.ipcse =
2870                     htole16(ehdrlen + ip_hlen - 1);
2871                 TXD->lower_setup.ip_fields.ipcso =
2872                     ehdrlen + offsetof(struct ip, ip_sum);
2873                 cmd |= E1000_TXD_CMD_IP;
2874                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2875         }
2876         hdr_len = ehdrlen + ip_hlen;
2877
2878         if (csum_flags & CSUM_TCP) {
2879                 /*
2880                  * Start offset for payload checksum calculation.
2881                  * End offset for payload checksum calculation.
2882                  * Offset of place to put the checksum.
2883                  */
2884                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2885                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2886                 TXD->upper_setup.tcp_fields.tucso =
2887                     hdr_len + offsetof(struct tcphdr, th_sum);
2888                 cmd |= E1000_TXD_CMD_TCP;
2889                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2890         } else if (csum_flags & CSUM_UDP) {
2891                 /*
2892                  * Start offset for header checksum calculation.
2893                  * End offset for header checksum calculation.
2894                  * Offset of place to put the checksum.
2895                  */
2896                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2897                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2898                 TXD->upper_setup.tcp_fields.tucso =
2899                     hdr_len + offsetof(struct udphdr, uh_sum);
2900                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2901         }
2902
2903         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2904                      E1000_TXD_DTYP_D;          /* Data descr */
2905
2906         /* Save the information for this csum offloading context */
2907         adapter->csum_lhlen = ehdrlen;
2908         adapter->csum_iphlen = ip_hlen;
2909         adapter->csum_flags = csum_flags;
2910         adapter->csum_txd_upper = *txd_upper;
2911         adapter->csum_txd_lower = *txd_lower;
2912
2913         TXD->tcp_seg_setup.data = htole32(0);
2914         TXD->cmd_and_length =
2915             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2916
2917         if (++curr_txd == adapter->num_tx_desc)
2918                 curr_txd = 0;
2919
2920         KKASSERT(adapter->num_tx_desc_avail > 0);
2921         adapter->num_tx_desc_avail--;
2922
2923         adapter->next_avail_tx_desc = curr_txd;
2924         return 1;
2925 }
2926
2927 static void
2928 em_txeof(struct adapter *adapter)
2929 {
2930         struct ifnet *ifp = &adapter->arpcom.ac_if;
2931         struct em_buffer *tx_buffer;
2932         int first, num_avail;
2933
2934         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2935                 return;
2936
2937         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2938                 return;
2939
2940         num_avail = adapter->num_tx_desc_avail;
2941         first = adapter->next_tx_to_clean;
2942
2943         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2944                 struct e1000_tx_desc *tx_desc;
2945                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2946
2947                 tx_desc = &adapter->tx_desc_base[dd_idx];
2948                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2949                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2950
2951                         if (++dd_idx == adapter->num_tx_desc)
2952                                 dd_idx = 0;
2953
2954                         while (first != dd_idx) {
2955                                 logif(pkt_txclean);
2956
2957                                 num_avail++;
2958
2959                                 tx_buffer = &adapter->tx_buffer_area[first];
2960                                 if (tx_buffer->m_head) {
2961                                         IFNET_STAT_INC(ifp, opackets, 1);
2962                                         bus_dmamap_unload(adapter->txtag,
2963                                                           tx_buffer->map);
2964                                         m_freem(tx_buffer->m_head);
2965                                         tx_buffer->m_head = NULL;
2966                                 }
2967
2968                                 if (++first == adapter->num_tx_desc)
2969                                         first = 0;
2970                         }
2971                 } else {
2972                         break;
2973                 }
2974         }
2975         adapter->next_tx_to_clean = first;
2976         adapter->num_tx_desc_avail = num_avail;
2977
2978         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2979                 adapter->tx_dd_head = 0;
2980                 adapter->tx_dd_tail = 0;
2981         }
2982
2983         if (!EM_IS_OACTIVE(adapter)) {
2984                 ifq_clr_oactive(&ifp->if_snd);
2985
2986                 /* All clean, turn off the timer */
2987                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2988                         ifp->if_timer = 0;
2989         }
2990 }
2991
2992 static void
2993 em_tx_collect(struct adapter *adapter)
2994 {
2995         struct ifnet *ifp = &adapter->arpcom.ac_if;
2996         struct em_buffer *tx_buffer;
2997         int tdh, first, num_avail, dd_idx = -1;
2998
2999         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3000                 return;
3001
3002         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
3003         if (tdh == adapter->next_tx_to_clean)
3004                 return;
3005
3006         if (adapter->tx_dd_head != adapter->tx_dd_tail)
3007                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3008
3009         num_avail = adapter->num_tx_desc_avail;
3010         first = adapter->next_tx_to_clean;
3011
3012         while (first != tdh) {
3013                 logif(pkt_txclean);
3014
3015                 num_avail++;
3016
3017                 tx_buffer = &adapter->tx_buffer_area[first];
3018                 if (tx_buffer->m_head) {
3019                         IFNET_STAT_INC(ifp, opackets, 1);
3020                         bus_dmamap_unload(adapter->txtag,
3021                                           tx_buffer->map);
3022                         m_freem(tx_buffer->m_head);
3023                         tx_buffer->m_head = NULL;
3024                 }
3025
3026                 if (first == dd_idx) {
3027                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3028                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3029                                 adapter->tx_dd_head = 0;
3030                                 adapter->tx_dd_tail = 0;
3031                                 dd_idx = -1;
3032                         } else {
3033                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3034                         }
3035                 }
3036
3037                 if (++first == adapter->num_tx_desc)
3038                         first = 0;
3039         }
3040         adapter->next_tx_to_clean = first;
3041         adapter->num_tx_desc_avail = num_avail;
3042
3043         if (!EM_IS_OACTIVE(adapter)) {
3044                 ifq_clr_oactive(&ifp->if_snd);
3045
3046                 /* All clean, turn off the timer */
3047                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3048                         ifp->if_timer = 0;
3049         }
3050 }
3051
3052 /*
3053  * When Link is lost sometimes there is work still in the TX ring
3054  * which will result in a watchdog, rather than allow that do an
3055  * attempted cleanup and then reinit here.  Note that this has been
3056  * seens mostly with fiber adapters.
3057  */
3058 static void
3059 em_tx_purge(struct adapter *adapter)
3060 {
3061         struct ifnet *ifp = &adapter->arpcom.ac_if;
3062
3063         if (!adapter->link_active && ifp->if_timer) {
3064                 em_tx_collect(adapter);
3065                 if (ifp->if_timer) {
3066                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3067                         ifp->if_timer = 0;
3068                         em_init(adapter);
3069                 }
3070         }
3071 }
3072
3073 static int
3074 em_newbuf(struct adapter *adapter, int i, int init)
3075 {
3076         struct mbuf *m;
3077         bus_dma_segment_t seg;
3078         bus_dmamap_t map;
3079         struct em_buffer *rx_buffer;
3080         int error, nseg;
3081
3082         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
3083         if (m == NULL) {
3084                 adapter->mbuf_cluster_failed++;
3085                 if (init) {
3086                         if_printf(&adapter->arpcom.ac_if,
3087                                   "Unable to allocate RX mbuf\n");
3088                 }
3089                 return (ENOBUFS);
3090         }
3091         m->m_len = m->m_pkthdr.len = MCLBYTES;
3092
3093         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
3094                 m_adj(m, ETHER_ALIGN);
3095
3096         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3097                         adapter->rx_sparemap, m,
3098                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3099         if (error) {
3100                 m_freem(m);
3101                 if (init) {
3102                         if_printf(&adapter->arpcom.ac_if,
3103                                   "Unable to load RX mbuf\n");
3104                 }
3105                 return (error);
3106         }
3107
3108         rx_buffer = &adapter->rx_buffer_area[i];
3109         if (rx_buffer->m_head != NULL)
3110                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3111
3112         map = rx_buffer->map;
3113         rx_buffer->map = adapter->rx_sparemap;
3114         adapter->rx_sparemap = map;
3115
3116         rx_buffer->m_head = m;
3117
3118         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3119         return (0);
3120 }
3121
3122 static int
3123 em_create_rx_ring(struct adapter *adapter)
3124 {
3125         device_t dev = adapter->dev;
3126         struct em_buffer *rx_buffer;
3127         int i, error;
3128
3129         adapter->rx_buffer_area =
3130                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3131                         M_DEVBUF, M_WAITOK | M_ZERO);
3132
3133         /*
3134          * Create DMA tag for rx buffers
3135          */
3136         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3137                         1, 0,                   /* alignment, bounds */
3138                         BUS_SPACE_MAXADDR,      /* lowaddr */
3139                         BUS_SPACE_MAXADDR,      /* highaddr */
3140                         NULL, NULL,             /* filter, filterarg */
3141                         MCLBYTES,               /* maxsize */
3142                         1,                      /* nsegments */
3143                         MCLBYTES,               /* maxsegsize */
3144                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3145                         &adapter->rxtag);
3146         if (error) {
3147                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3148                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3149                 adapter->rx_buffer_area = NULL;
3150                 return error;
3151         }
3152
3153         /*
3154          * Create spare DMA map for rx buffers
3155          */
3156         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3157                                   &adapter->rx_sparemap);
3158         if (error) {
3159                 device_printf(dev, "Unable to create spare RX DMA map\n");
3160                 bus_dma_tag_destroy(adapter->rxtag);
3161                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3162                 adapter->rx_buffer_area = NULL;
3163                 return error;
3164         }
3165
3166         /*
3167          * Create DMA maps for rx buffers
3168          */
3169         for (i = 0; i < adapter->num_rx_desc; i++) {
3170                 rx_buffer = &adapter->rx_buffer_area[i];
3171
3172                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3173                                           &rx_buffer->map);
3174                 if (error) {
3175                         device_printf(dev, "Unable to create RX DMA map\n");
3176                         em_destroy_rx_ring(adapter, i);
3177                         return error;
3178                 }
3179         }
3180         return (0);
3181 }
3182
3183 static int
3184 em_init_rx_ring(struct adapter *adapter)
3185 {
3186         int i, error;
3187
3188         /* Reset descriptor ring */
3189         bzero(adapter->rx_desc_base,
3190             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3191
3192         /* Allocate new ones. */
3193         for (i = 0; i < adapter->num_rx_desc; i++) {
3194                 error = em_newbuf(adapter, i, 1);
3195                 if (error)
3196                         return (error);
3197         }
3198
3199         /* Setup our descriptor pointers */
3200         adapter->next_rx_desc_to_check = 0;
3201
3202         return (0);
3203 }
3204
3205 static void
3206 em_init_rx_unit(struct adapter *adapter)
3207 {
3208         struct ifnet *ifp = &adapter->arpcom.ac_if;
3209         uint64_t bus_addr;
3210         uint32_t rctl;
3211
3212         /*
3213          * Make sure receives are disabled while setting
3214          * up the descriptor ring
3215          */
3216         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3217         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3218
3219         if (adapter->hw.mac.type >= e1000_82540) {
3220                 uint32_t itr;
3221
3222                 /*
3223                  * Set the interrupt throttling rate. Value is calculated
3224                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3225                  */
3226                 if (adapter->int_throttle_ceil)
3227                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3228                 else
3229                         itr = 0;
3230                 em_set_itr(adapter, itr);
3231         }
3232
3233         /* Disable accelerated ackknowledge */
3234         if (adapter->hw.mac.type == e1000_82574) {
3235                 E1000_WRITE_REG(&adapter->hw,
3236                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3237         }
3238
3239         /* Receive Checksum Offload for TCP and UDP */
3240         if (ifp->if_capenable & IFCAP_RXCSUM) {
3241                 uint32_t rxcsum;
3242
3243                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3244                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3245                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3246         }
3247
3248         /*
3249          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3250          * long latencies are observed, like Lenovo X60. This
3251          * change eliminates the problem, but since having positive
3252          * values in RDTR is a known source of problems on other
3253          * platforms another solution is being sought.
3254          */
3255         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3256                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3257                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3258         }
3259
3260         /*
3261          * Setup the Base and Length of the Rx Descriptor Ring
3262          */
3263         bus_addr = adapter->rxdma.dma_paddr;
3264         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3265             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3266         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3267             (uint32_t)(bus_addr >> 32));
3268         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3269             (uint32_t)bus_addr);
3270
3271         /*
3272          * Setup the HW Rx Head and Tail Descriptor Pointers
3273          */
3274         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3275         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3276
3277         /* Set PTHRESH for improved jumbo performance */
3278         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3279             (adapter->hw.mac.type == e1000_pch2lan) ||
3280             (adapter->hw.mac.type == e1000_ich10lan)) &&
3281             (ifp->if_mtu > ETHERMTU)) {
3282                 uint32_t rxdctl;
3283
3284                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3285                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3286         }
3287
3288         if (adapter->hw.mac.type == e1000_pch2lan) {
3289                 if (ifp->if_mtu > ETHERMTU)
3290                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3291                 else
3292                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3293         }
3294
3295         /* Setup the Receive Control Register */
3296         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3297         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3298                 E1000_RCTL_RDMTS_HALF |
3299                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3300
3301         /* Make sure VLAN Filters are off */
3302         rctl &= ~E1000_RCTL_VFE;
3303
3304         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3305                 rctl |= E1000_RCTL_SBP;
3306         else
3307                 rctl &= ~E1000_RCTL_SBP;
3308
3309         switch (adapter->rx_buffer_len) {
3310         default:
3311         case 2048:
3312                 rctl |= E1000_RCTL_SZ_2048;
3313                 break;
3314
3315         case 4096:
3316                 rctl |= E1000_RCTL_SZ_4096 |
3317                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3318                 break;
3319
3320         case 8192:
3321                 rctl |= E1000_RCTL_SZ_8192 |
3322                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3323                 break;
3324
3325         case 16384:
3326                 rctl |= E1000_RCTL_SZ_16384 |
3327                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3328                 break;
3329         }
3330
3331         if (ifp->if_mtu > ETHERMTU)
3332                 rctl |= E1000_RCTL_LPE;
3333         else
3334                 rctl &= ~E1000_RCTL_LPE;
3335
3336         /* Enable Receives */
3337         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3338 }
3339
3340 static void
3341 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3342 {
3343         struct em_buffer *rx_buffer;
3344         int i;
3345
3346         if (adapter->rx_buffer_area == NULL)
3347                 return;
3348
3349         for (i = 0; i < ndesc; i++) {
3350                 rx_buffer = &adapter->rx_buffer_area[i];
3351
3352                 KKASSERT(rx_buffer->m_head == NULL);
3353                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3354         }
3355         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3356         bus_dma_tag_destroy(adapter->rxtag);
3357
3358         kfree(adapter->rx_buffer_area, M_DEVBUF);
3359         adapter->rx_buffer_area = NULL;
3360 }
3361
3362 static void
3363 em_rxeof(struct adapter *adapter, int count)
3364 {
3365         struct ifnet *ifp = &adapter->arpcom.ac_if;
3366         uint8_t status, accept_frame = 0, eop = 0;
3367         uint16_t len, desc_len, prev_len_adj;
3368         struct e1000_rx_desc *current_desc;
3369         struct mbuf *mp;
3370         int i;
3371
3372         i = adapter->next_rx_desc_to_check;
3373         current_desc = &adapter->rx_desc_base[i];
3374
3375         if (!(current_desc->status & E1000_RXD_STAT_DD))
3376                 return;
3377
3378         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3379                 struct mbuf *m = NULL;
3380
3381                 logif(pkt_receive);
3382
3383                 mp = adapter->rx_buffer_area[i].m_head;
3384
3385                 /*
3386                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3387                  * needs to access the last received byte in the mbuf.
3388                  */
3389                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3390                                 BUS_DMASYNC_POSTREAD);
3391
3392                 accept_frame = 1;
3393                 prev_len_adj = 0;
3394                 desc_len = le16toh(current_desc->length);
3395                 status = current_desc->status;
3396                 if (status & E1000_RXD_STAT_EOP) {
3397                         count--;
3398                         eop = 1;
3399                         if (desc_len < ETHER_CRC_LEN) {
3400                                 len = 0;
3401                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3402                         } else {
3403                                 len = desc_len - ETHER_CRC_LEN;
3404                         }
3405                 } else {
3406                         eop = 0;
3407                         len = desc_len;
3408                 }
3409
3410                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3411                         uint8_t last_byte;
3412                         uint32_t pkt_len = desc_len;
3413
3414                         if (adapter->fmp != NULL)
3415                                 pkt_len += adapter->fmp->m_pkthdr.len;
3416
3417                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3418                         if (TBI_ACCEPT(&adapter->hw, status,
3419                             current_desc->errors, pkt_len, last_byte,
3420                             adapter->min_frame_size, adapter->max_frame_size)) {
3421                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3422                                     &adapter->stats, pkt_len,
3423                                     adapter->hw.mac.addr,
3424                                     adapter->max_frame_size);
3425                                 if (len > 0)
3426                                         len--;
3427                         } else {
3428                                 accept_frame = 0;
3429                         }
3430                 }
3431
3432                 if (accept_frame) {
3433                         if (em_newbuf(adapter, i, 0) != 0) {
3434                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3435                                 goto discard;
3436                         }
3437
3438                         /* Assign correct length to the current fragment */
3439                         mp->m_len = len;
3440
3441                         if (adapter->fmp == NULL) {
3442                                 mp->m_pkthdr.len = len;
3443                                 adapter->fmp = mp; /* Store the first mbuf */
3444                                 adapter->lmp = mp;
3445                         } else {
3446                                 /*
3447                                  * Chain mbuf's together
3448                                  */
3449
3450                                 /*
3451                                  * Adjust length of previous mbuf in chain if
3452                                  * we received less than 4 bytes in the last
3453                                  * descriptor.
3454                                  */
3455                                 if (prev_len_adj > 0) {
3456                                         adapter->lmp->m_len -= prev_len_adj;
3457                                         adapter->fmp->m_pkthdr.len -=
3458                                             prev_len_adj;
3459                                 }
3460                                 adapter->lmp->m_next = mp;
3461                                 adapter->lmp = adapter->lmp->m_next;
3462                                 adapter->fmp->m_pkthdr.len += len;
3463                         }
3464
3465                         if (eop) {
3466                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3467                                 IFNET_STAT_INC(ifp, ipackets, 1);
3468
3469                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3470                                         em_rxcsum(adapter, current_desc,
3471                                                   adapter->fmp);
3472                                 }
3473
3474                                 if (status & E1000_RXD_STAT_VP) {
3475                                         adapter->fmp->m_pkthdr.ether_vlantag =
3476                                             (le16toh(current_desc->special) &
3477                                             E1000_RXD_SPC_VLAN_MASK);
3478                                         adapter->fmp->m_flags |= M_VLANTAG;
3479                                 }
3480                                 m = adapter->fmp;
3481                                 adapter->fmp = NULL;
3482                                 adapter->lmp = NULL;
3483                         }
3484                 } else {
3485                         IFNET_STAT_INC(ifp, ierrors, 1);
3486 discard:
3487 #ifdef foo
3488                         /* Reuse loaded DMA map and just update mbuf chain */
3489                         mp = adapter->rx_buffer_area[i].m_head;
3490                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3491                         mp->m_data = mp->m_ext.ext_buf;
3492                         mp->m_next = NULL;
3493                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3494                                 m_adj(mp, ETHER_ALIGN);
3495 #endif
3496                         if (adapter->fmp != NULL) {
3497                                 m_freem(adapter->fmp);
3498                                 adapter->fmp = NULL;
3499                                 adapter->lmp = NULL;
3500                         }
3501                         m = NULL;
3502                 }
3503
3504                 /* Zero out the receive descriptors status. */
3505                 current_desc->status = 0;
3506
3507                 if (m != NULL)
3508                         ifp->if_input(ifp, m);
3509
3510                 /* Advance our pointers to the next descriptor. */
3511                 if (++i == adapter->num_rx_desc)
3512                         i = 0;
3513                 current_desc = &adapter->rx_desc_base[i];
3514         }
3515         adapter->next_rx_desc_to_check = i;
3516
3517         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3518         if (--i < 0)
3519                 i = adapter->num_rx_desc - 1;
3520         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3521 }
3522
3523 static void
3524 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3525           struct mbuf *mp)
3526 {
3527         /* 82543 or newer only */
3528         if (adapter->hw.mac.type < e1000_82543 ||
3529             /* Ignore Checksum bit is set */
3530             (rx_desc->status & E1000_RXD_STAT_IXSM))
3531                 return;
3532
3533         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3534             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3535                 /* IP Checksum Good */
3536                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3537         }
3538
3539         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3540             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3541                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3542                                            CSUM_PSEUDO_HDR |
3543                                            CSUM_FRAG_NOT_CHECKED;
3544                 mp->m_pkthdr.csum_data = htons(0xffff);
3545         }
3546 }
3547
3548 static void
3549 em_enable_intr(struct adapter *adapter)
3550 {
3551         uint32_t ims_mask = IMS_ENABLE_MASK;
3552
3553         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3554
3555 #if 0
3556         /* XXX MSIX */
3557         if (adapter->hw.mac.type == e1000_82574) {
3558                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3559                 ims_mask |= EM_MSIX_MASK;
3560         }
3561 #endif
3562         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3563 }
3564
3565 static void
3566 em_disable_intr(struct adapter *adapter)
3567 {
3568         uint32_t clear = 0xffffffff;
3569
3570         /*
3571          * The first version of 82542 had an errata where when link was forced
3572          * it would stay up even up even if the cable was disconnected.
3573          * Sequence errors were used to detect the disconnect and then the
3574          * driver would unforce the link.  This code in the in the ISR.  For
3575          * this to work correctly the Sequence error interrupt had to be
3576          * enabled all the time.
3577          */
3578         if (adapter->hw.mac.type == e1000_82542 &&
3579             adapter->hw.revision_id == E1000_REVISION_2)
3580                 clear &= ~E1000_ICR_RXSEQ;
3581         else if (adapter->hw.mac.type == e1000_82574)
3582                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3583
3584         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3585
3586         adapter->npoll.ifpc_stcount = 0;
3587
3588         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3589 }
3590
3591 /*
3592  * Bit of a misnomer, what this really means is
3593  * to enable OS management of the system... aka
3594  * to disable special hardware management features
3595  */
3596 static void
3597 em_get_mgmt(struct adapter *adapter)
3598 {
3599         /* A shared code workaround */
3600 #define E1000_82542_MANC2H E1000_MANC2H
3601         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3602                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3603                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3604
3605                 /* disable hardware interception of ARP */
3606                 manc &= ~(E1000_MANC_ARP_EN);
3607
3608                 /* enable receiving management packets to the host */
3609                 if (adapter->hw.mac.type >= e1000_82571) {
3610                         manc |= E1000_MANC_EN_MNG2HOST;
3611 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3612 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3613                         manc2h |= E1000_MNG2HOST_PORT_623;
3614                         manc2h |= E1000_MNG2HOST_PORT_664;
3615                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3616                 }
3617
3618                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3619         }
3620 }
3621
3622 /*
3623  * Give control back to hardware management
3624  * controller if there is one.
3625  */
3626 static void
3627 em_rel_mgmt(struct adapter *adapter)
3628 {
3629         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3630                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3631
3632                 /* re-enable hardware interception of ARP */
3633                 manc |= E1000_MANC_ARP_EN;
3634
3635                 if (adapter->hw.mac.type >= e1000_82571)
3636                         manc &= ~E1000_MANC_EN_MNG2HOST;
3637
3638                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3639         }
3640 }
3641
3642 /*
3643  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3644  * For ASF and Pass Through versions of f/w this means that
3645  * the driver is loaded.  For AMT version (only with 82573)
3646  * of the f/w this means that the network i/f is open.
3647  */
3648 static void
3649 em_get_hw_control(struct adapter *adapter)
3650 {
3651         /* Let firmware know the driver has taken over */
3652         if (adapter->hw.mac.type == e1000_82573) {
3653                 uint32_t swsm;
3654
3655                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3656                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3657                     swsm | E1000_SWSM_DRV_LOAD);
3658         } else {
3659                 uint32_t ctrl_ext;
3660
3661                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3662                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3663                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3664         }
3665         adapter->flags |= EM_FLAG_HW_CTRL;
3666 }
3667
3668 /*
3669  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3670  * For ASF and Pass Through versions of f/w this means that the
3671  * driver is no longer loaded.  For AMT version (only with 82573)
3672  * of the f/w this means that the network i/f is closed.
3673  */
3674 static void
3675 em_rel_hw_control(struct adapter *adapter)
3676 {
3677         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3678                 return;
3679         adapter->flags &= ~EM_FLAG_HW_CTRL;
3680
3681         /* Let firmware taken over control of h/w */
3682         if (adapter->hw.mac.type == e1000_82573) {
3683                 uint32_t swsm;
3684
3685                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3686                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3687                     swsm & ~E1000_SWSM_DRV_LOAD);
3688         } else {
3689                 uint32_t ctrl_ext;
3690
3691                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3692                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3693                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3694         }
3695 }
3696
3697 static int
3698 em_is_valid_eaddr(const uint8_t *addr)
3699 {
3700         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3701
3702         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3703                 return (FALSE);
3704
3705         return (TRUE);
3706 }
3707
3708 /*
3709  * Enable PCI Wake On Lan capability
3710  */
3711 void
3712 em_enable_wol(device_t dev)
3713 {
3714         uint16_t cap, status;
3715         uint8_t id;
3716
3717         /* First find the capabilities pointer*/
3718         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3719
3720         /* Read the PM Capabilities */
3721         id = pci_read_config(dev, cap, 1);
3722         if (id != PCIY_PMG)     /* Something wrong */
3723                 return;
3724
3725         /*
3726          * OK, we have the power capabilities,
3727          * so now get the status register
3728          */
3729         cap += PCIR_POWER_STATUS;
3730         status = pci_read_config(dev, cap, 2);
3731         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3732         pci_write_config(dev, cap, status, 2);
3733 }
3734
3735
3736 /*
3737  * 82544 Coexistence issue workaround.
3738  *    There are 2 issues.
3739  *       1. Transmit Hang issue.
3740  *    To detect this issue, following equation can be used...
3741  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3742  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3743  *
3744  *       2. DAC issue.
3745  *    To detect this issue, following equation can be used...
3746  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3747  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3748  *
3749  *    WORKAROUND:
3750  *        Make sure we do not have ending address
3751  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3752  */
3753 static uint32_t
3754 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3755 {
3756         uint32_t safe_terminator;
3757
3758         /*
3759          * Since issue is sensitive to length and address.
3760          * Let us first check the address...
3761          */
3762         if (length <= 4) {
3763                 desc_array->descriptor[0].address = address;
3764                 desc_array->descriptor[0].length = length;
3765                 desc_array->elements = 1;
3766                 return (desc_array->elements);
3767         }
3768
3769         safe_terminator =
3770         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3771
3772         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3773         if (safe_terminator == 0 ||
3774             (safe_terminator > 4 && safe_terminator < 9) ||
3775             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3776                 desc_array->descriptor[0].address = address;
3777                 desc_array->descriptor[0].length = length;
3778                 desc_array->elements = 1;
3779                 return (desc_array->elements);
3780         }
3781
3782         desc_array->descriptor[0].address = address;
3783         desc_array->descriptor[0].length = length - 4;
3784         desc_array->descriptor[1].address = address + (length - 4);
3785         desc_array->descriptor[1].length = 4;
3786         desc_array->elements = 2;
3787         return (desc_array->elements);
3788 }
3789
3790 static void
3791 em_update_stats(struct adapter *adapter)
3792 {
3793         struct ifnet *ifp = &adapter->arpcom.ac_if;
3794
3795         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3796             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3797                 adapter->stats.symerrs +=
3798                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3799                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3800         }
3801         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3802         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3803         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3804         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3805
3806         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3807         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3808         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3809         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3810         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3811         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3812         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3813         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3814         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3815         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3816         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3817         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3818         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3819         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3820         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3821         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3822         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3823         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3824         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3825         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3826
3827         /* For the 64-bit byte counters the low dword must be read first. */
3828         /* Both registers clear on the read of the high dword */
3829
3830         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3831         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3832
3833         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3834         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3835         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3836         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3837         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3838
3839         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3840         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3841
3842         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3843         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3844         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3845         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3846         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3847         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3848         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3849         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3850         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3851         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3852
3853         if (adapter->hw.mac.type >= e1000_82543) {
3854                 adapter->stats.algnerrc +=
3855                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3856                 adapter->stats.rxerrc +=
3857                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3858                 adapter->stats.tncrs +=
3859                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3860                 adapter->stats.cexterr +=
3861                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3862                 adapter->stats.tsctc +=
3863                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3864                 adapter->stats.tsctfc +=
3865                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3866         }
3867
3868         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3869
3870         /* Rx Errors */
3871         IFNET_STAT_SET(ifp, ierrors,
3872             adapter->dropped_pkts + adapter->stats.rxerrc +
3873             adapter->stats.crcerrs + adapter->stats.algnerrc +
3874             adapter->stats.ruc + adapter->stats.roc +
3875             adapter->stats.mpc + adapter->stats.cexterr);
3876
3877         /* Tx Errors */
3878         IFNET_STAT_SET(ifp, oerrors,
3879             adapter->stats.ecol + adapter->stats.latecol +
3880             adapter->watchdog_events);
3881 }
3882
3883 static void
3884 em_print_debug_info(struct adapter *adapter)
3885 {
3886         device_t dev = adapter->dev;
3887         uint8_t *hw_addr = adapter->hw.hw_addr;
3888
3889         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3890         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3891             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3892             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3893         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3894             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3895             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3896         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3897             adapter->hw.fc.high_water,
3898             adapter->hw.fc.low_water);
3899         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3900             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3901             E1000_READ_REG(&adapter->hw, E1000_TADV));
3902         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3903             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3904             E1000_READ_REG(&adapter->hw, E1000_RADV));
3905         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3906             (long long)adapter->tx_fifo_wrk_cnt,
3907             (long long)adapter->tx_fifo_reset_cnt);
3908         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3909             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3910             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3911         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3912             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3913             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3914         device_printf(dev, "Num Tx descriptors avail = %d\n",
3915             adapter->num_tx_desc_avail);
3916         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3917             adapter->no_tx_desc_avail1);
3918         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3919             adapter->no_tx_desc_avail2);
3920         device_printf(dev, "Std mbuf failed = %ld\n",
3921             adapter->mbuf_alloc_failed);
3922         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3923             adapter->mbuf_cluster_failed);
3924         device_printf(dev, "Driver dropped packets = %ld\n",
3925             adapter->dropped_pkts);
3926         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3927             adapter->no_tx_dma_setup);
3928 }
3929
3930 static void
3931 em_print_hw_stats(struct adapter *adapter)
3932 {
3933         device_t dev = adapter->dev;
3934
3935         device_printf(dev, "Excessive collisions = %lld\n",
3936             (long long)adapter->stats.ecol);
3937 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3938         device_printf(dev, "Symbol errors = %lld\n",
3939             (long long)adapter->stats.symerrs);
3940 #endif
3941         device_printf(dev, "Sequence errors = %lld\n",
3942             (long long)adapter->stats.sec);
3943         device_printf(dev, "Defer count = %lld\n",
3944             (long long)adapter->stats.dc);
3945         device_printf(dev, "Missed Packets = %lld\n",
3946             (long long)adapter->stats.mpc);
3947         device_printf(dev, "Receive No Buffers = %lld\n",
3948             (long long)adapter->stats.rnbc);
3949         /* RLEC is inaccurate on some hardware, calculate our own. */
3950         device_printf(dev, "Receive Length Errors = %lld\n",
3951             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3952         device_printf(dev, "Receive errors = %lld\n",
3953             (long long)adapter->stats.rxerrc);
3954         device_printf(dev, "Crc errors = %lld\n",
3955             (long long)adapter->stats.crcerrs);
3956         device_printf(dev, "Alignment errors = %lld\n",
3957             (long long)adapter->stats.algnerrc);
3958         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3959             (long long)adapter->stats.cexterr);
3960         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3961         device_printf(dev, "watchdog timeouts = %ld\n",
3962             adapter->watchdog_events);
3963         device_printf(dev, "XON Rcvd = %lld\n",
3964             (long long)adapter->stats.xonrxc);
3965         device_printf(dev, "XON Xmtd = %lld\n",
3966             (long long)adapter->stats.xontxc);
3967         device_printf(dev, "XOFF Rcvd = %lld\n",
3968             (long long)adapter->stats.xoffrxc);
3969         device_printf(dev, "XOFF Xmtd = %lld\n",
3970             (long long)adapter->stats.xofftxc);
3971         device_printf(dev, "Good Packets Rcvd = %lld\n",
3972             (long long)adapter->stats.gprc);
3973         device_printf(dev, "Good Packets Xmtd = %lld\n",
3974             (long long)adapter->stats.gptc);
3975 }
3976
3977 static void
3978 em_print_nvm_info(struct adapter *adapter)
3979 {
3980         uint16_t eeprom_data;
3981         int i, j, row = 0;
3982
3983         /* Its a bit crude, but it gets the job done */
3984         kprintf("\nInterface EEPROM Dump:\n");
3985         kprintf("Offset\n0x0000  ");
3986         for (i = 0, j = 0; i < 32; i++, j++) {
3987                 if (j == 8) { /* Make the offset block */
3988                         j = 0; ++row;
3989                         kprintf("\n0x00%x0  ",row);
3990                 }
3991                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3992                 kprintf("%04x ", eeprom_data);
3993         }
3994         kprintf("\n");
3995 }
3996
3997 static int
3998 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3999 {
4000         struct adapter *adapter;
4001         struct ifnet *ifp;
4002         int error, result;
4003
4004         result = -1;
4005         error = sysctl_handle_int(oidp, &result, 0, req);
4006         if (error || !req->newptr)
4007                 return (error);
4008
4009         adapter = (struct adapter *)arg1;
4010         ifp = &adapter->arpcom.ac_if;
4011
4012         lwkt_serialize_enter(ifp->if_serializer);
4013
4014         if (result == 1)
4015                 em_print_debug_info(adapter);
4016
4017         /*
4018          * This value will cause a hex dump of the
4019          * first 32 16-bit words of the EEPROM to
4020          * the screen.
4021          */
4022         if (result == 2)
4023                 em_print_nvm_info(adapter);
4024
4025         lwkt_serialize_exit(ifp->if_serializer);
4026
4027         return (error);
4028 }
4029
4030 static int
4031 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4032 {
4033         int error, result;
4034
4035         result = -1;
4036         error = sysctl_handle_int(oidp, &result, 0, req);
4037         if (error || !req->newptr)
4038                 return (error);
4039
4040         if (result == 1) {
4041                 struct adapter *adapter = (struct adapter *)arg1;
4042                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4043
4044                 lwkt_serialize_enter(ifp->if_serializer);
4045                 em_print_hw_stats(adapter);
4046                 lwkt_serialize_exit(ifp->if_serializer);
4047         }
4048         return (error);
4049 }
4050
4051 static void
4052 em_add_sysctl(struct adapter *adapter)
4053 {
4054         sysctl_ctx_init(&adapter->sysctl_ctx);
4055         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
4056                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
4057                                         device_get_nameunit(adapter->dev),
4058                                         CTLFLAG_RD, 0, "");
4059         if (adapter->sysctl_tree == NULL) {
4060                 device_printf(adapter->dev, "can't add sysctl node\n");
4061         } else {
4062                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4063                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4064                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4065                     em_sysctl_debug_info, "I", "Debug Information");
4066
4067                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4068                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4069                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4070                     em_sysctl_stats, "I", "Statistics");
4071
4072                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4073                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4074                     OID_AUTO, "rxd", CTLFLAG_RD,
4075                     &adapter->num_rx_desc, 0, NULL);
4076                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4077                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4078                     OID_AUTO, "txd", CTLFLAG_RD,
4079                     &adapter->num_tx_desc, 0, NULL);
4080
4081                 if (adapter->hw.mac.type >= e1000_82540) {
4082                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4083                             SYSCTL_CHILDREN(adapter->sysctl_tree),
4084                             OID_AUTO, "int_throttle_ceil",
4085                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4086                             em_sysctl_int_throttle, "I",
4087                             "interrupt throttling rate");
4088                 }
4089                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4090                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4091                     OID_AUTO, "int_tx_nsegs",
4092                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4093                     em_sysctl_int_tx_nsegs, "I",
4094                     "# segments per TX interrupt");
4095                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4096                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4097                     OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4098                     &adapter->tx_wreg_nsegs, 0,
4099                     "# segments before write to hardware register");
4100         }
4101 }
4102
4103 static int
4104 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4105 {
4106         struct adapter *adapter = (void *)arg1;
4107         struct ifnet *ifp = &adapter->arpcom.ac_if;
4108         int error, throttle;
4109
4110         throttle = adapter->int_throttle_ceil;
4111         error = sysctl_handle_int(oidp, &throttle, 0, req);
4112         if (error || req->newptr == NULL)
4113                 return error;
4114         if (throttle < 0 || throttle > 1000000000 / 256)
4115                 return EINVAL;
4116
4117         if (throttle) {
4118                 /*
4119                  * Set the interrupt throttling rate in 256ns increments,
4120                  * recalculate sysctl value assignment to get exact frequency.
4121                  */
4122                 throttle = 1000000000 / 256 / throttle;
4123
4124                 /* Upper 16bits of ITR is reserved and should be zero */
4125                 if (throttle & 0xffff0000)
4126                         return EINVAL;
4127         }
4128
4129         lwkt_serialize_enter(ifp->if_serializer);
4130
4131         if (throttle)
4132                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4133         else
4134                 adapter->int_throttle_ceil = 0;
4135
4136         if (ifp->if_flags & IFF_RUNNING)
4137                 em_set_itr(adapter, throttle);
4138
4139         lwkt_serialize_exit(ifp->if_serializer);
4140
4141         if (bootverbose) {
4142                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4143                           adapter->int_throttle_ceil);
4144         }
4145         return 0;
4146 }
4147
4148 static int
4149 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4150 {
4151         struct adapter *adapter = (void *)arg1;
4152         struct ifnet *ifp = &adapter->arpcom.ac_if;
4153         int error, segs;
4154
4155         segs = adapter->tx_int_nsegs;
4156         error = sysctl_handle_int(oidp, &segs, 0, req);
4157         if (error || req->newptr == NULL)
4158                 return error;
4159         if (segs <= 0)
4160                 return EINVAL;
4161
4162         lwkt_serialize_enter(ifp->if_serializer);
4163
4164         /*
4165          * Don't allow int_tx_nsegs to become:
4166          * o  Less the oact_tx_desc
4167          * o  Too large that no TX desc will cause TX interrupt to
4168          *    be generated (OACTIVE will never recover)
4169          * o  Too small that will cause tx_dd[] overflow
4170          */
4171         if (segs < adapter->oact_tx_desc ||
4172             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4173             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4174                 error = EINVAL;
4175         } else {
4176                 error = 0;
4177                 adapter->tx_int_nsegs = segs;
4178         }
4179
4180         lwkt_serialize_exit(ifp->if_serializer);
4181
4182         return error;
4183 }
4184
4185 static void
4186 em_set_itr(struct adapter *adapter, uint32_t itr)
4187 {
4188         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4189         if (adapter->hw.mac.type == e1000_82574) {
4190                 int i;
4191
4192                 /*
4193                  * When using MSIX interrupts we need to
4194                  * throttle using the EITR register
4195                  */
4196                 for (i = 0; i < 4; ++i) {
4197                         E1000_WRITE_REG(&adapter->hw,
4198                             E1000_EITR_82574(i), itr);
4199                 }
4200         }
4201 }
4202
4203 static void
4204 em_disable_aspm(struct adapter *adapter)
4205 {
4206         uint16_t link_cap, link_ctrl, disable;
4207         uint8_t pcie_ptr, reg;
4208         device_t dev = adapter->dev;
4209
4210         switch (adapter->hw.mac.type) {
4211         case e1000_82571:
4212         case e1000_82572:
4213         case e1000_82573:
4214                 /*
4215                  * 82573 specification update
4216                  * errata #8 disable L0s
4217                  * errata #41 disable L1
4218                  *
4219                  * 82571/82572 specification update
4220                  # errata #13 disable L1
4221                  * errata #68 disable L0s
4222                  */
4223                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4224                 break;
4225
4226         case e1000_82574:
4227         case e1000_82583:
4228                 /*
4229                  * 82574 specification update errata #20
4230                  * 82583 specification update errata #9
4231                  *
4232                  * There is no need to disable L1
4233                  */
4234                 disable = PCIEM_LNKCTL_ASPM_L0S;
4235                 break;
4236
4237         default:
4238                 return;
4239         }
4240
4241         pcie_ptr = pci_get_pciecap_ptr(dev);
4242         if (pcie_ptr == 0)
4243                 return;
4244
4245         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4246         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4247                 return;
4248
4249         if (bootverbose) {
4250                 if_printf(&adapter->arpcom.ac_if,
4251                     "disable ASPM %#02x\n", disable);
4252         }
4253
4254         reg = pcie_ptr + PCIER_LINKCTRL;
4255         link_ctrl = pci_read_config(dev, reg, 2);
4256         link_ctrl &= ~disable;
4257         pci_write_config(dev, reg, link_ctrl, 2);
4258 }
4259
4260 static int
4261 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4262 {
4263         int iphlen, hoff, thoff, ex = 0;
4264         struct mbuf *m;
4265         struct ip *ip;
4266
4267         m = *mp;
4268         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4269
4270         iphlen = m->m_pkthdr.csum_iphlen;
4271         thoff = m->m_pkthdr.csum_thlen;
4272         hoff = m->m_pkthdr.csum_lhlen;
4273
4274         KASSERT(iphlen > 0, ("invalid ip hlen"));
4275         KASSERT(thoff > 0, ("invalid tcp hlen"));
4276         KASSERT(hoff > 0, ("invalid ether hlen"));
4277
4278         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4279                 ex = 4;
4280
4281         if (m->m_len < hoff + iphlen + thoff + ex) {
4282                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4283                 if (m == NULL) {
4284                         *mp = NULL;
4285                         return ENOBUFS;
4286                 }
4287                 *mp = m;
4288         }
4289         ip = mtodoff(m, struct ip *, hoff);
4290         ip->ip_len = 0;
4291
4292         return 0;
4293 }
4294
4295 static int
4296 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4297     uint32_t *txd_upper, uint32_t *txd_lower)
4298 {
4299         struct e1000_context_desc *TXD;
4300         int hoff, iphlen, thoff, hlen;
4301         int mss, pktlen, curr_txd;
4302
4303         iphlen = mp->m_pkthdr.csum_iphlen;
4304         thoff = mp->m_pkthdr.csum_thlen;
4305         hoff = mp->m_pkthdr.csum_lhlen;
4306         mss = mp->m_pkthdr.tso_segsz;
4307         pktlen = mp->m_pkthdr.len;
4308
4309         if (adapter->csum_flags == CSUM_TSO &&
4310             adapter->csum_iphlen == iphlen &&
4311             adapter->csum_lhlen == hoff &&
4312             adapter->csum_thlen == thoff &&
4313             adapter->csum_mss == mss &&
4314             adapter->csum_pktlen == pktlen) {
4315                 *txd_upper = adapter->csum_txd_upper;
4316                 *txd_lower = adapter->csum_txd_lower;
4317                 return 0;
4318         }
4319         hlen = hoff + iphlen + thoff;
4320
4321         /*
4322          * Setup a new TSO context.
4323          */
4324
4325         curr_txd = adapter->next_avail_tx_desc;
4326         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4327
4328         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4329                      E1000_TXD_DTYP_D |         /* Data descr type */
4330                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4331
4332         /* IP and/or TCP header checksum calculation and insertion. */
4333         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4334
4335         /*
4336          * Start offset for header checksum calculation.
4337          * End offset for header checksum calculation.
4338          * Offset of place put the checksum.
4339          */
4340         TXD->lower_setup.ip_fields.ipcss = hoff;
4341         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4342         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4343
4344         /*
4345          * Start offset for payload checksum calculation.
4346          * End offset for payload checksum calculation.
4347          * Offset of place to put the checksum.
4348          */
4349         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4350         TXD->upper_setup.tcp_fields.tucse = 0;
4351         TXD->upper_setup.tcp_fields.tucso =
4352             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4353
4354         /*
4355          * Payload size per packet w/o any headers.
4356          * Length of all headers up to payload.
4357          */
4358         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4359         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4360         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4361                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4362                                 E1000_TXD_CMD_TSE |     /* TSE context */
4363                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4364                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4365                                 (pktlen - hlen));       /* Total len */
4366
4367         /* Save the information for this TSO context */
4368         adapter->csum_flags = CSUM_TSO;
4369         adapter->csum_lhlen = hoff;
4370         adapter->csum_iphlen = iphlen;
4371         adapter->csum_thlen = thoff;
4372         adapter->csum_mss = mss;
4373         adapter->csum_pktlen = pktlen;
4374         adapter->csum_txd_upper = *txd_upper;
4375         adapter->csum_txd_lower = *txd_lower;
4376
4377         if (++curr_txd == adapter->num_tx_desc)
4378                 curr_txd = 0;
4379
4380         KKASSERT(adapter->num_tx_desc_avail > 0);
4381         adapter->num_tx_desc_avail--;
4382
4383         adapter->next_avail_tx_desc = curr_txd;
4384         return 1;
4385 }