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[dragonfly.git] / sys / dev / netif / rtw / max2820reg.h
1 /*
2  * Copyright (c) 2004 David Young.  All rights reserved.
3  *
4  * This code was written by David Young.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the author nor the names of any co-contributors
15  *    may be used to endorse or promote products derived from this software
16  *    without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
19  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
20  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
21  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
22  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
24  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
29  * OF SUCH DAMAGE.
30  *
31  * $NetBSD: max2820reg.h,v 1.5 2006/03/08 08:26:50 dyoung Exp $
32  * $DragonFly: src/sys/dev/netif/rtw/max2820reg.h,v 1.2 2007/10/14 04:15:17 sephe Exp $
33  */
34
35 #ifndef _DEV_IC_MAX2820REG_H_
36 #define _DEV_IC_MAX2820REG_H_
37
38 /*
39  * Serial bus format for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A
40  * 2.4GHz 802.11b Zero-IF Transceivers
41  */
42 #define MAX2820_TWI_ADDR_MASK   __BITS(15,12)
43 #define MAX2820_TWI_DATA_MASK   __BITS(11,0)
44
45 /*
46  * Registers for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A 2.4GHz
47  * 802.11b Zero-IF Transceivers
48  */
49 #define MAX2820_TEST            0               /* Test Register */
50 #define MAX2820_TEST_DEFAULT    __BITS(2,0)     /* Always set to this value. */
51
52 #define MAX2820_ENABLE          1               /* Block-Enable Register */
53 #define MAX2820_ENABLE_RSVD1    __BIT(11)       /* reserved */
54 #define MAX2820_ENABLE_PAB      __BIT(10)       /* Transmit Baseband Filters
55                                                  * Enable
56                                                  * PAB_EN = SHDNB &&
57                                                  *   (MAX2820_ENABLE_PAB ||
58                                                  *    TX_ON)
59                                                  */
60 #define MAX2820_ENABLE_TXFLT    __BIT(9)        /* Transmit Baseband Filters
61                                                  * Enable
62                                                  * TXFLT_EN = SHDNB &&
63                                                  *   (MAX2820_ENABLE_TXFLT ||
64                                                  *    TX_ON)
65                                                  */
66 #define MAX2820_ENABLE_TXUVD    __BIT(8)        /* Tx Upconverter, VGA, and
67                                                  * Driver Amp Enable
68                                                  * TXUVD_EN = SHDNB &&
69                                                  *   (MAX2820_ENABLE_TXUVD ||
70                                                  *    TX_ON)
71                                                  */
72 #define MAX2820_ENABLE_DET      __BIT(7)        /* Receive Detector Enable
73                                                  * DET_EN = SHDNB &&
74                                                  *   (MAX2820_ENABLE_DET ||
75                                                  *    RX_ON)
76                                                  */
77 #define MAX2820_ENABLE_RXDFA    __BIT(6)        /* Rx Downconverter, Filters,
78                                                  * and AGC Amps Enable
79                                                  * RXDFA_EN = SHDNB &&
80                                                  *   (MAX2820_ENABLE_RXDFA ||
81                                                  *    RX_ON)
82                                                  */
83 #define MAX2820_ENABLE_RXLNA    __BIT(5)        /* Receive LNA Enable
84                                                  * AT_EN = SHDNB &&
85                                                  *   (MAX2820_ENABLE_RXLNA ||
86                                                  *    RX_ON)
87                                                  */
88 #define MAX2820_ENABLE_AT       __BIT(4)        /* Auto-tuner Enable
89                                                  * AT_EN = SHDNB &&
90                                                  *   (MAX2820_ENABLE_AT ||
91                                                  *    RX_ON || TX_ON)
92                                                  */
93 #define MAX2820_ENABLE_CP       __BIT(3)        /* PLL Charge-Pump Enable
94                                                  * CP_EN = SHDNB
95                                                  *   && MAX2820_ENABLE_CP
96                                                  */
97 #define MAX2820_ENABLE_PLL      __BIT(2)        /* PLL Enable
98                                                  * PLL_EN = SHDNB
99                                                  *   && MAX2820_ENABLE_PLL
100                                                  */
101 #define MAX2820_ENABLE_VCO      __BIT(1)        /* VCO Enable
102                                                  * VCO_EN = SHDNB
103                                                  *   && MAX2820_ENABLE_VCO
104                                                  */
105 #define MAX2820_ENABLE_RSVD0    __BIT(0)        /* reserved */
106 #define MAX2820_ENABLE_DEFAULT  (MAX2820_ENABLE_AT|MAX2820_ENABLE_CP|\
107                                  MAX2820_ENABLE_PLL|MAX2820_ENABLE_VCO)
108
109 #define MAX2820_SYNTH           2               /* Synthesizer Register */
110 #define MAX2820_SYNTH_RSVD0     __BITS(11,7)    /* reserved */
111 #define MAX2820_SYNTH_ICP       __BIT(6)        /* Charge-Pump Current Select
112                                                  * 0 = +/-1mA
113                                                  * 1 = +/-2mA
114                                                  */
115 #define MAX2820_SYNTH_R_MASK    __BITS(5,0)     /* Reference Frequency Divider
116                                                  * 0 = 22MHz
117                                                  * 1 = 44MHz
118                                                  */
119 #define MAX2820_SYNTH_R_22MHZ   __SHIFTIN(0, MAX2820_SYNTH_R_MASK)
120 #define MAX2820_SYNTH_R_44MHZ   __SHIFTIN(1, MAX2820_SYNTH_R_MASK)
121 #define MAX2820_SYNTH_ICP_DEFAULT       MAX2820_SYNTH_ICP
122 #define MAX2820_SYNTH_R_DEFAULT         __SHIFTIN(0, MAX2820_SYNTH_R_MASK)
123
124 #define MAX2820_CHANNEL         3               /* Channel Frequency Register */
125 #define MAX2820_CHANNEL_RSVD    __BITS(11,7)    /* reserved */
126 #define MAX2820_CHANNEL_CF_MASK __BITS(6,0)     /* Channel Frequency Select
127                                                  * fLO = 2400MHz + CF * 1MHz
128                                                  */
129 #define MAX2820_CHANNEL_RSVD_DEFAULT    __SHIFTIN(0, MAX2820_CHANNEL_RSVD)
130 #define MAX2820_CHANNEL_CF_DEFAULT      __SHIFTIN(37, MAX2820_CHANNEL_CF_MASK)
131
132 #define MAX2820_RECEIVE         4               /* Receiver Settings Register
133                                                  * MAX2820/MAX2821
134                                                  */
135 #define MAX2820_RECEIVE_2C_MASK __BITS(11,9)    /* VGA DC Offset Nulling
136                                                  * Parameter 2
137                                                  */
138 #define MAX2820_RECEIVE_1C_MASK __BITS(8,6)     /* VGA DC Offset Nulling
139                                                  * Parameter 1
140                                                  */
141 #define MAX2820_RECEIVE_DL_MASK __BITS(5,4)     /* Rx Level Detector Midpoint
142                                                  * Select
143                                                  * 11, 01 = 50.2mVp
144                                                  * 10     = 70.9mVp
145                                                  * 00     = 35.5mVp
146                                                  */
147 #define MAX2820_RECEIVE_SF      __BIT(3)        /* Special Function Select
148                                                  * 0 = OFF
149                                                  * 1 = ON
150                                                  */
151 #define MAX2820_RECEIVE_BW_MASK __BITS(2,0)     /* Receive Filter -3dB Frequency
152                                                  * Select (all frequencies are
153                                                  * approximate)
154                                                  */
155 /* 8.5MHz */
156 #define MAX2820_RECEIVE_BW_8_5MHZ       __SHIFTIN(0, MAX2820_RECEIVE_BW_MASK)
157 #define MAX2820_RECEIVE_BW_8MHZ         __SHIFTIN(1, MAX2820_RECEIVE_BW_MASK)
158 #define MAX2820_RECEIVE_BW_7_5MHZ       __SHIFTIN(2, MAX2820_RECEIVE_BW_MASK)
159 #define MAX2820_RECEIVE_BW_7MHZ         __SHIFTIN(3, MAX2820_RECEIVE_BW_MASK)
160 #define MAX2820_RECEIVE_BW_6_5MHZ       __SHIFTIN(4, MAX2820_RECEIVE_BW_MASK)
161 #define MAX2820_RECEIVE_BW_6MHZ         __SHIFTIN(5, MAX2820_RECEIVE_BW_MASK)
162 #define MAX2820_RECEIVE_2C_DEFAULT      __SHIFTIN(7, MAX2820_RECEIVE_2C_MASK)
163 #define MAX2820_RECEIVE_1C_DEFAULT      __SHIFTIN(7, MAX2820_RECEIVE_1C_MASK)
164 #define MAX2820_RECEIVE_DL_DEFAULT      __SHIFTIN(1, MAX2820_RECEIVE_DL_MASK)
165 #define MAX2820_RECEIVE_SF_DEFAULT      __SHIFTIN(0, MAX2820_RECEIVE_SF)
166 #define MAX2820_RECEIVE_BW_DEFAULT      MAX2820_RECEIVE_BW_7_5MHZ
167
168 #define MAX2820A_RECEIVE        4               /* Receiver Settings Register,
169                                                  * MAX2820A/MAX2821A
170                                                  */
171 /* VGA DC Offset Nulling Parameter 2 */
172 #define MAX2820A_RECEIVE_2C_MASK        __BITS(11,9)
173 #define MAX2820A_RECEIVE_2C_DEFAULT     __SHIFTIN(7, MAX2820A_RECEIVE_2C_MASK)
174 /* VGA DC Offset Nulling Parameter 1 */
175 #define MAX2820A_RECEIVE_1C_MASK        __BITS(8,6)
176 #define MAX2820A_RECEIVE_1C_DEFAULT     __SHIFTIN(7, MAX2820A_RECEIVE_1C_MASK)
177 #define MAX2820A_RECEIVE_RSVD0_MASK     __BITS(5,3)
178 #define MAX2820A_RECEIVE_RSVD0_DEFAULT  __SHIFTIN(2, MAX2820A_RECEIVE_RSVD0_MASK)
179 #define MAX2820A_RECEIVE_RSVD1_MASK     __BITS(2,0)
180 #define MAX2820A_RECEIVE_RSVD1_DEFAULT  __SHIFTIN(2,MAX2820_RECEIVE_RSVD1_MASK)
181
182 #define MAX2820_TRANSMIT        5               /* Transmitter Settings Reg. */
183 #define MAX2820_TRANSMIT_RSVD_MASK      __BITS(11,4)    /* reserved */
184 #define MAX2820_TRANSMIT_PA_MASK        __BITS(3,0)     /* PA Bias Select
185                                                          * 15 = Highest
186                                                          * 0 = Lowest
187                                                          */
188 #define MAX2820_TRANSMIT_PA_DEFAULT     __SHIFTIN(0, MAX2820_TRANSMIT_PA_MASK)
189
190 #endif /* _DEV_IC_MAX2820REG_H_ */