2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/amd64/include/atomic.h,v 1.32 2003/11/21 03:02:00 peter Exp $
27 * $DragonFly: src/sys/amd64/include/Attic/atomic.h,v 1.2 2006/07/27 00:42:46 corecode Exp $
29 #ifndef _MACHINE_ATOMIC_H_
30 #define _MACHINE_ATOMIC_H_
33 * Various simple arithmetic on memory which is atomic in the presence
34 * of interrupts and multiple processors.
36 * atomic_set_char(P, V) (*(u_char*)(P) |= (V))
37 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
38 * atomic_add_char(P, V) (*(u_char*)(P) += (V))
39 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
41 * atomic_set_short(P, V) (*(u_short*)(P) |= (V))
42 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
43 * atomic_add_short(P, V) (*(u_short*)(P) += (V))
44 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
46 * atomic_set_int(P, V) (*(u_int*)(P) |= (V))
47 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
48 * atomic_add_int(P, V) (*(u_int*)(P) += (V))
49 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
50 * atomic_readandclear_int(P) (return *(u_int*)P; *(u_int*)P = 0;)
52 * atomic_set_long(P, V) (*(u_long*)(P) |= (V))
53 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
54 * atomic_add_long(P, V) (*(u_long*)(P) += (V))
55 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
56 * atomic_readandclear_long(P) (return *(u_long*)P; *(u_long*)P = 0;)
60 * The above functions are expanded inline in the statically-linked
61 * kernel. Lock prefixes are generated if an SMP kernel is being
64 * Kernel modules call real functions which are built into the kernel.
65 * This allows kernel modules to be portable between UP and SMP systems.
67 #if defined(KLD_MODULE)
68 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
69 void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
71 int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
72 int atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src);
74 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
75 u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
76 void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
78 #else /* !KLD_MODULE */
83 * For userland, assume the SMP case and use lock prefixes so that
84 * the binaries will run on both types of systems.
86 #if defined(SMP) || !defined(_KERNEL)
87 #define MPLOCKED "lock ; "
93 * The assembly is volatilized to demark potential before-and-after side
94 * effects if an interrupt or SMP collision were to occur.
96 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
97 static __inline void \
98 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
100 __asm __volatile(MPLOCKED OP \
106 #else /* !__GNUC__ */
108 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
109 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
111 #endif /* __GNUC__ */
114 * These functions operate on a 32 bit interrupt interlock which is defined
117 * bit 0-30 interrupt handler disabled bits (counter)
118 * bit 31 interrupt handler currently running bit (1 = run)
120 * atomic_intr_cond_test(P) Determine if the interlock is in an
121 * acquired state. Returns 0 if it not
122 * acquired, non-zero if it is.
124 * atomic_intr_cond_try(P)
125 * Increment the request counter and attempt to
126 * set bit 31 to acquire the interlock. If
127 * we are unable to set bit 31 the request
128 * counter is decremented and we return -1,
129 * otherwise we return 0.
131 * atomic_intr_cond_enter(P, func, arg)
132 * Increment the request counter and attempt to
133 * set bit 31 to acquire the interlock. If
134 * we are unable to set bit 31 func(arg) is
135 * called in a loop until we are able to set
138 * atomic_intr_cond_exit(P, func, arg)
139 * Decrement the request counter and clear bit
140 * 31. If the request counter is still non-zero
141 * call func(arg) once.
143 * atomic_intr_handler_disable(P)
144 * Set bit 30, indicating that the interrupt
145 * handler has been disabled. Must be called
146 * after the hardware is disabled.
148 * Returns bit 31 indicating whether a serialized
149 * accessor is active (typically the interrupt
150 * handler is running). 0 == not active,
151 * non-zero == active.
153 * atomic_intr_handler_enable(P)
154 * Clear bit 30, indicating that the interrupt
155 * handler has been enabled. Must be called
156 * before the hardware is actually enabled.
158 * atomic_intr_handler_is_enabled(P)
159 * Returns bit 30, 0 indicates that the handler
160 * is enabled, non-zero indicates that it is
161 * disabled. The request counter portion of
162 * the field is ignored.
165 #ifndef __ATOMIC_INTR_T
166 #define __ATOMIC_INTR_T
167 typedef volatile int atomic_intr_t;
170 #if defined(KLD_MODULE)
172 void atomic_intr_init(atomic_intr_t *p);
173 int atomic_intr_handler_disable(atomic_intr_t *p);
174 void atomic_intr_handler_enable(atomic_intr_t *p);
175 int atomic_intr_handler_is_enabled(atomic_intr_t *p);
176 int atomic_intr_cond_test(atomic_intr_t *p);
177 int atomic_intr_cond_try(atomic_intr_t *p);
178 void atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg);
179 void atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg);
185 atomic_intr_init(atomic_intr_t *p)
192 atomic_intr_handler_disable(atomic_intr_t *p)
196 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
197 "andl $0x80000000,%%eax" \
198 : "=a"(data) , "+m"(*p));
204 atomic_intr_handler_enable(atomic_intr_t *p)
206 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
211 atomic_intr_handler_is_enabled(atomic_intr_t *p)
215 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
216 : "=a"(data) : "m"(*p));
222 atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg)
224 __asm __volatile(MPLOCKED "incl %0; " \
226 MPLOCKED "btsl $31,%0; jnc 2f; " \
227 "movq %2,%rdi; call *%1; " \
231 : "r"(func), "m"(arg) \
232 : "ax", "cx", "dx", "di"); /* XXX clobbers more regs */
236 * Attempt to enter the interrupt condition variable. Returns zero on
237 * success, 1 on failure.
241 atomic_intr_cond_try(atomic_intr_t *p)
245 __asm __volatile(MPLOCKED "incl %0; " \
247 "subl %%eax,%%eax; " \
248 MPLOCKED "btsl $31,%0; jnc 2f; " \
249 MPLOCKED "decl %0; " \
252 : "+m" (*p), "=a"(ret) \
260 atomic_intr_cond_test(atomic_intr_t *p)
262 return((int)(*p & 0x80000000));
267 atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg)
269 __asm __volatile(MPLOCKED "decl %0; " \
270 MPLOCKED "btrl $31,%0; " \
271 "testl $0x3FFFFFFF,%0; jz 1f; " \
272 "movq %2,%rdi; call *%1; " \
275 : "r"(func), "m"(arg) \
276 : "ax", "cx", "dx", "di"); /* XXX clobbers more regs */
282 * Atomic compare and set, used by the mutex functions
284 * if (*dst == exp) *dst = src (all 32 bit words)
286 * Returns 0 on failure, non-zero on success
289 #if defined(__GNUC__)
292 atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
302 "# atomic_cmpset_int"
303 : "+a" (res) /* 0 (result) */
312 atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src)
322 "# atomic_cmpset_long"
323 : "+a" (res) /* 0 (result) */
330 #endif /* defined(__GNUC__) */
332 #if defined(__GNUC__)
334 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
335 static __inline u_##TYPE \
336 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
340 __asm __volatile(MPLOCKED LOP \
341 : "=a" (res), /* 0 (result) */\
349 * The XCHG instruction asserts LOCK automagically. \
351 static __inline void \
352 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
354 __asm __volatile(SOP \
355 : "+m" (*p), /* 0 */ \
361 #else /* !defined(__GNUC__) */
363 extern int atomic_cmpset_int(volatile u_int *, u_int, u_int);
364 extern int atomic_cmpset_long(volatile u_long *, u_long, u_long);
366 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
367 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
368 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
370 #endif /* defined(__GNUC__) */
372 #endif /* KLD_MODULE */
374 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v);
375 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v);
376 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v);
377 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v);
379 ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v);
380 ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v);
381 ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v);
382 ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v);
384 ATOMIC_ASM(set, int, "orl %1,%0", "ir", v);
385 ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
386 ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
387 ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
389 ATOMIC_ASM(set, long, "orq %1,%0", "ir", v);
390 ATOMIC_ASM(clear, long, "andq %1,%0", "ir", ~v);
391 ATOMIC_ASM(add, long, "addq %1,%0", "ir", v);
392 ATOMIC_ASM(subtract, long, "subq %1,%0", "ir", v);
394 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
395 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
396 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
397 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0");
400 #undef ATOMIC_STORE_LOAD
402 #define atomic_set_acq_char atomic_set_char
403 #define atomic_set_rel_char atomic_set_char
404 #define atomic_clear_acq_char atomic_clear_char
405 #define atomic_clear_rel_char atomic_clear_char
406 #define atomic_add_acq_char atomic_add_char
407 #define atomic_add_rel_char atomic_add_char
408 #define atomic_subtract_acq_char atomic_subtract_char
409 #define atomic_subtract_rel_char atomic_subtract_char
411 #define atomic_set_acq_short atomic_set_short
412 #define atomic_set_rel_short atomic_set_short
413 #define atomic_clear_acq_short atomic_clear_short
414 #define atomic_clear_rel_short atomic_clear_short
415 #define atomic_add_acq_short atomic_add_short
416 #define atomic_add_rel_short atomic_add_short
417 #define atomic_subtract_acq_short atomic_subtract_short
418 #define atomic_subtract_rel_short atomic_subtract_short
420 #define atomic_set_acq_int atomic_set_int
421 #define atomic_set_rel_int atomic_set_int
422 #define atomic_clear_acq_int atomic_clear_int
423 #define atomic_clear_rel_int atomic_clear_int
424 #define atomic_add_acq_int atomic_add_int
425 #define atomic_add_rel_int atomic_add_int
426 #define atomic_subtract_acq_int atomic_subtract_int
427 #define atomic_subtract_rel_int atomic_subtract_int
428 #define atomic_cmpset_acq_int atomic_cmpset_int
429 #define atomic_cmpset_rel_int atomic_cmpset_int
431 #define atomic_set_acq_long atomic_set_long
432 #define atomic_set_rel_long atomic_set_long
433 #define atomic_clear_acq_long atomic_clear_long
434 #define atomic_clear_rel_long atomic_clear_long
435 #define atomic_add_acq_long atomic_add_long
436 #define atomic_add_rel_long atomic_add_long
437 #define atomic_subtract_acq_long atomic_subtract_long
438 #define atomic_subtract_rel_long atomic_subtract_long
440 #define atomic_cmpset_acq_ptr atomic_cmpset_ptr
441 #define atomic_cmpset_rel_ptr atomic_cmpset_ptr
443 #define atomic_set_8 atomic_set_char
444 #define atomic_set_acq_8 atomic_set_acq_char
445 #define atomic_set_rel_8 atomic_set_rel_char
446 #define atomic_clear_8 atomic_clear_char
447 #define atomic_clear_acq_8 atomic_clear_acq_char
448 #define atomic_clear_rel_8 atomic_clear_rel_char
449 #define atomic_add_8 atomic_add_char
450 #define atomic_add_acq_8 atomic_add_acq_char
451 #define atomic_add_rel_8 atomic_add_rel_char
452 #define atomic_subtract_8 atomic_subtract_char
453 #define atomic_subtract_acq_8 atomic_subtract_acq_char
454 #define atomic_subtract_rel_8 atomic_subtract_rel_char
455 #define atomic_load_acq_8 atomic_load_acq_char
456 #define atomic_store_rel_8 atomic_store_rel_char
458 #define atomic_set_16 atomic_set_short
459 #define atomic_set_acq_16 atomic_set_acq_short
460 #define atomic_set_rel_16 atomic_set_rel_short
461 #define atomic_clear_16 atomic_clear_short
462 #define atomic_clear_acq_16 atomic_clear_acq_short
463 #define atomic_clear_rel_16 atomic_clear_rel_short
464 #define atomic_add_16 atomic_add_short
465 #define atomic_add_acq_16 atomic_add_acq_short
466 #define atomic_add_rel_16 atomic_add_rel_short
467 #define atomic_subtract_16 atomic_subtract_short
468 #define atomic_subtract_acq_16 atomic_subtract_acq_short
469 #define atomic_subtract_rel_16 atomic_subtract_rel_short
470 #define atomic_load_acq_16 atomic_load_acq_short
471 #define atomic_store_rel_16 atomic_store_rel_short
473 #define atomic_set_32 atomic_set_int
474 #define atomic_set_acq_32 atomic_set_acq_int
475 #define atomic_set_rel_32 atomic_set_rel_int
476 #define atomic_clear_32 atomic_clear_int
477 #define atomic_clear_acq_32 atomic_clear_acq_int
478 #define atomic_clear_rel_32 atomic_clear_rel_int
479 #define atomic_add_32 atomic_add_int
480 #define atomic_add_acq_32 atomic_add_acq_int
481 #define atomic_add_rel_32 atomic_add_rel_int
482 #define atomic_subtract_32 atomic_subtract_int
483 #define atomic_subtract_acq_32 atomic_subtract_acq_int
484 #define atomic_subtract_rel_32 atomic_subtract_rel_int
485 #define atomic_load_acq_32 atomic_load_acq_int
486 #define atomic_store_rel_32 atomic_store_rel_int
487 #define atomic_cmpset_32 atomic_cmpset_int
488 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
489 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
490 #define atomic_readandclear_32 atomic_readandclear_int
492 #if !defined(WANT_FUNCTIONS)
494 atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
497 return (atomic_cmpset_long((volatile u_long *)dst,
498 (u_long)exp, (u_long)src));
501 static __inline void *
502 atomic_load_acq_ptr(volatile void *p)
505 * The apparently-bogus cast to intptr_t in the following is to
506 * avoid a warning from "gcc -Wbad-function-cast".
508 return ((void *)(intptr_t)atomic_load_acq_long((volatile u_long *)p));
512 atomic_store_rel_ptr(volatile void *p, void *v)
514 atomic_store_rel_long((volatile u_long *)p, (u_long)v);
517 #define ATOMIC_PTR(NAME) \
518 static __inline void \
519 atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
521 atomic_##NAME##_long((volatile u_long *)p, v); \
524 static __inline void \
525 atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
527 atomic_##NAME##_acq_long((volatile u_long *)p, v);\
530 static __inline void \
531 atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
533 atomic_##NAME##_rel_long((volatile u_long *)p, v);\
543 #if defined(__GNUC__)
545 static __inline u_int
546 atomic_readandclear_int(volatile u_int *addr)
553 "# atomic_readandclear_int"
554 : "=&r" (result) /* 0 (result) */
555 : "m" (*addr)); /* 1 (addr) */
560 static __inline u_long
561 atomic_readandclear_long(volatile u_long *addr)
568 "# atomic_readandclear_int"
569 : "=&r" (result) /* 0 (result) */
570 : "m" (*addr)); /* 1 (addr) */
575 #else /* !defined(__GNUC__) */
577 extern u_long atomic_readandclear_long(volatile u_long *);
578 extern u_int atomic_readandclear_int(volatile u_int *);
580 #endif /* defined(__GNUC__) */
582 #endif /* !defined(WANT_FUNCTIONS) */
583 #endif /* ! _MACHINE_ATOMIC_H_ */