2 * Am7990, Local Area Network Controller for Ethernet (LANCE)
4 * Copyright (c) 1994, Paul Richards. This software may be used,
5 * modified, copied, distributed, and sold, in both source and binary
6 * form provided that the above copyright and these terms are retained.
7 * Under no circumstances is the author responsible for the proper
8 * functioning of this software, nor does the author assume any
9 * responsibility for damages incurred with its use.
14 * The LANCE has four Control and Status Registers(CSRs) which are accessed
15 * through two bus addressable ports, the address port (RAP) and the data
33 /* Control and Status Register Masks */
57 * Bits 3-15 are reserved.
65 /* Initialisation block */
68 u_short mode; /* Mode register */
69 u_char padr[6]; /* Ethernet address */
70 u_char ladrf[8]; /* Logical address filter (multicast) */
71 u_short rdra; /* Low order pointer to receive ring */
72 u_short rlen; /* High order pointer and no. rings */
73 u_short tdra; /* Low order pointer to transmit ring */
74 u_short tlen; /* High order pointer and no rings */
77 /* Initialisation Block Mode Register Masks */
79 #define PROM 0x8000 /* Promiscuous Mode */
80 #define DRCVBC 0x4000 /* Disable Receive Broadcast */
81 #define DRCVPA 0x2000 /* Disable Receive Physical Address */
82 #define DLNKTST 0x1000 /* Disable Link Status */
83 #define DAPC 0x0800 /* Disable Automatic Polarity Correction */
84 #define MENDECL 0x0400 /* MENDEC Loopback Mode */
85 #define LRT 0x0200 /* Low Receive Threshold (T-MAU mode only) */
86 #define TSEL 0x0200 /* Transmit Mode Select (AUI mode only) */
87 #define PORTSEL 0x0180 /* Port Select bits */
88 #define INTL 0x0040 /* Internal Loopback */
89 #define DRTY 0x0020 /* Disable Retry */
90 #define FCOLL 0x0010 /* Force Collision */
91 #define DXMTFCS 0x0008 /* Disable transmit CRC (FCS) */
92 #define LOOP 0x0004 /* Loopback Enabl */
93 #define DTX 0x0002 /* Disable the transmitter */
94 #define DRX 0x0001 /* Disable the receiver */
97 * Message Descriptor Structure
99 * Each transmit or receive descriptor ring entry (RDRE's and TDRE's)
100 * is composed of 4, 16-bit, message descriptors. They contain the following
103 * 1. The address of the actual message data buffer in user (host) memory.
104 * 2. The length of that message buffer.
105 * 3. The status information for that particular buffer. The eight most
106 * significant bits of md1 are collectively termed the STATUS of the
109 * Descriptor md0 contains LADR 0-15, the low order 16 bits of the 24-bit
110 * address of the actual data buffer. Bits 0-7 of descriptor md1 contain
111 * HADR, the high order 8-bits of the 24-bit data buffer address. Bits 8-15
112 * of md1 contain the status flags of the buffer. Descriptor md2 contains the
113 * buffer byte count in bits 0-11 as a two's complement number and must have
114 * 1's written to bits 12-15. For the receive entry md3 has the Message Byte
115 * Count in bits 0-11, this is the length of the received message and is valid
116 * only when ERR is cleared and ENP is set. For the transmit entry it contains
117 * more status information.
128 /* Receive STATUS flags for md1 */
130 #define OWN 0x8000 /* Owner bit, 0=host, 1=Lance */
131 #define MDERR 0x4000 /* Error */
132 #define FRAM 0x2000 /* Framing error error */
133 #define OFLO 0x1000 /* Silo overflow */
134 #define CRC 0x0800 /* CRC error */
135 #define RBUFF 0x0400 /* Buffer error */
136 #define STP 0x0200 /* Start of packet */
137 #define ENP 0x0100 /* End of packet */
138 #define HADR 0x00FF /* High order address bits */
140 /* Receive STATUS flags for md2 */
142 #define BCNT 0x0FFF /* Size of data buffer as 2's comp. no. */
144 /* Receive STATUS flags for md3 */
146 #define MCNT 0x0FFF /* Total size of data for received packet */
148 /* Transmit STATUS flags for md1 */
150 #define ADD_FCS 0x2000 /* Controls generation of FCS */
151 #define MORE 0x1000 /* Indicates more than one retry was needed */
152 #define ONE 0x0800 /* Exactly one retry was needed */
153 #define DEF 0x0400 /* Packet transmit deferred -- channel busy */
156 * Transmit status flags for md2
158 * Same as for receive descriptor.
160 * BCNT 0x0FFF Size of data buffer as 2's complement number.
164 /* Transmit status flags for md3 */
166 #define TBUFF 0x8000 /* Buffer error */
167 #define UFLO 0x4000 /* Silo underflow */
168 #define LCOL 0x1000 /* Late collision */
169 #define LCAR 0x0800 /* Loss of carrier */
170 #define RTRY 0x0400 /* Tried 16 times */
171 #define TDR 0x03FF /* Time domain reflectometry */