sys/dev/disk/mps/mpi/mpi2_ra.h

   1 /* $FreeBSD: src/sys/dev/mps/mpi/mpi2_ra.h,v 1.1 2010/09/10 15:03:56 ken Exp $ */
   2 /*
   3  *  Copyright (c) 2009 LSI Corporation.
   4  *
   5  *
   6  *           Name:  mpi2_ra.h
   7  *          Title:  MPI RAID Accelerator messages and structures
   8  *  Creation Date:  April 13, 2009
   9  *
  10  *  mpi2_ra.h Version:  02.00.00
  11  *
  12  *  Version History
  13  *  ---------------
  14  *
  15  *  Date      Version   Description
  16  *  --------  --------  ------------------------------------------------------
  17  *  05-06-09  02.00.00  Initial version.
  18  *  --------------------------------------------------------------------------
  19  */
  20
  21 #ifndef MPI2_RA_H
  22 #define MPI2_RA_H
  23
  24 /* generic structure for RAID Accelerator Control Block */
  25 typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
  26 {
  27     U32                 Reserved[8];                /* 0x00 */
  28     U32                 RaidAcceleratorCDB[1];      /* 0x20 */
  29 } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
  30   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
  31   Mpi2RAIDAcceleratorControlBlock_t,
  32   MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
  33
  34
  35 /******************************************************************************
  36 *
  37 *        RAID Accelerator Messages
  38 *
  39 *******************************************************************************/
  40
  41 /* RAID Accelerator Request Message */
  42 typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
  43 {
  44     U16                     Reserved0;                          /* 0x00 */
  45     U8                      ChainOffset;                        /* 0x02 */
  46     U8                      Function;                           /* 0x03 */
  47     U16                     Reserved1;                          /* 0x04 */
  48     U8                      Reserved2;                          /* 0x06 */
  49     U8                      MsgFlags;                           /* 0x07 */
  50     U8                      VP_ID;                              /* 0x08 */
  51     U8                      VF_ID;                              /* 0x09 */
  52     U16                     Reserved3;                          /* 0x0A */
  53     U64                     RaidAcceleratorControlBlockAddress; /* 0x0C */
  54     U8                      DmaEngineNumber;                    /* 0x14 */
  55     U8                      Reserved4;                          /* 0x15 */
  56     U16                     Reserved5;                          /* 0x16 */
  57     U32                     Reserved6;                          /* 0x18 */
  58     U32                     Reserved7;                          /* 0x1C */
  59     U32                     Reserved8;                          /* 0x20 */
  60 } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
  61   Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
  62
  63
  64 /* RAID Accelerator Error Reply Message */
  65 typedef struct _MPI2_RAID_ACCELERATOR_REPLY
  66 {
  67     U16                     Reserved0;                      /* 0x00 */
  68     U8                      MsgLength;                      /* 0x02 */
  69     U8                      Function;                       /* 0x03 */
  70     U16                     Reserved1;                      /* 0x04 */
  71     U8                      Reserved2;                      /* 0x06 */
  72     U8                      MsgFlags;                       /* 0x07 */
  73     U8                      VP_ID;                          /* 0x08 */
  74     U8                      VF_ID;                          /* 0x09 */
  75     U16                     Reserved3;                      /* 0x0A */
  76     U16                     Reserved4;                      /* 0x0C */
  77     U16                     IOCStatus;                      /* 0x0E */
  78     U32                     IOCLogInfo;                     /* 0x10 */
  79     U32                     ProductSpecificData[3];         /* 0x14 */
  80 } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
  81   Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
  82
  83
  84 #endif