sys/dev/netif/em/if_em.c

   1 /*
   2  *
   3  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   4  *
   5  * Copyright (c) 2001-2006, Intel Corporation
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  *  1. Redistributions of source code must retain the above copyright notice,
  12  *     this list of conditions and the following disclaimer.
  13  *
  14  *  2. Redistributions in binary form must reproduce the above copyright
  15  *     notice, this list of conditions and the following disclaimer in the
  16  *     documentation and/or other materials provided with the distribution.
  17  *
  18  *  3. Neither the name of the Intel Corporation nor the names of its
  19  *     contributors may be used to endorse or promote products derived from
  20  *     this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  26  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  32  * POSSIBILITY OF SUCH DAMAGE.
  33  *
  34  *
  35  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  36  *
  37  * This code is derived from software contributed to The DragonFly Project
  38  * by Matthew Dillon <dillon@backplane.com>
  39  *
  40  * Redistribution and use in source and binary forms, with or without
  41  * modification, are permitted provided that the following conditions
  42  * are met:
  43  *
  44  * 1. Redistributions of source code must retain the above copyright
  45  *    notice, this list of conditions and the following disclaimer.
  46  * 2. Redistributions in binary form must reproduce the above copyright
  47  *    notice, this list of conditions and the following disclaimer in
  48  *    the documentation and/or other materials provided with the
  49  *    distribution.
  50  * 3. Neither the name of The DragonFly Project nor the names of its
  51  *    contributors may be used to endorse or promote products derived
  52  *    from this software without specific, prior written permission.
  53  *
  54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  57  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  58  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  59  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  60  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  61  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  62  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  63  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  64  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  65  * SUCH DAMAGE.
  66  *
  67  * $DragonFly: src/sys/dev/netif/em/if_em.c,v 1.65 2008/03/10 12:59:51 sephe Exp $
  68  * $FreeBSD$
  69  */
  70 /*
  71  * SERIALIZATION API RULES:
  72  *
  73  * - If the driver uses the same serializer for the interrupt as for the
  74  *   ifnet, most of the serialization will be done automatically for the
  75  *   driver.
  76  *
  77  * - ifmedia entry points will be serialized by the ifmedia code using the
  78  *   ifnet serializer.
  79  *
  80  * - if_* entry points except for if_input will be serialized by the IF
  81  *   and protocol layers.
  82  *
  83  * - The device driver must be sure to serialize access from timeout code
  84  *   installed by the device driver.
  85  *
  86  * - The device driver typically holds the serializer at the time it wishes
  87  *   to call if_input.  If so, it should pass the serializer to if_input and
  88  *   note that the serializer might be dropped temporarily by if_input
  89  *   (e.g. in case it has to bridge the packet to another interface).
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_polling.h"
  97 #include "opt_inet.h"
  98
  99 #include <sys/param.h>
 100 #include <sys/bus.h>
 101 #include <sys/endian.h>
 102 #include <sys/kernel.h>
 103 #include <sys/ktr.h>
 104 #include <sys/malloc.h>
 105 #include <sys/mbuf.h>
 106 #include <sys/module.h>
 107 #include <sys/rman.h>
 108 #include <sys/serialize.h>
 109 #include <sys/socket.h>
 110 #include <sys/sockio.h>
 111 #include <sys/sysctl.h>
 112
 113 #include <net/bpf.h>
 114 #include <net/ethernet.h>
 115 #include <net/if.h>
 116 #include <net/if_arp.h>
 117 #include <net/if_dl.h>
 118 #include <net/if_media.h>
 119 #include <net/if_types.h>
 120 #include <net/ifq_var.h>
 121 #include <net/vlan/if_vlan_var.h>
 122 #include <net/vlan/if_vlan_ether.h>
 123
 124 #ifdef INET
 125 #include <netinet/in.h>
 126 #include <netinet/in_systm.h>
 127 #include <netinet/in_var.h>
 128 #include <netinet/ip.h>
 129 #include <netinet/tcp.h>
 130 #include <netinet/udp.h>
 131 #endif
 132
 133 #include <dev/netif/em/if_em_hw.h>
 134 #include <dev/netif/em/if_em.h>
 135
 136 #define EM_X60_WORKAROUND
 137
 138 /*********************************************************************
 139  *  Set this to one to display debug statistics
 140  *********************************************************************/
 141 int     em_display_debug_stats = 0;
 142
 143 /*********************************************************************
 144  *  Driver version
 145  *********************************************************************/
 146
 147 char em_driver_version[] = "6.2.9";
 148
 149
 150 /*********************************************************************
 151  *  PCI Device ID Table
 152  *
 153  *  Used by probe to select devices to load on
 154  *  Last field stores an index into em_strings
 155  *  Last entry must be all 0s
 156  *
 157  *  { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
 158  *********************************************************************/
 159
 160 static em_vendor_info_t em_vendor_info_array[] =
 161 {
 162         /* Intel(R) PRO/1000 Network Connection */
 163         { 0x8086, E1000_DEV_ID_82540EM,         PCI_ANY_ID, PCI_ANY_ID, 0},
 164         { 0x8086, E1000_DEV_ID_82540EM_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 165         { 0x8086, E1000_DEV_ID_82540EP,         PCI_ANY_ID, PCI_ANY_ID, 0},
 166         { 0x8086, E1000_DEV_ID_82540EP_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 167         { 0x8086, E1000_DEV_ID_82540EP_LP,      PCI_ANY_ID, PCI_ANY_ID, 0},
 168
 169         { 0x8086, E1000_DEV_ID_82541EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 170         { 0x8086, E1000_DEV_ID_82541ER,         PCI_ANY_ID, PCI_ANY_ID, 0},
 171         { 0x8086, E1000_DEV_ID_82541ER_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 172         { 0x8086, E1000_DEV_ID_82541EI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 173         { 0x8086, E1000_DEV_ID_82541GI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 174         { 0x8086, E1000_DEV_ID_82541GI_LF,      PCI_ANY_ID, PCI_ANY_ID, 0},
 175         { 0x8086, E1000_DEV_ID_82541GI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 176
 177         { 0x8086, E1000_DEV_ID_82542,           PCI_ANY_ID, PCI_ANY_ID, 0},
 178
 179         { 0x8086, E1000_DEV_ID_82543GC_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 180         { 0x8086, E1000_DEV_ID_82543GC_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 181
 182         { 0x8086, E1000_DEV_ID_82544EI_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 183         { 0x8086, E1000_DEV_ID_82544EI_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 184         { 0x8086, E1000_DEV_ID_82544GC_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 185         { 0x8086, E1000_DEV_ID_82544GC_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 186
 187         { 0x8086, E1000_DEV_ID_82545EM_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 188         { 0x8086, E1000_DEV_ID_82545EM_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 189         { 0x8086, E1000_DEV_ID_82545GM_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 190         { 0x8086, E1000_DEV_ID_82545GM_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 191         { 0x8086, E1000_DEV_ID_82545GM_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 192
 193         { 0x8086, E1000_DEV_ID_82546EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 194         { 0x8086, E1000_DEV_ID_82546EB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 195         { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
 196         { 0x8086, E1000_DEV_ID_82546GB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 197         { 0x8086, E1000_DEV_ID_82546GB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 198         { 0x8086, E1000_DEV_ID_82546GB_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 199         { 0x8086, E1000_DEV_ID_82546GB_PCIE,    PCI_ANY_ID, PCI_ANY_ID, 0},
 200         { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
 201         { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3,
 202                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 203
 204         { 0x8086, E1000_DEV_ID_82547EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 205         { 0x8086, E1000_DEV_ID_82547EI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 206         { 0x8086, E1000_DEV_ID_82547GI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 207
 208         { 0x8086, E1000_DEV_ID_82571EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 209         { 0x8086, E1000_DEV_ID_82571EB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 210         { 0x8086, E1000_DEV_ID_82571EB_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 211         { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER,
 212                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 213         { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE,
 214                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 215
 216         { 0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER,
 217                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 218         { 0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER,
 219                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 220         { 0x8086, E1000_DEV_ID_82572EI_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 221         { 0x8086, E1000_DEV_ID_82572EI_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 222         { 0x8086, E1000_DEV_ID_82572EI_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 223         { 0x8086, E1000_DEV_ID_82572EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 224
 225         { 0x8086, E1000_DEV_ID_82573E,          PCI_ANY_ID, PCI_ANY_ID, 0},
 226         { 0x8086, E1000_DEV_ID_82573E_IAMT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 227         { 0x8086, E1000_DEV_ID_82573L,          PCI_ANY_ID, PCI_ANY_ID, 0},
 228
 229         { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT,
 230                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 231         { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT,
 232                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 233         { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT,
 234                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 235         { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT,
 236                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 237
 238         { 0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT,  PCI_ANY_ID, PCI_ANY_ID, 0},
 239         { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT,    PCI_ANY_ID, PCI_ANY_ID, 0},
 240         { 0x8086, E1000_DEV_ID_ICH8_IGP_C,      PCI_ANY_ID, PCI_ANY_ID, 0},
 241         { 0x8086, E1000_DEV_ID_ICH8_IFE,        PCI_ANY_ID, PCI_ANY_ID, 0},
 242         { 0x8086, E1000_DEV_ID_ICH8_IFE_GT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 243         { 0x8086, E1000_DEV_ID_ICH8_IFE_G,      PCI_ANY_ID, PCI_ANY_ID, 0},
 244         { 0x8086, E1000_DEV_ID_ICH8_IGP_M,      PCI_ANY_ID, PCI_ANY_ID, 0},
 245
 246         { 0x8086, E1000_DEV_ID_ICH9_IGP_AMT,    PCI_ANY_ID, PCI_ANY_ID, 0},
 247         { 0x8086, E1000_DEV_ID_ICH9_IGP_C,      PCI_ANY_ID, PCI_ANY_ID, 0},
 248         { 0x8086, E1000_DEV_ID_ICH9_IFE,        PCI_ANY_ID, PCI_ANY_ID, 0},
 249         { 0x8086, E1000_DEV_ID_ICH9_IFE_GT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 250         { 0x8086, E1000_DEV_ID_ICH9_IFE_G,      PCI_ANY_ID, PCI_ANY_ID, 0},
 251
 252         { 0x8086, E1000_DEV_ID_82575EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 253         { 0x8086, E1000_DEV_ID_82575EB_FIBER_SERDES,
 254                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 255         { 0x8086, E1000_DEV_ID_82575GB_QUAD_COPPER,
 256                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 257         { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0},
 258         { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0},
 259         /* required last entry */
 260         { 0, 0, 0, 0, 0}
 261 };
 262
 263 /*********************************************************************
 264  *  Table of branding strings for all supported NICs.
 265  *********************************************************************/
 266
 267 static const char *em_strings[] = {
 268         "Intel(R) PRO/1000 Network Connection"
 269 };
 270
 271 /*********************************************************************
 272  *  Function prototypes
 273  *********************************************************************/
 274 static int      em_probe(device_t);
 275 static int      em_attach(device_t);
 276 static int      em_detach(device_t);
 277 static int      em_shutdown(device_t);
 278 static void     em_intr(void *);
 279 static int      em_suspend(device_t);
 280 static int      em_resume(device_t);
 281 static void     em_start(struct ifnet *);
 282 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 283 static void     em_watchdog(struct ifnet *);
 284 static void     em_init(void *);
 285 static void     em_stop(void *);
 286 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 287 static int      em_media_change(struct ifnet *);
 288 static void     em_identify_hardware(struct adapter *);
 289 static int      em_allocate_pci_resources(device_t);
 290 static void     em_free_pci_resources(device_t);
 291 static void     em_local_timer(void *);
 292 static int      em_hardware_init(struct adapter *);
 293 static void     em_setup_interface(device_t, struct adapter *);
 294 static int      em_setup_transmit_structures(struct adapter *);
 295 static void     em_initialize_transmit_unit(struct adapter *);
 296 static int      em_setup_receive_structures(struct adapter *);
 297 static void     em_initialize_receive_unit(struct adapter *);
 298 static void     em_enable_intr(struct adapter *);
 299 static void     em_disable_intr(struct adapter *);
 300 static void     em_free_transmit_structures(struct adapter *);
 301 static void     em_free_receive_structures(struct adapter *);
 302 static void     em_update_stats_counters(struct adapter *);
 303 static void     em_txeof(struct adapter *);
 304 static int      em_allocate_receive_structures(struct adapter *);
 305 static void     em_rxeof(struct adapter *, int);
 306 static void     em_receive_checksum(struct adapter *, struct em_rx_desc *,
 307                                     struct mbuf *);
 308 static void     em_transmit_checksum_setup(struct adapter *, struct mbuf *,
 309                                            uint32_t *, uint32_t *);
 310 static void     em_set_promisc(struct adapter *);
 311 static void     em_disable_promisc(struct adapter *);
 312 static void     em_set_multi(struct adapter *);
 313 static void     em_print_hw_stats(struct adapter *);
 314 static void     em_update_link_status(struct adapter *);
 315 static int      em_get_buf(int i, struct adapter *, struct mbuf *, int how);
 316 static void     em_enable_vlans(struct adapter *);
 317 static void     em_disable_vlans(struct adapter *);
 318 static int      em_encap(struct adapter *, struct mbuf *);
 319 static void     em_smartspeed(struct adapter *);
 320 static int      em_82547_fifo_workaround(struct adapter *, int);
 321 static void     em_82547_update_fifo_head(struct adapter *, int);
 322 static int      em_82547_tx_fifo_reset(struct adapter *);
 323 static void     em_82547_move_tail(void *);
 324 static void     em_82547_move_tail_serialized(struct adapter *);
 325 static int      em_dma_malloc(struct adapter *, bus_size_t,
 326                               struct em_dma_alloc *);
 327 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 328 static void     em_print_debug_info(struct adapter *);
 329 static int      em_is_valid_ether_addr(uint8_t *);
 330 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 331 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 332 static uint32_t em_fill_descriptors(bus_addr_t address, uint32_t length,
 333                                    PDESC_ARRAY desc_array);
 334 static int      em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
 335 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 336 static void     em_add_int_delay_sysctl(struct adapter *, const char *,
 337                                         const char *,
 338                                         struct em_int_delay_info *, int, int);
 339
 340 /*********************************************************************
 341  *  FreeBSD Device Interface Entry Points
 342  *********************************************************************/
 343
 344 static device_method_t em_methods[] = {
 345         /* Device interface */
 346         DEVMETHOD(device_probe, em_probe),
 347         DEVMETHOD(device_attach, em_attach),
 348         DEVMETHOD(device_detach, em_detach),
 349         DEVMETHOD(device_shutdown, em_shutdown),
 350         DEVMETHOD(device_suspend, em_suspend),
 351         DEVMETHOD(device_resume, em_resume),
 352         {0, 0}
 353 };
 354
 355 static driver_t em_driver = {
 356         "em", em_methods, sizeof(struct adapter),
 357 };
 358
 359 static devclass_t em_devclass;
 360
 361 DECLARE_DUMMY_MODULE(if_em);
 362 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0);
 363
 364 /*********************************************************************
 365  *  Tunable default values.
 366  *********************************************************************/
 367
 368 #define E1000_TICKS_TO_USECS(ticks)     ((1024 * (ticks) + 500) / 1000)
 369 #define E1000_USECS_TO_TICKS(usecs)     ((1000 * (usecs) + 512) / 1024)
 370
 371 static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV);
 372 static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR);
 373 static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV);
 374 static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV);
 375 static int em_int_throttle_ceil = 10000;
 376 static int em_rxd = EM_DEFAULT_RXD;
 377 static int em_txd = EM_DEFAULT_TXD;
 378 static int em_smart_pwr_down = FALSE;
 379
 380 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
 381 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
 382 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
 383 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
 384 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 385 TUNABLE_INT("hw.em.rxd", &em_rxd);
 386 TUNABLE_INT("hw.em.txd", &em_txd);
 387 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 388
 389 /*
 390  * Kernel trace for characterization of operations
 391  */
 392 #if !defined(KTR_IF_EM)
 393 #define KTR_IF_EM       KTR_ALL
 394 #endif
 395 KTR_INFO_MASTER(if_em);
 396 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0);
 397 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0);
 398 #ifdef DEVICE_POLLING
 399 KTR_INFO(KTR_IF_EM, if_em, poll_beg, 2, "poll begin", 0);
 400 KTR_INFO(KTR_IF_EM, if_em, poll_end, 3, "poll end", 0);
 401 #endif
 402 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0);
 403 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0);
 404 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0);
 405 #define logif(name)     KTR_LOG(if_em_ ## name)
 406
 407 /*********************************************************************
 408  *  Device identification routine
 409  *
 410  *  em_probe determines if the driver should be loaded on
 411  *  adapter based on PCI vendor/device id of the adapter.
 412  *
 413  *  return 0 on success, positive on failure
 414  *********************************************************************/
 415
 416 static int
 417 em_probe(device_t dev)
 418 {
 419         em_vendor_info_t *ent;
 420
 421         uint16_t pci_vendor_id = 0;
 422         uint16_t pci_device_id = 0;
 423         uint16_t pci_subvendor_id = 0;
 424         uint16_t pci_subdevice_id = 0;
 425         char adapter_name[60];
 426
 427         INIT_DEBUGOUT("em_probe: begin");
 428
 429         pci_vendor_id = pci_get_vendor(dev);
 430         if (pci_vendor_id != EM_VENDOR_ID)
 431                 return (ENXIO);
 432
 433         pci_device_id = pci_get_device(dev);
 434         pci_subvendor_id = pci_get_subvendor(dev);
 435         pci_subdevice_id = pci_get_subdevice(dev);
 436
 437         ent = em_vendor_info_array;
 438         while (ent->vendor_id != 0) {
 439                 if ((pci_vendor_id == ent->vendor_id) &&
 440                     (pci_device_id == ent->device_id) &&
 441
 442                     ((pci_subvendor_id == ent->subvendor_id) ||
 443                      (ent->subvendor_id == PCI_ANY_ID)) &&
 444
 445                     ((pci_subdevice_id == ent->subdevice_id) ||
 446                      (ent->subdevice_id == PCI_ANY_ID))) {
 447                         ksnprintf(adapter_name, sizeof(adapter_name),
 448                                  "%s, Version - %s",  em_strings[ent->index],
 449                                  em_driver_version);
 450                         device_set_desc_copy(dev, adapter_name);
 451                         device_set_async_attach(dev, TRUE);
 452                         return (0);
 453                 }
 454                 ent++;
 455         }
 456
 457         return (ENXIO);
 458 }
 459
 460 /*********************************************************************
 461  *  Device initialization routine
 462  *
 463  *  The attach entry point is called when the driver is being loaded.
 464  *  This routine identifies the type of hardware, allocates all resources
 465  *  and initializes the hardware.
 466  *
 467  *  return 0 on success, positive on failure
 468  *********************************************************************/
 469
 470 static int
 471 em_attach(device_t dev)
 472 {
 473         struct adapter *adapter;
 474         int tsize, rsize;
 475         int error = 0;
 476
 477         INIT_DEBUGOUT("em_attach: begin");
 478
 479         adapter = device_get_softc(dev);
 480
 481         callout_init(&adapter->timer);
 482         callout_init(&adapter->tx_fifo_timer);
 483
 484         adapter->dev = dev;
 485         adapter->osdep.dev = dev;
 486
 487         /* SYSCTL stuff */
 488         sysctl_ctx_init(&adapter->sysctl_ctx);
 489         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
 490                                                SYSCTL_STATIC_CHILDREN(_hw),
 491                                                OID_AUTO,
 492                                                device_get_nameunit(dev),
 493                                                CTLFLAG_RD,
 494                                                0, "");
 495
 496         if (adapter->sysctl_tree == NULL) {
 497                 device_printf(dev, "Unable to create sysctl tree\n");
 498                 return EIO;
 499         }
 500
 501         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 502                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 503                         OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW,
 504                         (void *)adapter, 0,
 505                         em_sysctl_debug_info, "I", "Debug Information");
 506
 507         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 508                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 509                         OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW,
 510                         (void *)adapter, 0,
 511                         em_sysctl_stats, "I", "Statistics");
 512
 513         /* Determine hardware revision */
 514         em_identify_hardware(adapter);
 515
 516         /* Set up some sysctls for the tunable interrupt delays */
 517         em_add_int_delay_sysctl(adapter, "rx_int_delay",
 518                                 "receive interrupt delay in usecs",
 519                                 &adapter->rx_int_delay,
 520                                 E1000_REG_OFFSET(&adapter->hw, RDTR),
 521                                 em_rx_int_delay_dflt);
 522         em_add_int_delay_sysctl(adapter, "tx_int_delay",
 523                                 "transmit interrupt delay in usecs",
 524                                 &adapter->tx_int_delay,
 525                                 E1000_REG_OFFSET(&adapter->hw, TIDV),
 526                                 em_tx_int_delay_dflt);
 527         if (adapter->hw.mac_type >= em_82540) {
 528                 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
 529                                         "receive interrupt delay limit in usecs",
 530                                         &adapter->rx_abs_int_delay,
 531                                         E1000_REG_OFFSET(&adapter->hw, RADV),
 532                                         em_rx_abs_int_delay_dflt);
 533                 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
 534                                         "transmit interrupt delay limit in usecs",
 535                                         &adapter->tx_abs_int_delay,
 536                                         E1000_REG_OFFSET(&adapter->hw, TADV),
 537                                         em_tx_abs_int_delay_dflt);
 538                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 539                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 540                         OID_AUTO, "int_throttle_ceil", CTLTYPE_INT|CTLFLAG_RW,
 541                         adapter, 0, em_sysctl_int_throttle, "I", NULL);
 542         }
 543
 544         /*
 545          * Validate number of transmit and receive descriptors. It
 546          * must not exceed hardware maximum, and must be multiple
 547          * of EM_DBA_ALIGN.
 548          */
 549         if (((em_txd * sizeof(struct em_tx_desc)) % EM_DBA_ALIGN) != 0 ||
 550             (adapter->hw.mac_type >= em_82544 && em_txd > EM_MAX_TXD) ||
 551             (adapter->hw.mac_type < em_82544 && em_txd > EM_MAX_TXD_82543) ||
 552             (em_txd < EM_MIN_TXD)) {
 553                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 554                               EM_DEFAULT_TXD, em_txd);
 555                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 556         } else {
 557                 adapter->num_tx_desc = em_txd;
 558         }
 559
 560         if (((em_rxd * sizeof(struct em_rx_desc)) % EM_DBA_ALIGN) != 0 ||
 561             (adapter->hw.mac_type >= em_82544 && em_rxd > EM_MAX_RXD) ||
 562             (adapter->hw.mac_type < em_82544 && em_rxd > EM_MAX_RXD_82543) ||
 563             (em_rxd < EM_MIN_RXD)) {
 564                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 565                               EM_DEFAULT_RXD, em_rxd);
 566                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 567         } else {
 568                 adapter->num_rx_desc = em_rxd;
 569         }
 570
 571         SYSCTL_ADD_INT(NULL, SYSCTL_CHILDREN(adapter->sysctl_tree), OID_AUTO, "rxd",
 572                        CTLFLAG_RD, &adapter->num_rx_desc, 0, NULL);
 573         SYSCTL_ADD_INT(NULL, SYSCTL_CHILDREN(adapter->sysctl_tree), OID_AUTO, "txd",
 574                        CTLFLAG_RD, &adapter->num_tx_desc, 0, NULL);
 575
 576         adapter->hw.autoneg = DO_AUTO_NEG;
 577         adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT;
 578         adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 579         adapter->hw.tbi_compatibility_en = TRUE;
 580         adapter->rx_buffer_len = EM_RXBUFFER_2048;
 581
 582         adapter->hw.phy_init_script = 1;
 583         adapter->hw.phy_reset_disable = FALSE;
 584
 585 #ifndef EM_MASTER_SLAVE
 586         adapter->hw.master_slave = em_ms_hw_default;
 587 #else
 588         adapter->hw.master_slave = EM_MASTER_SLAVE;
 589 #endif
 590
 591         /*
 592          * Set the max frame size assuming standard ethernet
 593          * sized frames.
 594          */
 595         adapter->hw.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 596
 597         adapter->hw.min_frame_size =
 598             MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN;
 599
 600         /*
 601          * This controls when hardware reports transmit completion
 602          * status.
 603          */
 604         adapter->hw.report_tx_early = 1;
 605
 606         error = em_allocate_pci_resources(dev);
 607         if (error)
 608                 goto fail;
 609
 610         /* Initialize eeprom parameters */
 611         em_init_eeprom_params(&adapter->hw);
 612
 613         tsize = roundup2(adapter->num_tx_desc * sizeof(struct em_tx_desc),
 614                          EM_DBA_ALIGN);
 615
 616         /* Allocate Transmit Descriptor ring */
 617         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 618         if (error) {
 619                 device_printf(dev, "Unable to allocate TxDescriptor memory\n");
 620                 goto fail;
 621         }
 622         adapter->tx_desc_base = (struct em_tx_desc *)adapter->txdma.dma_vaddr;
 623
 624         rsize = roundup2(adapter->num_rx_desc * sizeof(struct em_rx_desc),
 625                          EM_DBA_ALIGN);
 626
 627         /* Allocate Receive Descriptor ring */
 628         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 629         if (error) {
 630                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 631                 goto fail;
 632         }
 633         adapter->rx_desc_base = (struct em_rx_desc *)adapter->rxdma.dma_vaddr;
 634
 635         /* Initialize the hardware */
 636         if (em_hardware_init(adapter)) {
 637                 device_printf(dev, "Unable to initialize the hardware\n");
 638                 error = EIO;
 639                 goto fail;
 640         }
 641
 642         /* Copy the permanent MAC address out of the EEPROM */
 643         if (em_read_mac_addr(&adapter->hw) < 0) {
 644                 device_printf(dev,
 645                               "EEPROM read error while reading MAC address\n");
 646                 error = EIO;
 647                 goto fail;
 648         }
 649
 650         if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) {
 651                 device_printf(dev, "Invalid MAC address\n");
 652                 error = EIO;
 653                 goto fail;
 654         }
 655
 656         /* Setup OS specific network interface */
 657         em_setup_interface(dev, adapter);
 658
 659         /* Initialize statistics */
 660         em_clear_hw_cntrs(&adapter->hw);
 661         em_update_stats_counters(adapter);
 662         adapter->hw.get_link_status = 1;
 663         em_update_link_status(adapter);
 664
 665         /* Indicate SOL/IDER usage */
 666         if (em_check_phy_reset_block(&adapter->hw)) {
 667                 device_printf(dev, "PHY reset is blocked due to "
 668                               "SOL/IDER session.\n");
 669         }
 670
 671         /* Identify 82544 on PCIX */
 672         em_get_bus_info(&adapter->hw);
 673         if (adapter->hw.bus_type == em_bus_type_pcix &&
 674             adapter->hw.mac_type == em_82544)
 675                 adapter->pcix_82544 = TRUE;
 676         else
 677                 adapter->pcix_82544 = FALSE;
 678
 679         error = bus_setup_intr(dev, adapter->res_interrupt, INTR_NETSAFE,
 680                            em_intr, adapter,
 681                            &adapter->int_handler_tag,
 682                            adapter->interface_data.ac_if.if_serializer);
 683         if (error) {
 684                 device_printf(dev, "Error registering interrupt handler!\n");
 685                 ether_ifdetach(&adapter->interface_data.ac_if);
 686                 goto fail;
 687         }
 688
 689         INIT_DEBUGOUT("em_attach: end");
 690         return(0);
 691
 692 fail:
 693         em_detach(dev);
 694         return(error);
 695 }
 696
 697 /*********************************************************************
 698  *  Device removal routine
 699  *
 700  *  The detach entry point is called when the driver is being removed.
 701  *  This routine stops the adapter and deallocates all the resources
 702  *  that were allocated for driver operation.
 703  *
 704  *  return 0 on success, positive on failure
 705  *********************************************************************/
 706
 707 static int
 708 em_detach(device_t dev)
 709 {
 710         struct adapter *adapter = device_get_softc(dev);
 711
 712         INIT_DEBUGOUT("em_detach: begin");
 713
 714         if (device_is_attached(dev)) {
 715                 struct ifnet *ifp = &adapter->interface_data.ac_if;
 716
 717                 lwkt_serialize_enter(ifp->if_serializer);
 718                 adapter->in_detach = 1;
 719                 em_stop(adapter);
 720                 em_phy_hw_reset(&adapter->hw);
 721                 bus_teardown_intr(dev, adapter->res_interrupt,
 722                                   adapter->int_handler_tag);
 723                 lwkt_serialize_exit(ifp->if_serializer);
 724
 725                 ether_ifdetach(ifp);
 726         }
 727         bus_generic_detach(dev);
 728
 729         em_free_pci_resources(dev);
 730
 731         /* Free Transmit Descriptor ring */
 732         if (adapter->tx_desc_base != NULL) {
 733                 em_dma_free(adapter, &adapter->txdma);
 734                 adapter->tx_desc_base = NULL;
 735         }
 736
 737         /* Free Receive Descriptor ring */
 738         if (adapter->rx_desc_base != NULL) {
 739                 em_dma_free(adapter, &adapter->rxdma);
 740                 adapter->rx_desc_base = NULL;
 741         }
 742
 743         /* Free sysctl tree */
 744         if (adapter->sysctl_tree != NULL) {
 745                 adapter->sysctl_tree = NULL;
 746                 sysctl_ctx_free(&adapter->sysctl_ctx);
 747         }
 748
 749         return (0);
 750 }
 751
 752 /*********************************************************************
 753  *
 754  *  Shutdown entry point
 755  *
 756  **********************************************************************/
 757
 758 static int
 759 em_shutdown(device_t dev)
 760 {
 761         struct adapter *adapter = device_get_softc(dev);
 762         struct ifnet *ifp = &adapter->interface_data.ac_if;
 763
 764         lwkt_serialize_enter(ifp->if_serializer);
 765         em_stop(adapter);
 766         lwkt_serialize_exit(ifp->if_serializer);
 767
 768         return (0);
 769 }
 770
 771 /*
 772  * Suspend/resume device methods.
 773  */
 774 static int
 775 em_suspend(device_t dev)
 776 {
 777         struct adapter *adapter = device_get_softc(dev);
 778         struct ifnet *ifp = &adapter->interface_data.ac_if;
 779
 780         lwkt_serialize_enter(ifp->if_serializer);
 781         em_stop(adapter);
 782         lwkt_serialize_exit(ifp->if_serializer);
 783         return (0);
 784 }
 785
 786 static int
 787 em_resume(device_t dev)
 788 {
 789         struct adapter *adapter = device_get_softc(dev);
 790         struct ifnet *ifp = &adapter->interface_data.ac_if;
 791
 792         lwkt_serialize_enter(ifp->if_serializer);
 793         ifp->if_flags &= ~IFF_RUNNING;
 794         em_init(adapter);
 795         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
 796                 em_start(ifp);
 797         lwkt_serialize_exit(ifp->if_serializer);
 798
 799         return bus_generic_resume(dev);
 800 }
 801
 802 /*********************************************************************
 803  *  Transmit entry point
 804  *
 805  *  em_start is called by the stack to initiate a transmit.
 806  *  The driver will remain in this routine as long as there are
 807  *  packets to transmit and transmit resources are available.
 808  *  In case resources are not available stack is notified and
 809  *  the packet is requeued.
 810  **********************************************************************/
 811
 812 static void
 813 em_start(struct ifnet *ifp)
 814 {
 815         struct mbuf *m_head;
 816         struct adapter *adapter = ifp->if_softc;
 817
 818         ASSERT_SERIALIZED(ifp->if_serializer);
 819
 820         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
 821                 return;
 822         if (!adapter->link_active)
 823                 return;
 824         while (!ifq_is_empty(&ifp->if_snd)) {
 825                 m_head = ifq_poll(&ifp->if_snd);
 826
 827                 if (m_head == NULL)
 828                         break;
 829
 830                 logif(pkt_txqueue);
 831                 if (em_encap(adapter, m_head)) {
 832                         ifp->if_flags |= IFF_OACTIVE;
 833                         break;
 834                 }
 835                 ifq_dequeue(&ifp->if_snd, m_head);
 836
 837                 /* Send a copy of the frame to the BPF listener */
 838                 ETHER_BPF_MTAP(ifp, m_head);
 839
 840                 /* Set timeout in case hardware has problems transmitting. */
 841                 ifp->if_timer = EM_TX_TIMEOUT;
 842         }
 843 }
 844
 845 /*********************************************************************
 846  *  Ioctl entry point
 847  *
 848  *  em_ioctl is called when the user wants to configure the
 849  *  interface.
 850  *
 851  *  return 0 on success, positive on failure
 852  **********************************************************************/
 853
 854 static int
 855 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
 856 {
 857         int max_frame_size, mask, error = 0, reinit = 0;
 858         struct ifreq *ifr = (struct ifreq *) data;
 859         struct adapter *adapter = ifp->if_softc;
 860         uint16_t eeprom_data = 0;
 861
 862         ASSERT_SERIALIZED(ifp->if_serializer);
 863
 864         if (adapter->in_detach)
 865                 return 0;
 866
 867         switch (command) {
 868         case SIOCSIFMTU:
 869                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
 870                 switch (adapter->hw.mac_type) {
 871                 case em_82573:
 872                         /*
 873                          * 82573 only supports jumbo frames
 874                          * if ASPM is disabled.
 875                          */
 876                         em_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3,
 877                             1, &eeprom_data);
 878                         if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
 879                                 max_frame_size = ETHER_MAX_LEN;
 880                                 break;
 881                         }
 882                         /* Allow Jumbo frames */
 883                         /* FALLTHROUGH */
 884                 case em_82571:
 885                 case em_82572:
 886                 case em_ich9lan:
 887                 case em_80003es2lan:    /* Limit Jumbo Frame size */
 888                         max_frame_size = 9234;
 889                         break;
 890                 case em_ich8lan:
 891                         /* ICH8 does not support jumbo frames */
 892                         max_frame_size = ETHER_MAX_LEN;
 893                         break;
 894                 default:
 895                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
 896                         break;
 897                 }
 898                 if (ifr->ifr_mtu >
 899                         max_frame_size - ETHER_HDR_LEN - ETHER_CRC_LEN) {
 900                         error = EINVAL;
 901                 } else {
 902                         ifp->if_mtu = ifr->ifr_mtu;
 903                         adapter->hw.max_frame_size =
 904                         ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 905                         ifp->if_flags &= ~IFF_RUNNING;
 906                         em_init(adapter);
 907                 }
 908                 break;
 909         case SIOCSIFFLAGS:
 910                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS "
 911                                "(Set Interface Flags)");
 912                 if (ifp->if_flags & IFF_UP) {
 913                         if (!(ifp->if_flags & IFF_RUNNING)) {
 914                                 em_init(adapter);
 915                         } else if ((ifp->if_flags ^ adapter->if_flags) &
 916                                    IFF_PROMISC) {
 917                                 em_disable_promisc(adapter);
 918                                 em_set_promisc(adapter);
 919                         }
 920                 } else {
 921                         if (ifp->if_flags & IFF_RUNNING)
 922                                 em_stop(adapter);
 923                 }
 924                 adapter->if_flags = ifp->if_flags;
 925                 break;
 926         case SIOCADDMULTI:
 927         case SIOCDELMULTI:
 928                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
 929                 if (ifp->if_flags & IFF_RUNNING) {
 930                         em_disable_intr(adapter);
 931                         em_set_multi(adapter);
 932                         if (adapter->hw.mac_type == em_82542_rev2_0)
 933                                 em_initialize_receive_unit(adapter);
 934 #ifdef DEVICE_POLLING
 935                         /* Do not enable interrupt if polling(4) is enabled */
 936                         if ((ifp->if_flags & IFF_POLLING) == 0)
 937 #endif
 938                         em_enable_intr(adapter);
 939                 }
 940                 break;
 941         case SIOCSIFMEDIA:
 942                 /* Check SOL/IDER usage */
 943                 if (em_check_phy_reset_block(&adapter->hw)) {
 944                         if_printf(ifp, "Media change is blocked due to "
 945                                   "SOL/IDER session.\n");
 946                         break;
 947                 }
 948                 /* FALLTHROUGH */
 949         case SIOCGIFMEDIA:
 950                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA "
 951                                "(Get/Set Interface Media)");
 952                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
 953                 break;
 954         case SIOCSIFCAP:
 955                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
 956                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
 957                 if (mask & IFCAP_HWCSUM) {
 958                         ifp->if_capenable ^= IFCAP_HWCSUM;
 959                         reinit = 1;
 960                 }
 961                 if (mask & IFCAP_VLAN_HWTAGGING) {
 962                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
 963                         reinit = 1;
 964                 }
 965                 if (reinit && (ifp->if_flags & IFF_RUNNING)) {
 966                         ifp->if_flags &= ~IFF_RUNNING;
 967                         em_init(adapter);
 968                 }
 969                 break;
 970         default:
 971                 error = ether_ioctl(ifp, command, data);
 972                 break;
 973         }
 974
 975         return (error);
 976 }
 977
 978 /*********************************************************************
 979  *  Watchdog entry point
 980  *
 981  *  This routine is called whenever hardware quits transmitting.
 982  *
 983  **********************************************************************/
 984
 985 static void
 986 em_watchdog(struct ifnet *ifp)
 987 {
 988         struct adapter *adapter = ifp->if_softc;
 989
 990         /*
 991          * If we are in this routine because of pause frames, then
 992          * don't reset the hardware.
 993          */
 994         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) {
 995                 ifp->if_timer = EM_TX_TIMEOUT;
 996                 return;
 997         }
 998
 999         if (em_check_for_link(&adapter->hw) == 0)
1000                 if_printf(ifp, "watchdog timeout -- resetting\n");
1001
1002         ifp->if_flags &= ~IFF_RUNNING;
1003         em_init(adapter);
1004
1005         adapter->watchdog_timeouts++;
1006 }
1007
1008 /*********************************************************************
1009  *  Init entry point
1010  *
1011  *  This routine is used in two ways. It is used by the stack as
1012  *  init entry point in network interface structure. It is also used
1013  *  by the driver as a hw/sw initialization routine to get to a
1014  *  consistent state.
1015  *
1016  *  return 0 on success, positive on failure
1017  **********************************************************************/
1018
1019 static void
1020 em_init(void *arg)
1021 {
1022         struct adapter *adapter = arg;
1023         uint32_t pba;
1024         struct ifnet *ifp = &adapter->interface_data.ac_if;
1025
1026         ASSERT_SERIALIZED(ifp->if_serializer);
1027
1028         INIT_DEBUGOUT("em_init: begin");
1029
1030         if (ifp->if_flags & IFF_RUNNING)
1031                 return;
1032
1033         em_stop(adapter);
1034
1035         /*
1036          * Packet Buffer Allocation (PBA)
1037          * Writing PBA sets the receive portion of the buffer
1038          * the remainder is used for the transmit buffer.
1039          *
1040          * Devices before the 82547 had a Packet Buffer of 64K.
1041          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1042          * After the 82547 the buffer was reduced to 40K.
1043          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1044          *   Note: default does not leave enough room for Jumbo Frame >10k.
1045          */
1046         switch (adapter->hw.mac_type) {
1047         case em_82547:
1048         case em_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1049                 if (adapter->hw.max_frame_size > EM_RXBUFFER_8192)
1050                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1051                 else
1052                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1053
1054                 adapter->tx_fifo_head = 0;
1055                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1056                 adapter->tx_fifo_size =
1057                         (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1058                 break;
1059         /* Total Packet Buffer on these is 48K */
1060         case em_82571:
1061         case em_82572:
1062         case em_80003es2lan:
1063                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1064                 break;
1065         case em_82573: /* 82573: Total Packet Buffer is 32K */
1066                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1067                 break;
1068         case em_ich8lan:
1069                 pba = E1000_PBA_8K;
1070                 break;
1071         case em_ich9lan:
1072 #define E1000_PBA_10K   0x000A
1073                 pba = E1000_PBA_10K;
1074                 break;
1075         default:
1076                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1077                 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192)
1078                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1079                 else
1080                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1081         }
1082
1083         INIT_DEBUGOUT1("em_init: pba=%dK",pba);
1084         E1000_WRITE_REG(&adapter->hw, PBA, pba);
1085
1086         /* Get the latest mac address, User can use a LAA */
1087         bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr,
1088               ETHER_ADDR_LEN);
1089
1090         /* Initialize the hardware */
1091         if (em_hardware_init(adapter)) {
1092                 if_printf(ifp, "Unable to initialize the hardware\n");
1093                 return;
1094         }
1095         em_update_link_status(adapter);
1096
1097         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1098                 em_enable_vlans(adapter);
1099
1100         /* Set hardware offload abilities */
1101         if (adapter->hw.mac_type >= em_82543) {
1102                 if (ifp->if_capenable & IFCAP_TXCSUM)
1103                         ifp->if_hwassist = EM_CHECKSUM_FEATURES;
1104                 else
1105                         ifp->if_hwassist = 0;
1106         }
1107
1108         /* Prepare transmit descriptors and buffers */
1109         if (em_setup_transmit_structures(adapter)) {
1110                 if_printf(ifp, "Could not setup transmit structures\n");
1111                 em_stop(adapter);
1112                 return;
1113         }
1114         em_initialize_transmit_unit(adapter);
1115
1116         /* Setup Multicast table */
1117         em_set_multi(adapter);
1118
1119         /* Prepare receive descriptors and buffers */
1120         if (em_setup_receive_structures(adapter)) {
1121                 if_printf(ifp, "Could not setup receive structures\n");
1122                 em_stop(adapter);
1123                 return;
1124         }
1125         em_initialize_receive_unit(adapter);
1126
1127         /* Don't lose promiscuous settings */
1128         em_set_promisc(adapter);
1129
1130         ifp->if_flags |= IFF_RUNNING;
1131         ifp->if_flags &= ~IFF_OACTIVE;
1132
1133         callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1134         em_clear_hw_cntrs(&adapter->hw);
1135
1136 #ifdef DEVICE_POLLING
1137         /* Do not enable interrupt if polling(4) is enabled */
1138         if (ifp->if_flags & IFF_POLLING)
1139                 em_disable_intr(adapter);
1140         else
1141 #endif
1142         em_enable_intr(adapter);
1143
1144         /* Don't reset the phy next time init gets called */
1145         adapter->hw.phy_reset_disable = TRUE;
1146 }
1147
1148 #ifdef DEVICE_POLLING
1149
1150 static void
1151 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1152 {
1153         struct adapter *adapter = ifp->if_softc;
1154         uint32_t reg_icr;
1155
1156         logif(poll_beg);
1157
1158         ASSERT_SERIALIZED(ifp->if_serializer);
1159
1160         switch(cmd) {
1161         case POLL_REGISTER:
1162                 em_disable_intr(adapter);
1163                 break;
1164         case POLL_DEREGISTER:
1165                 em_enable_intr(adapter);
1166                 break;
1167         case POLL_AND_CHECK_STATUS:
1168                 reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1169                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1170                         callout_stop(&adapter->timer);
1171                         adapter->hw.get_link_status = 1;
1172                         em_check_for_link(&adapter->hw);
1173                         em_update_link_status(adapter);
1174                         callout_reset(&adapter->timer, hz, em_local_timer,
1175                                       adapter);
1176                 }
1177                 /* fall through */
1178         case POLL_ONLY:
1179                 if (ifp->if_flags & IFF_RUNNING) {
1180                         em_rxeof(adapter, count);
1181                         em_txeof(adapter);
1182
1183                         if (!ifq_is_empty(&ifp->if_snd))
1184                                 em_start(ifp);
1185                 }
1186                 break;
1187         }
1188         logif(poll_end);
1189 }
1190
1191 #endif /* DEVICE_POLLING */
1192
1193 /*********************************************************************
1194  *
1195  *  Interrupt Service routine
1196  *
1197  *********************************************************************/
1198 static void
1199 em_intr(void *arg)
1200 {
1201         uint32_t reg_icr;
1202         struct ifnet *ifp;
1203         struct adapter *adapter = arg;
1204
1205         ifp = &adapter->interface_data.ac_if;
1206
1207         logif(intr_beg);
1208         ASSERT_SERIALIZED(ifp->if_serializer);
1209
1210         reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1211         if ((adapter->hw.mac_type >= em_82571 &&
1212              (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1213             reg_icr == 0) {
1214                 logif(intr_end);
1215                 return;
1216         }
1217
1218         /*
1219          * XXX: some laptops trigger several spurious interrupts on em(4)
1220          * when in the resume cycle. The ICR register reports all-ones
1221          * value in this case. Processing such interrupts would lead to
1222          * a freeze. I don't know why.
1223          */
1224         if (reg_icr == 0xffffffff) {
1225                 logif(intr_end);
1226                 return;
1227         }
1228
1229         /*
1230          * note: do not attempt to improve efficiency by looping.  This
1231          * only results in unnecessary piecemeal collection of received
1232          * packets and unnecessary piecemeal cleanups of the transmit ring.
1233          */
1234         if (ifp->if_flags & IFF_RUNNING) {
1235                 em_rxeof(adapter, -1);
1236                 em_txeof(adapter);
1237         }
1238
1239         /* Link status change */
1240         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1241                 callout_stop(&adapter->timer);
1242                 adapter->hw.get_link_status = 1;
1243                 em_check_for_link(&adapter->hw);
1244                 em_update_link_status(adapter);
1245                 callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1246         }
1247
1248         if (reg_icr & E1000_ICR_RXO)
1249                 adapter->rx_overruns++;
1250
1251         if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd))
1252                 em_start(ifp);
1253         logif(intr_end);
1254 }
1255
1256 /*********************************************************************
1257  *
1258  *  Media Ioctl callback
1259  *
1260  *  This routine is called whenever the user queries the status of
1261  *  the interface using ifconfig.
1262  *
1263  **********************************************************************/
1264 static void
1265 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1266 {
1267         struct adapter *adapter = ifp->if_softc;
1268         u_char fiber_type = IFM_1000_SX;
1269
1270         INIT_DEBUGOUT("em_media_status: begin");
1271
1272         ASSERT_SERIALIZED(ifp->if_serializer);
1273
1274         em_check_for_link(&adapter->hw);
1275         em_update_link_status(adapter);
1276
1277         ifmr->ifm_status = IFM_AVALID;
1278         ifmr->ifm_active = IFM_ETHER;
1279
1280         if (!adapter->link_active)
1281                 return;
1282
1283         ifmr->ifm_status |= IFM_ACTIVE;
1284
1285         if (adapter->hw.media_type == em_media_type_fiber ||
1286             adapter->hw.media_type == em_media_type_internal_serdes) {
1287                 if (adapter->hw.mac_type == em_82545)
1288                         fiber_type = IFM_1000_LX;
1289                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1290         } else {
1291                 switch (adapter->link_speed) {
1292                 case 10:
1293                         ifmr->ifm_active |= IFM_10_T;
1294                         break;
1295                 case 100:
1296                         ifmr->ifm_active |= IFM_100_TX;
1297                         break;
1298                 case 1000:
1299                         ifmr->ifm_active |= IFM_1000_T;
1300                         break;
1301                 }
1302                 if (adapter->link_duplex == FULL_DUPLEX)
1303                         ifmr->ifm_active |= IFM_FDX;
1304                 else
1305                         ifmr->ifm_active |= IFM_HDX;
1306         }
1307 }
1308
1309 /*********************************************************************
1310  *
1311  *  Media Ioctl callback
1312  *
1313  *  This routine is called when the user changes speed/duplex using
1314  *  media/mediopt option with ifconfig.
1315  *
1316  **********************************************************************/
1317 static int
1318 em_media_change(struct ifnet *ifp)
1319 {
1320         struct adapter *adapter = ifp->if_softc;
1321         struct ifmedia *ifm = &adapter->media;
1322
1323         INIT_DEBUGOUT("em_media_change: begin");
1324
1325         ASSERT_SERIALIZED(ifp->if_serializer);
1326
1327         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1328                 return (EINVAL);
1329
1330         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1331         case IFM_AUTO:
1332                 adapter->hw.autoneg = DO_AUTO_NEG;
1333                 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1334                 break;
1335         case IFM_1000_LX:
1336         case IFM_1000_SX:
1337         case IFM_1000_T:
1338                 adapter->hw.autoneg = DO_AUTO_NEG;
1339                 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
1340                 break;
1341         case IFM_100_TX:
1342                 adapter->hw.autoneg = FALSE;
1343                 adapter->hw.autoneg_advertised = 0;
1344                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1345                         adapter->hw.forced_speed_duplex = em_100_full;
1346                 else
1347                         adapter->hw.forced_speed_duplex = em_100_half;
1348                 break;
1349         case IFM_10_T:
1350                 adapter->hw.autoneg = FALSE;
1351                 adapter->hw.autoneg_advertised = 0;
1352                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1353                         adapter->hw.forced_speed_duplex = em_10_full;
1354                 else
1355                         adapter->hw.forced_speed_duplex = em_10_half;
1356                 break;
1357         default:
1358                 if_printf(ifp, "Unsupported media type\n");
1359         }
1360         /*
1361          * As the speed/duplex settings may have changed we need to
1362          * reset the PHY.
1363          */
1364         adapter->hw.phy_reset_disable = FALSE;
1365
1366         ifp->if_flags &= ~IFF_RUNNING;
1367         em_init(adapter);
1368
1369         return(0);
1370 }
1371
1372 static void
1373 em_tx_cb(void *arg, bus_dma_segment_t *seg, int nsegs, bus_size_t mapsize,
1374          int error)
1375 {
1376         struct em_q *q = arg;
1377
1378         if (error)
1379                 return;
1380         KASSERT(nsegs <= EM_MAX_SCATTER,
1381                 ("Too many DMA segments returned when mapping tx packet"));
1382         q->nsegs = nsegs;
1383         bcopy(seg, q->segs, nsegs * sizeof(seg[0]));
1384 }
1385
1386 /*********************************************************************
1387  *
1388  *  This routine maps the mbufs to tx descriptors.
1389  *
1390  *  return 0 on success, positive on failure
1391  **********************************************************************/
1392 static int
1393 em_encap(struct adapter *adapter, struct mbuf *m_head)
1394 {
1395         uint32_t txd_upper = 0, txd_lower = 0, txd_used = 0, txd_saved = 0;
1396         int i, j, error, last = 0;
1397
1398         struct em_q q;
1399         struct em_buffer *tx_buffer = NULL, *tx_buffer_first;
1400         bus_dmamap_t map;
1401         struct em_tx_desc *current_tx_desc = NULL;
1402         struct ifnet *ifp = &adapter->interface_data.ac_if;
1403
1404         /*
1405          * Force a cleanup if number of TX descriptors
1406          * available hits the threshold
1407          */
1408         if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1409                 em_txeof(adapter);
1410                 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1411                         adapter->no_tx_desc_avail1++;
1412                         return (ENOBUFS);
1413                 }
1414         }
1415
1416         /*
1417          * Capture the first descriptor index, this descriptor will have
1418          * the index of the EOP which is the only one that now gets a
1419          * DONE bit writeback.
1420          */
1421         tx_buffer_first = &adapter->tx_buffer_area[adapter->next_avail_tx_desc];
1422
1423         /*
1424          * Map the packet for DMA.
1425          */
1426         map = tx_buffer_first->map;
1427         error = bus_dmamap_load_mbuf(adapter->txtag, map, m_head, em_tx_cb,
1428                                      &q, BUS_DMA_NOWAIT);
1429         if (error != 0) {
1430                 adapter->no_tx_dma_setup++;
1431                 return (error);
1432         }
1433         KASSERT(q.nsegs != 0, ("em_encap: empty packet"));
1434
1435         if (q.nsegs > (adapter->num_tx_desc_avail - 2)) {
1436                 adapter->no_tx_desc_avail2++;
1437                 error = ENOBUFS;
1438                 goto fail;
1439         }
1440
1441         if (ifp->if_hwassist > 0) {
1442                 em_transmit_checksum_setup(adapter,  m_head,
1443                                            &txd_upper, &txd_lower);
1444         }
1445
1446         i = adapter->next_avail_tx_desc;
1447         if (adapter->pcix_82544)
1448                 txd_saved = i;
1449
1450         /* Set up our transmit descriptors */
1451         for (j = 0; j < q.nsegs; j++) {
1452                 /* If adapter is 82544 and on PCIX bus */
1453                 if(adapter->pcix_82544) {
1454                         DESC_ARRAY desc_array;
1455                         uint32_t array_elements, counter;
1456
1457                         /*
1458                          * Check the Address and Length combination and
1459                          * split the data accordingly
1460                          */
1461                         array_elements = em_fill_descriptors(q.segs[j].ds_addr,
1462                                                 q.segs[j].ds_len, &desc_array);
1463                         for (counter = 0; counter < array_elements; counter++) {
1464                                 if (txd_used == adapter->num_tx_desc_avail) {
1465                                         adapter->next_avail_tx_desc = txd_saved;
1466                                         adapter->no_tx_desc_avail2++;
1467                                         error = ENOBUFS;
1468                                         goto fail;
1469                                 }
1470                                 tx_buffer = &adapter->tx_buffer_area[i];
1471                                 current_tx_desc = &adapter->tx_desc_base[i];
1472                                 current_tx_desc->buffer_addr = htole64(
1473                                         desc_array.descriptor[counter].address);
1474                                 current_tx_desc->lower.data = htole32(
1475                                         adapter->txd_cmd | txd_lower |
1476                                         (uint16_t)desc_array.descriptor[counter].length);
1477                                 current_tx_desc->upper.data = htole32(txd_upper);
1478
1479                                 last = i;
1480                                 if (++i == adapter->num_tx_desc)
1481                                         i = 0;
1482
1483                                 tx_buffer->m_head = NULL;
1484                                 tx_buffer->next_eop = -1;
1485                                 txd_used++;
1486                         }
1487                 } else {
1488                         tx_buffer = &adapter->tx_buffer_area[i];
1489                         current_tx_desc = &adapter->tx_desc_base[i];
1490
1491                         current_tx_desc->buffer_addr = htole64(q.segs[j].ds_addr);
1492                         current_tx_desc->lower.data = htole32(
1493                                 adapter->txd_cmd | txd_lower | q.segs[j].ds_len);
1494                         current_tx_desc->upper.data = htole32(txd_upper);
1495
1496                         last = i;
1497                         if (++i == adapter->num_tx_desc)
1498                                 i = 0;
1499
1500                         tx_buffer->m_head = NULL;
1501                         tx_buffer->next_eop = -1;
1502                 }
1503         }
1504
1505         adapter->next_avail_tx_desc = i;
1506         if (adapter->pcix_82544)
1507                 adapter->num_tx_desc_avail -= txd_used;
1508         else
1509                 adapter->num_tx_desc_avail -= q.nsegs;
1510
1511         /* Find out if we are in vlan mode */
1512         if (m_head->m_flags & M_VLANTAG) {
1513                 /* Set the vlan id */
1514                 current_tx_desc->upper.fields.special =
1515                         htole16(m_head->m_pkthdr.ether_vlantag);
1516
1517                 /* Tell hardware to add tag */
1518                 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE);
1519         }
1520
1521         tx_buffer->m_head = m_head;
1522         tx_buffer_first->map = tx_buffer->map;
1523         tx_buffer->map = map;
1524         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1525
1526         /*
1527          * Last Descriptor of Packet needs End Of Packet (EOP)
1528          * and Report Status (RS)
1529          */
1530         current_tx_desc->lower.data |=
1531                 htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS);
1532
1533         /*
1534          * Keep track in the first buffer which descriptor will be
1535          * written back.
1536          */
1537         tx_buffer_first->next_eop = last;
1538
1539         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
1540                         BUS_DMASYNC_PREWRITE);
1541
1542         /*
1543          * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000
1544          * that this frame is available to transmit.
1545          */
1546         if (adapter->hw.mac_type == em_82547 &&
1547             adapter->link_duplex == HALF_DUPLEX) {
1548                 em_82547_move_tail_serialized(adapter);
1549         } else {
1550                 E1000_WRITE_REG(&adapter->hw, TDT, i);
1551                 if (adapter->hw.mac_type == em_82547) {
1552                         em_82547_update_fifo_head(adapter,
1553                                                   m_head->m_pkthdr.len);
1554                 }
1555         }
1556
1557         return (0);
1558 fail:
1559         bus_dmamap_unload(adapter->txtag, map);
1560         return error;
1561 }
1562
1563 /*********************************************************************
1564  *
1565  * 82547 workaround to avoid controller hang in half-duplex environment.
1566  * The workaround is to avoid queuing a large packet that would span
1567  * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1568  * in this case. We do that only when FIFO is quiescent.
1569  *
1570  **********************************************************************/
1571 static void
1572 em_82547_move_tail(void *arg)
1573 {
1574         struct adapter *adapter = arg;
1575         struct ifnet *ifp = &adapter->interface_data.ac_if;
1576
1577         lwkt_serialize_enter(ifp->if_serializer);
1578         em_82547_move_tail_serialized(adapter);
1579         lwkt_serialize_exit(ifp->if_serializer);
1580 }
1581
1582 static void
1583 em_82547_move_tail_serialized(struct adapter *adapter)
1584 {
1585         uint16_t hw_tdt;
1586         uint16_t sw_tdt;
1587         struct em_tx_desc *tx_desc;
1588         uint16_t length = 0;
1589         boolean_t eop = 0;
1590
1591         hw_tdt = E1000_READ_REG(&adapter->hw, TDT);
1592         sw_tdt = adapter->next_avail_tx_desc;
1593
1594         while (hw_tdt != sw_tdt) {
1595                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1596                 length += tx_desc->lower.flags.length;
1597                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1598                 if (++hw_tdt == adapter->num_tx_desc)
1599                         hw_tdt = 0;
1600
1601                 if (eop) {
1602                         if (em_82547_fifo_workaround(adapter, length)) {
1603                                 adapter->tx_fifo_wrk_cnt++;
1604                                 callout_reset(&adapter->tx_fifo_timer, 1,
1605                                         em_82547_move_tail, adapter);
1606                                 break;
1607                         }
1608                         E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1609                         em_82547_update_fifo_head(adapter, length);
1610                         length = 0;
1611                 }
1612         }
1613 }
1614
1615 static int
1616 em_82547_fifo_workaround(struct adapter *adapter, int len)
1617 {
1618         int fifo_space, fifo_pkt_len;
1619
1620         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1621
1622         if (adapter->link_duplex == HALF_DUPLEX) {
1623                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1624
1625                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1626                         if (em_82547_tx_fifo_reset(adapter))
1627                                 return (0);
1628                         else
1629                                 return (1);
1630                 }
1631         }
1632
1633         return (0);
1634 }
1635
1636 static void
1637 em_82547_update_fifo_head(struct adapter *adapter, int len)
1638 {
1639         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1640
1641         /* tx_fifo_head is always 16 byte aligned */
1642         adapter->tx_fifo_head += fifo_pkt_len;
1643         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1644                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1645 }
1646
1647 static int
1648 em_82547_tx_fifo_reset(struct adapter *adapter)
1649 {
1650         uint32_t tctl;
1651
1652         if (E1000_READ_REG(&adapter->hw, TDT) == E1000_READ_REG(&adapter->hw, TDH) &&
1653             E1000_READ_REG(&adapter->hw, TDFT) == E1000_READ_REG(&adapter->hw, TDFH) &&
1654             E1000_READ_REG(&adapter->hw, TDFTS) == E1000_READ_REG(&adapter->hw, TDFHS) &&
1655             E1000_READ_REG(&adapter->hw, TDFPC) == 0) {
1656                 /* Disable TX unit */
1657                 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1658                 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1659
1660                 /* Reset FIFO pointers */
1661                 E1000_WRITE_REG(&adapter->hw, TDFT,  adapter->tx_head_addr);
1662                 E1000_WRITE_REG(&adapter->hw, TDFH,  adapter->tx_head_addr);
1663                 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr);
1664                 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr);
1665
1666                 /* Re-enable TX unit */
1667                 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1668                 E1000_WRITE_FLUSH(&adapter->hw);
1669
1670                 adapter->tx_fifo_head = 0;
1671                 adapter->tx_fifo_reset_cnt++;
1672
1673                 return (TRUE);
1674         } else {
1675                 return (FALSE);
1676         }
1677 }
1678
1679 static void
1680 em_set_promisc(struct adapter *adapter)
1681 {
1682         uint32_t reg_rctl;
1683         struct ifnet *ifp = &adapter->interface_data.ac_if;
1684
1685         reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1686
1687         adapter->em_insert_vlan_header = 0;
1688         if (ifp->if_flags & IFF_PROMISC) {
1689                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1690                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1691
1692                 /*
1693                  * Disable VLAN stripping in promiscous mode.
1694                  * This enables bridging of vlan tagged frames to occur
1695                  * and also allows vlan tags to be seen in tcpdump.
1696                  */
1697                 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1698                         em_disable_vlans(adapter);
1699                 adapter->em_insert_vlan_header = 1;
1700         } else if (ifp->if_flags & IFF_ALLMULTI) {
1701                 reg_rctl |= E1000_RCTL_MPE;
1702                 reg_rctl &= ~E1000_RCTL_UPE;
1703                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1704         }
1705 }
1706
1707 static void
1708 em_disable_promisc(struct adapter *adapter)
1709 {
1710         struct ifnet *ifp = &adapter->interface_data.ac_if;
1711
1712         uint32_t reg_rctl;
1713
1714         reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1715
1716         reg_rctl &= (~E1000_RCTL_UPE);
1717         reg_rctl &= (~E1000_RCTL_MPE);
1718         E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1719
1720         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1721                 em_enable_vlans(adapter);
1722         adapter->em_insert_vlan_header = 0;
1723 }
1724
1725 /*********************************************************************
1726  *  Multicast Update
1727  *
1728  *  This routine is called whenever multicast address list is updated.
1729  *
1730  **********************************************************************/
1731
1732 static void
1733 em_set_multi(struct adapter *adapter)
1734 {
1735         uint32_t reg_rctl = 0;
1736         uint8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS];
1737         struct ifmultiaddr *ifma;
1738         int mcnt = 0;
1739         struct ifnet *ifp = &adapter->interface_data.ac_if;
1740
1741         IOCTL_DEBUGOUT("em_set_multi: begin");
1742
1743         if (adapter->hw.mac_type == em_82542_rev2_0) {
1744                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1745                 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1746                         em_pci_clear_mwi(&adapter->hw);
1747                 reg_rctl |= E1000_RCTL_RST;
1748                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1749                 msec_delay(5);
1750         }
1751
1752         LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1753                 if (ifma->ifma_addr->sa_family != AF_LINK)
1754                         continue;
1755
1756                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1757                         break;
1758
1759                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1760                       &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS);
1761                 mcnt++;
1762         }
1763
1764         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1765                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1766                 reg_rctl |= E1000_RCTL_MPE;
1767                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1768         } else {
1769                 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1);
1770         }
1771
1772         if (adapter->hw.mac_type == em_82542_rev2_0) {
1773                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1774                 reg_rctl &= ~E1000_RCTL_RST;
1775                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1776                 msec_delay(5);
1777                 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1778                         em_pci_set_mwi(&adapter->hw);
1779         }
1780 }
1781
1782 /*********************************************************************
1783  *  Timer routine
1784  *
1785  *  This routine checks for link status and updates statistics.
1786  *
1787  **********************************************************************/
1788
1789 static void
1790 em_local_timer(void *arg)
1791 {
1792         struct ifnet *ifp;
1793         struct adapter *adapter = arg;
1794         ifp = &adapter->interface_data.ac_if;
1795
1796         lwkt_serialize_enter(ifp->if_serializer);
1797
1798         em_check_for_link(&adapter->hw);
1799         em_update_link_status(adapter);
1800         em_update_stats_counters(adapter);
1801         if (em_display_debug_stats && ifp->if_flags & IFF_RUNNING)
1802                 em_print_hw_stats(adapter);
1803         em_smartspeed(adapter);
1804
1805         callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1806
1807         lwkt_serialize_exit(ifp->if_serializer);
1808 }
1809
1810 static void
1811 em_update_link_status(struct adapter *adapter)
1812 {
1813         struct ifnet *ifp;
1814         ifp = &adapter->interface_data.ac_if;
1815
1816         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1817                 if (adapter->link_active == 0) {
1818                         em_get_speed_and_duplex(&adapter->hw,
1819                                                 &adapter->link_speed,
1820                                                 &adapter->link_duplex);
1821                         /* Check if we may set SPEED_MODE bit on PCI-E */
1822                         if (adapter->link_speed == SPEED_1000 &&
1823                             (adapter->hw.mac_type == em_82571 ||
1824                              adapter->hw.mac_type == em_82572)) {
1825                                 int tarc0;
1826
1827                                 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
1828                                 tarc0 |= SPEED_MODE_BIT;
1829                                 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
1830                         }
1831                         if (bootverbose) {
1832                                 if_printf(&adapter->interface_data.ac_if,
1833                                           "Link is up %d Mbps %s\n",
1834                                           adapter->link_speed,
1835                                           adapter->link_duplex == FULL_DUPLEX ?
1836                                                 "Full Duplex" : "Half Duplex");
1837                         }
1838                         adapter->link_active = 1;
1839                         adapter->smartspeed = 0;
1840                         ifp->if_baudrate = adapter->link_speed * 1000000;
1841                         ifp->if_link_state = LINK_STATE_UP;
1842                         if_link_state_change(ifp);
1843                 }
1844         } else {
1845                 if (adapter->link_active == 1) {
1846                         ifp->if_baudrate = 0;
1847                         adapter->link_speed = 0;
1848                         adapter->link_duplex = 0;
1849                         if (bootverbose) {
1850                                 if_printf(&adapter->interface_data.ac_if,
1851                                           "Link is Down\n");
1852                         }
1853                         adapter->link_active = 0;
1854                         ifp->if_link_state = LINK_STATE_DOWN;
1855                         if_link_state_change(ifp);
1856                 }
1857         }
1858 }
1859
1860 /*********************************************************************
1861  *
1862  *  This routine disables all traffic on the adapter by issuing a
1863  *  global reset on the MAC and deallocates TX/RX buffers.
1864  *
1865  **********************************************************************/
1866
1867 static void
1868 em_stop(void *arg)
1869 {
1870         struct ifnet   *ifp;
1871         struct adapter * adapter = arg;
1872         ifp = &adapter->interface_data.ac_if;
1873
1874         ASSERT_SERIALIZED(ifp->if_serializer);
1875
1876         INIT_DEBUGOUT("em_stop: begin");
1877         em_disable_intr(adapter);
1878         em_reset_hw(&adapter->hw);
1879         callout_stop(&adapter->timer);
1880         callout_stop(&adapter->tx_fifo_timer);
1881         em_free_transmit_structures(adapter);
1882         em_free_receive_structures(adapter);
1883
1884         /* Tell the stack that the interface is no longer active */
1885         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1886         ifp->if_timer = 0;
1887 }
1888
1889 /*********************************************************************
1890  *
1891  *  Determine hardware revision.
1892  *
1893  **********************************************************************/
1894 static void
1895 em_identify_hardware(struct adapter *adapter)
1896 {
1897         device_t dev = adapter->dev;
1898
1899         /* Make sure our PCI config space has the necessary stuff set */
1900         adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
1901         if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
1902               (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) {
1903                 device_printf(dev, "Memory Access and/or Bus Master bits "
1904                               "were not set!\n");
1905                 adapter->hw.pci_cmd_word |= PCIM_CMD_BUSMASTEREN |
1906                                             PCIM_CMD_MEMEN;
1907                 pci_write_config(dev, PCIR_COMMAND,
1908                                  adapter->hw.pci_cmd_word, 2);
1909         }
1910
1911         /* Save off the information about this board */
1912         adapter->hw.vendor_id = pci_get_vendor(dev);
1913         adapter->hw.device_id = pci_get_device(dev);
1914         adapter->hw.revision_id = pci_get_revid(dev);
1915         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
1916         adapter->hw.subsystem_id = pci_get_subdevice(dev);
1917
1918         /* Identify the MAC */
1919         if (em_set_mac_type(&adapter->hw))
1920                 device_printf(dev, "Unknown MAC Type\n");
1921
1922         if (adapter->hw.mac_type == em_82541 ||
1923             adapter->hw.mac_type == em_82541_rev_2 ||
1924             adapter->hw.mac_type == em_82547 ||
1925             adapter->hw.mac_type == em_82547_rev_2)
1926                 adapter->hw.phy_init_script = TRUE;
1927 }
1928
1929 static int
1930 em_allocate_pci_resources(device_t dev)
1931 {
1932         struct adapter *adapter = device_get_softc(dev);
1933         int rid;
1934
1935         rid = PCIR_BAR(0);
1936         adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
1937                                                      &rid, RF_ACTIVE);
1938         if (adapter->res_memory == NULL) {
1939                 device_printf(dev, "Unable to allocate bus resource: memory\n");
1940                 return ENXIO;
1941         }
1942         adapter->osdep.mem_bus_space_tag =
1943                 rman_get_bustag(adapter->res_memory);
1944         adapter->osdep.mem_bus_space_handle =
1945             rman_get_bushandle(adapter->res_memory);
1946         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
1947
1948         if (adapter->hw.mac_type > em_82543) {
1949                 /* Figure our where our IO BAR is ? */
1950                 for (rid = PCIR_BAR(0); rid < PCIR_CIS;) {
1951                         uint32_t val;
1952
1953                         val = pci_read_config(dev, rid, 4);
1954                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
1955                                 adapter->io_rid = rid;
1956                                 break;
1957                         }
1958                         rid += 4;
1959                         /* check for 64bit BAR */
1960                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
1961                                 rid += 4;
1962                 }
1963                 if (rid >= PCIR_CIS) {
1964                         device_printf(dev, "Unable to locate IO BAR\n");
1965                         return (ENXIO);
1966                 }
1967
1968                 adapter->res_ioport = bus_alloc_resource_any(dev,
1969                     SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE);
1970                 if (!(adapter->res_ioport)) {
1971                         device_printf(dev, "Unable to allocate bus resource: "
1972                                       "ioport\n");
1973                         return ENXIO;
1974                 }
1975                 adapter->hw.io_base = 0;
1976                 adapter->osdep.io_bus_space_tag =
1977                         rman_get_bustag(adapter->res_ioport);
1978                 adapter->osdep.io_bus_space_handle =
1979                         rman_get_bushandle(adapter->res_ioport);
1980         }
1981
1982         /* For ICH8 we need to find the flash memory. */
1983         if ((adapter->hw.mac_type == em_ich8lan) ||
1984             (adapter->hw.mac_type == em_ich9lan)) {
1985                 rid = EM_FLASH;
1986                 adapter->flash_mem = bus_alloc_resource_any(dev,
1987                     SYS_RES_MEMORY, &rid, RF_ACTIVE);
1988                 if (adapter->flash_mem == NULL) {
1989                         device_printf(dev, "Unable to allocate bus resource: "
1990                                       "flash memory\n");
1991                         return ENXIO;
1992                 }
1993                 adapter->osdep.flash_bus_space_tag =
1994                     rman_get_bustag(adapter->flash_mem);
1995                 adapter->osdep.flash_bus_space_handle =
1996                     rman_get_bushandle(adapter->flash_mem);
1997         }
1998
1999         rid = 0x0;
2000         adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2001             &rid, RF_SHAREABLE | RF_ACTIVE);
2002         if (adapter->res_interrupt == NULL) {
2003                 device_printf(dev, "Unable to allocate bus resource: "
2004                               "interrupt\n");
2005                 return ENXIO;
2006         }
2007
2008         adapter->hw.back = &adapter->osdep;
2009
2010         return 0;
2011 }
2012
2013 static void
2014 em_free_pci_resources(device_t dev)
2015 {
2016         struct adapter *adapter = device_get_softc(dev);
2017
2018         if (adapter->res_interrupt != NULL) {
2019                 bus_release_resource(dev, SYS_RES_IRQ, 0,
2020                                      adapter->res_interrupt);
2021         }
2022         if (adapter->res_memory != NULL) {
2023                 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0),
2024                                      adapter->res_memory);
2025         }
2026
2027         if (adapter->res_ioport != NULL) {
2028                 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid,
2029                                      adapter->res_ioport);
2030         }
2031
2032         if (adapter->flash_mem != NULL) {
2033                 bus_release_resource(dev, SYS_RES_MEMORY, EM_FLASH,
2034                                      adapter->flash_mem);
2035         }
2036 }
2037
2038 /*********************************************************************
2039  *
2040  *  Initialize the hardware to a configuration as specified by the
2041  *  adapter structure. The controller is reset, the EEPROM is
2042  *  verified, the MAC address is set, then the shared initialization
2043  *  routines are called.
2044  *
2045  **********************************************************************/
2046 static int
2047 em_hardware_init(struct adapter *adapter)
2048 {
2049         uint16_t        rx_buffer_size;
2050
2051         INIT_DEBUGOUT("em_hardware_init: begin");
2052         /* Issue a global reset */
2053         em_reset_hw(&adapter->hw);
2054
2055         /* When hardware is reset, fifo_head is also reset */
2056         adapter->tx_fifo_head = 0;
2057
2058         /* Make sure we have a good EEPROM before we read from it */
2059         if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
2060                 if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
2061                         device_printf(adapter->dev,
2062                                       "The EEPROM Checksum Is Not Valid\n");
2063                         return (EIO);
2064                 }
2065         }
2066
2067         if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) {
2068                 device_printf(adapter->dev,
2069                               "EEPROM read error while reading part number\n");
2070                 return (EIO);
2071         }
2072
2073         /* Set up smart power down as default off on newer adapters. */
2074         if (!em_smart_pwr_down &&
2075             (adapter->hw.mac_type == em_82571 ||
2076              adapter->hw.mac_type == em_82572)) {
2077                 uint16_t phy_tmp = 0;
2078
2079                 /* Speed up time to link by disabling smart power down. */
2080                 em_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
2081                                 &phy_tmp);
2082                 phy_tmp &= ~IGP02E1000_PM_SPD;
2083                 em_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
2084                                  phy_tmp);
2085         }
2086
2087         /*
2088          * These parameters control the automatic generation (Tx) and
2089          * response (Rx) to Ethernet PAUSE frames.
2090          * - High water mark should allow for at least two frames to be
2091          *   received after sending an XOFF.
2092          * - Low water mark works best when it is very near the high water mark.
2093          *   This allows the receiver to restart by sending XON when it has
2094          *   drained a bit.  Here we use an arbitary value of 1500 which will
2095          *   restart after one full frame is pulled from the buffer.  There
2096          *   could be several smaller frames in the buffer and if so they will
2097          *   not trigger the XON until their total number reduces the buffer
2098          *   by 1500.
2099          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2100          */
2101         rx_buffer_size = ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff) << 10);
2102
2103         adapter->hw.fc_high_water =
2104             rx_buffer_size - roundup2(adapter->hw.max_frame_size, 1024);
2105         adapter->hw.fc_low_water = adapter->hw.fc_high_water - 1500;
2106         if (adapter->hw.mac_type == em_80003es2lan)
2107                 adapter->hw.fc_pause_time = 0xFFFF;
2108         else
2109                 adapter->hw.fc_pause_time = 1000;
2110         adapter->hw.fc_send_xon = TRUE;
2111         adapter->hw.fc = E1000_FC_FULL;
2112
2113         if (em_init_hw(&adapter->hw) < 0) {
2114                 device_printf(adapter->dev, "Hardware Initialization Failed");
2115                 return (EIO);
2116         }
2117
2118         em_check_for_link(&adapter->hw);
2119
2120         return (0);
2121 }
2122
2123 /*********************************************************************
2124  *
2125  *  Setup networking device structure and register an interface.
2126  *
2127  **********************************************************************/
2128 static void
2129 em_setup_interface(device_t dev, struct adapter *adapter)
2130 {
2131         struct ifnet *ifp;
2132         u_char fiber_type = IFM_1000_SX;        /* default type */
2133         INIT_DEBUGOUT("em_setup_interface: begin");
2134
2135         ifp = &adapter->interface_data.ac_if;
2136         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2137         ifp->if_mtu = ETHERMTU;
2138         ifp->if_baudrate = 1000000000;
2139         ifp->if_init =  em_init;
2140         ifp->if_softc = adapter;
2141         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2142         ifp->if_ioctl = em_ioctl;
2143         ifp->if_start = em_start;
2144 #ifdef DEVICE_POLLING
2145         ifp->if_poll = em_poll;
2146 #endif
2147         ifp->if_watchdog = em_watchdog;
2148         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2149         ifq_set_ready(&ifp->if_snd);
2150
2151         if (adapter->hw.mac_type >= em_82543)
2152                 ifp->if_capabilities |= IFCAP_HWCSUM;
2153
2154         ifp->if_capenable = ifp->if_capabilities;
2155
2156         ether_ifattach(ifp, adapter->hw.mac_addr, NULL);
2157
2158         /*
2159          * Tell the upper layer(s) we support long frames.
2160          */
2161         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2162         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2163 #if 0
2164         ifp->if_capenable |= IFCAP_VLAN_MTU;
2165 #endif
2166
2167         /*
2168          * Specify the media types supported by this adapter and register
2169          * callbacks to update media and link information
2170          */
2171         ifmedia_init(&adapter->media, IFM_IMASK, em_media_change,
2172                      em_media_status);
2173         if (adapter->hw.media_type == em_media_type_fiber ||
2174             adapter->hw.media_type == em_media_type_internal_serdes) {
2175                 if (adapter->hw.mac_type == em_82545)
2176                         fiber_type = IFM_1000_LX;
2177                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2178                             0, NULL);
2179                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2180         } else {
2181                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2182                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2183                             0, NULL);
2184                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2185                             0, NULL);
2186                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2187                             0, NULL);
2188                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
2189                             0, NULL);
2190                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL);
2191         }
2192         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2193         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2194 }
2195
2196 /*********************************************************************
2197  *
2198  *  Workaround for SmartSpeed on 82541 and 82547 controllers
2199  *
2200  **********************************************************************/
2201 static void
2202 em_smartspeed(struct adapter *adapter)
2203 {
2204         uint16_t phy_tmp;
2205
2206         if (adapter->link_active || (adapter->hw.phy_type != em_phy_igp) ||
2207             !adapter->hw.autoneg ||
2208             !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
2209                 return;
2210
2211         if (adapter->smartspeed == 0) {
2212                 /*
2213                  * If Master/Slave config fault is asserted twice,
2214                  * we assume back-to-back.
2215                  */
2216                 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2217                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2218                         return;
2219                 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2220                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2221                         em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2222                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2223                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2224                                 em_write_phy_reg(&adapter->hw,
2225                                                  PHY_1000T_CTRL, phy_tmp);
2226                                 adapter->smartspeed++;
2227                                 if (adapter->hw.autoneg &&
2228                                     !em_phy_setup_autoneg(&adapter->hw) &&
2229                                     !em_read_phy_reg(&adapter->hw, PHY_CTRL,
2230                                                      &phy_tmp)) {
2231                                         phy_tmp |= (MII_CR_AUTO_NEG_EN |
2232                                                     MII_CR_RESTART_AUTO_NEG);
2233                                         em_write_phy_reg(&adapter->hw,
2234                                                          PHY_CTRL, phy_tmp);
2235                                 }
2236                         }
2237                 }
2238                 return;
2239         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2240                 /* If still no link, perhaps using 2/3 pair cable */
2241                 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2242                 phy_tmp |= CR_1000T_MS_ENABLE;
2243                 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2244                 if (adapter->hw.autoneg &&
2245                     !em_phy_setup_autoneg(&adapter->hw) &&
2246                     !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) {
2247                         phy_tmp |= (MII_CR_AUTO_NEG_EN |
2248                                     MII_CR_RESTART_AUTO_NEG);
2249                         em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp);
2250                 }
2251         }
2252         /* Restart process after EM_SMARTSPEED_MAX iterations */
2253         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2254                 adapter->smartspeed = 0;
2255 }
2256
2257 /*
2258  * Manage DMA'able memory.
2259  */
2260 static void
2261 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2262 {
2263         if (error)
2264                 return;
2265         *(bus_addr_t *)arg = segs->ds_addr;
2266 }
2267
2268 static int
2269 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2270               struct em_dma_alloc *dma)
2271 {
2272         device_t dev = adapter->dev;
2273         int error;
2274
2275         error = bus_dma_tag_create(NULL,                /* parent */
2276                                    EM_DBA_ALIGN, 0,     /* alignment, bounds */
2277                                    BUS_SPACE_MAXADDR,   /* lowaddr */
2278                                    BUS_SPACE_MAXADDR,   /* highaddr */
2279                                    NULL, NULL,          /* filter, filterarg */
2280                                    size,                /* maxsize */
2281                                    1,                   /* nsegments */
2282                                    size,                /* maxsegsize */
2283                                    0,                   /* flags */
2284                                    &dma->dma_tag);
2285         if (error) {
2286                 device_printf(dev, "%s: bus_dma_tag_create failed; error %d\n",
2287                               __func__, error);
2288                 return error;
2289         }
2290
2291         error = bus_dmamem_alloc(dma->dma_tag, (void**)&dma->dma_vaddr,
2292                                  BUS_DMA_WAITOK, &dma->dma_map);
2293         if (error) {
2294                 device_printf(dev, "%s: bus_dmammem_alloc failed; "
2295                               "size %llu, error %d\n",
2296                               __func__, (uintmax_t)size, error);
2297                 goto fail;
2298         }
2299
2300         error = bus_dmamap_load(dma->dma_tag, dma->dma_map,
2301                                 dma->dma_vaddr, size,
2302                                 em_dmamap_cb, &dma->dma_paddr,
2303                                 BUS_DMA_WAITOK);
2304         if (error) {
2305                 device_printf(dev, "%s: bus_dmamap_load failed; error %u\n",
2306                               __func__, error);
2307                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2308                 goto fail;
2309         }
2310
2311         return 0;
2312 fail:
2313         bus_dma_tag_destroy(dma->dma_tag);
2314         dma->dma_tag = NULL;
2315         return error;
2316 }
2317
2318 static void
2319 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2320 {
2321         if (dma->dma_tag != NULL) {
2322                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2323                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2324                 bus_dma_tag_destroy(dma->dma_tag);
2325                 dma->dma_tag = NULL;
2326         }
2327 }
2328
2329 /*********************************************************************
2330  *
2331  *  Allocate and initialize transmit structures.
2332  *
2333  **********************************************************************/
2334 static int
2335 em_setup_transmit_structures(struct adapter *adapter)
2336 {
2337         struct em_buffer *tx_buffer;
2338         bus_size_t size;
2339         int error, i;
2340
2341         /*
2342          * Setup DMA descriptor areas.
2343          */
2344         size = roundup2(adapter->hw.max_frame_size, MCLBYTES);
2345         if (bus_dma_tag_create(NULL,                    /* parent */
2346                                1, 0,                    /* alignment, bounds */
2347                                BUS_SPACE_MAXADDR,       /* lowaddr */
2348                                BUS_SPACE_MAXADDR,       /* highaddr */
2349                                NULL, NULL,              /* filter, filterarg */
2350                                size,                    /* maxsize */
2351                                EM_MAX_SCATTER,          /* nsegments */
2352                                size,                    /* maxsegsize */
2353                                0,                       /* flags */
2354                                &adapter->txtag)) {
2355                 device_printf(adapter->dev, "Unable to allocate TX DMA tag\n");
2356                 return(ENOMEM);
2357         }
2358
2359         adapter->tx_buffer_area =
2360                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2361                         M_DEVBUF, M_WAITOK | M_ZERO);
2362
2363         bzero(adapter->tx_desc_base,
2364               sizeof(struct em_tx_desc) * adapter->num_tx_desc);
2365         tx_buffer = adapter->tx_buffer_area;
2366         for (i = 0; i < adapter->num_tx_desc; i++) {
2367                 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map);
2368                 if (error) {
2369                         device_printf(adapter->dev,
2370                                       "Unable to create TX DMA map\n");
2371                         goto fail;
2372                 }
2373                 tx_buffer++;
2374         }
2375
2376         adapter->next_avail_tx_desc = 0;
2377         adapter->next_tx_to_clean = 0;
2378
2379         /* Set number of descriptors available */
2380         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2381
2382         /* Set checksum context */
2383         adapter->active_checksum_context = OFFLOAD_NONE;
2384
2385         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2386                         BUS_DMASYNC_PREWRITE);
2387
2388         return (0);
2389 fail:
2390         em_free_transmit_structures(adapter);
2391         return (error);
2392 }
2393
2394 /*********************************************************************
2395  *
2396  *  Enable transmit unit.
2397  *
2398  **********************************************************************/
2399 static void
2400 em_initialize_transmit_unit(struct adapter *adapter)
2401 {
2402         uint32_t reg_tctl;
2403         uint32_t reg_tipg = 0;
2404         uint64_t bus_addr;
2405
2406         INIT_DEBUGOUT("em_initialize_transmit_unit: begin");
2407
2408         /* Setup the Base and Length of the Tx Descriptor Ring */
2409         bus_addr = adapter->txdma.dma_paddr;
2410         E1000_WRITE_REG(&adapter->hw, TDLEN,
2411                         adapter->num_tx_desc * sizeof(struct em_tx_desc));
2412         E1000_WRITE_REG(&adapter->hw, TDBAH, (uint32_t)(bus_addr >> 32));
2413         E1000_WRITE_REG(&adapter->hw, TDBAL, (uint32_t)bus_addr);
2414
2415         /* Setup the HW Tx Head and Tail descriptor pointers */
2416         E1000_WRITE_REG(&adapter->hw, TDT, 0);
2417         E1000_WRITE_REG(&adapter->hw, TDH, 0);
2418
2419         HW_DEBUGOUT2("Base = %x, Length = %x\n",
2420                      E1000_READ_REG(&adapter->hw, TDBAL),
2421                      E1000_READ_REG(&adapter->hw, TDLEN));
2422
2423         /* Set the default values for the Tx Inter Packet Gap timer */
2424         switch (adapter->hw.mac_type) {
2425         case em_82542_rev2_0:
2426         case em_82542_rev2_1:
2427                 reg_tipg = DEFAULT_82542_TIPG_IPGT;
2428                 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2429                 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2430                 break;
2431         case em_80003es2lan:
2432                 reg_tipg = DEFAULT_82543_TIPG_IPGR1;
2433                 reg_tipg |=
2434                     DEFAULT_80003ES2LAN_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2435                 break;
2436         default:
2437                 if (adapter->hw.media_type == em_media_type_fiber ||
2438                     adapter->hw.media_type == em_media_type_internal_serdes)
2439                         reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2440                 else
2441                         reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2442                 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2443                 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2444         }
2445
2446         E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg);
2447         E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value);
2448         if (adapter->hw.mac_type >= em_82540) {
2449                 E1000_WRITE_REG(&adapter->hw, TADV,
2450                                 adapter->tx_abs_int_delay.value);
2451         }
2452
2453         /* Program the Transmit Control Register */
2454         reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
2455                    (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2456         if (adapter->hw.mac_type >= em_82571)
2457                 reg_tctl |= E1000_TCTL_MULR;
2458         if (adapter->link_duplex == 1)
2459                 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2460         else
2461                 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2462
2463         /* This write will effectively turn on the transmit unit. */
2464         E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl);
2465
2466         /* Setup Transmit Descriptor Base Settings */
2467         adapter->txd_cmd = E1000_TXD_CMD_IFCS;
2468
2469         if (adapter->tx_int_delay.value > 0)
2470                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2471 }
2472
2473 /*********************************************************************
2474  *
2475  *  Free all transmit related data structures.
2476  *
2477  **********************************************************************/
2478 static void
2479 em_free_transmit_structures(struct adapter *adapter)
2480 {
2481         struct em_buffer *tx_buffer;
2482         int i;
2483
2484         INIT_DEBUGOUT("free_transmit_structures: begin");
2485
2486         if (adapter->tx_buffer_area != NULL) {
2487                 tx_buffer = adapter->tx_buffer_area;
2488                 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
2489                         if (tx_buffer->m_head != NULL) {
2490                                 bus_dmamap_unload(adapter->txtag,
2491                                                   tx_buffer->map);
2492                                 m_freem(tx_buffer->m_head);
2493                         }
2494
2495                         if (tx_buffer->map != NULL) {
2496                                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2497                                 tx_buffer->map = NULL;
2498                         }
2499                         tx_buffer->m_head = NULL;
2500                 }
2501         }
2502         if (adapter->tx_buffer_area != NULL) {
2503                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2504                 adapter->tx_buffer_area = NULL;
2505         }
2506         if (adapter->txtag != NULL) {
2507                 bus_dma_tag_destroy(adapter->txtag);
2508                 adapter->txtag = NULL;
2509         }
2510 }
2511
2512 /*********************************************************************
2513  *
2514  *  The offload context needs to be set when we transfer the first
2515  *  packet of a particular protocol (TCP/UDP). We change the
2516  *  context only if the protocol type changes.
2517  *
2518  **********************************************************************/
2519 static void
2520 em_transmit_checksum_setup(struct adapter *adapter,
2521                            struct mbuf *mp,
2522                            uint32_t *txd_upper,
2523                            uint32_t *txd_lower)
2524 {
2525         struct em_context_desc *TXD;
2526         struct em_buffer *tx_buffer;
2527         int curr_txd;
2528
2529         if (mp->m_pkthdr.csum_flags) {
2530                 if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
2531                         *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2532                         *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2533                         if (adapter->active_checksum_context == OFFLOAD_TCP_IP)
2534                                 return;
2535                         else
2536                                 adapter->active_checksum_context = OFFLOAD_TCP_IP;
2537                 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
2538                         *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2539                         *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2540                         if (adapter->active_checksum_context == OFFLOAD_UDP_IP)
2541                                 return;
2542                         else
2543                                 adapter->active_checksum_context = OFFLOAD_UDP_IP;
2544                 } else {
2545                         *txd_upper = 0;
2546                         *txd_lower = 0;
2547                         return;
2548                 }
2549         } else {
2550                 *txd_upper = 0;
2551                 *txd_lower = 0;
2552                 return;
2553         }
2554
2555         /*
2556          * If we reach this point, the checksum offload context
2557          * needs to be reset.
2558          */
2559         curr_txd = adapter->next_avail_tx_desc;
2560         tx_buffer = &adapter->tx_buffer_area[curr_txd];
2561         TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd];
2562
2563         TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN;
2564         TXD->lower_setup.ip_fields.ipcso =
2565             ETHER_HDR_LEN + offsetof(struct ip, ip_sum);
2566         TXD->lower_setup.ip_fields.ipcse =
2567             htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1);
2568
2569         TXD->upper_setup.tcp_fields.tucss =
2570             ETHER_HDR_LEN + sizeof(struct ip);
2571         TXD->upper_setup.tcp_fields.tucse = htole16(0);
2572
2573         if (adapter->active_checksum_context == OFFLOAD_TCP_IP) {
2574                 TXD->upper_setup.tcp_fields.tucso =
2575                         ETHER_HDR_LEN + sizeof(struct ip) +
2576                         offsetof(struct tcphdr, th_sum);
2577         } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) {
2578                 TXD->upper_setup.tcp_fields.tucso =
2579                         ETHER_HDR_LEN + sizeof(struct ip) +
2580                         offsetof(struct udphdr, uh_sum);
2581         }
2582
2583         TXD->tcp_seg_setup.data = htole32(0);
2584         TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT);
2585
2586         tx_buffer->m_head = NULL;
2587         tx_buffer->next_eop = -1;
2588
2589         if (++curr_txd == adapter->num_tx_desc)
2590                 curr_txd = 0;
2591
2592         adapter->num_tx_desc_avail--;
2593         adapter->next_avail_tx_desc = curr_txd;
2594 }
2595
2596 /**********************************************************************
2597  *
2598  *  Examine each tx_buffer in the used queue. If the hardware is done
2599  *  processing the packet then free associated resources. The
2600  *  tx_buffer is put back on the free queue.
2601  *
2602  **********************************************************************/
2603
2604 static void
2605 em_txeof(struct adapter *adapter)
2606 {
2607         int first, last, done, num_avail;
2608         struct em_buffer *tx_buffer;
2609         struct em_tx_desc *tx_desc, *eop_desc;
2610         struct ifnet *ifp = &adapter->interface_data.ac_if;
2611
2612         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2613                 return;
2614
2615         num_avail = adapter->num_tx_desc_avail;
2616         first = adapter->next_tx_to_clean;
2617         tx_desc = &adapter->tx_desc_base[first];
2618         tx_buffer = &adapter->tx_buffer_area[first];
2619         last = tx_buffer->next_eop;
2620         KKASSERT(last >= 0 && last < adapter->num_tx_desc);
2621         eop_desc = &adapter->tx_desc_base[last];
2622
2623         /*
2624          * Now caculate the terminating index for the cleanup loop below
2625          */
2626         if (++last == adapter->num_tx_desc)
2627                 last = 0;
2628         done = last;
2629
2630         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2631                         BUS_DMASYNC_POSTREAD);
2632
2633         while (eop_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2634                 while (first != done) {
2635                         tx_desc->upper.data = 0;
2636                         tx_desc->lower.data = 0;
2637                         num_avail++;
2638
2639                         logif(pkt_txclean);
2640
2641                         if (tx_buffer->m_head) {
2642                                 ifp->if_opackets++;
2643                                 bus_dmamap_sync(adapter->txtag, tx_buffer->map,
2644                                                 BUS_DMASYNC_POSTWRITE);
2645                                 bus_dmamap_unload(adapter->txtag,
2646                                                   tx_buffer->map);
2647
2648                                 m_freem(tx_buffer->m_head);
2649                                 tx_buffer->m_head = NULL;
2650                         }
2651                         tx_buffer->next_eop = -1;
2652
2653                         if (++first == adapter->num_tx_desc)
2654                                 first = 0;
2655
2656                         tx_buffer = &adapter->tx_buffer_area[first];
2657                         tx_desc = &adapter->tx_desc_base[first];
2658                 }
2659                 /* See if we can continue to the next packet */
2660                 last = tx_buffer->next_eop;
2661                 if (last != -1) {
2662                         KKASSERT(last >= 0 && last < adapter->num_tx_desc);
2663                         eop_desc = &adapter->tx_desc_base[last];
2664                         if (++last == adapter->num_tx_desc)
2665                                 last = 0;
2666                         done = last;
2667                 } else {
2668                         break;
2669                 }
2670         }
2671
2672         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2673                         BUS_DMASYNC_PREWRITE);
2674
2675         adapter->next_tx_to_clean = first;
2676
2677         /*
2678          * If we have enough room, clear IFF_OACTIVE to tell the stack
2679          * that it is OK to send packets.
2680          * If there are no pending descriptors, clear the timeout. Otherwise,
2681          * if some descriptors have been freed, restart the timeout.
2682          */
2683         if (num_avail > EM_TX_CLEANUP_THRESHOLD) {
2684                 ifp->if_flags &= ~IFF_OACTIVE;
2685                 if (num_avail == adapter->num_tx_desc)
2686                         ifp->if_timer = 0;
2687                 else if (num_avail == adapter->num_tx_desc_avail)
2688                         ifp->if_timer = EM_TX_TIMEOUT;
2689         }
2690         adapter->num_tx_desc_avail = num_avail;
2691 }
2692
2693 /*********************************************************************
2694  *
2695  *  Get a buffer from system mbuf buffer pool.
2696  *
2697  **********************************************************************/
2698 static int
2699 em_get_buf(int i, struct adapter *adapter, struct mbuf *nmp, int how)
2700 {
2701         struct mbuf *mp = nmp;
2702         struct em_buffer *rx_buffer;
2703         struct ifnet *ifp;
2704         bus_addr_t paddr;
2705         int error;
2706
2707         ifp = &adapter->interface_data.ac_if;
2708
2709         if (mp == NULL) {
2710                 mp = m_getcl(how, MT_DATA, M_PKTHDR);
2711                 if (mp == NULL) {
2712                         adapter->mbuf_cluster_failed++;
2713                         return (ENOBUFS);
2714                 }
2715                 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2716         } else {
2717                 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2718                 mp->m_data = mp->m_ext.ext_buf;
2719                 mp->m_next = NULL;
2720         }
2721
2722         if (ifp->if_mtu <= ETHERMTU)
2723                 m_adj(mp, ETHER_ALIGN);
2724
2725         rx_buffer = &adapter->rx_buffer_area[i];
2726
2727         /*
2728          * Using memory from the mbuf cluster pool, invoke the
2729          * bus_dma machinery to arrange the memory mapping.
2730          */
2731         error = bus_dmamap_load(adapter->rxtag, rx_buffer->map,
2732                                 mtod(mp, void *), mp->m_len,
2733                                 em_dmamap_cb, &paddr, 0);
2734         if (error) {
2735                 m_freem(mp);
2736                 return (error);
2737         }
2738         rx_buffer->m_head = mp;
2739         adapter->rx_desc_base[i].buffer_addr = htole64(paddr);
2740         bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD);
2741
2742         return (0);
2743 }
2744
2745 /*********************************************************************
2746  *
2747  *  Allocate memory for rx_buffer structures. Since we use one
2748  *  rx_buffer per received packet, the maximum number of rx_buffer's
2749  *  that we'll need is equal to the number of receive descriptors
2750  *  that we've allocated.
2751  *
2752  **********************************************************************/
2753 static int
2754 em_allocate_receive_structures(struct adapter *adapter)
2755 {
2756         int i, error, size;
2757         struct em_buffer *rx_buffer;
2758
2759         size = adapter->num_rx_desc * sizeof(struct em_buffer);
2760         adapter->rx_buffer_area = kmalloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
2761
2762         error = bus_dma_tag_create(NULL,                /* parent */
2763                                    1, 0,                /* alignment, bounds */
2764                                    BUS_SPACE_MAXADDR,   /* lowaddr */
2765                                    BUS_SPACE_MAXADDR,   /* highaddr */
2766                                    NULL, NULL,          /* filter, filterarg */
2767                                    MCLBYTES,            /* maxsize */
2768                                    1,                   /* nsegments */
2769                                    MCLBYTES,            /* maxsegsize */
2770                                    0,                   /* flags */
2771                                    &adapter->rxtag);
2772         if (error) {
2773                 device_printf(adapter->dev, "%s: bus_dma_tag_create failed; "
2774                               "error %u\n", __func__, error);
2775                 goto fail;
2776         }
2777
2778         rx_buffer = adapter->rx_buffer_area;
2779         for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2780                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT,
2781                                           &rx_buffer->map);
2782                 if (error) {
2783                         device_printf(adapter->dev,
2784                                       "%s: bus_dmamap_create failed; "
2785                                       "error %u\n", __func__, error);
2786                         goto fail;
2787                 }
2788         }
2789
2790         for (i = 0; i < adapter->num_rx_desc; i++) {
2791                 error = em_get_buf(i, adapter, NULL, MB_DONTWAIT);
2792                 if (error)
2793                         goto fail;
2794         }
2795
2796         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2797                         BUS_DMASYNC_PREWRITE);
2798
2799         return (0);
2800 fail:
2801         em_free_receive_structures(adapter);
2802         return (error);
2803 }
2804
2805 /*********************************************************************
2806  *
2807  *  Allocate and initialize receive structures.
2808  *
2809  **********************************************************************/
2810 static int
2811 em_setup_receive_structures(struct adapter *adapter)
2812 {
2813         int error;
2814
2815         bzero(adapter->rx_desc_base,
2816               sizeof(struct em_rx_desc) * adapter->num_rx_desc);
2817
2818         error = em_allocate_receive_structures(adapter);
2819         if (error)
2820                 return (error);
2821
2822         /* Setup our descriptor pointers */
2823         adapter->next_rx_desc_to_check = 0;
2824
2825         return (0);
2826 }
2827
2828 /*********************************************************************
2829  *
2830  *  Enable receive unit.
2831  *
2832  **********************************************************************/
2833 static void
2834 em_initialize_receive_unit(struct adapter *adapter)
2835 {
2836         uint32_t reg_rctl;
2837         uint32_t reg_rxcsum;
2838         struct ifnet *ifp;
2839         uint64_t bus_addr;
2840
2841         INIT_DEBUGOUT("em_initialize_receive_unit: begin");
2842
2843         ifp = &adapter->interface_data.ac_if;
2844
2845         /*
2846          * Make sure receives are disabled while setting
2847          * up the descriptor ring
2848          */
2849         E1000_WRITE_REG(&adapter->hw, RCTL, 0);
2850
2851         /* Set the Receive Delay Timer Register */
2852         E1000_WRITE_REG(&adapter->hw, RDTR,
2853                         adapter->rx_int_delay.value | E1000_RDT_FPDB);
2854
2855         if(adapter->hw.mac_type >= em_82540) {
2856                 E1000_WRITE_REG(&adapter->hw, RADV,
2857                                 adapter->rx_abs_int_delay.value);
2858
2859                 /* Set the interrupt throttling rate in 256ns increments */
2860                 if (em_int_throttle_ceil) {
2861                         E1000_WRITE_REG(&adapter->hw, ITR,
2862                                 1000000000 / 256 / em_int_throttle_ceil);
2863                 } else {
2864                         E1000_WRITE_REG(&adapter->hw, ITR, 0);
2865                 }
2866         }
2867
2868         /* Setup the Base and Length of the Rx Descriptor Ring */
2869         bus_addr = adapter->rxdma.dma_paddr;
2870         E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc *
2871                         sizeof(struct em_rx_desc));
2872         E1000_WRITE_REG(&adapter->hw, RDBAH, (uint32_t)(bus_addr >> 32));
2873         E1000_WRITE_REG(&adapter->hw, RDBAL, (uint32_t)bus_addr);
2874
2875         /* Setup the Receive Control Register */
2876         reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
2877                    E1000_RCTL_RDMTS_HALF |
2878                    (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
2879
2880         if (adapter->hw.tbi_compatibility_on == TRUE)
2881                 reg_rctl |= E1000_RCTL_SBP;
2882
2883         switch (adapter->rx_buffer_len) {
2884         default:
2885         case EM_RXBUFFER_2048:
2886                 reg_rctl |= E1000_RCTL_SZ_2048;
2887                 break;
2888         case EM_RXBUFFER_4096:
2889                 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX |
2890                             E1000_RCTL_LPE;
2891                 break;
2892         case EM_RXBUFFER_8192:
2893                 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX |
2894                             E1000_RCTL_LPE;
2895                 break;
2896         case EM_RXBUFFER_16384:
2897                 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX |
2898                             E1000_RCTL_LPE;
2899                 break;
2900         }
2901
2902         if (ifp->if_mtu > ETHERMTU)
2903                 reg_rctl |= E1000_RCTL_LPE;
2904
2905         /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2906         if ((adapter->hw.mac_type >= em_82543) &&
2907             (ifp->if_capenable & IFCAP_RXCSUM)) {
2908                 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
2909                 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
2910                 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum);
2911         }
2912
2913 #ifdef EM_X60_WORKAROUND
2914         if (adapter->hw.mac_type == em_82573)
2915                 E1000_WRITE_REG(&adapter->hw, RDTR, 32);
2916 #endif
2917
2918         /* Enable Receives */
2919         E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
2920
2921         /* Setup the HW Rx Head and Tail Descriptor Pointers */
2922         E1000_WRITE_REG(&adapter->hw, RDH, 0);
2923         E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1);
2924 }
2925
2926 /*********************************************************************
2927  *
2928  *  Free receive related data structures.
2929  *
2930  **********************************************************************/
2931 static void
2932 em_free_receive_structures(struct adapter *adapter)
2933 {
2934         struct em_buffer *rx_buffer;
2935         int i;
2936
2937         INIT_DEBUGOUT("free_receive_structures: begin");
2938
2939         if (adapter->rx_buffer_area != NULL) {
2940                 rx_buffer = adapter->rx_buffer_area;
2941                 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2942                         if (rx_buffer->m_head != NULL) {
2943                                 bus_dmamap_unload(adapter->rxtag,
2944                                                   rx_buffer->map);
2945                                 m_freem(rx_buffer->m_head);
2946                                 rx_buffer->m_head = NULL;
2947                         }
2948                         if (rx_buffer->map != NULL) {
2949                                 bus_dmamap_destroy(adapter->rxtag,
2950                                                    rx_buffer->map);
2951                                 rx_buffer->map = NULL;
2952                         }
2953                 }
2954         }
2955         if (adapter->rx_buffer_area != NULL) {
2956                 kfree(adapter->rx_buffer_area, M_DEVBUF);
2957                 adapter->rx_buffer_area = NULL;
2958         }
2959         if (adapter->rxtag != NULL) {
2960                 bus_dma_tag_destroy(adapter->rxtag);
2961                 adapter->rxtag = NULL;
2962         }
2963 }
2964
2965 /*********************************************************************
2966  *
2967  *  This routine executes in interrupt context. It replenishes
2968  *  the mbufs in the descriptor and sends data which has been
2969  *  dma'ed into host memory to upper layer.
2970  *
2971  *  We loop at most count times if count is > 0, or until done if
2972  *  count < 0.
2973  *
2974  *********************************************************************/
2975 static void
2976 em_rxeof(struct adapter *adapter, int count)
2977 {
2978         struct ifnet *ifp;
2979         struct mbuf *mp;
2980         uint8_t accept_frame = 0;
2981         uint8_t eop = 0;
2982         uint16_t len, desc_len, prev_len_adj;
2983         int i;
2984
2985         /* Pointer to the receive descriptor being examined. */
2986         struct em_rx_desc *current_desc;
2987
2988         ifp = &adapter->interface_data.ac_if;
2989         i = adapter->next_rx_desc_to_check;
2990         current_desc = &adapter->rx_desc_base[i];
2991
2992         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2993                         BUS_DMASYNC_POSTREAD);
2994
2995         if (!(current_desc->status & E1000_RXD_STAT_DD))
2996                 return;
2997
2998         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
2999                 logif(pkt_receive);
3000                 mp = adapter->rx_buffer_area[i].m_head;
3001                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3002                                 BUS_DMASYNC_POSTREAD);
3003                 bus_dmamap_unload(adapter->rxtag,
3004                                   adapter->rx_buffer_area[i].map);
3005
3006                 accept_frame = 1;
3007                 prev_len_adj = 0;
3008                 desc_len = le16toh(current_desc->length);
3009                 if (current_desc->status & E1000_RXD_STAT_EOP) {
3010                         count--;
3011                         eop = 1;
3012                         if (desc_len < ETHER_CRC_LEN) {
3013                                 len = 0;
3014                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3015                         } else {
3016                                 len = desc_len - ETHER_CRC_LEN;
3017                         }
3018                 } else {
3019                         eop = 0;
3020                         len = desc_len;
3021                 }
3022
3023                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3024                         uint8_t last_byte;
3025                         uint32_t pkt_len = desc_len;
3026
3027                         if (adapter->fmp != NULL)
3028                                 pkt_len += adapter->fmp->m_pkthdr.len;
3029
3030                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3031
3032                         if (TBI_ACCEPT(&adapter->hw, current_desc->status,
3033                                        current_desc->errors,
3034                                        pkt_len, last_byte)) {
3035                                 em_tbi_adjust_stats(&adapter->hw,
3036                                                     &adapter->stats,
3037                                                     pkt_len,
3038                                                     adapter->hw.mac_addr);
3039                                 if (len > 0)
3040                                         len--;
3041                         } else {
3042                                 accept_frame = 0;
3043                         }
3044                 }
3045
3046                 if (accept_frame) {
3047                         if (em_get_buf(i, adapter, NULL, MB_DONTWAIT) == ENOBUFS) {
3048                                 adapter->dropped_pkts++;
3049                                 em_get_buf(i, adapter, mp, MB_DONTWAIT);
3050                                 if (adapter->fmp != NULL)
3051                                         m_freem(adapter->fmp);
3052                                 adapter->fmp = NULL;
3053                                 adapter->lmp = NULL;
3054                                 goto skip;
3055                         }
3056
3057                         /* Assign correct length to the current fragment */
3058                         mp->m_len = len;
3059
3060                         if (adapter->fmp == NULL) {
3061                                 mp->m_pkthdr.len = len;
3062                                 adapter->fmp = mp;       /* Store the first mbuf */
3063                                 adapter->lmp = mp;
3064                         } else {
3065                                 /* Chain mbuf's together */
3066                                 /*
3067                                  * Adjust length of previous mbuf in chain if
3068                                  * we received less than 4 bytes in the last
3069                                  * descriptor.
3070                                  */
3071                                 if (prev_len_adj > 0) {
3072                                         adapter->lmp->m_len -= prev_len_adj;
3073                                         adapter->fmp->m_pkthdr.len -= prev_len_adj;
3074                                 }
3075                                 adapter->lmp->m_next = mp;
3076                                 adapter->lmp = adapter->lmp->m_next;
3077                                 adapter->fmp->m_pkthdr.len += len;
3078                         }
3079
3080                         if (eop) {
3081                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3082                                 ifp->if_ipackets++;
3083
3084                                 em_receive_checksum(adapter, current_desc,
3085                                                     adapter->fmp);
3086                                 if (current_desc->status & E1000_RXD_STAT_VP) {
3087                                         VLAN_INPUT_TAG(adapter->fmp,
3088                                                        (current_desc->special &
3089                                                         E1000_RXD_SPC_VLAN_MASK));
3090                                 } else {
3091                                         ifp->if_input(ifp, adapter->fmp);
3092                                 }
3093                                 adapter->fmp = NULL;
3094                                 adapter->lmp = NULL;
3095                         }
3096                 } else {
3097                         adapter->dropped_pkts++;
3098                         em_get_buf(i, adapter, mp, MB_DONTWAIT);
3099                         if (adapter->fmp != NULL)
3100                                 m_freem(adapter->fmp);
3101                         adapter->fmp = NULL;
3102                         adapter->lmp = NULL;
3103                 }
3104
3105 skip:
3106                 /* Zero out the receive descriptors status. */
3107                 current_desc->status = 0;
3108
3109                 /* Advance our pointers to the next descriptor. */
3110                 if (++i == adapter->num_rx_desc) {
3111                         i = 0;
3112                         current_desc = adapter->rx_desc_base;
3113                 } else {
3114                         current_desc++;
3115                 }
3116         }
3117
3118         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
3119                         BUS_DMASYNC_PREWRITE);
3120
3121         adapter->next_rx_desc_to_check = i;
3122
3123         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3124         if (--i < 0)
3125                 i = adapter->num_rx_desc - 1;
3126
3127         E1000_WRITE_REG(&adapter->hw, RDT, i);
3128 }
3129
3130 /*********************************************************************
3131  *
3132  *  Verify that the hardware indicated that the checksum is valid.
3133  *  Inform the stack about the status of checksum so that stack
3134  *  doesn't spend time verifying the checksum.
3135  *
3136  *********************************************************************/
3137 static void
3138 em_receive_checksum(struct adapter *adapter,
3139                     struct em_rx_desc *rx_desc,
3140                     struct mbuf *mp)
3141 {
3142         /* 82543 or newer only */
3143         if ((adapter->hw.mac_type < em_82543) ||
3144             /* Ignore Checksum bit is set */
3145             (rx_desc->status & E1000_RXD_STAT_IXSM)) {
3146                 mp->m_pkthdr.csum_flags = 0;
3147                 return;
3148         }
3149
3150         if (rx_desc->status & E1000_RXD_STAT_IPCS) {
3151                 /* Did it pass? */
3152                 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3153                         /* IP Checksum Good */
3154                         mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
3155                         mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
3156                 } else {
3157                         mp->m_pkthdr.csum_flags = 0;
3158                 }
3159         }
3160
3161         if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
3162                 /* Did it pass? */
3163                 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3164                         mp->m_pkthdr.csum_flags |=
3165                         (CSUM_DATA_VALID | CSUM_PSEUDO_HDR |
3166                          CSUM_FRAG_NOT_CHECKED);
3167                         mp->m_pkthdr.csum_data = htons(0xffff);
3168                 }
3169         }
3170 }
3171
3172
3173 static void
3174 em_enable_vlans(struct adapter *adapter)
3175 {
3176         uint32_t ctrl;
3177
3178         E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN);
3179
3180         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3181         ctrl |= E1000_CTRL_VME;
3182         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3183 }
3184
3185 static void
3186 em_disable_vlans(struct adapter *adapter)
3187 {
3188         uint32_t ctrl;
3189
3190         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3191         ctrl &= ~E1000_CTRL_VME;
3192         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3193 }
3194
3195 /*
3196  * note: we must call bus_enable_intr() prior to enabling the hardware
3197  * interrupt and bus_disable_intr() after disabling the hardware interrupt
3198  * in order to avoid handler execution races from scheduled interrupt
3199  * threads.
3200  */
3201 static void
3202 em_enable_intr(struct adapter *adapter)
3203 {
3204         struct ifnet *ifp = &adapter->interface_data.ac_if;
3205
3206         if ((ifp->if_flags & IFF_POLLING) == 0) {
3207                 lwkt_serialize_handler_enable(ifp->if_serializer);
3208                 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK));
3209         }
3210 }
3211
3212 static void
3213 em_disable_intr(struct adapter *adapter)
3214 {
3215         /*
3216          * The first version of 82542 had an errata where when link was forced
3217          * it would stay up even up even if the cable was disconnected.
3218          * Sequence errors were used to detect the disconnect and then the
3219          * driver would unforce the link.  This code in the in the ISR.  For
3220          * this to work correctly the Sequence error interrupt had to be
3221          * enabled all the time.
3222          */
3223         if (adapter->hw.mac_type == em_82542_rev2_0) {
3224                 E1000_WRITE_REG(&adapter->hw, IMC,
3225                                 (0xffffffff & ~E1000_IMC_RXSEQ));
3226         } else {
3227                 E1000_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
3228         }
3229
3230         lwkt_serialize_handler_disable(adapter->interface_data.ac_if.if_serializer);
3231 }
3232
3233 static int
3234 em_is_valid_ether_addr(uint8_t *addr)
3235 {
3236         static const char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
3237
3238         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3239                 return (FALSE);
3240         else
3241                 return (TRUE);
3242 }
3243
3244 void
3245 em_write_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3246 {
3247         pci_write_config(((struct em_osdep *)hw->back)->dev, reg, *value, 2);
3248 }
3249
3250 void
3251 em_read_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3252 {
3253         *value = pci_read_config(((struct em_osdep *)hw->back)->dev, reg, 2);
3254 }
3255
3256 void
3257 em_pci_set_mwi(struct em_hw *hw)
3258 {
3259         pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
3260                          (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
3261 }
3262
3263 void
3264 em_pci_clear_mwi(struct em_hw *hw)
3265 {
3266         pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
3267                          (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
3268 }
3269
3270 uint32_t
3271 em_io_read(struct em_hw *hw, unsigned long port)
3272 {
3273         struct em_osdep *io = hw->back;
3274
3275         return bus_space_read_4(io->io_bus_space_tag,
3276                                 io->io_bus_space_handle, port);
3277 }
3278
3279 void
3280 em_io_write(struct em_hw *hw, unsigned long port, uint32_t value)
3281 {
3282         struct em_osdep *io = hw->back;
3283
3284         bus_space_write_4(io->io_bus_space_tag,
3285                           io->io_bus_space_handle, port, value);
3286 }
3287
3288 /*
3289  * We may eventually really do this, but its unnecessary
3290  * for now so we just return unsupported.
3291  */
3292 int32_t
3293 em_read_pcie_cap_reg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3294 {
3295         return (0);
3296 }
3297
3298
3299 /*********************************************************************
3300  * 82544 Coexistence issue workaround.
3301  *    There are 2 issues.
3302  *      1. Transmit Hang issue.
3303  *    To detect this issue, following equation can be used...
3304  *          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3305  *          If SUM[3:0] is in between 1 to 4, we will have this issue.
3306  *
3307  *      2. DAC issue.
3308  *    To detect this issue, following equation can be used...
3309  *          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3310  *          If SUM[3:0] is in between 9 to c, we will have this issue.
3311  *
3312  *
3313  *    WORKAROUND:
3314  *          Make sure we do not have ending address as 1,2,3,4(Hang) or
3315  *          9,a,b,c (DAC)
3316  *
3317 *************************************************************************/
3318 static uint32_t
3319 em_fill_descriptors(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3320 {
3321         /* Since issue is sensitive to length and address.*/
3322         /* Let us first check the address...*/
3323         uint32_t safe_terminator;
3324         if (length <= 4) {
3325                 desc_array->descriptor[0].address = address;
3326                 desc_array->descriptor[0].length = length;
3327                 desc_array->elements = 1;
3328                 return (desc_array->elements);
3329         }
3330         safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3331         /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3332         if (safe_terminator == 0 ||
3333             (safe_terminator > 4 && safe_terminator < 9) ||
3334             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3335                 desc_array->descriptor[0].address = address;
3336                 desc_array->descriptor[0].length = length;
3337                 desc_array->elements = 1;
3338                 return (desc_array->elements);
3339         }
3340
3341         desc_array->descriptor[0].address = address;
3342         desc_array->descriptor[0].length = length - 4;
3343         desc_array->descriptor[1].address = address + (length - 4);
3344         desc_array->descriptor[1].length = 4;
3345         desc_array->elements = 2;
3346         return (desc_array->elements);
3347 }
3348
3349 /**********************************************************************
3350  *
3351  *  Update the board statistics counters.
3352  *
3353  **********************************************************************/
3354 static void
3355 em_update_stats_counters(struct adapter *adapter)
3356 {
3357         struct ifnet   *ifp;
3358
3359         if (adapter->hw.media_type == em_media_type_copper ||
3360             (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
3361                 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS);
3362                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC);
3363         }
3364         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS);
3365         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC);
3366         adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC);
3367         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL);
3368
3369         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC);
3370         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL);
3371         adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC);
3372         adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC);
3373         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC);
3374         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC);
3375         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC);
3376         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC);
3377         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC);
3378         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC);
3379         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64);
3380         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127);
3381         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255);
3382         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511);
3383         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023);
3384         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522);
3385         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC);
3386         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC);
3387         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC);
3388         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC);
3389
3390         /* For the 64-bit byte counters the low dword must be read first. */
3391         /* Both registers clear on the read of the high dword */
3392
3393         adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL);
3394         adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH);
3395         adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL);
3396         adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH);
3397
3398         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC);
3399         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC);
3400         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC);
3401         adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC);
3402         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC);
3403
3404         adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL);
3405         adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH);
3406         adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL);
3407         adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH);
3408
3409         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR);
3410         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT);
3411         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64);
3412         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127);
3413         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255);
3414         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511);
3415         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023);
3416         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522);
3417         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC);
3418         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC);
3419
3420         if (adapter->hw.mac_type >= em_82543) {
3421                 adapter->stats.algnerrc +=
3422                     E1000_READ_REG(&adapter->hw, ALGNERRC);
3423                 adapter->stats.rxerrc +=
3424                     E1000_READ_REG(&adapter->hw, RXERRC);
3425                 adapter->stats.tncrs +=
3426                     E1000_READ_REG(&adapter->hw, TNCRS);
3427                 adapter->stats.cexterr +=
3428                     E1000_READ_REG(&adapter->hw, CEXTERR);
3429                 adapter->stats.tsctc +=
3430                     E1000_READ_REG(&adapter->hw, TSCTC);
3431                 adapter->stats.tsctfc +=
3432                     E1000_READ_REG(&adapter->hw, TSCTFC);
3433         }
3434         ifp = &adapter->interface_data.ac_if;
3435
3436         /* Fill out the OS statistics structure */
3437         ifp->if_collisions = adapter->stats.colc;
3438
3439         /* Rx Errors */
3440         ifp->if_ierrors =
3441                 adapter->dropped_pkts +
3442                 adapter->stats.rxerrc +
3443                 adapter->stats.crcerrs +
3444                 adapter->stats.algnerrc +
3445                 adapter->stats.ruc + adapter->stats.roc +
3446                 adapter->stats.mpc + adapter->stats.cexterr +
3447                 adapter->rx_overruns;
3448
3449         /* Tx Errors */
3450         ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol +
3451                           adapter->watchdog_timeouts;
3452 }
3453
3454
3455 /**********************************************************************
3456  *
3457  *  This routine is called only when em_display_debug_stats is enabled.
3458  *  This routine provides a way to take a look at important statistics
3459  *  maintained by the driver and hardware.
3460  *
3461  **********************************************************************/
3462 static void
3463 em_print_debug_info(struct adapter *adapter)
3464 {
3465         device_t dev= adapter->dev;
3466         uint8_t *hw_addr = adapter->hw.hw_addr;
3467
3468         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3469         device_printf(dev, "CTRL  = 0x%x RCTL = 0x%x\n",
3470                       E1000_READ_REG(&adapter->hw, CTRL),
3471                       E1000_READ_REG(&adapter->hw, RCTL));
3472         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk\n",
3473                       ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff0000) >> 16),
3474                       (E1000_READ_REG(&adapter->hw, PBA) & 0xffff));
3475         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3476                       adapter->hw.fc_high_water, adapter->hw.fc_low_water);
3477         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3478                       E1000_READ_REG(&adapter->hw, TIDV),
3479                       E1000_READ_REG(&adapter->hw, TADV));
3480         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3481                       E1000_READ_REG(&adapter->hw, RDTR),
3482                       E1000_READ_REG(&adapter->hw, RADV));
3483         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3484                       (long long)adapter->tx_fifo_wrk_cnt,
3485                       (long long)adapter->tx_fifo_reset_cnt);
3486         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3487                       E1000_READ_REG(&adapter->hw, TDH),
3488                       E1000_READ_REG(&adapter->hw, TDT));
3489         device_printf(dev, "Num Tx descriptors avail = %d\n",
3490                       adapter->num_tx_desc_avail);
3491         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3492                       adapter->no_tx_desc_avail1);
3493         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3494                       adapter->no_tx_desc_avail2);
3495         device_printf(dev, "Std mbuf failed = %ld\n",
3496                       adapter->mbuf_alloc_failed);
3497         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3498                       adapter->mbuf_cluster_failed);
3499         device_printf(dev, "Driver dropped packets = %ld\n",
3500                       adapter->dropped_pkts);
3501 }
3502
3503 static void
3504 em_print_hw_stats(struct adapter *adapter)
3505 {
3506         device_t dev= adapter->dev;
3507
3508         device_printf(dev, "Excessive collisions = %lld\n",
3509                       (long long)adapter->stats.ecol);
3510         device_printf(dev, "Symbol errors = %lld\n",
3511                       (long long)adapter->stats.symerrs);
3512         device_printf(dev, "Sequence errors = %lld\n",
3513                       (long long)adapter->stats.sec);
3514         device_printf(dev, "Defer count = %lld\n",
3515                       (long long)adapter->stats.dc);
3516
3517         device_printf(dev, "Missed Packets = %lld\n",
3518                       (long long)adapter->stats.mpc);
3519         device_printf(dev, "Receive No Buffers = %lld\n",
3520                       (long long)adapter->stats.rnbc);
3521         /* RLEC is inaccurate on some hardware, calculate our own. */
3522         device_printf(dev, "Receive Length errors = %lld\n",
3523                       (long long)adapter->stats.roc +
3524                       (long long)adapter->stats.ruc);
3525         device_printf(dev, "Receive errors = %lld\n",
3526                       (long long)adapter->stats.rxerrc);
3527         device_printf(dev, "Crc errors = %lld\n",
3528                       (long long)adapter->stats.crcerrs);
3529         device_printf(dev, "Alignment errors = %lld\n",
3530                       (long long)adapter->stats.algnerrc);
3531         device_printf(dev, "Carrier extension errors = %lld\n",
3532                       (long long)adapter->stats.cexterr);
3533         device_printf(dev, "RX overruns = %lu\n", adapter->rx_overruns);
3534         device_printf(dev, "Watchdog timeouts = %lu\n",
3535                       adapter->watchdog_timeouts);
3536
3537         device_printf(dev, "XON Rcvd = %lld\n",
3538                       (long long)adapter->stats.xonrxc);
3539         device_printf(dev, "XON Xmtd = %lld\n",
3540                       (long long)adapter->stats.xontxc);
3541         device_printf(dev, "XOFF Rcvd = %lld\n",
3542                       (long long)adapter->stats.xoffrxc);
3543         device_printf(dev, "XOFF Xmtd = %lld\n",
3544                       (long long)adapter->stats.xofftxc);
3545
3546         device_printf(dev, "Good Packets Rcvd = %lld\n",
3547                       (long long)adapter->stats.gprc);
3548         device_printf(dev, "Good Packets Xmtd = %lld\n",
3549                       (long long)adapter->stats.gptc);
3550 }
3551
3552 static int
3553 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3554 {
3555         int error;
3556         int result;
3557         struct adapter *adapter;
3558
3559         result = -1;
3560         error = sysctl_handle_int(oidp, &result, 0, req);
3561
3562         if (error || !req->newptr)
3563                 return (error);
3564
3565         if (result == 1) {
3566                 adapter = (struct adapter *)arg1;
3567                 em_print_debug_info(adapter);
3568         }
3569
3570         return (error);
3571 }
3572
3573 static int
3574 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3575 {
3576         int error;
3577         int result;
3578         struct adapter *adapter;
3579
3580         result = -1;
3581         error = sysctl_handle_int(oidp, &result, 0, req);
3582
3583         if (error || !req->newptr)
3584                 return (error);
3585
3586         if (result == 1) {
3587                 adapter = (struct adapter *)arg1;
3588                 em_print_hw_stats(adapter);
3589         }
3590
3591         return (error);
3592 }
3593
3594 static int
3595 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
3596 {
3597         struct em_int_delay_info *info;
3598         struct adapter *adapter;
3599         uint32_t regval;
3600         int error;
3601         int usecs;
3602         int ticks;
3603
3604         info = (struct em_int_delay_info *)arg1;
3605         adapter = info->adapter;
3606         usecs = info->value;
3607         error = sysctl_handle_int(oidp, &usecs, 0, req);
3608         if (error != 0 || req->newptr == NULL)
3609                 return (error);
3610         if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535))
3611                 return (EINVAL);
3612         info->value = usecs;
3613         ticks = E1000_USECS_TO_TICKS(usecs);
3614
3615         lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3616         regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
3617         regval = (regval & ~0xffff) | (ticks & 0xffff);
3618         /* Handle a few special cases. */
3619         switch (info->offset) {
3620         case E1000_RDTR:
3621         case E1000_82542_RDTR:
3622                 regval |= E1000_RDT_FPDB;
3623                 break;
3624         case E1000_TIDV:
3625         case E1000_82542_TIDV:
3626                 if (ticks == 0) {
3627                         adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
3628                         /* Don't write 0 into the TIDV register. */
3629                         regval++;
3630                 } else
3631                         adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3632                 break;
3633         }
3634         E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
3635         lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3636         return (0);
3637 }
3638
3639 static void
3640 em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
3641                         const char *description, struct em_int_delay_info *info,
3642                         int offset, int value)
3643 {
3644         info->adapter = adapter;
3645         info->offset = offset;
3646         info->value = value;
3647         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3648                         SYSCTL_CHILDREN(adapter->sysctl_tree),
3649                         OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
3650                         info, 0, em_sysctl_int_delay, "I", description);
3651 }
3652
3653 static int
3654 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3655 {
3656         struct adapter *adapter = (void *)arg1;
3657         int error;
3658         int throttle;
3659
3660         throttle = em_int_throttle_ceil;
3661         error = sysctl_handle_int(oidp, &throttle, 0, req);
3662         if (error || req->newptr == NULL)
3663                 return error;
3664         if (throttle < 0 || throttle > 1000000000 / 256)
3665                 return EINVAL;
3666         if (throttle) {
3667                 /*
3668                  * Set the interrupt throttling rate in 256ns increments,
3669                  * recalculate sysctl value assignment to get exact frequency.
3670                  */
3671                 throttle = 1000000000 / 256 / throttle;
3672                 lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3673                 em_int_throttle_ceil = 1000000000 / 256 / throttle;
3674                 E1000_WRITE_REG(&adapter->hw, ITR, throttle);
3675                 lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3676         } else {
3677                 lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3678                 em_int_throttle_ceil = 0;
3679                 E1000_WRITE_REG(&adapter->hw, ITR, 0);
3680                 lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3681         }
3682         device_printf(adapter->dev, "Interrupt moderation set to %d/sec\n",
3683                         em_int_throttle_ceil);
3684         return 0;
3685 }