sys/i386/icu/icu_vector.s

   1 /*
   2  *      from: vector.s, 386BSD 0.1 unknown origin
   3  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
   4  * $DragonFly: src/sys/i386/icu/Attic/icu_vector.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
   5  */
   6
   7 #define ICU_IMR_OFFSET          1       /* IO_ICU{1,2} + 1 */
   8
   9 #define ICU_EOI                 0x20    /* XXX - define elsewhere */
  10
  11 #define IRQ_LBIT(irq_num)       (1 << (irq_num))
  12 #define IRQ_BIT(irq_num)        (1 << ((irq_num) % 8))
  13 #define IRQ_BYTE(irq_num)       ((irq_num) >> 3)
  14
  15 #ifdef AUTO_EOI_1
  16 #define ENABLE_ICU1             /* use auto-EOI to reduce i/o */
  17 #define OUTB_ICU1
  18 #else
  19 #define ENABLE_ICU1                                                     \
  20         movb    $ICU_EOI,%al ;  /* as soon as possible send EOI ... */  \
  21         OUTB_ICU1 ;             /* ... to clear in service bit */       \
  22
  23 #define OUTB_ICU1                                                       \
  24         outb    %al,$IO_ICU1 ;                                          \
  25
  26 #endif
  27
  28 #ifdef AUTO_EOI_2
  29 /*
  30  * The data sheet says no auto-EOI on slave, but it sometimes works.
  31  */
  32 #define ENABLE_ICU1_AND_2       ENABLE_ICU1
  33 #else
  34 #define ENABLE_ICU1_AND_2                                               \
  35         movb    $ICU_EOI,%al ;  /* as above */                          \
  36         outb    %al,$IO_ICU2 ;  /* but do second icu first ... */       \
  37         OUTB_ICU1 ;     /* ... then first icu (if !AUTO_EOI_1) */       \
  38
  39 #endif
  40
  41 /*
  42  * Macro helpers
  43  */
  44 #define PUSH_FRAME                                                      \
  45         pushl   $0 ;            /* dummy error code */                  \
  46         pushl   $0 ;            /* dummy trap type */                   \
  47         pushal ;                /* 8 registers */                       \
  48         pushl   %ds ;                                                   \
  49         pushl   %es ;                                                   \
  50         pushl   %fs ;                                                   \
  51         mov     $KDSEL,%ax ;                                            \
  52         mov     %ax,%ds ;                                               \
  53         mov     %ax,%es ;                                               \
  54         mov     $KPSEL,%ax ;                                            \
  55         mov     %ax,%fs ;                                               \
  56
  57 #define PUSH_DUMMY                                                      \
  58         pushfl ;                /* phys int frame / flags */            \
  59         pushl %cs ;             /* phys int frame / cs */               \
  60         pushl   12(%esp) ;      /* original caller eip */               \
  61         pushl   $0 ;            /* dummy error code */                  \
  62         pushl   $0 ;            /* dummy trap type */                   \
  63         subl    $12*4,%esp ;    /* pushal + 3 seg regs (dummy) + CPL */ \
  64
  65 /*
  66  * Warning: POP_FRAME can only be used if there is no chance of a
  67  * segment register being changed (e.g. by procfs), which is why syscalls
  68  * have to use doreti.
  69  */
  70 #define POP_FRAME                                                       \
  71         popl    %fs ;                                                   \
  72         popl    %es ;                                                   \
  73         popl    %ds ;                                                   \
  74         popal ;                                                         \
  75         addl    $2*4,%esp ;     /* dummy trap & error codes */          \
  76
  77 #define POP_DUMMY                                                       \
  78         addl    $17*4,%esp ;                                            \
  79
  80 #define MASK_IRQ(icu, irq_num)                                          \
  81         movb    imen + IRQ_BYTE(irq_num),%al ;                          \
  82         orb     $IRQ_BIT(irq_num),%al ;                                 \
  83         movb    %al,imen + IRQ_BYTE(irq_num) ;                          \
  84         outb    %al,$icu+ICU_IMR_OFFSET ;                               \
  85
  86 #define UNMASK_IRQ(icu, irq_num)                                        \
  87         movb    imen + IRQ_BYTE(irq_num),%al ;                          \
  88         andb    $~IRQ_BIT(irq_num),%al ;                                \
  89         movb    %al,imen + IRQ_BYTE(irq_num) ;                          \
  90         outb    %al,$icu+ICU_IMR_OFFSET ;                               \
  91
  92 /*
  93  * Fast interrupt call handlers run in the following sequence:
  94  *
  95  *      - Push the trap frame required by doreti.
  96  *      - Mask the interrupt and reenable its source.
  97  *      - If we cannot take the interrupt set its fpending bit and
  98  *        doreti.
  99  *      - If we can take the interrupt clear its fpending bit,
 100  *        call the handler, then unmask the interrupt and doreti.
 101  *
 102  *      YYY can cache gd base pointer instead of using hidden %fs
 103  *      prefixes.
 104  */
 105
 106 #define FAST_INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \
 107         .text ;                                                         \
 108         SUPERALIGN_TEXT ;                                               \
 109 IDTVEC(vec_name) ;                                                      \
 110         PUSH_FRAME ;                                                    \
 111         FAKE_MCOUNT(13*4(%esp)) ;                                       \
 112         maybe_extra_ipending ;                                          \
 113         MASK_IRQ(icu, irq_num) ;                                        \
 114         enable_icus ;                                                   \
 115         movl    PCPU(curthread),%ebx ;                                  \
 116         pushl   $0 ;                    /* DUMMY CPL FOR DORETI */      \
 117         cmpl    $TDPRI_CRIT,TD_PRI(%ebx) ;                              \
 118         jl      2f ;                                                    \
 119 1: ;                                                                    \
 120         /* set pending bit and return, leave interrupt masked */        \
 121         orl     $IRQ_LBIT(irq_num),PCPU(fpending) ;                     \
 122         orl     $RQF_INTPEND, PCPU(reqflags) ;                          \
 123         jmp     5f ;                                                    \
 124 2: ;                                                                    \
 125         /* clear pending bit, run handler */                            \
 126         incl    PCPU(intr_nesting_level) ;                              \
 127         addl    $TDPRI_CRIT,TD_PRI(%ebx) ;                              \
 128         andl    $~IRQ_LBIT(irq_num),PCPU(fpending) ;                    \
 129         pushl   intr_unit + (irq_num) * 4 ;                             \
 130         call    *intr_handler + (irq_num) * 4 ;                         \
 131         addl    $4,%esp ;                                               \
 132         subl    $TDPRI_CRIT,TD_PRI(%ebx) ;                              \
 133         decl    PCPU(intr_nesting_level) ;                              \
 134         incl    PCPU(cnt)+V_INTR ; /* book-keeping YYY make per-cpu */  \
 135         movl    intr_countp + (irq_num) * 4,%eax ;                      \
 136         incl    (%eax) ;                                                \
 137         UNMASK_IRQ(icu, irq_num) ;                                      \
 138 5: ;                                                                    \
 139         MEXITCOUNT ;                                                    \
 140         jmp     doreti ;                                                \
 141
 142 /*
 143  * Restart fast interrupt held up by critical section or cpl.
 144  *
 145  *      - Push a dummy trap frame as required by doreti.
 146  *      - The interrupt source is already masked.
 147  *      - Clear the fpending bit
 148  *      - Run the handler
 149  *      - Unmask the interrupt
 150  *      - Pop the dummy frame and do a normal return
 151  *
 152  *      YYY can cache gd base pointer instead of using hidden %fs
 153  *      prefixes.
 154  */
 155 #define FAST_UNPEND(irq_num, vec_name, icu)                             \
 156         .text ;                                                         \
 157         SUPERALIGN_TEXT ;                                               \
 158 IDTVEC(vec_name) ;                                                      \
 159         pushl   %ebp ;                                                  \
 160         movl    %esp,%ebp ;                                             \
 161         PUSH_DUMMY ;                                                    \
 162         pushl   intr_unit + (irq_num) * 4 ;                             \
 163         call    *intr_handler + (irq_num) * 4 ;                         \
 164         addl    $4, %esp ;                                              \
 165         incl    PCPU(cnt)+V_INTR ;                                      \
 166         movl    intr_countp + (irq_num) * 4, %eax ;                     \
 167         incl    (%eax) ;                                                \
 168         UNMASK_IRQ(icu, irq_num) ;                                      \
 169         POP_DUMMY ;                                                     \
 170         popl %ebp ;                                                     \
 171         ret ;                                                           \
 172
 173 /*
 174  * Slow interrupt call handlers run in the following sequence:
 175  *
 176  *      - Push the trap frame required by doreti.
 177  *      - Mask the interrupt and reenable its source.
 178  *      - If we cannot take the interrupt set its ipending bit and
 179  *        doreti.  In addition to checking for a critical section
 180  *        and cpl mask we also check to see if the thread is still
 181  *        running.
 182  *      - If we can take the interrupt clear its ipending bit
 183  *        and schedule its thread.  Leave interrupts masked and doreti.
 184  *
 185  *      sched_ithd() is called with interrupts enabled and outside of a
 186  *      critical section (so it can preempt us).
 187  *
 188  *      YYY sched_ithd may preempt us synchronously (fix interrupt stacking)
 189  *
 190  *      Note that intr_nesting_level is not bumped during sched_ithd because
 191  *      blocking allocations are allowed in the preemption case.
 192  *
 193  *      YYY can cache gd base pointer instead of using hidden %fs
 194  *      prefixes.
 195  */
 196
 197 #define INTR(irq_num, vec_name, icu, enable_icus, reg, maybe_extra_ipending) \
 198         .text ;                                                         \
 199         SUPERALIGN_TEXT ;                                               \
 200 IDTVEC(vec_name) ;                                                      \
 201         PUSH_FRAME ;                                                    \
 202         FAKE_MCOUNT(13*4(%esp)) ;                                       \
 203         maybe_extra_ipending ;                                          \
 204         MASK_IRQ(icu, irq_num) ;                                        \
 205         enable_icus ;                                                   \
 206         movl    PCPU(curthread),%ebx ;                                  \
 207         pushl   $0 ;                    /* DUMMY CPL FOR DORETI */      \
 208         cmpl    $TDPRI_CRIT,TD_PRI(%ebx) ;                              \
 209         jl      2f ;                                                    \
 210 1: ;                                                                    \
 211         /* set the pending bit and return, leave interrupt masked */    \
 212         orl     $IRQ_LBIT(irq_num), PCPU(ipending) ;                    \
 213         orl     $RQF_INTPEND, PCPU(reqflags) ;                          \
 214         jmp     5f ;                                                    \
 215 2: ;                                                                    \
 216         /* set running bit, clear pending bit, run handler */           \
 217         andl    $~IRQ_LBIT(irq_num), PCPU(ipending) ;                   \
 218         sti ;                                                           \
 219         pushl   $irq_num ;                                              \
 220         call    sched_ithd ;                                            \
 221         addl    $4,%esp ;                                               \
 222         incl    PCPU(cnt)+V_INTR ; /* book-keeping YYY make per-cpu */  \
 223         movl    intr_countp + (irq_num) * 4,%eax ;                      \
 224         incl    (%eax) ;                                                \
 225 5: ;                                                                    \
 226         MEXITCOUNT ;                                                    \
 227         jmp     doreti ;                                                \
 228
 229 /*
 230  * Unmask a slow interrupt.  This function is used by interrupt threads
 231  * after they have descheduled themselves to reenable interrupts and
 232  * possibly cause a reschedule to occur.
 233  */
 234
 235 #define INTR_UNMASK(irq_num, vec_name, icu)                             \
 236         .text ;                                                         \
 237         SUPERALIGN_TEXT ;                                               \
 238 IDTVEC(vec_name) ;                                                      \
 239         pushl %ebp ;     /* frame for ddb backtrace */                  \
 240         movl    %esp, %ebp ;                                            \
 241         UNMASK_IRQ(icu, irq_num) ;                                      \
 242         popl %ebp ;                                                     \
 243         ret ;                                                           \
 244
 245 MCOUNT_LABEL(bintr)
 246         FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1,)
 247         FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1,)
 248         FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1,)
 249         FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1,)
 250         FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1,)
 251         FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1,)
 252         FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1,)
 253         FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1,)
 254         FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2,)
 255         FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2,)
 256         FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2,)
 257         FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2,)
 258         FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2,)
 259         FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2,)
 260         FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2,)
 261         FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2,)
 262
 263         INTR(0,intr0, IO_ICU1, ENABLE_ICU1, al,)
 264         INTR(1,intr1, IO_ICU1, ENABLE_ICU1, al,)
 265         INTR(2,intr2, IO_ICU1, ENABLE_ICU1, al,)
 266         INTR(3,intr3, IO_ICU1, ENABLE_ICU1, al,)
 267         INTR(4,intr4, IO_ICU1, ENABLE_ICU1, al,)
 268         INTR(5,intr5, IO_ICU1, ENABLE_ICU1, al,)
 269         INTR(6,intr6, IO_ICU1, ENABLE_ICU1, al,)
 270         INTR(7,intr7, IO_ICU1, ENABLE_ICU1, al,)
 271         INTR(8,intr8, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 272         INTR(9,intr9, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 273         INTR(10,intr10, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 274         INTR(11,intr11, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 275         INTR(12,intr12, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 276         INTR(13,intr13, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 277         INTR(14,intr14, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 278         INTR(15,intr15, IO_ICU2, ENABLE_ICU1_AND_2, ah,)
 279
 280         FAST_UNPEND(0,fastunpend0, IO_ICU1)
 281         FAST_UNPEND(1,fastunpend1, IO_ICU1)
 282         FAST_UNPEND(2,fastunpend2, IO_ICU1)
 283         FAST_UNPEND(3,fastunpend3, IO_ICU1)
 284         FAST_UNPEND(4,fastunpend4, IO_ICU1)
 285         FAST_UNPEND(5,fastunpend5, IO_ICU1)
 286         FAST_UNPEND(6,fastunpend6, IO_ICU1)
 287         FAST_UNPEND(7,fastunpend7, IO_ICU1)
 288         FAST_UNPEND(8,fastunpend8, IO_ICU2)
 289         FAST_UNPEND(9,fastunpend9, IO_ICU2)
 290         FAST_UNPEND(10,fastunpend10, IO_ICU2)
 291         FAST_UNPEND(11,fastunpend11, IO_ICU2)
 292         FAST_UNPEND(12,fastunpend12, IO_ICU2)
 293         FAST_UNPEND(13,fastunpend13, IO_ICU2)
 294         FAST_UNPEND(14,fastunpend14, IO_ICU2)
 295         FAST_UNPEND(15,fastunpend15, IO_ICU2)
 296 MCOUNT_LABEL(eintr)
 297
 298         .data
 299
 300         .text