4 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
21 * This code is derived from software contributed to The DragonFly Project
22 * by Matthew Dillon <dillon@backplane.com>
24 * Redistribution and use in source and binary forms, with or without
25 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in
32 * the documentation and/or other materials provided with the
34 * 3. Neither the name of The DragonFly Project nor the names of its
35 * contributors may be used to endorse or promote products derived
36 * from this software without specific, prior written permission.
38 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
39 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
40 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
41 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
42 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
43 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
44 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
46 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
47 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
48 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
51 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
56 void ahci_port_interrupt_enable(struct ahci_port *ap);
58 int ahci_load_prdt(struct ahci_ccb *);
59 void ahci_unload_prdt(struct ahci_ccb *);
60 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
61 int nsegs, int error);
62 void ahci_start(struct ahci_ccb *);
63 int ahci_port_softreset(struct ahci_port *ap);
64 int ahci_port_hardreset(struct ahci_port *ap, int hard);
65 void ahci_port_hardstop(struct ahci_port *ap);
67 static void ahci_ata_cmd_timeout_unserialized(void *);
68 void ahci_check_active_timeouts(struct ahci_port *ap);
70 void ahci_beg_exclusive_access(struct ahci_port *ap, struct ata_port *at);
71 void ahci_end_exclusive_access(struct ahci_port *ap, struct ata_port *at);
72 void ahci_issue_pending_commands(struct ahci_port *ap, struct ahci_ccb *ccb);
73 void ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t mask);
75 int ahci_port_read_ncq_error(struct ahci_port *, int);
77 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
78 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
79 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
81 static void ahci_dummy_done(struct ata_xfer *xa);
82 static void ahci_empty_done(struct ahci_ccb *ccb);
83 static void ahci_ata_cmd_done(struct ahci_ccb *ccb);
84 static u_int32_t ahci_pactive(struct ahci_port *ap);
87 * Initialize the global AHCI hardware. This code does not set up any of
91 ahci_init(struct ahci_softc *sc)
93 u_int32_t cap, pi, pleft;
97 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
98 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
101 * save BIOS initialised parameters, enable staggered spin up
103 cap = ahci_read(sc, AHCI_REG_CAP);
104 cap &= AHCI_REG_CAP_SMPS;
105 cap |= AHCI_REG_CAP_SSS;
106 pi = ahci_read(sc, AHCI_REG_PI);
109 * Unconditionally reset the controller, do not conditionalize on
110 * trying to figure it if it was previously active or not.
112 * NOTE: On AE before HR. The AHCI-1.1 spec has a note in section
113 * 5.2.2.1 regarding this. HR should be set to 1 only after
114 * AE is set to 1. The reset sequence will clear HR when
115 * it completes, and will also clear AE if SAM is 0. AE must
116 * then be set again. When SAM is 1 the AE bit typically reads
117 * as 1 (and is read-only).
119 * NOTE: Avoid PCI[e] transaction burst by issuing dummy reads,
120 * otherwise the writes will only be separated by a few
125 * If you have a port multiplier and it does not have a device
126 * in target 0, and it probes normally, but a later operation
127 * mis-probes a target behind that PM, it is possible for the
128 * port to brick such that only (a) a power cycle of the host
129 * or (b) placing a device in target 0 will fix the problem.
130 * Power cycling the PM has no effect (it works fine on another
131 * host port). This issue is unrelated to CLO.
134 * Wait for any prior reset sequence to complete
136 if (ahci_wait_ne(sc, AHCI_REG_GHC,
137 AHCI_REG_GHC_HR, AHCI_REG_GHC_HR) != 0) {
138 device_printf(sc->sc_dev, "Controller is stuck in reset\n");
141 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
143 ahci_read(sc, AHCI_REG_GHC); /* flush */
144 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE | AHCI_REG_GHC_HR);
146 ahci_read(sc, AHCI_REG_GHC); /* flush */
147 if (ahci_wait_ne(sc, AHCI_REG_GHC,
148 AHCI_REG_GHC_HR, AHCI_REG_GHC_HR) != 0) {
149 device_printf(sc->sc_dev, "unable to reset controller\n");
152 if (ahci_read(sc, AHCI_REG_GHC) & AHCI_REG_GHC_AE) {
153 device_printf(sc->sc_dev, "AE did not auto-clear!\n");
154 ahci_write(sc, AHCI_REG_GHC, 0);
159 * Enable ahci (global interrupts disabled)
161 * Restore saved parameters. Avoid pci transaction burst write
162 * by issuing dummy reads.
165 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
168 ahci_read(sc, AHCI_REG_GHC); /* flush */
169 ahci_write(sc, AHCI_REG_CAP, cap);
170 ahci_write(sc, AHCI_REG_PI, pi);
171 ahci_read(sc, AHCI_REG_GHC); /* flush */
174 * Intel hocus pocus in case the BIOS has not set the chip up
175 * properly for AHCI operation.
177 if (pci_get_vendor(sc->sc_dev) == PCI_VENDOR_INTEL) {
178 if ((pci_read_config(sc->sc_dev, 0x92, 2) & 0x0F) != 0x0F)
179 device_printf(sc->sc_dev, "Intel hocus pocus\n");
180 pci_write_config(sc->sc_dev, 0x92,
181 pci_read_config(sc->sc_dev, 0x92, 2) | 0x0F, 2);
185 * This is a hack that currently does not appear to have
186 * a significant effect, but I noticed the port registers
187 * do not appear to be completely cleared after the host
188 * controller is reset.
190 * Use a temporary ap structure so we can call ahci_pwrite().
192 * We must be sure to stop the port
194 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
197 for (i = 0; i < AHCI_MAX_PORTS; ++i) {
200 if ((pi & (1 << i)) == 0)
202 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
203 AHCI_PORT_REGION(i), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
204 device_printf(sc->sc_dev, "can't map port\n");
208 * NOTE! Setting AHCI_PREG_SCTL_DET_DISABLE on AHCI1.0 or
209 * AHCI1.1 can brick the chipset. Not only brick it,
210 * but also crash the PC. The bit seems unreliable
211 * on AHCI1.2 as well.
213 ahci_port_stop(ap, 1);
214 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
215 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
216 ahci_pwrite(ap, AHCI_PREG_IE, 0);
217 ahci_write(ap->ap_sc, AHCI_REG_IS, 1 << i);
218 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
219 ahci_pwrite(ap, AHCI_PREG_IS, -1);
220 sc->sc_portmask |= (1 << i);
230 * Allocate and initialize an AHCI port.
233 ahci_port_alloc(struct ahci_softc *sc, u_int port)
235 struct ahci_port *ap;
237 struct ahci_ccb *ccb;
241 struct ahci_cmd_hdr *hdr;
242 struct ahci_cmd_table *table;
247 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
248 ap->ap_err_scratch = kmalloc(512, M_DEVBUF, M_WAITOK | M_ZERO);
250 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
251 device_get_name(sc->sc_dev),
252 device_get_unit(sc->sc_dev),
254 sc->sc_ports[port] = ap;
257 * Allocate enough so we never have to reallocate, it makes
260 * ap_pmcount will be reduced by the scan if we encounter the
261 * port multiplier port prior to target 15.
263 * kmalloc power-of-2 allocations are guaranteed not to cross
264 * a page boundary. Make sure the identify sub-structure in the
265 * at structure does not cross a page boundary, just in case the
266 * part is AHCI-1.1 and can't handle multiple DRQ blocks.
268 if (ap->ap_ata[0] == NULL) {
271 for (pw2 = 1; pw2 < sizeof(*at); pw2 <<= 1)
273 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
274 at = kmalloc(pw2, M_DEVBUF, M_INTWAIT | M_ZERO);
276 at->at_ahci_port = ap;
278 at->at_probe = ATA_PROBE_NEED_INIT;
279 at->at_features |= ATA_PORT_F_RESCAN;
280 ksnprintf(at->at_name, sizeof(at->at_name),
281 "%s.%d", ap->ap_name, i);
284 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
285 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
286 device_printf(sc->sc_dev,
287 "unable to create register window for port %d\n",
294 ap->ap_probe = ATA_PROBE_NEED_INIT;
295 ap->link_pwr_mgmt = AHCI_LINK_PWR_MGMT_NONE;
296 ap->sysctl_tree = NULL;
297 TAILQ_INIT(&ap->ap_ccb_free);
298 TAILQ_INIT(&ap->ap_ccb_pending);
299 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
301 /* Disable port interrupts */
302 ahci_pwrite(ap, AHCI_PREG_IE, 0);
303 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
306 * Sec 10.1.2 - deinitialise port if it is already running
308 cmd = ahci_pread(ap, AHCI_PREG_CMD);
309 kprintf("%s: Caps %b\n", PORTNAME(ap), cmd, AHCI_PFMT_CMD);
311 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
312 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
313 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
316 r = ahci_port_stop(ap, 1);
318 device_printf(sc->sc_dev,
319 "unable to disable %s, ignoring port %d\n",
320 ((r == 2) ? "CR" : "FR"), port);
325 /* Write DET to zero */
326 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
330 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
331 if (ap->ap_dmamem_rfis == NULL) {
332 kprintf("%s: NORFIS\n", PORTNAME(ap));
336 /* Setup RFIS base address */
337 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
338 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
339 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
340 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
342 /* Clear SERR before starting FIS reception or ST or anything */
344 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
346 /* Enable FIS reception and activate port. */
347 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
348 cmd &= ~(AHCI_PREG_CMD_CLO | AHCI_PREG_CMD_PMA);
349 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
350 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
352 /* Check whether port activated. Skip it if not. */
353 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
354 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
355 kprintf("%s: NOT-ACTIVATED\n", PORTNAME(ap));
360 /* Allocate a CCB for each command slot */
361 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
363 if (ap->ap_ccbs == NULL) {
364 device_printf(sc->sc_dev,
365 "unable to allocate command list for port %d\n",
370 /* Command List Structures and Command Tables */
371 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
372 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
373 if (ap->ap_dmamem_cmd_table == NULL ||
374 ap->ap_dmamem_cmd_list == NULL) {
376 device_printf(sc->sc_dev,
377 "unable to allocate DMA memory for port %d\n",
382 /* Setup command list base address */
383 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
384 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
385 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
387 /* Split CCB allocation into CCBs and assign to command header/table */
388 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
389 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
390 for (i = 0; i < sc->sc_ncmds; i++) {
391 ccb = &ap->ap_ccbs[i];
393 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
396 device_printf(sc->sc_dev,
397 "unable to create dmamap for port %d "
398 "ccb %d\n", port, i);
402 callout_init_mp(&ccb->ccb_timeout);
405 ccb->ccb_cmd_hdr = &hdr[i];
406 ccb->ccb_cmd_table = &table[i];
407 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
408 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
409 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
410 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
413 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
414 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
417 ccb->ccb_xa.state = ATA_S_COMPLETE;
420 * CCB[1] is the error CCB and is not get or put. It is
421 * also used for probing. Numerous HBAs only load the
422 * signature from CCB[1] so it MUST be used for the second
426 ap->ap_err_ccb = ccb;
432 * Wait for ICC change to complete
434 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
437 * Calculate the interrupt mask
439 data = AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
440 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
441 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
442 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
443 AHCI_PREG_IE_DHRE | AHCI_PREG_IE_SDBE;
444 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
445 data |= AHCI_PREG_IE_IPME;
447 if (sc->sc_ccc_ports & (1 << port)
448 data &= ~(AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE);
450 ap->ap_intmask = data;
453 * Start the port helper thread. The helper thread will call
454 * ahci_port_init() so the ports can all be started in parallel.
455 * A failure by ahci_port_init() does not deallocate the port
456 * since we still want hot-plug events.
458 ahci_os_start_port(ap);
461 ahci_port_free(sc, port);
466 * [re]initialize an idle port. No CCBs should be active. (from port thread)
468 * This function is called during the initial port allocation sequence
469 * and is also called on hot-plug insertion. We take no chances and
470 * use a portreset instead of a softreset.
472 * This function is the only way to move a failed port back to active
475 * Returns 0 if a device is successfully detected.
478 ahci_port_init(struct ahci_port *ap)
483 * Register [re]initialization
485 * Flush the TFD and SERR and make sure the port is stopped before
486 * enabling its interrupt. We no longer cycle the port start as
487 * the port should not be started unless a device is present.
489 * XXX should we enable FIS reception? (FRE)?
491 ahci_pwrite(ap, AHCI_PREG_IE, 0);
492 ahci_port_stop(ap, 0);
493 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
494 ahci_pwrite(ap, AHCI_PREG_SNTF, -1);
496 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
499 * If we are being harsh try to kill the port completely. Normally
500 * we would want to hold on to some of the state the BIOS may have
501 * set, such as SUD (spin up device).
503 * AP_F_HARSH_REINIT is cleared in the hard reset state
505 if (ap->ap_flags & AP_F_HARSH_REINIT) {
506 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
507 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
511 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
512 cmd &= ~(AHCI_PREG_CMD_CLO | AHCI_PREG_CMD_PMA);
513 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD |
515 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
516 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
517 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
518 kprintf("%s: Warning: FRE did not come up during "
519 "harsh reinitialization\n",
526 * Clear any pending garbage and re-enable the interrupt before
527 * going to the next stage.
529 ap->ap_probe = ATA_PROBE_NEED_HARD_RESET;
532 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
533 ahci_pwrite(ap, AHCI_PREG_SNTF, -1);
535 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
536 ahci_pwrite(ap, AHCI_PREG_IS, -1);
538 ahci_port_interrupt_enable(ap);
544 * Enable or re-enable interrupts on a port.
546 * This routine is called from the port initialization code or from the
547 * helper thread as the real interrupt may be forced to turn off certain
551 ahci_port_interrupt_enable(struct ahci_port *ap)
553 ahci_pwrite(ap, AHCI_PREG_IE, ap->ap_intmask);
557 * Manage the agressive link power management capability.
560 ahci_port_link_pwr_mgmt(struct ahci_port *ap, int link_pwr_mgmt)
564 if (link_pwr_mgmt == ap->link_pwr_mgmt)
567 if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SALP) == 0) {
568 kprintf("%s: link power management not supported.\n",
573 ahci_os_lock_port(ap);
575 if (link_pwr_mgmt == AHCI_LINK_PWR_MGMT_AGGR &&
576 (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSC)) {
577 kprintf("%s: enabling aggressive link power management.\n",
580 ap->link_pwr_mgmt = link_pwr_mgmt;
582 ap->ap_intmask &= ~AHCI_PREG_IE_PRCE;
583 ahci_port_interrupt_enable(ap);
585 sctl = ahci_pread(ap, AHCI_PREG_SCTL);
586 sctl &= ~(AHCI_PREG_SCTL_IPM_DISABLED);
587 ahci_pwrite(ap, AHCI_PREG_SCTL, sctl);
590 * Enable device initiated link power management for
591 * directly attached devices that support it.
593 if (ap->ap_type != ATA_PORT_T_PM &&
594 ap->ap_ata[0]->at_identify.satafsup & (1 << 3)) {
595 if (ahci_set_feature(ap, NULL, ATA_SATAFT_DEVIPS, 1))
596 kprintf("%s: Could not enable device initiated "
597 "link power management.\n",
601 cmd = ahci_pread(ap, AHCI_PREG_CMD);
602 cmd |= AHCI_PREG_CMD_ASP;
603 cmd |= AHCI_PREG_CMD_ALPE;
604 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
606 } else if (link_pwr_mgmt == AHCI_LINK_PWR_MGMT_MEDIUM &&
607 (ap->ap_sc->sc_cap & AHCI_REG_CAP_PSC)) {
608 kprintf("%s: enabling medium link power management.\n",
611 ap->link_pwr_mgmt = link_pwr_mgmt;
613 ap->ap_intmask &= ~AHCI_PREG_IE_PRCE;
614 ahci_port_interrupt_enable(ap);
616 sctl = ahci_pread(ap, AHCI_PREG_SCTL);
617 sctl |= AHCI_PREG_SCTL_IPM_DISABLED;
618 sctl &= ~AHCI_PREG_SCTL_IPM_NOPARTIAL;
619 ahci_pwrite(ap, AHCI_PREG_SCTL, sctl);
621 cmd = ahci_pread(ap, AHCI_PREG_CMD);
622 cmd &= ~AHCI_PREG_CMD_ASP;
623 cmd |= AHCI_PREG_CMD_ALPE;
624 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
626 } else if (link_pwr_mgmt == AHCI_LINK_PWR_MGMT_NONE) {
627 kprintf("%s: disabling link power management.\n",
630 /* Disable device initiated link power management */
631 if (ap->ap_type != ATA_PORT_T_PM &&
632 ap->ap_ata[0]->at_identify.satafsup & (1 << 3))
633 ahci_set_feature(ap, NULL, ATA_SATAFT_DEVIPS, 0);
635 cmd = ahci_pread(ap, AHCI_PREG_CMD);
636 cmd &= ~(AHCI_PREG_CMD_ALPE | AHCI_PREG_CMD_ASP);
637 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
639 sctl = ahci_pread(ap, AHCI_PREG_SCTL);
640 sctl |= AHCI_PREG_SCTL_IPM_DISABLED;
641 ahci_pwrite(ap, AHCI_PREG_SCTL, sctl);
643 /* let the drive come back to avoid PRCS interrupts later */
644 ahci_os_unlock_port(ap);
646 ahci_os_lock_port(ap);
648 ahci_pwrite(ap, AHCI_PREG_SERR,
649 AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_W);
650 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PRCS);
652 ap->ap_intmask |= AHCI_PREG_IE_PRCE;
653 ahci_port_interrupt_enable(ap);
655 ap->link_pwr_mgmt = link_pwr_mgmt;
657 kprintf("%s: unsupported link power management state %d.\n",
658 PORTNAME(ap), link_pwr_mgmt);
661 ahci_os_unlock_port(ap);
665 * Return current link power state.
668 ahci_port_link_pwr_state(struct ahci_port *ap)
672 r = ahci_pread(ap, AHCI_PREG_SSTS);
673 switch (r & SATA_PM_SSTS_IPM) {
674 case SATA_PM_SSTS_IPM_ACTIVE:
676 case SATA_PM_SSTS_IPM_PARTIAL:
678 case SATA_PM_SSTS_IPM_SLUMBER:
686 * Run the port / target state machine from a main context.
688 * The state machine for the port is always run.
690 * If atx is non-NULL run the state machine for a particular target.
691 * If atx is NULL run the state machine for all targets.
694 ahci_port_state_machine(struct ahci_port *ap, int initial)
703 * State machine for port. Note that CAM is not yet associated
704 * during the initial parallel probe and the port's probe state
705 * will not get past ATA_PROBE_NEED_IDENT.
708 if (initial == 0 && ap->ap_probe <= ATA_PROBE_NEED_HARD_RESET) {
709 kprintf("%s: Waiting 10 seconds on insertion\n",
711 ahci_os_sleep(10000);
714 if (ap->ap_probe == ATA_PROBE_NEED_INIT)
716 if (ap->ap_probe == ATA_PROBE_NEED_HARD_RESET)
717 ahci_port_reset(ap, NULL, 1);
718 if (ap->ap_probe == ATA_PROBE_NEED_SOFT_RESET)
719 ahci_port_reset(ap, NULL, 0);
720 if (ap->ap_probe == ATA_PROBE_NEED_IDENT)
721 ahci_cam_probe(ap, NULL);
723 if (ap->ap_type != ATA_PORT_T_PM) {
724 if (ap->ap_probe == ATA_PROBE_FAILED) {
725 ahci_cam_changed(ap, NULL, 0);
726 } else if (ap->ap_probe >= ATA_PROBE_NEED_IDENT) {
727 ahci_cam_changed(ap, NULL, 1);
733 * Port Multiplier state machine.
735 * Get a mask of changed targets and combine with any runnable
736 * states already present.
738 for (loop = 0; ;++loop) {
739 if (ahci_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) {
740 kprintf("%s: PM unable to read hot-plug bitmap\n",
746 * Do at least one loop, then stop if no more state changes
747 * have occured. The PM might not generate a new
748 * notification until we clear the entire bitmap.
750 if (loop && data == 0)
754 * New devices showing up in the bitmap require some spin-up
755 * time before we start probing them. Reset didsleep. The
756 * first new device we detect will sleep before probing.
758 * This only applies to devices whos change bit is set in
759 * the data, and does not apply to the initial boot-time
764 for (target = 0; target < ap->ap_pmcount; ++target) {
765 at = ap->ap_ata[target];
768 * Check the target state for targets behind the PM
769 * which have changed state. This will adjust
770 * at_probe and set ATA_PORT_F_RESCAN
772 * We want to wait at least 10 seconds before probing
773 * a newly inserted device. If the check status
774 * indicates a device is present and in need of a
775 * hard reset, we make sure we have slept before
778 * We also need to wait at least 1 second for the
779 * PHY state to change after insertion, if we
780 * haven't already waited the 10 seconds.
782 * NOTE: When pm_check_good finds a good port it
783 * typically starts us in probe state
784 * NEED_HARD_RESET rather than INIT.
786 if (data & (1 << target)) {
787 if (initial == 0 && didsleep == 0)
789 ahci_pm_check_good(ap, target);
790 if (initial == 0 && didsleep == 0 &&
791 at->at_probe <= ATA_PROBE_NEED_HARD_RESET
794 kprintf("%s: Waiting 10 seconds on insertion\n", PORTNAME(ap));
795 ahci_os_sleep(10000);
800 * Report hot-plug events before the probe state
801 * really gets hot. Only actual events are reported
802 * here to reduce spew.
804 if (data & (1 << target)) {
805 kprintf("%s: HOTPLUG (PM) - ", ATANAME(ap, at));
806 switch(at->at_probe) {
807 case ATA_PROBE_NEED_INIT:
808 case ATA_PROBE_NEED_HARD_RESET:
809 kprintf("Device inserted\n");
811 case ATA_PROBE_FAILED:
812 kprintf("Device removed\n");
815 kprintf("Device probe in progress\n");
821 * Run through the state machine as necessary if
822 * the port is not marked failed.
824 * The state machine may stop at NEED_IDENT if
825 * CAM is not yet attached.
827 * Acquire exclusive access to the port while we
828 * are doing this. This prevents command-completion
829 * from queueing commands for non-polled targets
830 * inbetween our probe steps. We need to do this
831 * because the reset probes can generate severe PHY
832 * and protocol errors and soft-brick the port.
834 if (at->at_probe != ATA_PROBE_FAILED &&
835 at->at_probe != ATA_PROBE_GOOD) {
836 ahci_beg_exclusive_access(ap, at);
837 if (at->at_probe == ATA_PROBE_NEED_INIT)
838 ahci_pm_port_init(ap, at);
839 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET)
840 ahci_port_reset(ap, at, 1);
841 if (at->at_probe == ATA_PROBE_NEED_SOFT_RESET)
842 ahci_port_reset(ap, at, 0);
843 if (at->at_probe == ATA_PROBE_NEED_IDENT)
844 ahci_cam_probe(ap, at);
845 ahci_end_exclusive_access(ap, at);
849 * Add or remove from CAM
851 if (at->at_features & ATA_PORT_F_RESCAN) {
852 at->at_features &= ~ATA_PORT_F_RESCAN;
853 if (at->at_probe == ATA_PROBE_FAILED) {
854 ahci_cam_changed(ap, at, 0);
855 } else if (at->at_probe >= ATA_PROBE_NEED_IDENT) {
856 ahci_cam_changed(ap, at, 1);
859 data &= ~(1 << target);
862 kprintf("%s: WARNING (PM): extra bits set in "
863 "EINFO: %08x\n", PORTNAME(ap), data);
864 while (target < AHCI_MAX_PMPORTS) {
865 ahci_pm_check_good(ap, target);
874 * De-initialize and detach a port.
877 ahci_port_free(struct ahci_softc *sc, u_int port)
879 struct ahci_port *ap = sc->sc_ports[port];
880 struct ahci_ccb *ccb;
884 * Ensure port is disabled and its interrupts are all flushed.
887 ahci_port_stop(ap, 1);
888 ahci_os_stop_port(ap);
889 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
890 ahci_pwrite(ap, AHCI_PREG_IE, 0);
891 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
892 ahci_write(sc, AHCI_REG_IS, 1 << port);
896 while ((ccb = ahci_get_ccb(ap)) != NULL) {
897 if (ccb->ccb_dmamap) {
898 bus_dmamap_destroy(sc->sc_tag_data,
900 ccb->ccb_dmamap = NULL;
903 if ((ccb = ap->ap_err_ccb) != NULL) {
904 if (ccb->ccb_dmamap) {
905 bus_dmamap_destroy(sc->sc_tag_data,
907 ccb->ccb_dmamap = NULL;
909 ap->ap_err_ccb = NULL;
911 kfree(ap->ap_ccbs, M_DEVBUF);
915 if (ap->ap_dmamem_cmd_list) {
916 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
917 ap->ap_dmamem_cmd_list = NULL;
919 if (ap->ap_dmamem_rfis) {
920 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
921 ap->ap_dmamem_rfis = NULL;
923 if (ap->ap_dmamem_cmd_table) {
924 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
925 ap->ap_dmamem_cmd_table = NULL;
928 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
930 kfree(ap->ap_ata[i], M_DEVBUF);
931 ap->ap_ata[i] = NULL;
935 if (ap->ap_err_scratch) {
936 kfree(ap->ap_err_scratch, M_DEVBUF);
937 ap->ap_err_scratch = NULL;
940 /* bus_space(9) says we dont free the subregions handle */
943 sc->sc_ports[port] = NULL;
948 ahci_pactive(struct ahci_port *ap)
952 mask = ahci_pread(ap, AHCI_PREG_CI);
953 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SNCQ)
954 mask |= ahci_pread(ap, AHCI_PREG_SACT);
959 * Start high-level command processing on the port
962 ahci_port_start(struct ahci_port *ap)
964 u_int32_t r, s, is, tfd;
967 * FRE must be turned on before ST. Wait for FR to go active
968 * before turning on ST. The spec doesn't seem to think this
969 * is necessary but waiting here avoids an on-off race in the
970 * ahci_port_stop() code.
972 r = ahci_pread(ap, AHCI_PREG_CMD);
973 if ((r & AHCI_PREG_CMD_FRE) == 0) {
974 r |= AHCI_PREG_CMD_FRE;
975 ahci_pwrite(ap, AHCI_PREG_CMD, r);
977 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0) {
978 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
979 kprintf("%s: Cannot start FIS reception\n",
988 * Turn on ST, wait for CR to come up.
990 r |= AHCI_PREG_CMD_ST;
991 ahci_pwrite(ap, AHCI_PREG_CMD, r);
992 if (ahci_pwait_set_to(ap, 2000, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
993 s = ahci_pread(ap, AHCI_PREG_SERR);
994 is = ahci_pread(ap, AHCI_PREG_IS);
995 tfd = ahci_pread(ap, AHCI_PREG_TFD);
996 kprintf("%s: Cannot start command DMA\n"
1001 r, AHCI_PFMT_CMD, s, AHCI_PFMT_SERR,
1003 tfd, AHCI_PFMT_TFD_STS);
1007 #ifdef AHCI_COALESCE
1009 * (Re-)enable coalescing on the port.
1011 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
1012 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
1013 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
1014 ap->ap_sc->sc_ccc_ports_cur);
1022 * Stop high-level command processing on a port
1024 * WARNING! If the port is stopped while CR is still active our saved
1025 * CI/SACT will race any commands completed by the command
1026 * processor prior to being able to stop. Thus we never call
1027 * this function unless we intend to dispose of any remaining
1028 * active commands. In particular, this complicates the timeout
1032 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
1036 #ifdef AHCI_COALESCE
1038 * Disable coalescing on the port while it is stopped.
1040 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
1041 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
1042 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
1043 ap->ap_sc->sc_ccc_ports_cur);
1048 * Turn off ST, then wait for CR to go off.
1050 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1051 r &= ~AHCI_PREG_CMD_ST;
1052 ahci_pwrite(ap, AHCI_PREG_CMD, r);
1054 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
1055 kprintf("%s: Port bricked, unable to stop (ST)\n",
1062 * Turn off FRE, then wait for FR to go off. FRE cannot
1063 * be turned off until CR transitions to 0.
1065 if ((r & AHCI_PREG_CMD_FR) == 0) {
1066 kprintf("%s: FR stopped, clear FRE for next start\n",
1072 r &= ~AHCI_PREG_CMD_FRE;
1073 ahci_pwrite(ap, AHCI_PREG_CMD, r);
1074 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
1075 kprintf("%s: Port bricked, unable to stop (FRE)\n",
1085 * AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ}
1088 ahci_port_clo(struct ahci_port *ap)
1090 struct ahci_softc *sc = ap->ap_sc;
1093 /* Only attempt CLO if supported by controller */
1094 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
1098 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1099 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
1101 /* Wait for completion */
1102 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
1103 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
1113 * If hard is 0 perform a softreset of the port.
1114 * If hard is 1 perform a hard reset of the port.
1116 * If at is non-NULL an indirect port via a port-multiplier is being
1117 * reset, otherwise a direct port is being reset.
1119 * NOTE: Indirect ports can only be soft-reset.
1122 ahci_port_reset(struct ahci_port *ap, struct ata_port *at, int hard)
1128 rc = ahci_pm_hardreset(ap, at->at_target, hard);
1130 rc = ahci_port_hardreset(ap, hard);
1133 rc = ahci_pm_softreset(ap, at->at_target);
1135 rc = ahci_port_softreset(ap);
1141 * AHCI soft reset, Section 10.4.1
1143 * (at) will be NULL when soft-resetting a directly-attached device, and
1144 * non-NULL when soft-resetting a device through a port multiplier.
1146 * This function keeps port communications intact and attempts to generate
1147 * a reset to the connected device using device commands.
1150 ahci_port_softreset(struct ahci_port *ap)
1152 struct ahci_ccb *ccb = NULL;
1153 struct ahci_cmd_hdr *cmd_slot;
1160 kprintf("%s: START SOFTRESET %b\n", PORTNAME(ap),
1161 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD);
1164 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
1167 ap->ap_flags |= AP_F_IN_RESET;
1168 ap->ap_state = AP_S_NORMAL;
1171 * Remember port state in cmd (main to restore start/stop)
1175 if (ahci_port_stop(ap, 0)) {
1176 kprintf("%s: failed to stop port, cannot softreset\n",
1182 * Request CLO if device appears hung.
1184 if (ahci_pread(ap, AHCI_PREG_TFD) &
1185 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1190 * This is an attempt to clear errors so a new signature will
1191 * be latched. It isn't working properly. XXX
1194 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1197 if (ahci_port_start(ap)) {
1198 kprintf("%s: failed to start port, cannot softreset\n",
1203 /* Check whether CLO worked */
1204 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1205 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1206 kprintf("%s: CLO %s, need port reset\n",
1208 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
1209 ? "failed" : "unsupported");
1215 * Prep first D2H command with SRST feature & clear busy/reset flags
1217 * It is unclear which other fields in the FIS are used. Just zero
1220 * NOTE! This CCB is used for both the first and second commands.
1221 * The second command must use CCB slot 1 to properly load
1224 ccb = ahci_get_err_ccb(ap);
1225 ccb->ccb_xa.complete = ahci_dummy_done;
1226 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE;
1227 KKASSERT(ccb->ccb_slot == 1);
1228 ccb->ccb_xa.at = NULL;
1229 cmd_slot = ccb->ccb_cmd_hdr;
1231 fis = ccb->ccb_cmd_table->cfis;
1232 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1233 fis[0] = ATA_FIS_TYPE_H2D;
1234 fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT;
1236 cmd_slot->prdtl = 0;
1237 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1238 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
1239 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
1241 ccb->ccb_xa.state = ATA_S_PENDING;
1243 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1244 kprintf("%s: First FIS failed\n", PORTNAME(ap));
1249 * WARNING! TIME SENSITIVE SPACE! WARNING!
1251 * The two FISes are supposed to be back to back. Don't issue other
1252 * commands or even delay if we can help it.
1256 * Prep second D2H command to read status and complete reset sequence
1257 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
1258 * Rev 2.6 and it is unclear how the second FIS should be set up
1259 * from the AHCI document.
1261 * It is unclear which other fields in the FIS are used. Just zero
1264 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_AUTOSENSE | ATA_F_EXCLUSIVE;
1266 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1267 fis[0] = ATA_FIS_TYPE_H2D;
1268 fis[15] = ATA_FIS_CONTROL_4BIT;
1270 cmd_slot->prdtl = 0;
1271 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1273 ccb->ccb_xa.state = ATA_S_PENDING;
1274 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
1275 kprintf("%s: Second FIS failed\n", PORTNAME(ap));
1279 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1280 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1281 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
1283 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
1289 * If the softreset is trying to clear a BSY condition after a
1290 * normal portreset we assign the port type.
1292 * If the softreset is being run first as part of the ccb error
1293 * processing code then report if the device signature changed
1297 if (ap->ap_type == ATA_PORT_T_NONE) {
1298 ap->ap_type = ahci_port_signature_detect(ap, NULL);
1300 if (ahci_port_signature_detect(ap, NULL) != ap->ap_type) {
1301 kprintf("%s: device signature unexpectedly "
1302 "changed\n", PORTNAME(ap));
1303 error = EBUSY; /* XXX */
1311 ahci_put_err_ccb(ccb);
1314 * If the target is busy use CLO to clear the busy
1315 * condition. The BSY should be cleared on the next
1318 if (ahci_pread(ap, AHCI_PREG_TFD) &
1319 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1325 * If we failed to softreset make the port quiescent, otherwise
1326 * make sure the port's start/stop state matches what it was on
1329 * Don't kill the port if the softreset is on a port multiplier
1330 * target, that would kill all the targets!
1333 ahci_port_hardstop(ap);
1334 /* ap_probe set to failed */
1336 ap->ap_probe = ATA_PROBE_NEED_IDENT;
1338 ahci_port_start(ap);
1340 ap->ap_flags &= ~AP_F_IN_RESET;
1344 kprintf("%s: END SOFTRESET\n", PORTNAME(ap));
1350 * Issue just do the core COMRESET and basic device detection on a port.
1352 * NOTE: Only called by ahci_port_hardreset().
1355 ahci_comreset(struct ahci_port *ap, int *pmdetectp)
1367 ahci_port_stop(ap, 0);
1368 ap->ap_state = AP_S_NORMAL;
1372 * The port may have been quiescent with its SUD bit cleared, so
1373 * set the SUD (spin up device).
1375 * NOTE: I do not know if SUD is a hardware pin/low-level signal
1376 * or if it is messaged.
1378 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1380 cmd |= AHCI_PREG_CMD_SUD | AHCI_PREG_CMD_POD;
1381 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1385 * Make sure that all power management is disabled.
1387 * NOTE! AHCI_PREG_SCTL_DET_DISABLE seems to be highly unreliable
1388 * on multiple chipsets and can brick the chipset or even
1389 * the whole PC. Never use it.
1391 ap->ap_type = ATA_PORT_T_NONE;
1393 r = AHCI_PREG_SCTL_IPM_DISABLED |
1394 AHCI_PREG_SCTL_SPM_DISABLED;
1395 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1399 * Give the new power management state time to settle, then clear
1402 ahci_os_sleep(1000);
1404 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1407 * Start transmitting COMRESET. The spec says that COMRESET must
1408 * be sent for at least 1ms but in actual fact numerous devices
1409 * appear to take much longer. Delay a whole second here.
1411 * In addition, SATA-3 ports can take longer to train, so even
1412 * SATA-2 devices which would normally detect very quickly may
1413 * take longer when plugged into a SATA-3 port.
1415 r |= AHCI_PREG_SCTL_DET_INIT;
1416 switch(AhciForceGen) {
1418 r |= AHCI_PREG_SCTL_SPD_ANY;
1421 r |= AHCI_PREG_SCTL_SPD_GEN1;
1424 r |= AHCI_PREG_SCTL_SPD_GEN2;
1427 r |= AHCI_PREG_SCTL_SPD_GEN3;
1430 r |= AHCI_PREG_SCTL_SPD_GEN3;
1433 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1434 ahci_os_sleep(1000);
1436 ap->ap_flags &= ~AP_F_HARSH_REINIT;
1439 * Only SERR_DIAG_X needs to be cleared for TFD updates, but
1440 * since we are hard-resetting the port we might as well clear
1441 * the whole enchillada. Also be sure to clear any spurious BSY
1442 * prior to clearing INIT.
1444 * Wait 1 whole second after clearing INIT before checking
1445 * the device detection bits in an attempt to work around chipsets
1446 * which do not properly mask PCS/PRCS during low level init.
1449 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1450 /* ahci_port_clo(ap);*/
1453 r &= ~AHCI_PREG_SCTL_SPD;
1454 r &= ~AHCI_PREG_SCTL_DET_INIT;
1455 r |= AHCI_PREG_SCTL_DET_NONE;
1456 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1457 ahci_os_sleep(1000);
1460 * Try to determine if there is a device on the port.
1462 * Give the device 3/10 second to at least be detected.
1463 * If we fail clear PRCS (phy detect) since we may cycled
1464 * the phy and probably caused another PRCS interrupt.
1468 r = ahci_pread(ap, AHCI_PREG_SSTS);
1469 if (r & AHCI_PREG_SSTS_DET)
1471 loop -= ahci_os_softsleep();
1474 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PRCS);
1476 kprintf("%s: Port appears to be unplugged\n",
1484 * There is something on the port. Regardless of what happens
1485 * after this tell the caller to try to detect a port multiplier.
1487 * Give the device 3 seconds to fully negotiate.
1491 if (ahci_pwait_eq(ap, 3000, AHCI_PREG_SSTS,
1492 AHCI_PREG_SSTS_DET, AHCI_PREG_SSTS_DET_DEV)) {
1494 kprintf("%s: Device may be powered down\n",
1502 * We got something that definitely looks like a device. Give
1503 * the device time to send us its first D2H FIS. Waiting for
1504 * BSY to clear accomplishes this.
1506 * NOTE: A port multiplier may or may not clear BSY here,
1507 * depending on what is sitting in target 0 behind it.
1509 * NOTE: Intel SSDs seem to have compatibility problems with Intel
1510 * mobo's on cold boots and may leave BSY set. A single
1511 * retry works around the problem. This is definitely a bug
1512 * with the mobo and/or the SSD and does not appear to occur
1513 * with other devices connected to the same port.
1516 if (ahci_pwait_clr_to(ap, 8000, AHCI_PREG_TFD,
1517 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1518 kprintf("%s: Device BUSY: %b\n",
1520 ahci_pread(ap, AHCI_PREG_TFD),
1523 kprintf("%s: Retrying\n", PORTNAME(ap));
1539 * AHCI port reset, Section 10.4.2
1541 * This function does a hard reset of the port. Note that the device
1542 * connected to the port could still end-up hung.
1545 ahci_port_hardreset(struct ahci_port *ap, int hard)
1552 kprintf("%s: START HARDRESET\n", PORTNAME(ap));
1553 ap->ap_flags |= AP_F_IN_RESET;
1555 error = ahci_comreset(ap, &pmdetect);
1558 * We may be asked to perform a port multiplier check even if the
1559 * comreset failed. This typically occurs when the PM has nothing
1560 * in slot 0, which can cause BSY to remain set.
1562 * If the PM detection is successful it will override (error),
1563 * otherwise (error) is retained. If an error does occur it
1564 * is possible that a normal device has blown up on us DUE to
1565 * the PM detection code, so re-run the comreset and assume
1569 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SPM) {
1570 error = ahci_pm_port_probe(ap, error);
1572 error = ahci_comreset(ap, &pmdetect);
1585 * All good, make sure the port is running and set the
1586 * probe state. Ignore the signature junk (it's unreliable)
1587 * until we get to the softreset code.
1589 if (ahci_port_start(ap)) {
1590 kprintf("%s: failed to start command DMA on port, "
1591 "disabling\n", PORTNAME(ap));
1595 if (ap->ap_type == ATA_PORT_T_PM)
1596 ap->ap_probe = ATA_PROBE_GOOD;
1598 ap->ap_probe = ATA_PROBE_NEED_SOFT_RESET;
1602 * Normal device probe failure
1604 data = ahci_pread(ap, AHCI_PREG_SSTS);
1606 switch(data & AHCI_PREG_SSTS_DET) {
1607 case AHCI_PREG_SSTS_DET_DEV_NE:
1608 kprintf("%s: Device not communicating\n",
1611 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
1612 kprintf("%s: PHY offline\n",
1616 kprintf("%s: No device detected\n",
1620 ahci_port_hardstop(ap);
1624 * Abnormal probe (EBUSY)
1626 kprintf("%s: Device on port is bricked\n",
1628 ahci_port_hardstop(ap);
1630 rc = ahci_port_reset(ap, atx, 0);
1632 kprintf("%s: Unable unbrick device\n",
1635 kprintf("%s: Successfully unbricked\n",
1645 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1646 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
1648 ap->ap_flags &= ~AP_F_IN_RESET;
1651 kprintf("%s: END HARDRESET %d\n", PORTNAME(ap), error);
1656 * Hard-stop on hot-swap device removal. See 10.10.1
1658 * Place the port in a mode that will allow it to detect hot-swap insertions.
1659 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't
1660 * seem to do the job.
1662 * FIS reception is left enabled but command processing is disabled.
1663 * Cycling FIS reception (FRE) can brick ports.
1666 ahci_port_hardstop(struct ahci_port *ap)
1668 struct ahci_ccb *ccb;
1669 struct ata_port *at;
1677 * Stop the port. We can't modify things like SUD if the port
1680 ap->ap_state = AP_S_FATAL_ERROR;
1681 ap->ap_probe = ATA_PROBE_FAILED;
1682 ap->ap_type = ATA_PORT_T_NONE;
1683 ahci_port_stop(ap, 0);
1684 cmd = ahci_pread(ap, AHCI_PREG_CMD);
1685 cmd &= ~(AHCI_PREG_CMD_CLO | AHCI_PREG_CMD_PMA | AHCI_PREG_CMD_ICC);
1686 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1689 * Clean up AT sub-ports on SATA port.
1691 for (i = 0; ap->ap_ata && i < AHCI_MAX_PMPORTS; ++i) {
1693 at->at_type = ATA_PORT_T_NONE;
1694 at->at_probe = ATA_PROBE_FAILED;
1698 * Make sure FRE is active. There isn't anything we can do if it
1699 * fails so just ignore errors.
1701 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
1702 cmd |= AHCI_PREG_CMD_FRE;
1703 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1704 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0)
1705 ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR);
1709 * 10.10.1 place us in the Listen state.
1711 * 10.10.3 DET must be set to 0 and found to be 0 before
1714 * Deactivating SUD only applies if the controller supports SUD, it
1715 * is a bit unclear what happens w/regards to detecting hotplug
1718 r = AHCI_PREG_SCTL_IPM_DISABLED |
1719 AHCI_PREG_SCTL_SPM_DISABLED;
1720 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1722 cmd &= ~AHCI_PREG_CMD_SUD;
1723 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1729 * Transition su to the spin-up state. HBA shall send COMRESET and
1730 * begin initialization sequence (whatever that means). Presumably
1731 * this is edge-triggered. Following the spin-up state the HBA
1732 * will automatically transition to the Normal state.
1734 * This only applies if the controller supports SUD.
1735 * NEVER use AHCI_PREG_DET_DISABLE.
1737 cmd |= AHCI_PREG_CMD_POD |
1739 AHCI_PREG_CMD_ICC_ACTIVE;
1740 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1744 * Flush SERR_DIAG_X so the TFD can update.
1749 * Clean out pending ccbs
1752 while (ap->ap_active) {
1753 slot = ffs(ap->ap_active) - 1;
1754 ap->ap_active &= ~(1 << slot);
1755 --ap->ap_active_cnt;
1756 ccb = &ap->ap_ccbs[slot];
1757 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1758 serial = ccb->ccb_xa.serial;
1759 callout_stop_sync(&ccb->ccb_timeout);
1760 if (serial != ccb->ccb_xa.serial) {
1761 kprintf("%s: Warning: timeout race ccb %p\n",
1765 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1767 ap->ap_expired &= ~(1 << slot);
1768 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1769 ATA_F_TIMEOUT_EXPIRED);
1770 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1772 ccb->ccb_xa.complete(&ccb->ccb_xa);
1774 while (ap->ap_sactive) {
1775 slot = ffs(ap->ap_sactive) - 1;
1776 ap->ap_sactive &= ~(1 << slot);
1777 ccb = &ap->ap_ccbs[slot];
1778 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1779 serial = ccb->ccb_xa.serial;
1780 callout_stop_sync(&ccb->ccb_timeout);
1781 if (serial != ccb->ccb_xa.serial) {
1782 kprintf("%s: Warning: timeout race ccb %p\n",
1786 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1788 ap->ap_expired &= ~(1 << slot);
1789 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1790 ATA_F_TIMEOUT_EXPIRED);
1791 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1793 ccb->ccb_xa.complete(&ccb->ccb_xa);
1795 KKASSERT(ap->ap_active_cnt == 0);
1797 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) {
1798 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1799 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1800 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED;
1802 ccb->ccb_xa.complete(&ccb->ccb_xa);
1806 * Hot-plug device detection should work at this point. e.g. on
1807 * AMD chipsets Spin-Up/Normal state is sufficient for hot-plug
1808 * detection and entering RESET (continuous COMRESET by setting INIT)
1809 * will actually prevent hot-plug detection from working properly.
1811 * There may be cases where this will fail to work, I have some
1812 * additional code to place the HBA in RESET (send continuous
1813 * COMRESET) and hopefully get DIAG.X or other events when something
1814 * is plugged in. Unfortunately this isn't universal and can
1815 * also prevent events from generating interrupts.
1820 * Transition us to the Reset state. Theoretically we send a
1821 * continuous stream of COMRESETs in this state.
1823 r |= AHCI_PREG_SCTL_DET_INIT;
1824 if (AhciForceGen1 & (1 << ap->ap_num)) {
1825 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
1826 r |= AHCI_PREG_SCTL_SPD_GEN1;
1828 r |= AHCI_PREG_SCTL_SPD_ANY;
1830 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1834 * Flush SERR_DIAG_X so the TFD can update.
1842 * We can't loop on the X bit, a continuous COMINIT received will make
1843 * it loop forever. Just assume one event has built up and clear X
1844 * so the task file descriptor can update.
1847 ahci_flush_tfd(struct ahci_port *ap)
1851 r = ahci_pread(ap, AHCI_PREG_SERR);
1852 if (r & AHCI_PREG_SERR_DIAG_X)
1853 ahci_pwrite(ap, AHCI_PREG_SERR, AHCI_PREG_SERR_DIAG_X);
1857 * Figure out what type of device is connected to the port, ATAPI or
1861 ahci_port_signature_detect(struct ahci_port *ap, struct ata_port *at)
1865 sig = ahci_pread(ap, AHCI_PREG_SIG);
1867 kprintf("%s: sig %08x\n", ATANAME(ap, at), sig);
1868 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
1869 return(ATA_PORT_T_ATAPI);
1870 } else if ((sig & 0xffff0000) ==
1871 (SATA_SIGNATURE_PORT_MULTIPLIER & 0xffff0000)) {
1872 return(ATA_PORT_T_PM);
1874 return(ATA_PORT_T_DISK);
1879 * Load the DMA descriptor table for a CCB's buffer.
1882 ahci_load_prdt(struct ahci_ccb *ccb)
1884 struct ahci_port *ap = ccb->ccb_port;
1885 struct ahci_softc *sc = ap->ap_sc;
1886 struct ata_xfer *xa = &ccb->ccb_xa;
1887 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
1888 bus_dmamap_t dmap = ccb->ccb_dmamap;
1889 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
1892 if (xa->datalen == 0) {
1893 ccb->ccb_cmd_hdr->prdtl = 0;
1897 error = bus_dmamap_load(sc->sc_tag_data, dmap,
1898 xa->data, xa->datalen,
1899 ahci_load_prdt_callback,
1901 ((xa->flags & ATA_F_NOWAIT) ?
1902 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
1904 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
1908 if (xa->flags & ATA_F_PIO)
1909 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
1912 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
1914 if (xa->flags & ATA_F_READ)
1915 bus_dmamap_sync(sc->sc_tag_data, dmap, BUS_DMASYNC_PREREAD);
1916 if (xa->flags & ATA_F_WRITE)
1917 bus_dmamap_sync(sc->sc_tag_data, dmap, BUS_DMASYNC_PREWRITE);
1923 * Callback from BUSDMA system to load the segment list. The passed segment
1924 * list is a temporary structure.
1928 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
1931 struct ahci_prdt *prd = *(void **)info;
1934 KKASSERT(nsegs <= AHCI_MAX_PRDT);
1937 addr = segs->ds_addr;
1938 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
1939 prd->dba_lo = htole32((u_int32_t)addr);
1940 prd->flags = htole32(segs->ds_len - 1);
1946 *(void **)info = prd; /* return last valid segment */
1950 ahci_unload_prdt(struct ahci_ccb *ccb)
1952 struct ahci_port *ap = ccb->ccb_port;
1953 struct ahci_softc *sc = ap->ap_sc;
1954 struct ata_xfer *xa = &ccb->ccb_xa;
1955 bus_dmamap_t dmap = ccb->ccb_dmamap;
1957 if (xa->datalen != 0) {
1958 if (xa->flags & ATA_F_READ) {
1959 bus_dmamap_sync(sc->sc_tag_data, dmap,
1960 BUS_DMASYNC_POSTREAD);
1962 if (xa->flags & ATA_F_WRITE) {
1963 bus_dmamap_sync(sc->sc_tag_data, dmap,
1964 BUS_DMASYNC_POSTWRITE);
1966 bus_dmamap_unload(sc->sc_tag_data, dmap);
1969 * prdbc is only updated by hardware for non-NCQ commands.
1971 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
1974 if (ccb->ccb_cmd_hdr->prdbc == 0 &&
1975 ccb->ccb_xa.state == ATA_S_COMPLETE) {
1976 kprintf("%s: WARNING! Unload prdbc resid "
1977 "was zero! tag=%d\n",
1978 ATANAME(ap, xa->at), ccb->ccb_slot);
1980 xa->resid = xa->datalen -
1981 le32toh(ccb->ccb_cmd_hdr->prdbc);
1987 * Start a command and poll for completion.
1989 * timeout is in ms and only counts once the command gets on-chip.
1991 * Returns ATA_S_* state, compare against ATA_S_COMPLETE to determine
1992 * that no error occured.
1994 * NOTE: If the caller specifies a NULL timeout function the caller is
1995 * responsible for clearing hardware state on failure, but we will
1996 * deal with removing the ccb from any pending queue.
1998 * NOTE: NCQ should never be used with this function.
2000 * NOTE: If the port is in a failed state and stopped we do not try
2001 * to activate the ccb.
2004 ahci_poll(struct ahci_ccb *ccb, int timeout,
2005 void (*timeout_fn)(struct ahci_ccb *))
2007 struct ahci_port *ap = ccb->ccb_port;
2009 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) {
2010 ccb->ccb_xa.state = ATA_S_ERROR;
2011 return(ccb->ccb_xa.state);
2015 kprintf("%s: Start command %02x tag=%d\n",
2016 ATANAME(ccb->ccb_port, ccb->ccb_xa.at),
2017 ccb->ccb_xa.fis->command, ccb->ccb_slot);
2022 ahci_port_intr(ap, 1);
2023 switch(ccb->ccb_xa.state) {
2025 timeout -= ahci_os_softsleep();
2028 ahci_os_softsleep();
2029 ahci_check_active_timeouts(ap);
2033 return (ccb->ccb_xa.state);
2035 } while (timeout > 0);
2037 if ((ccb->ccb_xa.flags & ATA_F_SILENT) == 0) {
2038 kprintf("%s: Poll timeout slot %d CMD: %b TFD: 0x%b SERR: %b\n",
2039 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot,
2040 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
2041 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS,
2042 ahci_pread(ap, AHCI_PREG_SERR), AHCI_PFMT_SERR);
2049 return(ccb->ccb_xa.state);
2053 * When polling we have to check if the currently active CCB(s)
2054 * have timed out as the callout will be deadlocked while we
2055 * hold the port lock.
2058 ahci_check_active_timeouts(struct ahci_port *ap)
2060 struct ahci_ccb *ccb;
2064 mask = ap->ap_active | ap->ap_sactive;
2066 tag = ffs(mask) - 1;
2067 mask &= ~(1 << tag);
2068 ccb = &ap->ap_ccbs[tag];
2069 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_EXPIRED) {
2070 ahci_ata_cmd_timeout(ccb);
2078 ahci_start_timeout(struct ahci_ccb *ccb)
2080 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_DESIRED) {
2081 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_RUNNING;
2082 callout_reset(&ccb->ccb_timeout,
2083 (ccb->ccb_xa.timeout * hz + 999) / 1000,
2084 ahci_ata_cmd_timeout_unserialized, ccb);
2089 ahci_start(struct ahci_ccb *ccb)
2091 struct ahci_port *ap = ccb->ccb_port;
2092 struct ahci_softc *sc = ap->ap_sc;
2094 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
2096 /* Zero transferred byte count before transfer */
2097 ccb->ccb_cmd_hdr->prdbc = 0;
2099 /* Sync command list entry and corresponding command table entry */
2100 bus_dmamap_sync(sc->sc_tag_cmdh,
2101 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
2102 BUS_DMASYNC_PREWRITE);
2103 bus_dmamap_sync(sc->sc_tag_cmdt,
2104 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
2105 BUS_DMASYNC_PREWRITE);
2107 /* Prepare RFIS area for write by controller */
2108 bus_dmamap_sync(sc->sc_tag_rfis,
2109 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
2110 BUS_DMASYNC_PREREAD);
2113 * There's no point trying to optimize this, it only shaves a few
2114 * nanoseconds so just queue the command and call our generic issue.
2116 ahci_issue_pending_commands(ap, ccb);
2120 * While holding the port lock acquire exclusive access to the port.
2122 * This is used when running the state machine to initialize and identify
2123 * targets over a port multiplier. Setting exclusive access prevents
2124 * ahci_port_intr() from activating any requests sitting on the pending
2128 ahci_beg_exclusive_access(struct ahci_port *ap, struct ata_port *at)
2130 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) == 0);
2131 ap->ap_flags |= AP_F_EXCLUSIVE_ACCESS;
2132 while (ap->ap_active || ap->ap_sactive) {
2133 ahci_port_intr(ap, 1);
2134 ahci_os_softsleep();
2139 ahci_end_exclusive_access(struct ahci_port *ap, struct ata_port *at)
2141 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) != 0);
2142 ap->ap_flags &= ~AP_F_EXCLUSIVE_ACCESS;
2143 ahci_issue_pending_commands(ap, NULL);
2149 fubar(struct ahci_ccb *ccb)
2151 struct ahci_port *ap = ccb->ccb_port;
2152 struct ahci_cmd_hdr *cmd;
2153 struct ahci_cmd_table *tab;
2154 struct ahci_prdt *prdt;
2157 kprintf("%s: ISSUE %02x\n",
2158 ATANAME(ap, ccb->ccb_xa.at),
2159 ccb->ccb_xa.fis->command);
2160 cmd = ccb->ccb_cmd_hdr;
2161 tab = ccb->ccb_cmd_table;
2162 prdt = ccb->ccb_cmd_table->prdt;
2163 kprintf("cmd flags=%04x prdtl=%d prdbc=%d ctba=%08x%08x\n",
2164 cmd->flags, cmd->prdtl, cmd->prdbc,
2165 cmd->ctba_hi, cmd->ctba_lo);
2166 for (i = 0; i < cmd->prdtl; ++i) {
2167 kprintf("\t%d dba=%08x%08x res=%08x flags=%08x\n",
2168 i, prdt->dba_hi, prdt->dba_lo, prdt->reserved,
2177 * If ccb is not NULL enqueue and/or issue it.
2179 * If ccb is NULL issue whatever we can from the queue. However, nothing
2180 * new is issued if the exclusive access flag is set or expired ccb's are
2183 * If existing commands are still active (ap_active/ap_sactive) we can only
2184 * issue matching new commands.
2187 ahci_issue_pending_commands(struct ahci_port *ap, struct ahci_ccb *ccb)
2195 * If just running the queue and in exclusive access mode we
2196 * just return. Also in this case if there are any expired ccb's
2197 * we want to clear the queue so the port can be safely stopped.
2200 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
2201 } else if ((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) || ap->ap_expired) {
2206 * Pull the next ccb off the queue and run it if possible.
2208 if ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) == NULL)
2212 * Handle exclusivity requirements.
2214 * ATA_F_EXCLUSIVE is used when we want to be the only command
2217 * ATA_F_AUTOSENSE is used when we want the D2H rfis loaded
2218 * back into the ccb on a normal (non-errored) command completion.
2219 * For example, for PM requests to target 15. Because the AHCI
2220 * spec does not stop the command processor and has only one rfis
2221 * area (for non-FBSS anyway), AUTOSENSE currently implies EXCLUSIVE.
2222 * Otherwise multiple completions can destroy the rfis data before
2223 * we have a chance to copy it.
2225 if (ap->ap_active & ~ap->ap_expired) {
2227 * There may be multiple ccb's already running,
2228 * if any are running and ap_run_flags sets
2229 * one of these flags then we know only one is
2232 * XXX Current AUTOSENSE code forces exclusivity
2233 * to simplify the code.
2235 if (ap->ap_run_flags &
2236 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) {
2240 if (ccb->ccb_xa.flags &
2241 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) {
2246 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
2248 * The next command is a NCQ command and can be issued as
2249 * long as currently active commands are not standard.
2251 if (ap->ap_active) {
2252 KKASSERT(ap->ap_active_cnt > 0);
2255 KKASSERT(ap->ap_active_cnt == 0);
2259 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2260 mask |= 1 << ccb->ccb_slot;
2261 ccb->ccb_xa.state = ATA_S_ONCHIP;
2262 ahci_start_timeout(ccb);
2263 ap->ap_run_flags = ccb->ccb_xa.flags;
2264 ccb = TAILQ_FIRST(&ap->ap_ccb_pending);
2265 } while (ccb && (ccb->ccb_xa.flags & ATA_F_NCQ) &&
2267 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) == 0);
2269 ap->ap_sactive |= mask;
2270 ahci_pwrite(ap, AHCI_PREG_SACT, mask);
2271 ahci_pwrite(ap, AHCI_PREG_CI, mask);
2274 * The next command is a standard command and can be issued
2275 * as long as currently active commands are not NCQ.
2277 * We limit ourself to 1 command if we have a port multiplier,
2278 * (at least without FBSS support), otherwise timeouts on
2279 * one port can race completions on other ports (see
2280 * ahci_ata_cmd_timeout() for more information).
2282 * If not on a port multiplier generally allow up to 4
2283 * standard commands to be enqueued. Remember that the
2284 * command processor will still process them sequentially.
2288 if (ap->ap_type == ATA_PORT_T_PM)
2290 else if (ap->ap_sc->sc_ncmds > 4)
2295 while (ap->ap_active_cnt < limit && ccb &&
2296 (ccb->ccb_xa.flags & ATA_F_NCQ) == 0) {
2297 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2301 ap->ap_active |= 1 << ccb->ccb_slot;
2302 ap->ap_active_cnt++;
2303 ap->ap_run_flags = ccb->ccb_xa.flags;
2304 ccb->ccb_xa.state = ATA_S_ONCHIP;
2305 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
2306 ahci_start_timeout(ccb);
2307 if ((ap->ap_run_flags &
2308 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) == 0) {
2311 ccb = TAILQ_FIRST(&ap->ap_ccb_pending);
2312 if (ccb && (ccb->ccb_xa.flags &
2313 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE))) {
2321 ahci_intr(void *arg)
2323 struct ahci_softc *sc = arg;
2324 struct ahci_port *ap;
2330 * Check if the master enable is up, and whether any interrupts are
2333 if ((sc->sc_flags & AHCI_F_INT_GOOD) == 0)
2335 is = ahci_read(sc, AHCI_REG_IS);
2336 if (is == 0 || is == 0xffffffff) {
2339 is &= sc->sc_portmask;
2341 #ifdef AHCI_COALESCE
2342 /* Check coalescing interrupt first */
2343 if (is & sc->sc_ccc_mask) {
2344 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
2346 is &= ~sc->sc_ccc_mask;
2347 is |= sc->sc_ccc_ports_cur;
2352 * Process interrupts for each port in a non-blocking fashion.
2354 * The global IS bit is forced on if any unmasked port interrupts
2355 * are pending, even if we clear.
2357 for (ack = 0; is; is &= ~(1 << port)) {
2361 ap = sc->sc_ports[port];
2365 if (ahci_os_lock_port_nb(ap) == 0) {
2366 ahci_port_intr(ap, 0);
2367 ahci_os_unlock_port(ap);
2369 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2370 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2373 ahci_write(sc, AHCI_REG_IS, ack);
2377 * Core called from helper thread.
2380 ahci_port_thread_core(struct ahci_port *ap, int mask)
2383 * Process any expired timedouts.
2385 ahci_os_lock_port(ap);
2386 if (mask & AP_SIGF_TIMEOUT) {
2387 ahci_check_active_timeouts(ap);
2391 * Process port interrupts which require a higher level of
2394 if (mask & AP_SIGF_PORTINT) {
2395 ahci_port_intr(ap, 1);
2396 ahci_port_interrupt_enable(ap);
2397 ahci_os_unlock_port(ap);
2398 } else if (ap->ap_probe != ATA_PROBE_FAILED) {
2399 ahci_port_intr(ap, 1);
2400 ahci_port_interrupt_enable(ap);
2401 ahci_os_unlock_port(ap);
2403 ahci_os_unlock_port(ap);
2408 * Core per-port interrupt handler.
2410 * If blockable is 0 we cannot call ahci_os_sleep() at all and we can only
2411 * deal with normal command completions which do not require blocking.
2414 ahci_port_intr(struct ahci_port *ap, int blockable)
2416 struct ahci_softc *sc = ap->ap_sc;
2417 u_int32_t is, ci_saved, ci_masked;
2420 struct ahci_ccb *ccb = NULL;
2421 struct ata_port *ccb_at = NULL;
2422 volatile u_int32_t *active;
2423 const u_int32_t blockable_mask = AHCI_PREG_IS_TFES |
2431 enum { NEED_NOTHING, NEED_REINIT, NEED_RESTART,
2432 NEED_HOTPLUG_INSERT, NEED_HOTPLUG_REMOVE } need = NEED_NOTHING;
2435 * All basic command completions are always processed.
2437 is = ahci_pread(ap, AHCI_PREG_IS);
2438 if (is & AHCI_PREG_IS_DPS)
2439 ahci_pwrite(ap, AHCI_PREG_IS, is & AHCI_PREG_IS_DPS);
2442 * If we can't block then we can't handle these here. Disable
2443 * the interrupts in question so we don't live-lock, the helper
2444 * thread will re-enable them.
2446 * If the port is in a completely failed state we do not want
2447 * to drop through to failed-command-processing if blockable is 0,
2448 * just let the thread deal with it all.
2450 * Otherwise we fall through and still handle DHRS and any commands
2451 * which completed normally. Even if we are errored we haven't
2452 * stopped the port yet so CI/SACT are still good.
2454 if (blockable == 0) {
2455 if (ap->ap_state == AP_S_FATAL_ERROR) {
2456 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2457 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2460 if (is & blockable_mask) {
2461 ahci_pwrite(ap, AHCI_PREG_IE, 0);
2462 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2468 * Either NCQ or non-NCQ commands will be active, never both.
2470 if (ap->ap_sactive) {
2471 KKASSERT(ap->ap_active == 0);
2472 KKASSERT(ap->ap_active_cnt == 0);
2473 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
2474 active = &ap->ap_sactive;
2476 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
2477 active = &ap->ap_active;
2479 KKASSERT(!(ap->ap_sactive && ap->ap_active));
2481 kprintf("CHECK act=%08x/%08x sact=%08x/%08x\n",
2482 ap->ap_active, ahci_pread(ap, AHCI_PREG_CI),
2483 ap->ap_sactive, ahci_pread(ap, AHCI_PREG_SACT));
2487 * Ignore AHCI_PREG_IS_PRCS when link power management is on
2489 if (ap->link_pwr_mgmt != AHCI_LINK_PWR_MGMT_NONE) {
2490 is &= ~AHCI_PREG_IS_PRCS;
2491 ahci_pwrite(ap, AHCI_PREG_SERR,
2492 AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_W);
2496 * Command failed (blockable).
2498 * See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2.
2500 * This stops command processing.
2502 if (is & AHCI_PREG_IS_TFES) {
2503 u_int32_t tfd, serr;
2507 tfd = ahci_pread(ap, AHCI_PREG_TFD);
2508 serr = ahci_pread(ap, AHCI_PREG_SERR);
2511 * Load the error slot and restart command processing.
2512 * CLO if we need to. The error slot may not be valid.
2513 * MUST BE DONE BEFORE CLEARING ST!
2517 * It is unclear but we may have to clear SERR to reenable
2520 err_slot = AHCI_PREG_CMD_CCS(ahci_pread(ap, AHCI_PREG_CMD));
2521 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_TFES |
2525 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_PSS |
2526 AHCI_PREG_IS_DHRS | AHCI_PREG_IS_SDBS);
2527 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
2528 ahci_port_stop(ap, 0);
2529 ahci_os_hardsleep(10);
2530 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
2531 kprintf("%s: Issuing CLO\n", PORTNAME(ap));
2536 * We are now stopped and need a restart. If we have to
2537 * process a NCQ error we will temporarily start and then
2538 * stop the port again, so this condition holds.
2541 need = NEED_RESTART;
2544 * ATAPI errors are fairly common from probing, just
2545 * report disk errors or if bootverbose is on.
2547 if (bootverbose || ap->ap_type != ATA_PORT_T_ATAPI) {
2548 kprintf("%s: TFES slot %d ci_saved = %08x\n",
2549 PORTNAME(ap), err_slot, ci_saved);
2553 * If we got an error on an error CCB just complete it
2554 * with an error. ci_saved has the mask to restart
2555 * (the err_ccb will be removed from it by finish_error).
2557 if (ap->ap_flags & AP_F_ERR_CCB_RESERVED) {
2558 err_slot = ap->ap_err_ccb->ccb_slot;
2563 * If NCQ commands were active get the error slot from
2564 * the log page. NCQ is not supported for PM's so this
2565 * is a direct-attached target.
2567 * Otherwise if no commands were active we have a problem.
2569 * Otherwise if the error slot is bad we have a problem.
2571 * Otherwise process the error for the slot.
2573 if (ap->ap_sactive) {
2574 ahci_port_start(ap);
2575 err_slot = ahci_port_read_ncq_error(ap, 0);
2576 ahci_port_stop(ap, 0);
2577 } else if (ap->ap_active == 0) {
2578 kprintf("%s: TFES with no commands pending\n",
2581 } else if (err_slot < 0 || err_slot >= ap->ap_sc->sc_ncmds) {
2582 kprintf("%s: bad error slot %d\n",
2583 PORTNAME(ap), err_slot);
2586 ccb = &ap->ap_ccbs[err_slot];
2589 * Validate the errored ccb. Note that ccb_at can
2590 * be NULL for direct-attached ccb's.
2592 * Copy received taskfile data from the RFIS.
2594 if (ccb->ccb_xa.state == ATA_S_ONCHIP) {
2595 ccb_at = ccb->ccb_xa.at;
2596 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
2597 sizeof(struct ata_fis_d2h));
2599 kprintf("%s: Copying rfis slot %d\n",
2600 ATANAME(ap, ccb_at), err_slot);
2603 kprintf("%s: Cannot copy rfis, CCB slot "
2604 "%d is not on-chip (state=%d)\n",
2605 ATANAME(ap, ccb->ccb_xa.at),
2606 err_slot, ccb->ccb_xa.state);
2612 * If we could not determine the errored slot then
2616 kprintf("%s: TFES: Unable to determine errored slot\n",
2618 if (ap->ap_flags & AP_F_IN_RESET)
2624 * Finish error on slot. We will restart ci_saved
2625 * commands except the errored slot which we generate
2629 ccb = &ap->ap_ccbs[err_slot];
2630 ci_saved &= ~(1 << err_slot);
2631 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
2632 ccb->ccb_xa.state = ATA_S_ERROR;
2633 } else if (is & AHCI_PREG_IS_DHRS) {
2635 * Command posted D2H register FIS to the rfis (non-blocking).
2637 * A normal completion with an error may set DHRS instead
2638 * of TFES. The CCS bits are only valid if ERR was set.
2639 * If ERR is set command processing was probably stopped.
2641 * If ERR was not set we can only copy-back data for
2642 * exclusive-mode commands because otherwise we won't know
2643 * which tag the rfis belonged to.
2645 * err_slot must be read from the CCS before any other port
2646 * action, such as stopping the port.
2648 * WARNING! This is not well documented in the AHCI spec.
2649 * It can be found in the state machine tables
2650 * but not in the explanations.
2656 tfd = ahci_pread(ap, AHCI_PREG_TFD);
2657 cmd = ahci_pread(ap, AHCI_PREG_CMD);
2659 if ((tfd & AHCI_PREG_TFD_STS_ERR) &&
2660 (cmd & AHCI_PREG_CMD_CR) == 0) {
2661 err_slot = AHCI_PREG_CMD_CCS(
2662 ahci_pread(ap, AHCI_PREG_CMD));
2663 ccb = &ap->ap_ccbs[err_slot];
2664 kprintf("%s: DHRS tfd=%b err_slot=%d cmd=%02x\n",
2666 tfd, AHCI_PFMT_TFD_STS,
2667 err_slot, ccb->ccb_xa.fis->command);
2671 * NO ELSE... copy back is in the normal command completion
2672 * code and only if no error occured and ATA_F_AUTOSENSE
2675 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_DHRS);
2679 * Device notification to us (non-blocking)
2681 * NOTE! On some parts notification bits can cause an IPMS
2682 * interrupt instead of a SDBS interrupt.
2684 * NOTE! On some parts (e.g. VBOX, probably intel ICHx),
2685 * SDBS notifies us of the completion of a NCQ command
2688 if (is & (AHCI_PREG_IS_SDBS | AHCI_PREG_IS_IPMS)) {
2691 ahci_pwrite(ap, AHCI_PREG_IS,
2692 AHCI_PREG_IS_SDBS | AHCI_PREG_IS_IPMS);
2693 if (sc->sc_cap & AHCI_REG_CAP_SSNTF) {
2694 data = ahci_pread(ap, AHCI_PREG_SNTF);
2696 ahci_pwrite(ap, AHCI_PREG_IS,
2698 kprintf("%s: NOTIFY %08x\n",
2699 PORTNAME(ap), data);
2700 ahci_pwrite(ap, AHCI_PREG_SERR,
2701 AHCI_PREG_SERR_DIAG_N);
2702 ahci_pwrite(ap, AHCI_PREG_SNTF, data);
2703 ahci_cam_changed(ap, NULL, -1);
2706 is &= ~(AHCI_PREG_IS_SDBS | AHCI_PREG_IS_IPMS);
2710 * Spurious IFS errors (blockable) - when AP_F_IGNORE_IFS is set.
2712 * Spurious IFS errors can occur while we are doing a reset
2713 * sequence through a PM, probably due to an unexpected FIS
2714 * being received during the PM target reset sequence. Chipsets
2715 * are supposed to mask these events but some do not.
2717 * Try to recover from the condition.
2719 if ((is & AHCI_PREG_IS_IFS) && (ap->ap_flags & AP_F_IGNORE_IFS)) {
2720 u_int32_t serr = ahci_pread(ap, AHCI_PREG_SERR);
2721 if ((ap->ap_flags & AP_F_IFS_IGNORED) == 0) {
2722 kprintf("%s: IFS during PM probe (ignored) "
2726 serr, AHCI_PFMT_SERR);
2727 ap->ap_flags |= AP_F_IFS_IGNORED;
2731 * Try to clear the error condition. The IFS error killed
2732 * the port so stop it so we can restart it.
2734 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
2735 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
2736 is &= ~AHCI_PREG_IS_IFS;
2737 need = NEED_RESTART;
2742 * Port change (hot-plug) (blockable).
2744 * A PRCS interrupt can occur:
2745 * (1) On hot-unplug / normal-unplug (phy lost)
2746 * (2) Sometimes on hot-plug too.
2748 * A PCS interrupt can occur in a number of situations:
2749 * (1) On hot-plug once communication is established
2750 * (2) On hot-unplug sometimes.
2751 * (3) For chipsets with badly written firmware it can occur
2752 * during INIT/RESET sequences due to the device reset.
2753 * (4) For chipsets with badly written firmware it can occur
2754 * when it thinks an unsolicited COMRESET is received
2755 * during a INIT/RESET sequence, even though we actually
2758 * XXX We can then check the CPS (Cold Presence State) bit, if
2759 * supported, to determine if a device is plugged in or not and do
2762 * PCS interrupts are cleared by clearing DIAG_X. If this occurs
2763 * command processing is automatically stopped (CR goes inactive)
2764 * and the port must be stopped and restarted.
2766 * WARNING: AMD parts (e.g. 880G chipset, probably others) can
2767 * generate PCS on initialization even when device is
2768 * already connected up. It is unclear why this happens.
2769 * Depending on the state of the device detect this can
2770 * cause us to go into harsh reinit or hot-plug insertion
2773 * WARNING: PCS errors can be repetitive (e.g. unsolicited COMRESET
2774 * continues to flow in from the device), we must clear the
2775 * interrupt in all cases and enforce a delay to prevent
2776 * a livelock and give the port time to settle down.
2777 * Only print something if we aren't in INIT/HARD-RESET.
2779 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
2781 * Try to clear the error. Because of the repetitiveness
2782 * of this interrupt avoid any harsh action if the port is
2783 * already in the init or hard-reset probe state.
2785 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
2786 /* (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X) */
2787 ahci_pwrite(ap, AHCI_PREG_IS,
2788 is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS));
2791 * Ignore PCS/PRCS errors during probes (but still clear the
2792 * interrupt to avoid a livelock). The AMD 880/890/SB850
2793 * chipsets do not mask PCS/PRCS internally during reset
2796 if (ap->ap_flags & AP_F_IN_RESET)
2799 if (ap->ap_probe == ATA_PROBE_NEED_INIT ||
2800 ap->ap_probe == ATA_PROBE_NEED_HARD_RESET) {
2801 is &= ~(AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
2802 need = NEED_NOTHING;
2803 ahci_os_sleep(1000);
2806 kprintf("%s: Transient Errors: %b (%d)\n",
2807 PORTNAME(ap), is, AHCI_PFMT_IS, ap->ap_probe);
2808 is &= ~(AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
2812 * Stop the port and figure out what to do next.
2814 ahci_port_stop(ap, 0);
2817 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
2818 case AHCI_PREG_SSTS_DET_DEV:
2822 if (ap->ap_probe == ATA_PROBE_FAILED) {
2823 need = NEED_HOTPLUG_INSERT;
2826 need = NEED_RESTART;
2828 case AHCI_PREG_SSTS_DET_DEV_NE:
2830 * Device not communicating. AMD parts seem to
2831 * like to throw this error on initialization
2832 * for no reason that I can fathom.
2834 kprintf("%s: Device present but not communicating, "
2835 "attempting port restart\n",
2840 if (ap->ap_probe != ATA_PROBE_FAILED) {
2841 need = NEED_HOTPLUG_REMOVE;
2844 need = NEED_RESTART;
2852 * Check for remaining errors - they are fatal. (blockable)
2854 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
2855 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
2858 ahci_pwrite(ap, AHCI_PREG_IS,
2859 is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2860 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2862 serr = ahci_pread(ap, AHCI_PREG_SERR);
2863 kprintf("%s: Unrecoverable errors (IS: %b, SERR: %b), "
2864 "disabling port.\n",
2867 serr, AHCI_PFMT_SERR
2869 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2870 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2874 * Fail all commands but then what? For now try to
2875 * reinitialize the port.
2882 * Fail all outstanding commands if we know the port won't recover.
2884 * We may have a ccb_at if the failed command is known and was
2885 * being sent to a device over a port multiplier (PM). In this
2886 * case if the port itself has not completely failed we fail just
2887 * the commands related to that target.
2889 * ci_saved contains the mask of active commands as of when the
2890 * error occured, prior to any port stops.
2892 if (ap->ap_state == AP_S_FATAL_ERROR) {
2894 ap->ap_state = AP_S_FATAL_ERROR;
2896 ahci_port_stop(ap, 0);
2900 * Error all the active slots not already errored.
2902 ci_masked = ci_saved & *active & ~ap->ap_expired;
2904 kprintf("%s: Failing all commands: %08x\n",
2905 PORTNAME(ap), ci_masked);
2909 slot = ffs(ci_masked) - 1;
2910 ccb = &ap->ap_ccbs[slot];
2911 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2912 ap->ap_expired |= 1 << slot;
2913 ci_saved &= ~(1 << slot);
2914 ci_masked &= ~(1 << slot);
2918 * Clear bits in ci_saved (cause completions to be run)
2919 * for all slots which are not active.
2921 ci_saved &= ~*active;
2924 * Don't restart the port if our problems were deemed fatal.
2926 * Also acknowlege all fatal interrupt sources to prevent
2929 if (ap->ap_state == AP_S_FATAL_ERROR) {
2930 if (need == NEED_RESTART)
2931 need = NEED_NOTHING;
2932 ahci_pwrite(ap, AHCI_PREG_IS,
2933 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2934 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2940 * If we are stopped the AHCI chipset is supposed to have cleared
2941 * CI and SACT. Did it? If it didn't we try very hard to clear
2942 * the fields otherwise we may end up completing CCBs which are
2943 * actually still active.
2945 * IFS errors on (at least) AMD chipsets create this confusion.
2949 if ((mask = ahci_pactive(ap)) != 0) {
2950 kprintf("%s: chipset failed to clear "
2951 "active cmds %08x\n",
2952 PORTNAME(ap), mask);
2953 ahci_port_start(ap);
2954 ahci_port_stop(ap, 0);
2955 if ((mask = ahci_pactive(ap)) != 0) {
2956 kprintf("%s: unable to prod the chip into "
2957 "clearing active cmds %08x\n",
2958 PORTNAME(ap), mask);
2959 /* what do we do now? */
2965 * CCB completion (non blocking).
2967 * CCB completion is detected by noticing its slot's bit in CI has
2968 * changed to zero some time after we activated it.
2969 * If we are polling, we may only be interested in particular slot(s).
2971 * Any active bits not saved are completed within the restrictions
2972 * imposed by the caller.
2974 ci_masked = ~ci_saved & *active;
2976 slot = ffs(ci_masked) - 1;
2977 ccb = &ap->ap_ccbs[slot];
2978 ci_masked &= ~(1 << slot);
2980 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
2981 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
2984 bus_dmamap_sync(sc->sc_tag_cmdh,
2985 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
2986 BUS_DMASYNC_POSTWRITE);
2988 bus_dmamap_sync(sc->sc_tag_cmdt,
2989 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
2990 BUS_DMASYNC_POSTWRITE);
2992 bus_dmamap_sync(sc->sc_tag_rfis,
2993 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
2994 BUS_DMASYNC_POSTREAD);
2996 *active &= ~(1 << ccb->ccb_slot);
2997 if (active == &ap->ap_active) {
2998 KKASSERT(ap->ap_active_cnt > 0);
2999 --ap->ap_active_cnt;
3003 * Complete the ccb. If the ccb was marked expired it
3004 * was probably already removed from the command processor,
3005 * so don't take the clear ci_saved bit as meaning the
3006 * command actually succeeded, it didn't.
3008 if (ap->ap_expired & (1 << ccb->ccb_slot)) {
3009 ap->ap_expired &= ~(1 << ccb->ccb_slot);
3010 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3012 ccb->ccb_xa.complete(&ccb->ccb_xa);
3014 if (ccb->ccb_xa.state == ATA_S_ONCHIP) {
3015 ccb->ccb_xa.state = ATA_S_COMPLETE;
3016 if (ccb->ccb_xa.flags & ATA_F_AUTOSENSE) {
3017 memcpy(&ccb->ccb_xa.rfis,
3019 sizeof(struct ata_fis_d2h));
3020 if (ccb->ccb_xa.state == ATA_S_TIMEOUT)
3021 ccb->ccb_xa.state = ATA_S_ERROR;
3029 * Cleanup. Will not be set if non-blocking.
3034 * If operating normally and not stopped the interrupt was
3035 * probably just a normal completion and we may be able to
3036 * issue more commands.
3038 if (stopped == 0 && ap->ap_state != AP_S_FATAL_ERROR)
3039 ahci_issue_pending_commands(ap, NULL);
3043 * A recoverable error occured and we can restart outstanding
3044 * commands on the port.
3046 ci_saved &= ~ap->ap_expired;
3048 kprintf("%s: Restart %08x\n", PORTNAME(ap), ci_saved);
3049 ahci_issue_saved_commands(ap, ci_saved);
3053 * Potentially issue new commands if not in a failed
3056 if (ap->ap_state != AP_S_FATAL_ERROR) {
3057 ahci_port_start(ap);
3058 ahci_issue_pending_commands(ap, NULL);
3063 * Something horrible happened to the port and we
3064 * need to reinitialize it.
3066 kprintf("%s: REINIT - Attempting to reinitialize the port "
3067 "after it had a horrible accident\n",
3069 ap->ap_flags |= AP_F_IN_RESET;
3070 ap->ap_flags |= AP_F_HARSH_REINIT;
3071 ap->ap_probe = ATA_PROBE_NEED_INIT;
3072 ahci_cam_changed(ap, NULL, -1);
3074 case NEED_HOTPLUG_INSERT:
3076 * A hot-plug insertion event has occured and all
3077 * outstanding commands have already been revoked.
3079 * Don't recurse if this occurs while we are
3080 * resetting the port.
3082 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
3083 kprintf("%s: HOTPLUG - Device inserted\n",
3085 ap->ap_probe = ATA_PROBE_NEED_INIT;
3086 ahci_cam_changed(ap, NULL, -1);
3089 case NEED_HOTPLUG_REMOVE:
3091 * A hot-plug removal event has occured and all
3092 * outstanding commands have already been revoked.
3094 * Don't recurse if this occurs while we are
3095 * resetting the port.
3097 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
3098 kprintf("%s: HOTPLUG - Device removed\n",
3100 ahci_port_hardstop(ap);
3101 /* ap_probe set to failed */
3102 ahci_cam_changed(ap, NULL, -1);
3111 ahci_get_ccb(struct ahci_port *ap)
3113 struct ahci_ccb *ccb;
3115 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
3116 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
3118 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
3119 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
3120 ccb->ccb_xa.state = ATA_S_SETUP;
3121 ccb->ccb_xa.flags = 0;
3122 ccb->ccb_xa.at = NULL;
3124 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
3130 ahci_put_ccb(struct ahci_ccb *ccb)
3132 struct ahci_port *ap = ccb->ccb_port;
3134 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
3135 ccb->ccb_xa.state = ATA_S_PUT;
3136 ++ccb->ccb_xa.serial;
3137 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
3138 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
3142 ahci_get_err_ccb(struct ahci_port *ap)
3144 struct ahci_ccb *err_ccb;
3148 /* No commands may be active on the chip. */
3150 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SNCQ) {
3151 sact = ahci_pread(ap, AHCI_PREG_SACT);
3153 kprintf("%s: ahci_get_err_ccb but SACT %08x != 0?\n",
3154 PORTNAME(ap), sact);
3157 ci = ahci_pread(ap, AHCI_PREG_CI);
3159 kprintf("%s: ahci_get_err_ccb: ci not 0 (%08x)\n",
3163 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) == 0);
3164 ap->ap_flags |= AP_F_ERR_CCB_RESERVED;
3166 /* Save outstanding command state. */
3167 ap->ap_err_saved_active = ap->ap_active;
3168 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
3169 ap->ap_err_saved_sactive = ap->ap_sactive;
3172 * Pretend we have no commands outstanding, so that completions won't
3175 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
3178 * Grab a CCB to use for error recovery. This should never fail, as
3179 * we ask atascsi to reserve one for us at init time.
3181 err_ccb = ap->ap_err_ccb;
3182 KKASSERT(err_ccb != NULL);
3183 err_ccb->ccb_xa.flags = 0;
3184 err_ccb->ccb_done = ahci_empty_done;
3190 ahci_put_err_ccb(struct ahci_ccb *ccb)
3192 struct ahci_port *ap = ccb->ccb_port;
3196 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) != 0);
3199 * No commands may be active on the chip
3201 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SNCQ) {
3202 sact = ahci_pread(ap, AHCI_PREG_SACT);
3204 panic("ahci_port_err_ccb(%d) but SACT %08x != 0\n",
3205 ccb->ccb_slot, sact);
3208 ci = ahci_pread(ap, AHCI_PREG_CI);
3210 panic("ahci_put_err_ccb(%d) but CI %08x != 0 "
3211 "(act=%08x sact=%08x)\n",
3213 ap->ap_active, ap->ap_sactive);
3216 KKASSERT(ccb == ap->ap_err_ccb);
3218 /* Restore outstanding command state */
3219 ap->ap_sactive = ap->ap_err_saved_sactive;
3220 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
3221 ap->ap_active = ap->ap_err_saved_active;
3223 ap->ap_flags &= ~AP_F_ERR_CCB_RESERVED;
3227 * Read log page to get NCQ error.
3229 * NOTE: NCQ not currently supported on port multipliers. XXX
3232 ahci_port_read_ncq_error(struct ahci_port *ap, int target)
3234 struct ata_log_page_10h *log;
3235 struct ahci_ccb *ccb;
3236 struct ahci_ccb *ccb2;
3237 struct ahci_cmd_hdr *cmd_slot;
3238 struct ata_fis_h2d *fis;
3242 kprintf("%s: READ LOG PAGE target %d\n", PORTNAME(ap),
3247 * Prep error CCB for READ LOG EXT, page 10h, 1 sector.
3249 * Getting err_ccb clears active/sactive/active_cnt, putting
3250 * it back restores the fields.
3252 ccb = ahci_get_err_ccb(ap);
3253 ccb->ccb_xa.flags = ATA_F_READ | ATA_F_POLL;
3254 ccb->ccb_xa.data = ap->ap_err_scratch;
3255 ccb->ccb_xa.datalen = 512;
3256 ccb->ccb_xa.complete = ahci_dummy_done;
3257 ccb->ccb_xa.at = ap->ap_ata[target];
3259 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
3260 bzero(fis, sizeof(*fis));
3261 fis->type = ATA_FIS_TYPE_H2D;
3262 fis->flags = ATA_H2D_FLAGS_CMD | target;
3263 fis->command = ATA_C_READ_LOG_EXT;
3264 fis->lba_low = 0x10; /* queued error log page (10h) */
3265 fis->sector_count = 1; /* number of sectors (1) */
3266 fis->sector_count_exp = 0;
3267 fis->lba_mid = 0; /* starting offset */
3268 fis->lba_mid_exp = 0;
3271 cmd_slot = ccb->ccb_cmd_hdr;
3272 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
3274 if (ahci_load_prdt(ccb) != 0) {
3279 ccb->ccb_xa.state = ATA_S_PENDING;
3280 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
3282 ahci_unload_prdt(ccb);
3285 ahci_unload_prdt(ccb);
3288 * Success, extract failed register set and tags from the scratch
3291 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
3292 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
3293 /* Not queued bit was set - wasn't an NCQ error? */
3294 kprintf("%s: read NCQ error page, but not an NCQ error?\n",
3298 /* Copy back the log record as a D2H register FIS. */
3299 err_slot = log->err_regs.type & ATA_LOG_10H_TYPE_TAG_MASK;
3301 ccb2 = &ap->ap_ccbs[err_slot];
3302 if (ccb2->ccb_xa.state == ATA_S_ONCHIP) {
3303 kprintf("%s: read NCQ error page slot=%d\n",
3304 ATANAME(ap, ccb2->ccb_xa.at),
3306 memcpy(&ccb2->ccb_xa.rfis, &log->err_regs,
3307 sizeof(struct ata_fis_d2h));
3308 ccb2->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
3309 ccb2->ccb_xa.rfis.flags = 0;
3311 kprintf("%s: read NCQ error page slot=%d, "
3312 "slot does not match any cmds\n",
3313 ATANAME(ccb2->ccb_port, ccb2->ccb_xa.at),
3319 ahci_put_err_ccb(ccb);
3320 kprintf("%s: DONE log page target %d err_slot=%d\n",
3321 PORTNAME(ap), target, err_slot);
3326 * Allocate memory for various structures DMAd by hardware. The maximum
3327 * number of segments for these tags is 1 so the DMA memory will have a
3328 * single physical base address.
3330 struct ahci_dmamem *
3331 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
3333 struct ahci_dmamem *adm;
3336 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
3338 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
3339 BUS_DMA_ZERO, &adm->adm_map);
3342 error = bus_dmamap_load(tag, adm->adm_map,
3344 bus_dma_tag_getmaxsize(tag),
3345 ahci_dmamem_saveseg, &adm->adm_busaddr,
3350 bus_dmamap_destroy(tag, adm->adm_map);
3351 adm->adm_map = NULL;
3352 adm->adm_tag = NULL;
3353 adm->adm_kva = NULL;
3355 kfree(adm, M_DEVBUF);
3363 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
3365 KKASSERT(error == 0);
3366 KKASSERT(nsegs == 1);
3367 *(bus_addr_t *)info = segs->ds_addr;
3372 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
3375 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
3376 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
3377 adm->adm_map = NULL;
3378 adm->adm_tag = NULL;
3379 adm->adm_kva = NULL;
3381 kfree(adm, M_DEVBUF);
3385 ahci_read(struct ahci_softc *sc, bus_size_t r)
3387 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
3388 BUS_SPACE_BARRIER_READ);
3389 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
3393 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
3395 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
3396 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
3397 BUS_SPACE_BARRIER_WRITE);
3401 ahci_pread(struct ahci_port *ap, bus_size_t r)
3403 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
3404 BUS_SPACE_BARRIER_READ);
3405 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
3409 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
3411 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
3412 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
3413 BUS_SPACE_BARRIER_WRITE);
3417 * Wait up to (timeout) milliseconds for the masked port register to
3420 * Timeout is in milliseconds.
3423 ahci_pwait_eq(struct ahci_port *ap, int timeout,
3424 bus_size_t r, u_int32_t mask, u_int32_t target)
3429 * Loop hard up to 100uS
3431 for (t = 0; t < 100; ++t) {
3432 if ((ahci_pread(ap, r) & mask) == target)
3434 ahci_os_hardsleep(1); /* us */
3438 timeout -= ahci_os_softsleep();
3439 if ((ahci_pread(ap, r) & mask) == target)
3441 } while (timeout > 0);
3446 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
3452 * Loop hard up to 100uS
3454 for (t = 0; t < 100; ++t) {
3455 if ((ahci_read(sc, r) & mask) != target)
3457 ahci_os_hardsleep(1); /* us */
3461 * And one millisecond the slow way
3465 t -= ahci_os_softsleep();
3466 if ((ahci_read(sc, r) & mask) != target)
3475 * Acquire an ata transfer.
3477 * Pass a NULL at for direct-attached transfers, and a non-NULL at for
3478 * targets that go through the port multiplier.
3481 ahci_ata_get_xfer(struct ahci_port *ap, struct ata_port *at)
3483 struct ahci_ccb *ccb;
3485 ccb = ahci_get_ccb(ap);
3487 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
3492 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
3493 PORTNAME(ap), ccb->ccb_slot);
3495 bzero(ccb->ccb_xa.fis, sizeof(*ccb->ccb_xa.fis));
3496 ccb->ccb_xa.at = at;
3497 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
3499 return (&ccb->ccb_xa);
3503 ahci_ata_put_xfer(struct ata_xfer *xa)
3505 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
3507 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
3513 ahci_ata_cmd(struct ata_xfer *xa)
3515 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
3516 struct ahci_cmd_hdr *cmd_slot;
3518 KKASSERT(xa->state == ATA_S_SETUP);
3520 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
3522 ccb->ccb_done = ahci_ata_cmd_done;
3524 cmd_slot = ccb->ccb_cmd_hdr;
3525 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
3526 if (ccb->ccb_xa.at) {
3527 cmd_slot->flags |= htole16(ccb->ccb_xa.at->at_target <<
3528 AHCI_CMD_LIST_FLAG_PMP_SHIFT);
3531 if (xa->flags & ATA_F_WRITE)
3532 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
3534 if (xa->flags & ATA_F_PACKET)
3535 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
3537 if (ahci_load_prdt(ccb) != 0)
3540 xa->state = ATA_S_PENDING;
3542 if (xa->flags & ATA_F_POLL)
3543 return (ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout));
3546 KKASSERT((xa->flags & ATA_F_TIMEOUT_EXPIRED) == 0);
3547 xa->flags |= ATA_F_TIMEOUT_DESIRED;
3554 xa->state = ATA_S_ERROR;
3557 return (ATA_S_ERROR);
3561 ahci_ata_cmd_done(struct ahci_ccb *ccb)
3563 struct ata_xfer *xa = &ccb->ccb_xa;
3567 * NOTE: Callout does not lock port and may race us modifying
3568 * the flags, so make sure its stopped.
3570 * A callout race can clean up the ccb. A change in the
3571 * serial number should catch this condition.
3573 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
3574 serial = ccb->ccb_xa.serial;
3575 callout_stop_sync(&ccb->ccb_timeout);
3576 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
3577 if (serial != ccb->ccb_xa.serial) {
3578 kprintf("%s: Warning: timeout race ccb %p\n",
3579 PORTNAME(ccb->ccb_port), ccb);
3583 xa->flags &= ~(ATA_F_TIMEOUT_DESIRED | ATA_F_TIMEOUT_EXPIRED);
3584 ccb->ccb_port->ap_expired &= ~(1 << ccb->ccb_slot);
3586 KKASSERT(xa->state != ATA_S_ONCHIP && xa->state != ATA_S_PUT);
3587 ahci_unload_prdt(ccb);
3589 if (xa->state != ATA_S_TIMEOUT)
3594 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags
3595 * while the callout is runing.
3597 * We can't safely get the port lock here or delay, we could block
3598 * the callout thread.
3601 ahci_ata_cmd_timeout_unserialized(void *arg)
3603 struct ahci_ccb *ccb = arg;
3604 struct ahci_port *ap = ccb->ccb_port;
3606 KKASSERT(ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING);
3607 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
3608 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_EXPIRED;
3609 ahci_os_signal_port_thread(ap, AP_SIGF_TIMEOUT);
3613 * Timeout code, typically called when the port command processor is running.
3615 * We have to be very very careful here. We cannot stop the port unless
3616 * CR is already clear or the only active commands remaining are timed-out
3617 * ones. Otherwise stopping the port will race the command processor and
3618 * we can lose events. While we can theoretically just restart everything
3619 * that could result in a double-issue which will not work for ATAPI commands.
3622 ahci_ata_cmd_timeout(struct ahci_ccb *ccb)
3624 struct ata_xfer *xa = &ccb->ccb_xa;
3625 struct ahci_port *ap = ccb->ccb_port;
3626 struct ata_port *at;
3631 at = ccb->ccb_xa.at;
3633 kprintf("%s: CMD TIMEOUT state=%d slot=%d\n"
3635 "\tsactive=%08x active=%08x expired=%08x\n"
3636 "\t sact=%08x ci=%08x\n"
3639 ccb->ccb_xa.state, ccb->ccb_slot,
3640 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
3641 ap->ap_sactive, ap->ap_active, ap->ap_expired,
3642 ahci_pread(ap, AHCI_PREG_SACT),
3643 ahci_pread(ap, AHCI_PREG_CI),
3644 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS
3649 * NOTE: Timeout will not be running if the command was polled.
3650 * If we got here at least one of these flags should be set.
3652 KKASSERT(xa->flags & (ATA_F_POLL | ATA_F_TIMEOUT_DESIRED |
3653 ATA_F_TIMEOUT_RUNNING));
3654 xa->flags &= ~(ATA_F_TIMEOUT_RUNNING | ATA_F_TIMEOUT_EXPIRED);
3656 if (ccb->ccb_xa.state == ATA_S_PENDING) {
3657 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3658 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3661 ahci_issue_pending_commands(ap, NULL);
3664 if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
3665 kprintf("%s: Unexpected state during timeout: %d\n",
3666 ATANAME(ap, at), ccb->ccb_xa.state);
3671 * Ok, we can only get this command off the chip if CR is inactive
3672 * or if the only commands running on the chip are all expired.
3673 * Otherwise we have to wait until the port is in a safe state.
3675 * Do not set state here, it will cause polls to return when the
3676 * ccb is not yet off the chip.
3678 ap->ap_expired |= 1 << ccb->ccb_slot;
3680 if ((ahci_pread(ap, AHCI_PREG_CMD) & AHCI_PREG_CMD_CR) &&
3681 (ap->ap_active | ap->ap_sactive) != ap->ap_expired) {
3683 * If using FBSS or NCQ we can't safely stop the port
3686 kprintf("%s: Deferred timeout until its safe, slot %d\n",
3687 ATANAME(ap, at), ccb->ccb_slot);
3692 * We can safely stop the port and process all expired ccb's,
3693 * which will include our current ccb.
3695 ci_saved = (ap->ap_sactive) ? ahci_pread(ap, AHCI_PREG_SACT) :
3696 ahci_pread(ap, AHCI_PREG_CI);
3697 ahci_port_stop(ap, 0);
3699 while (ap->ap_expired) {
3700 slot = ffs(ap->ap_expired) - 1;
3701 ap->ap_expired &= ~(1 << slot);
3702 ci_saved &= ~(1 << slot);
3703 ccb = &ap->ap_ccbs[slot];
3704 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3705 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
3706 KKASSERT(ap->ap_sactive & (1 << slot));
3707 ap->ap_sactive &= ~(1 << slot);
3709 KKASSERT(ap->ap_active & (1 << slot));
3710 ap->ap_active &= ~(1 << slot);
3711 --ap->ap_active_cnt;
3714 ccb->ccb_xa.complete(&ccb->ccb_xa);
3716 /* ccb invalid now */
3719 * We can safely CLO the port to clear any BSY/DRQ, a case which
3720 * can occur with port multipliers. This will unbrick the port
3721 * and allow commands to other targets behind the PM continue.
3724 * Finally, once the port has been restarted we can issue any
3725 * previously saved pending commands, and run the port interrupt
3726 * code to handle any completions which may have occured when
3729 if (ahci_pread(ap, AHCI_PREG_TFD) &
3730 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
3731 kprintf("%s: Warning, issuing CLO after timeout\n",
3735 ahci_port_start(ap);
3738 * We absolutely must make sure the chipset cleared activity on
3739 * all slots. This sometimes might not happen due to races with
3740 * a chipset interrupt which stops the port before we can manage
3741 * to. For some reason some chipsets don't clear the active
3742 * commands when we turn off CMD_ST after the chip has stopped
3743 * operations itself.
3745 if (ahci_pactive(ap) != 0) {
3746 ahci_port_stop(ap, 0);
3747 ahci_port_start(ap);
3748 if ((mask = ahci_pactive(ap)) != 0) {
3749 kprintf("%s: quick-timeout: chipset failed "
3750 "to clear active cmds %08x\n",
3751 PORTNAME(ap), mask);
3754 ahci_issue_saved_commands(ap, ci_saved & ~ap->ap_expired);
3755 ahci_issue_pending_commands(ap, NULL);
3756 ahci_port_intr(ap, 0);
3760 * Issue a previously saved set of commands
3763 ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t ci_saved)
3766 KKASSERT(!((ap->ap_active & ci_saved) &&
3767 (ap->ap_sactive & ci_saved)));
3768 KKASSERT((ci_saved & ap->ap_expired) == 0);
3769 if (ap->ap_sactive & ci_saved)
3770 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
3771 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
3776 * Used by the softreset, pmprobe, and read_ncq_error only, in very
3777 * specialized, controlled circumstances.
3779 * Only one command may be pending.
3782 ahci_quick_timeout(struct ahci_ccb *ccb)
3784 struct ahci_port *ap = ccb->ccb_port;
3787 switch (ccb->ccb_xa.state) {
3789 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3790 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3794 * We have to clear the command on-chip.
3796 KKASSERT(ap->ap_active == (1 << ccb->ccb_slot) &&
3797 ap->ap_sactive == 0);
3798 ahci_port_stop(ap, 0);
3799 ahci_port_start(ap);
3800 if (ahci_pactive(ap) != 0) {
3801 ahci_port_stop(ap, 0);
3802 ahci_port_start(ap);
3803 if ((mask = ahci_pactive(ap)) != 0) {
3804 kprintf("%s: quick-timeout: chipset failed "
3805 "to clear active cmds %08x\n",
3806 PORTNAME(ap), mask);
3810 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3811 ap->ap_active &= ~(1 << ccb->ccb_slot);
3812 KKASSERT(ap->ap_active_cnt > 0);
3813 --ap->ap_active_cnt;
3816 panic("%s: ahci_quick_timeout: ccb in bad state %d",
3817 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_xa.state);
3822 ahci_dummy_done(struct ata_xfer *xa)
3827 ahci_empty_done(struct ahci_ccb *ccb)
3832 ahci_set_feature(struct ahci_port *ap, struct ata_port *atx,
3833 int feature, int enable)
3835 struct ata_port *at;
3836 struct ata_xfer *xa;
3839 at = atx ? atx : ap->ap_ata[0];
3841 xa = ahci_ata_get_xfer(ap, atx);
3843 xa->fis->type = ATA_FIS_TYPE_H2D;
3844 xa->fis->flags = ATA_H2D_FLAGS_CMD | at->at_target;
3845 xa->fis->command = ATA_C_SET_FEATURES;
3846 xa->fis->features = enable ? ATA_C_SATA_FEATURE_ENA :
3847 ATA_C_SATA_FEATURE_DIS;
3848 xa->fis->sector_count = feature;
3849 xa->fis->control = ATA_FIS_CONTROL_4BIT;
3851 xa->complete = ahci_dummy_done;
3853 xa->flags = ATA_F_POLL;
3856 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE)
3860 ahci_ata_put_xfer(xa);
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