sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2008, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - If the driver uses the same serializer for the interrupt as for the
  71  *   ifnet, most of the serialization will be done automatically for the
  72  *   driver.
  73  *
  74  * - ifmedia entry points will be serialized by the ifmedia code using the
  75  *   ifnet serializer.
  76  *
  77  * - if_* entry points except for if_input will be serialized by the IF
  78  *   and protocol layers.
  79  *
  80  * - The device driver must be sure to serialize access from timeout code
  81  *   installed by the device driver.
  82  *
  83  * - The device driver typically holds the serializer at the time it wishes
  84  *   to call if_input.
  85  *
  86  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  87  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  88  *   the hardware interrupt in order to avoid handler execution races from
  89  *   scheduled interrupt threads.
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_ifpoll.h"
  97
  98 #include <sys/param.h>
  99 #include <sys/bus.h>
 100 #include <sys/endian.h>
 101 #include <sys/interrupt.h>
 102 #include <sys/kernel.h>
 103 #include <sys/ktr.h>
 104 #include <sys/malloc.h>
 105 #include <sys/mbuf.h>
 106 #include <sys/proc.h>
 107 #include <sys/rman.h>
 108 #include <sys/serialize.h>
 109 #include <sys/socket.h>
 110 #include <sys/sockio.h>
 111 #include <sys/sysctl.h>
 112 #include <sys/systm.h>
 113
 114 #include <net/bpf.h>
 115 #include <net/ethernet.h>
 116 #include <net/if.h>
 117 #include <net/if_arp.h>
 118 #include <net/if_dl.h>
 119 #include <net/if_media.h>
 120 #include <net/if_poll.h>
 121 #include <net/ifq_var.h>
 122 #include <net/vlan/if_vlan_var.h>
 123 #include <net/vlan/if_vlan_ether.h>
 124
 125 #include <netinet/ip.h>
 126 #include <netinet/tcp.h>
 127 #include <netinet/udp.h>
 128
 129 #include <bus/pci/pcivar.h>
 130 #include <bus/pci/pcireg.h>
 131
 132 #include <dev/netif/ig_hal/e1000_api.h>
 133 #include <dev/netif/ig_hal/e1000_82571.h>
 134 #include <dev/netif/em/if_em.h>
 135
 136 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 137 #define EM_VER  " 7.2.4"
 138
 139 #define _EM_DEVICE(id, ret)     \
 140         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 141 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 142 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 143 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 144
 145 static const struct em_vendor_info em_vendor_info_array[] = {
 146         EM_DEVICE(82540EM),
 147         EM_DEVICE(82540EM_LOM),
 148         EM_DEVICE(82540EP),
 149         EM_DEVICE(82540EP_LOM),
 150         EM_DEVICE(82540EP_LP),
 151
 152         EM_DEVICE(82541EI),
 153         EM_DEVICE(82541ER),
 154         EM_DEVICE(82541ER_LOM),
 155         EM_DEVICE(82541EI_MOBILE),
 156         EM_DEVICE(82541GI),
 157         EM_DEVICE(82541GI_LF),
 158         EM_DEVICE(82541GI_MOBILE),
 159
 160         EM_DEVICE(82542),
 161
 162         EM_DEVICE(82543GC_FIBER),
 163         EM_DEVICE(82543GC_COPPER),
 164
 165         EM_DEVICE(82544EI_COPPER),
 166         EM_DEVICE(82544EI_FIBER),
 167         EM_DEVICE(82544GC_COPPER),
 168         EM_DEVICE(82544GC_LOM),
 169
 170         EM_DEVICE(82545EM_COPPER),
 171         EM_DEVICE(82545EM_FIBER),
 172         EM_DEVICE(82545GM_COPPER),
 173         EM_DEVICE(82545GM_FIBER),
 174         EM_DEVICE(82545GM_SERDES),
 175
 176         EM_DEVICE(82546EB_COPPER),
 177         EM_DEVICE(82546EB_FIBER),
 178         EM_DEVICE(82546EB_QUAD_COPPER),
 179         EM_DEVICE(82546GB_COPPER),
 180         EM_DEVICE(82546GB_FIBER),
 181         EM_DEVICE(82546GB_SERDES),
 182         EM_DEVICE(82546GB_PCIE),
 183         EM_DEVICE(82546GB_QUAD_COPPER),
 184         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 185
 186         EM_DEVICE(82547EI),
 187         EM_DEVICE(82547EI_MOBILE),
 188         EM_DEVICE(82547GI),
 189
 190         EM_EMX_DEVICE(82571EB_COPPER),
 191         EM_EMX_DEVICE(82571EB_FIBER),
 192         EM_EMX_DEVICE(82571EB_SERDES),
 193         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 194         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 195         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 196         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 197         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 198         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 199         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 200
 201         EM_EMX_DEVICE(82572EI_COPPER),
 202         EM_EMX_DEVICE(82572EI_FIBER),
 203         EM_EMX_DEVICE(82572EI_SERDES),
 204         EM_EMX_DEVICE(82572EI),
 205
 206         EM_EMX_DEVICE(82573E),
 207         EM_EMX_DEVICE(82573E_IAMT),
 208         EM_EMX_DEVICE(82573L),
 209
 210         EM_DEVICE(82583V),
 211
 212         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 213         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 214         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 215         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 216
 217         EM_DEVICE(ICH8_IGP_M_AMT),
 218         EM_DEVICE(ICH8_IGP_AMT),
 219         EM_DEVICE(ICH8_IGP_C),
 220         EM_DEVICE(ICH8_IFE),
 221         EM_DEVICE(ICH8_IFE_GT),
 222         EM_DEVICE(ICH8_IFE_G),
 223         EM_DEVICE(ICH8_IGP_M),
 224         EM_DEVICE(ICH8_82567V_3),
 225
 226         EM_DEVICE(ICH9_IGP_M_AMT),
 227         EM_DEVICE(ICH9_IGP_AMT),
 228         EM_DEVICE(ICH9_IGP_C),
 229         EM_DEVICE(ICH9_IGP_M),
 230         EM_DEVICE(ICH9_IGP_M_V),
 231         EM_DEVICE(ICH9_IFE),
 232         EM_DEVICE(ICH9_IFE_GT),
 233         EM_DEVICE(ICH9_IFE_G),
 234         EM_DEVICE(ICH9_BM),
 235
 236         EM_EMX_DEVICE(82574L),
 237         EM_EMX_DEVICE(82574LA),
 238
 239         EM_DEVICE(ICH10_R_BM_LM),
 240         EM_DEVICE(ICH10_R_BM_LF),
 241         EM_DEVICE(ICH10_R_BM_V),
 242         EM_DEVICE(ICH10_D_BM_LM),
 243         EM_DEVICE(ICH10_D_BM_LF),
 244         EM_DEVICE(ICH10_D_BM_V),
 245
 246         EM_DEVICE(PCH_M_HV_LM),
 247         EM_DEVICE(PCH_M_HV_LC),
 248         EM_DEVICE(PCH_D_HV_DM),
 249         EM_DEVICE(PCH_D_HV_DC),
 250
 251         EM_DEVICE(PCH2_LV_LM),
 252         EM_DEVICE(PCH2_LV_V),
 253
 254         /* required last entry */
 255         EM_DEVICE_NULL
 256 };
 257
 258 static int      em_probe(device_t);
 259 static int      em_attach(device_t);
 260 static int      em_detach(device_t);
 261 static int      em_shutdown(device_t);
 262 static int      em_suspend(device_t);
 263 static int      em_resume(device_t);
 264
 265 static void     em_init(void *);
 266 static void     em_stop(struct adapter *);
 267 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 268 static void     em_start(struct ifnet *);
 269 #ifdef IFPOLL_ENABLE
 270 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 271 static void     em_npoll_compat(struct ifnet *, void *, int);
 272 #endif
 273 static void     em_watchdog(struct ifnet *);
 274 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 275 static int      em_media_change(struct ifnet *);
 276 static void     em_timer(void *);
 277
 278 static void     em_intr(void *);
 279 static void     em_intr_mask(void *);
 280 static void     em_intr_body(struct adapter *, boolean_t);
 281 static void     em_rxeof(struct adapter *, int);
 282 static void     em_txeof(struct adapter *);
 283 static void     em_tx_collect(struct adapter *);
 284 static void     em_tx_purge(struct adapter *);
 285 static void     em_enable_intr(struct adapter *);
 286 static void     em_disable_intr(struct adapter *);
 287
 288 static int      em_dma_malloc(struct adapter *, bus_size_t,
 289                     struct em_dma_alloc *);
 290 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 291 static void     em_init_tx_ring(struct adapter *);
 292 static int      em_init_rx_ring(struct adapter *);
 293 static int      em_create_tx_ring(struct adapter *);
 294 static int      em_create_rx_ring(struct adapter *);
 295 static void     em_destroy_tx_ring(struct adapter *, int);
 296 static void     em_destroy_rx_ring(struct adapter *, int);
 297 static int      em_newbuf(struct adapter *, int, int);
 298 static int      em_encap(struct adapter *, struct mbuf **);
 299 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 300                     struct mbuf *);
 301 static int      em_txcsum(struct adapter *, struct mbuf *,
 302                     uint32_t *, uint32_t *);
 303 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 304 static int      em_tso_setup(struct adapter *, struct mbuf *,
 305                     uint32_t *, uint32_t *);
 306
 307 static int      em_get_hw_info(struct adapter *);
 308 static int      em_is_valid_eaddr(const uint8_t *);
 309 static int      em_alloc_pci_res(struct adapter *);
 310 static void     em_free_pci_res(struct adapter *);
 311 static int      em_reset(struct adapter *);
 312 static void     em_setup_ifp(struct adapter *);
 313 static void     em_init_tx_unit(struct adapter *);
 314 static void     em_init_rx_unit(struct adapter *);
 315 static void     em_update_stats(struct adapter *);
 316 static void     em_set_promisc(struct adapter *);
 317 static void     em_disable_promisc(struct adapter *);
 318 static void     em_set_multi(struct adapter *);
 319 static void     em_update_link_status(struct adapter *);
 320 static void     em_smartspeed(struct adapter *);
 321 static void     em_set_itr(struct adapter *, uint32_t);
 322 static void     em_disable_aspm(struct adapter *);
 323
 324 /* Hardware workarounds */
 325 static int      em_82547_fifo_workaround(struct adapter *, int);
 326 static void     em_82547_update_fifo_head(struct adapter *, int);
 327 static int      em_82547_tx_fifo_reset(struct adapter *);
 328 static void     em_82547_move_tail(void *);
 329 static void     em_82547_move_tail_serialized(struct adapter *);
 330 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 331
 332 static void     em_print_debug_info(struct adapter *);
 333 static void     em_print_nvm_info(struct adapter *);
 334 static void     em_print_hw_stats(struct adapter *);
 335
 336 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 337 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 338 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 339 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 340 static void     em_add_sysctl(struct adapter *adapter);
 341
 342 /* Management and WOL Support */
 343 static void     em_get_mgmt(struct adapter *);
 344 static void     em_rel_mgmt(struct adapter *);
 345 static void     em_get_hw_control(struct adapter *);
 346 static void     em_rel_hw_control(struct adapter *);
 347 static void     em_enable_wol(device_t);
 348
 349 static device_method_t em_methods[] = {
 350         /* Device interface */
 351         DEVMETHOD(device_probe,         em_probe),
 352         DEVMETHOD(device_attach,        em_attach),
 353         DEVMETHOD(device_detach,        em_detach),
 354         DEVMETHOD(device_shutdown,      em_shutdown),
 355         DEVMETHOD(device_suspend,       em_suspend),
 356         DEVMETHOD(device_resume,        em_resume),
 357         { 0, 0 }
 358 };
 359
 360 static driver_t em_driver = {
 361         "em",
 362         em_methods,
 363         sizeof(struct adapter),
 364 };
 365
 366 static devclass_t em_devclass;
 367
 368 DECLARE_DUMMY_MODULE(if_em);
 369 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 370 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 371
 372 /*
 373  * Tunables
 374  */
 375 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 376 static int      em_rxd = EM_DEFAULT_RXD;
 377 static int      em_txd = EM_DEFAULT_TXD;
 378 static int      em_smart_pwr_down = 0;
 379
 380 /* Controls whether promiscuous also shows bad packets */
 381 static int      em_debug_sbp = FALSE;
 382
 383 static int      em_82573_workaround = 1;
 384 static int      em_msi_enable = 1;
 385
 386 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 387 TUNABLE_INT("hw.em.rxd", &em_rxd);
 388 TUNABLE_INT("hw.em.txd", &em_txd);
 389 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 390 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 391 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 392 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 393
 394 /* Global used in WOL setup with multiport cards */
 395 static int      em_global_quad_port_a = 0;
 396
 397 /* Set this to one to display debug statistics */
 398 static int      em_display_debug_stats = 0;
 399
 400 #if !defined(KTR_IF_EM)
 401 #define KTR_IF_EM       KTR_ALL
 402 #endif
 403 KTR_INFO_MASTER(if_em);
 404 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 405 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 406 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 407 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 408 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 409 #define logif(name)     KTR_LOG(if_em_ ## name)
 410
 411 static int
 412 em_probe(device_t dev)
 413 {
 414         const struct em_vendor_info *ent;
 415         uint16_t vid, did;
 416
 417         vid = pci_get_vendor(dev);
 418         did = pci_get_device(dev);
 419
 420         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 421                 if (vid == ent->vendor_id && did == ent->device_id) {
 422                         device_set_desc(dev, ent->desc);
 423                         device_set_async_attach(dev, TRUE);
 424                         return (ent->ret);
 425                 }
 426         }
 427         return (ENXIO);
 428 }
 429
 430 static int
 431 em_attach(device_t dev)
 432 {
 433         struct adapter *adapter = device_get_softc(dev);
 434         struct ifnet *ifp = &adapter->arpcom.ac_if;
 435         int tsize, rsize;
 436         int error = 0;
 437         uint16_t eeprom_data, device_id, apme_mask;
 438         driver_intr_t *intr_func;
 439
 440         adapter->dev = adapter->osdep.dev = dev;
 441
 442         callout_init_mp(&adapter->timer);
 443         callout_init_mp(&adapter->tx_fifo_timer);
 444
 445         /* Determine hardware and mac info */
 446         error = em_get_hw_info(adapter);
 447         if (error) {
 448                 device_printf(dev, "Identify hardware failed\n");
 449                 goto fail;
 450         }
 451
 452         /* Setup PCI resources */
 453         error = em_alloc_pci_res(adapter);
 454         if (error) {
 455                 device_printf(dev, "Allocation of PCI resources failed\n");
 456                 goto fail;
 457         }
 458
 459         /*
 460          * For ICH8 and family we need to map the flash memory,
 461          * and this must happen after the MAC is identified.
 462          */
 463         if (adapter->hw.mac.type == e1000_ich8lan ||
 464             adapter->hw.mac.type == e1000_ich9lan ||
 465             adapter->hw.mac.type == e1000_ich10lan ||
 466             adapter->hw.mac.type == e1000_pchlan ||
 467             adapter->hw.mac.type == e1000_pch2lan) {
 468                 adapter->flash_rid = EM_BAR_FLASH;
 469
 470                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 471                                         &adapter->flash_rid, RF_ACTIVE);
 472                 if (adapter->flash == NULL) {
 473                         device_printf(dev, "Mapping of Flash failed\n");
 474                         error = ENXIO;
 475                         goto fail;
 476                 }
 477                 adapter->osdep.flash_bus_space_tag =
 478                     rman_get_bustag(adapter->flash);
 479                 adapter->osdep.flash_bus_space_handle =
 480                     rman_get_bushandle(adapter->flash);
 481
 482                 /*
 483                  * This is used in the shared code
 484                  * XXX this goof is actually not used.
 485                  */
 486                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 487         }
 488
 489         switch (adapter->hw.mac.type) {
 490         case e1000_82571:
 491         case e1000_82572:
 492                 /*
 493                  * Pullup extra 4bytes into the first data segment, see:
 494                  * 82571/82572 specification update errata #7
 495                  *
 496                  * NOTE:
 497                  * 4bytes instead of 2bytes, which are mentioned in the
 498                  * errata, are pulled; mainly to keep rest of the data
 499                  * properly aligned.
 500                  */
 501                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 502                 /* FALL THROUGH */
 503
 504         case e1000_82573:
 505         case e1000_82574:
 506         case e1000_80003es2lan:
 507                 adapter->flags |= EM_FLAG_TSO;
 508                 break;
 509
 510         default:
 511                 break;
 512         }
 513
 514         /* Do Shared Code initialization */
 515         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 516                 device_printf(dev, "Setup of Shared code failed\n");
 517                 error = ENXIO;
 518                 goto fail;
 519         }
 520
 521         e1000_get_bus_info(&adapter->hw);
 522
 523         /*
 524          * Validate number of transmit and receive descriptors.  It
 525          * must not exceed hardware maximum, and must be multiple
 526          * of E1000_DBA_ALIGN.
 527          */
 528         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 529             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 530             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 531             em_txd < EM_MIN_TXD) {
 532                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 533                     EM_DEFAULT_TXD, em_txd);
 534                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 535         } else {
 536                 adapter->num_tx_desc = em_txd;
 537         }
 538         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 539             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 540             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 541             em_rxd < EM_MIN_RXD) {
 542                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 543                     EM_DEFAULT_RXD, em_rxd);
 544                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 545         } else {
 546                 adapter->num_rx_desc = em_rxd;
 547         }
 548
 549         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 550         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 551         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 552         adapter->rx_buffer_len = MCLBYTES;
 553
 554         /*
 555          * Interrupt throttle rate
 556          */
 557         if (em_int_throttle_ceil == 0) {
 558                 adapter->int_throttle_ceil = 0;
 559         } else {
 560                 int throttle = em_int_throttle_ceil;
 561
 562                 if (throttle < 0)
 563                         throttle = EM_DEFAULT_ITR;
 564
 565                 /* Recalculate the tunable value to get the exact frequency. */
 566                 throttle = 1000000000 / 256 / throttle;
 567
 568                 /* Upper 16bits of ITR is reserved and should be zero */
 569                 if (throttle & 0xffff0000)
 570                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 571
 572                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 573         }
 574
 575         e1000_init_script_state_82541(&adapter->hw, TRUE);
 576         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 577
 578         /* Copper options */
 579         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 580                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 581                 adapter->hw.phy.disable_polarity_correction = FALSE;
 582                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 583         }
 584
 585         /* Set the frame limits assuming standard ethernet sized frames. */
 586         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 587         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 588
 589         /* This controls when hardware reports transmit completion status. */
 590         adapter->hw.mac.report_tx_early = 1;
 591
 592         /*
 593          * Create top level busdma tag
 594          */
 595         error = bus_dma_tag_create(NULL, 1, 0,
 596                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 597                         NULL, NULL,
 598                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 599                         0, &adapter->parent_dtag);
 600         if (error) {
 601                 device_printf(dev, "could not create top level DMA tag\n");
 602                 goto fail;
 603         }
 604
 605         /*
 606          * Allocate Transmit Descriptor ring
 607          */
 608         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 609                          EM_DBA_ALIGN);
 610         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 611         if (error) {
 612                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 613                 goto fail;
 614         }
 615         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 616
 617         /*
 618          * Allocate Receive Descriptor ring
 619          */
 620         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 621                          EM_DBA_ALIGN);
 622         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 623         if (error) {
 624                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 625                 goto fail;
 626         }
 627         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 628
 629         /* Allocate multicast array memory. */
 630         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 631             M_DEVBUF, M_WAITOK);
 632
 633         /* Indicate SOL/IDER usage */
 634         if (e1000_check_reset_block(&adapter->hw)) {
 635                 device_printf(dev,
 636                     "PHY reset is blocked due to SOL/IDER session.\n");
 637         }
 638
 639         /*
 640          * Start from a known state, this is important in reading the
 641          * nvm and mac from that.
 642          */
 643         e1000_reset_hw(&adapter->hw);
 644
 645         /* Make sure we have a good EEPROM before we read from it */
 646         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 647                 /*
 648                  * Some PCI-E parts fail the first check due to
 649                  * the link being in sleep state, call it again,
 650                  * if it fails a second time its a real issue.
 651                  */
 652                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 653                         device_printf(dev,
 654                             "The EEPROM Checksum Is Not Valid\n");
 655                         error = EIO;
 656                         goto fail;
 657                 }
 658         }
 659
 660         /* Copy the permanent MAC address out of the EEPROM */
 661         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 662                 device_printf(dev, "EEPROM read error while reading MAC"
 663                     " address\n");
 664                 error = EIO;
 665                 goto fail;
 666         }
 667         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 668                 device_printf(dev, "Invalid MAC address\n");
 669                 error = EIO;
 670                 goto fail;
 671         }
 672
 673         /* Allocate transmit descriptors and buffers */
 674         error = em_create_tx_ring(adapter);
 675         if (error) {
 676                 device_printf(dev, "Could not setup transmit structures\n");
 677                 goto fail;
 678         }
 679
 680         /* Allocate receive descriptors and buffers */
 681         error = em_create_rx_ring(adapter);
 682         if (error) {
 683                 device_printf(dev, "Could not setup receive structures\n");
 684                 goto fail;
 685         }
 686
 687         /* Manually turn off all interrupts */
 688         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 689
 690         /* Determine if we have to control management hardware */
 691         if (e1000_enable_mng_pass_thru(&adapter->hw))
 692                 adapter->flags |= EM_FLAG_HAS_MGMT;
 693
 694         /*
 695          * Setup Wake-on-Lan
 696          */
 697         apme_mask = EM_EEPROM_APME;
 698         eeprom_data = 0;
 699         switch (adapter->hw.mac.type) {
 700         case e1000_82542:
 701         case e1000_82543:
 702                 break;
 703
 704         case e1000_82573:
 705         case e1000_82583:
 706                 adapter->flags |= EM_FLAG_HAS_AMT;
 707                 /* FALL THROUGH */
 708
 709         case e1000_82546:
 710         case e1000_82546_rev_3:
 711         case e1000_82571:
 712         case e1000_82572:
 713         case e1000_80003es2lan:
 714                 if (adapter->hw.bus.func == 1) {
 715                         e1000_read_nvm(&adapter->hw,
 716                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 717                 } else {
 718                         e1000_read_nvm(&adapter->hw,
 719                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 720                 }
 721                 break;
 722
 723         case e1000_ich8lan:
 724         case e1000_ich9lan:
 725         case e1000_ich10lan:
 726         case e1000_pchlan:
 727         case e1000_pch2lan:
 728                 apme_mask = E1000_WUC_APME;
 729                 adapter->flags |= EM_FLAG_HAS_AMT;
 730                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 731                 break;
 732
 733         default:
 734                 e1000_read_nvm(&adapter->hw,
 735                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 736                 break;
 737         }
 738         if (eeprom_data & apme_mask)
 739                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 740
 741         /*
 742          * We have the eeprom settings, now apply the special cases
 743          * where the eeprom may be wrong or the board won't support
 744          * wake on lan on a particular port
 745          */
 746         device_id = pci_get_device(dev);
 747         switch (device_id) {
 748         case E1000_DEV_ID_82546GB_PCIE:
 749                 adapter->wol = 0;
 750                 break;
 751
 752         case E1000_DEV_ID_82546EB_FIBER:
 753         case E1000_DEV_ID_82546GB_FIBER:
 754         case E1000_DEV_ID_82571EB_FIBER:
 755                 /*
 756                  * Wake events only supported on port A for dual fiber
 757                  * regardless of eeprom setting
 758                  */
 759                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 760                     E1000_STATUS_FUNC_1)
 761                         adapter->wol = 0;
 762                 break;
 763
 764         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 765         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 766         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 767         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 768                 /* if quad port adapter, disable WoL on all but port A */
 769                 if (em_global_quad_port_a != 0)
 770                         adapter->wol = 0;
 771                 /* Reset for multiple quad port adapters */
 772                 if (++em_global_quad_port_a == 4)
 773                         em_global_quad_port_a = 0;
 774                 break;
 775         }
 776
 777         /* XXX disable wol */
 778         adapter->wol = 0;
 779
 780         /* Setup OS specific network interface */
 781         em_setup_ifp(adapter);
 782
 783         /* Add sysctl tree, must after em_setup_ifp() */
 784         em_add_sysctl(adapter);
 785
 786 #ifdef IFPOLL_ENABLE
 787         /* Polling setup */
 788         ifpoll_compat_setup(&adapter->npoll,
 789             &adapter->sysctl_ctx, adapter->sysctl_tree, device_get_unit(dev),
 790             ifp->if_serializer);
 791 #endif
 792
 793         /* Reset the hardware */
 794         error = em_reset(adapter);
 795         if (error) {
 796                 device_printf(dev, "Unable to reset the hardware\n");
 797                 goto fail;
 798         }
 799
 800         /* Initialize statistics */
 801         em_update_stats(adapter);
 802
 803         adapter->hw.mac.get_link_status = 1;
 804         em_update_link_status(adapter);
 805
 806         /* Do we need workaround for 82544 PCI-X adapter? */
 807         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 808             adapter->hw.mac.type == e1000_82544)
 809                 adapter->pcix_82544 = TRUE;
 810         else
 811                 adapter->pcix_82544 = FALSE;
 812
 813         if (adapter->pcix_82544) {
 814                 /*
 815                  * 82544 on PCI-X may split one TX segment
 816                  * into two TX descs, so we double its number
 817                  * of spare TX desc here.
 818                  */
 819                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 820         } else {
 821                 adapter->spare_tx_desc = EM_TX_SPARE;
 822         }
 823         if (adapter->flags & EM_FLAG_TSO)
 824                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 825
 826         /*
 827          * Keep following relationship between spare_tx_desc, oact_tx_desc
 828          * and tx_int_nsegs:
 829          * (spare_tx_desc + EM_TX_RESERVED) <=
 830          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 831          */
 832         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 833         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 834                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 835         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 836                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 837
 838         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 839         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 840                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 841
 842         /* Non-AMT based hardware can now take control from firmware */
 843         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 844             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 845                 em_get_hw_control(adapter);
 846
 847         /*
 848          * Missing Interrupt Following ICR read:
 849          *
 850          * 82571/82572 specification update errata #76
 851          * 82573 specification update errata #31
 852          * 82574 specification update errata #12
 853          * 82583 specification update errata #4
 854          */
 855         intr_func = em_intr;
 856         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 857             (adapter->hw.mac.type == e1000_82571 ||
 858              adapter->hw.mac.type == e1000_82572 ||
 859              adapter->hw.mac.type == e1000_82573 ||
 860              adapter->hw.mac.type == e1000_82574 ||
 861              adapter->hw.mac.type == e1000_82583))
 862                 intr_func = em_intr_mask;
 863
 864         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 865                                intr_func, adapter, &adapter->intr_tag,
 866                                ifp->if_serializer);
 867         if (error) {
 868                 device_printf(dev, "Failed to register interrupt handler");
 869                 ether_ifdetach(&adapter->arpcom.ac_if);
 870                 goto fail;
 871         }
 872
 873         ifp->if_cpuid = rman_get_cpuid(adapter->intr_res);
 874         KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
 875         return (0);
 876 fail:
 877         em_detach(dev);
 878         return (error);
 879 }
 880
 881 static int
 882 em_detach(device_t dev)
 883 {
 884         struct adapter *adapter = device_get_softc(dev);
 885
 886         if (device_is_attached(dev)) {
 887                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 888
 889                 lwkt_serialize_enter(ifp->if_serializer);
 890
 891                 em_stop(adapter);
 892
 893                 e1000_phy_hw_reset(&adapter->hw);
 894
 895                 em_rel_mgmt(adapter);
 896                 em_rel_hw_control(adapter);
 897
 898                 if (adapter->wol) {
 899                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 900                                         E1000_WUC_PME_EN);
 901                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 902                         em_enable_wol(dev);
 903                 }
 904
 905                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 906
 907                 lwkt_serialize_exit(ifp->if_serializer);
 908
 909                 ether_ifdetach(ifp);
 910         } else if (adapter->memory != NULL) {
 911                 em_rel_hw_control(adapter);
 912         }
 913         bus_generic_detach(dev);
 914
 915         em_free_pci_res(adapter);
 916
 917         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 918         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 919
 920         /* Free Transmit Descriptor ring */
 921         if (adapter->tx_desc_base)
 922                 em_dma_free(adapter, &adapter->txdma);
 923
 924         /* Free Receive Descriptor ring */
 925         if (adapter->rx_desc_base)
 926                 em_dma_free(adapter, &adapter->rxdma);
 927
 928         /* Free top level busdma tag */
 929         if (adapter->parent_dtag != NULL)
 930                 bus_dma_tag_destroy(adapter->parent_dtag);
 931
 932         /* Free sysctl tree */
 933         if (adapter->sysctl_tree != NULL)
 934                 sysctl_ctx_free(&adapter->sysctl_ctx);
 935
 936         if (adapter->mta != NULL)
 937                 kfree(adapter->mta, M_DEVBUF);
 938
 939         return (0);
 940 }
 941
 942 static int
 943 em_shutdown(device_t dev)
 944 {
 945         return em_suspend(dev);
 946 }
 947
 948 static int
 949 em_suspend(device_t dev)
 950 {
 951         struct adapter *adapter = device_get_softc(dev);
 952         struct ifnet *ifp = &adapter->arpcom.ac_if;
 953
 954         lwkt_serialize_enter(ifp->if_serializer);
 955
 956         em_stop(adapter);
 957
 958         em_rel_mgmt(adapter);
 959         em_rel_hw_control(adapter);
 960
 961         if (adapter->wol) {
 962                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 963                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 964                 em_enable_wol(dev);
 965         }
 966
 967         lwkt_serialize_exit(ifp->if_serializer);
 968
 969         return bus_generic_suspend(dev);
 970 }
 971
 972 static int
 973 em_resume(device_t dev)
 974 {
 975         struct adapter *adapter = device_get_softc(dev);
 976         struct ifnet *ifp = &adapter->arpcom.ac_if;
 977
 978         lwkt_serialize_enter(ifp->if_serializer);
 979
 980         em_init(adapter);
 981         em_get_mgmt(adapter);
 982         if_devstart(ifp);
 983
 984         lwkt_serialize_exit(ifp->if_serializer);
 985
 986         return bus_generic_resume(dev);
 987 }
 988
 989 static void
 990 em_start(struct ifnet *ifp)
 991 {
 992         struct adapter *adapter = ifp->if_softc;
 993         struct mbuf *m_head;
 994
 995         ASSERT_SERIALIZED(ifp->if_serializer);
 996
 997         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
 998                 return;
 999
1000         if (!adapter->link_active) {
1001                 ifq_purge(&ifp->if_snd);
1002                 return;
1003         }
1004
1005         while (!ifq_is_empty(&ifp->if_snd)) {
1006                 /* Now do we at least have a minimal? */
1007                 if (EM_IS_OACTIVE(adapter)) {
1008                         em_tx_collect(adapter);
1009                         if (EM_IS_OACTIVE(adapter)) {
1010                                 ifp->if_flags |= IFF_OACTIVE;
1011                                 adapter->no_tx_desc_avail1++;
1012                                 break;
1013                         }
1014                 }
1015
1016                 logif(pkt_txqueue);
1017                 m_head = ifq_dequeue(&ifp->if_snd, NULL);
1018                 if (m_head == NULL)
1019                         break;
1020
1021                 if (em_encap(adapter, &m_head)) {
1022                         ifp->if_oerrors++;
1023                         em_tx_collect(adapter);
1024                         continue;
1025                 }
1026
1027                 /* Send a copy of the frame to the BPF listener */
1028                 ETHER_BPF_MTAP(ifp, m_head);
1029
1030                 /* Set timeout in case hardware has problems transmitting. */
1031                 ifp->if_timer = EM_TX_TIMEOUT;
1032         }
1033 }
1034
1035 static int
1036 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1037 {
1038         struct adapter *adapter = ifp->if_softc;
1039         struct ifreq *ifr = (struct ifreq *)data;
1040         uint16_t eeprom_data = 0;
1041         int max_frame_size, mask, reinit;
1042         int error = 0;
1043
1044         ASSERT_SERIALIZED(ifp->if_serializer);
1045
1046         switch (command) {
1047         case SIOCSIFMTU:
1048                 switch (adapter->hw.mac.type) {
1049                 case e1000_82573:
1050                         /*
1051                          * 82573 only supports jumbo frames
1052                          * if ASPM is disabled.
1053                          */
1054                         e1000_read_nvm(&adapter->hw,
1055                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1056                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1057                                 max_frame_size = ETHER_MAX_LEN;
1058                                 break;
1059                         }
1060                         /* FALL THROUGH */
1061
1062                 /* Limit Jumbo Frame size */
1063                 case e1000_82571:
1064                 case e1000_82572:
1065                 case e1000_ich9lan:
1066                 case e1000_ich10lan:
1067                 case e1000_pch2lan:
1068                 case e1000_82574:
1069                 case e1000_82583:
1070                 case e1000_80003es2lan:
1071                         max_frame_size = 9234;
1072                         break;
1073
1074                 case e1000_pchlan:
1075                         max_frame_size = 4096;
1076                         break;
1077
1078                 /* Adapters that do not support jumbo frames */
1079                 case e1000_82542:
1080                 case e1000_ich8lan:
1081                         max_frame_size = ETHER_MAX_LEN;
1082                         break;
1083
1084                 default:
1085                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1086                         break;
1087                 }
1088                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1089                     ETHER_CRC_LEN) {
1090                         error = EINVAL;
1091                         break;
1092                 }
1093
1094                 ifp->if_mtu = ifr->ifr_mtu;
1095                 adapter->max_frame_size =
1096                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1097
1098                 if (ifp->if_flags & IFF_RUNNING)
1099                         em_init(adapter);
1100                 break;
1101
1102         case SIOCSIFFLAGS:
1103                 if (ifp->if_flags & IFF_UP) {
1104                         if ((ifp->if_flags & IFF_RUNNING)) {
1105                                 if ((ifp->if_flags ^ adapter->if_flags) &
1106                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1107                                         em_disable_promisc(adapter);
1108                                         em_set_promisc(adapter);
1109                                 }
1110                         } else {
1111                                 em_init(adapter);
1112                         }
1113                 } else if (ifp->if_flags & IFF_RUNNING) {
1114                         em_stop(adapter);
1115                 }
1116                 adapter->if_flags = ifp->if_flags;
1117                 break;
1118
1119         case SIOCADDMULTI:
1120         case SIOCDELMULTI:
1121                 if (ifp->if_flags & IFF_RUNNING) {
1122                         em_disable_intr(adapter);
1123                         em_set_multi(adapter);
1124                         if (adapter->hw.mac.type == e1000_82542 &&
1125                             adapter->hw.revision_id == E1000_REVISION_2)
1126                                 em_init_rx_unit(adapter);
1127 #ifdef IFPOLL_ENABLE
1128                         if (!(ifp->if_flags & IFF_NPOLLING))
1129 #endif
1130                                 em_enable_intr(adapter);
1131                 }
1132                 break;
1133
1134         case SIOCSIFMEDIA:
1135                 /* Check SOL/IDER usage */
1136                 if (e1000_check_reset_block(&adapter->hw)) {
1137                         device_printf(adapter->dev, "Media change is"
1138                             " blocked due to SOL/IDER session.\n");
1139                         break;
1140                 }
1141                 /* FALL THROUGH */
1142
1143         case SIOCGIFMEDIA:
1144                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1145                 break;
1146
1147         case SIOCSIFCAP:
1148                 reinit = 0;
1149                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1150                 if (mask & IFCAP_RXCSUM) {
1151                         ifp->if_capenable ^= IFCAP_RXCSUM;
1152                         reinit = 1;
1153                 }
1154                 if (mask & IFCAP_TXCSUM) {
1155                         ifp->if_capenable ^= IFCAP_TXCSUM;
1156                         if (ifp->if_capenable & IFCAP_TXCSUM)
1157                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1158                         else
1159                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1160                 }
1161                 if (mask & IFCAP_TSO) {
1162                         ifp->if_capenable ^= IFCAP_TSO;
1163                         if (ifp->if_capenable & IFCAP_TSO)
1164                                 ifp->if_hwassist |= CSUM_TSO;
1165                         else
1166                                 ifp->if_hwassist &= ~CSUM_TSO;
1167                 }
1168                 if (mask & IFCAP_VLAN_HWTAGGING) {
1169                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1170                         reinit = 1;
1171                 }
1172                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1173                         em_init(adapter);
1174                 break;
1175
1176         default:
1177                 error = ether_ioctl(ifp, command, data);
1178                 break;
1179         }
1180         return (error);
1181 }
1182
1183 static void
1184 em_watchdog(struct ifnet *ifp)
1185 {
1186         struct adapter *adapter = ifp->if_softc;
1187
1188         ASSERT_SERIALIZED(ifp->if_serializer);
1189
1190         /*
1191          * The timer is set to 5 every time start queues a packet.
1192          * Then txeof keeps resetting it as long as it cleans at
1193          * least one descriptor.
1194          * Finally, anytime all descriptors are clean the timer is
1195          * set to 0.
1196          */
1197
1198         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1199             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1200                 /*
1201                  * If we reach here, all TX jobs are completed and
1202                  * the TX engine should have been idled for some time.
1203                  * We don't need to call if_devstart() here.
1204                  */
1205                 ifp->if_flags &= ~IFF_OACTIVE;
1206                 ifp->if_timer = 0;
1207                 return;
1208         }
1209
1210         /*
1211          * If we are in this routine because of pause frames, then
1212          * don't reset the hardware.
1213          */
1214         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1215             E1000_STATUS_TXOFF) {
1216                 ifp->if_timer = EM_TX_TIMEOUT;
1217                 return;
1218         }
1219
1220         if (e1000_check_for_link(&adapter->hw) == 0)
1221                 if_printf(ifp, "watchdog timeout -- resetting\n");
1222
1223         ifp->if_oerrors++;
1224         adapter->watchdog_events++;
1225
1226         em_init(adapter);
1227
1228         if (!ifq_is_empty(&ifp->if_snd))
1229                 if_devstart(ifp);
1230 }
1231
1232 static void
1233 em_init(void *xsc)
1234 {
1235         struct adapter *adapter = xsc;
1236         struct ifnet *ifp = &adapter->arpcom.ac_if;
1237         device_t dev = adapter->dev;
1238         uint32_t pba;
1239
1240         ASSERT_SERIALIZED(ifp->if_serializer);
1241
1242         em_stop(adapter);
1243
1244         /*
1245          * Packet Buffer Allocation (PBA)
1246          * Writing PBA sets the receive portion of the buffer
1247          * the remainder is used for the transmit buffer.
1248          *
1249          * Devices before the 82547 had a Packet Buffer of 64K.
1250          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1251          * After the 82547 the buffer was reduced to 40K.
1252          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1253          *   Note: default does not leave enough room for Jumbo Frame >10k.
1254          */
1255         switch (adapter->hw.mac.type) {
1256         case e1000_82547:
1257         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1258                 if (adapter->max_frame_size > 8192)
1259                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1260                 else
1261                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1262                 adapter->tx_fifo_head = 0;
1263                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1264                 adapter->tx_fifo_size =
1265                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1266                 break;
1267
1268         /* Total Packet Buffer on these is 48K */
1269         case e1000_82571:
1270         case e1000_82572:
1271         case e1000_80003es2lan:
1272                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1273                 break;
1274
1275         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1276                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1277                 break;
1278
1279         case e1000_82574:
1280         case e1000_82583:
1281                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1282                 break;
1283
1284         case e1000_ich8lan:
1285                 pba = E1000_PBA_8K;
1286                 break;
1287
1288         case e1000_ich9lan:
1289         case e1000_ich10lan:
1290 #define E1000_PBA_10K   0x000A
1291                 pba = E1000_PBA_10K;
1292                 break;
1293
1294         case e1000_pchlan:
1295         case e1000_pch2lan:
1296                 pba = E1000_PBA_26K;
1297                 break;
1298
1299         default:
1300                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1301                 if (adapter->max_frame_size > 8192)
1302                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1303                 else
1304                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1305         }
1306         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1307
1308         /* Get the latest mac address, User can use a LAA */
1309         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1310
1311         /* Put the address into the Receive Address Array */
1312         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1313
1314         /*
1315          * With the 82571 adapter, RAR[0] may be overwritten
1316          * when the other port is reset, we make a duplicate
1317          * in RAR[14] for that eventuality, this assures
1318          * the interface continues to function.
1319          */
1320         if (adapter->hw.mac.type == e1000_82571) {
1321                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1322                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1323                     E1000_RAR_ENTRIES - 1);
1324         }
1325
1326         /* Reset the hardware */
1327         if (em_reset(adapter)) {
1328                 device_printf(dev, "Unable to reset the hardware\n");
1329                 /* XXX em_stop()? */
1330                 return;
1331         }
1332         em_update_link_status(adapter);
1333
1334         /* Setup VLAN support, basic and offload if available */
1335         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1336
1337         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1338                 uint32_t ctrl;
1339
1340                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1341                 ctrl |= E1000_CTRL_VME;
1342                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1343         }
1344
1345         /* Configure for OS presence */
1346         em_get_mgmt(adapter);
1347
1348         /* Prepare transmit descriptors and buffers */
1349         em_init_tx_ring(adapter);
1350         em_init_tx_unit(adapter);
1351
1352         /* Setup Multicast table */
1353         em_set_multi(adapter);
1354
1355         /* Prepare receive descriptors and buffers */
1356         if (em_init_rx_ring(adapter)) {
1357                 device_printf(dev, "Could not setup receive structures\n");
1358                 em_stop(adapter);
1359                 return;
1360         }
1361         em_init_rx_unit(adapter);
1362
1363         /* Don't lose promiscuous settings */
1364         em_set_promisc(adapter);
1365
1366         ifp->if_flags |= IFF_RUNNING;
1367         ifp->if_flags &= ~IFF_OACTIVE;
1368
1369         callout_reset(&adapter->timer, hz, em_timer, adapter);
1370         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1371
1372         /* MSI/X configuration for 82574 */
1373         if (adapter->hw.mac.type == e1000_82574) {
1374                 int tmp;
1375
1376                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1377                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1378                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1379                 /*
1380                  * XXX MSIX
1381                  * Set the IVAR - interrupt vector routing.
1382                  * Each nibble represents a vector, high bit
1383                  * is enable, other 3 bits are the MSIX table
1384                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1385                  * Link (other) to 2, hence the magic number.
1386                  */
1387                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1388         }
1389
1390 #ifdef IFPOLL_ENABLE
1391         /*
1392          * Only enable interrupts if we are not polling, make sure
1393          * they are off otherwise.
1394          */
1395         if (ifp->if_flags & IFF_NPOLLING)
1396                 em_disable_intr(adapter);
1397         else
1398 #endif /* IFPOLL_ENABLE */
1399                 em_enable_intr(adapter);
1400
1401         /* AMT based hardware can now take control from firmware */
1402         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1403             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1404             adapter->hw.mac.type >= e1000_82571)
1405                 em_get_hw_control(adapter);
1406
1407         /* Don't reset the phy next time init gets called */
1408         adapter->hw.phy.reset_disable = TRUE;
1409 }
1410
1411 #ifdef IFPOLL_ENABLE
1412
1413 static void
1414 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1415 {
1416         struct adapter *adapter = ifp->if_softc;
1417
1418         ASSERT_SERIALIZED(ifp->if_serializer);
1419
1420         if (adapter->npoll.ifpc_stcount-- == 0) {
1421                 uint32_t reg_icr;
1422
1423                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1424
1425                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1426                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1427                         callout_stop(&adapter->timer);
1428                         adapter->hw.mac.get_link_status = 1;
1429                         em_update_link_status(adapter);
1430                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1431                 }
1432         }
1433
1434         em_rxeof(adapter, count);
1435         em_txeof(adapter);
1436
1437         if (!ifq_is_empty(&ifp->if_snd))
1438                 if_devstart(ifp);
1439 }
1440
1441 static void
1442 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1443 {
1444         struct adapter *adapter = ifp->if_softc;
1445
1446         ASSERT_SERIALIZED(ifp->if_serializer);
1447
1448         if (info != NULL) {
1449                 int cpuid = adapter->npoll.ifpc_cpuid;
1450
1451                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1452                 info->ifpi_rx[cpuid].arg = NULL;
1453                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1454
1455                 if (ifp->if_flags & IFF_RUNNING)
1456                         em_disable_intr(adapter);
1457                 ifp->if_npoll_cpuid = cpuid;
1458         } else {
1459                 if (ifp->if_flags & IFF_RUNNING)
1460                         em_enable_intr(adapter);
1461                 ifp->if_npoll_cpuid = -1;
1462         }
1463 }
1464
1465 #endif /* IFPOLL_ENABLE */
1466
1467 static void
1468 em_intr(void *xsc)
1469 {
1470         em_intr_body(xsc, TRUE);
1471 }
1472
1473 static void
1474 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1475 {
1476         struct ifnet *ifp = &adapter->arpcom.ac_if;
1477         uint32_t reg_icr;
1478
1479         logif(intr_beg);
1480         ASSERT_SERIALIZED(ifp->if_serializer);
1481
1482         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1483
1484         if (chk_asserted &&
1485             ((adapter->hw.mac.type >= e1000_82571 &&
1486               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1487              reg_icr == 0)) {
1488                 logif(intr_end);
1489                 return;
1490         }
1491
1492         /*
1493          * XXX: some laptops trigger several spurious interrupts
1494          * on em(4) when in the resume cycle. The ICR register
1495          * reports all-ones value in this case. Processing such
1496          * interrupts would lead to a freeze. I don't know why.
1497          */
1498         if (reg_icr == 0xffffffff) {
1499                 logif(intr_end);
1500                 return;
1501         }
1502
1503         if (ifp->if_flags & IFF_RUNNING) {
1504                 if (reg_icr &
1505                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1506                         em_rxeof(adapter, -1);
1507                 if (reg_icr & E1000_ICR_TXDW) {
1508                         em_txeof(adapter);
1509                         if (!ifq_is_empty(&ifp->if_snd))
1510                                 if_devstart(ifp);
1511                 }
1512         }
1513
1514         /* Link status change */
1515         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1516                 callout_stop(&adapter->timer);
1517                 adapter->hw.mac.get_link_status = 1;
1518                 em_update_link_status(adapter);
1519
1520                 /* Deal with TX cruft when link lost */
1521                 em_tx_purge(adapter);
1522
1523                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1524         }
1525
1526         if (reg_icr & E1000_ICR_RXO)
1527                 adapter->rx_overruns++;
1528
1529         logif(intr_end);
1530 }
1531
1532 static void
1533 em_intr_mask(void *xsc)
1534 {
1535         struct adapter *adapter = xsc;
1536
1537         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1538         /*
1539          * NOTE:
1540          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1541          * so don't check it.
1542          */
1543         em_intr_body(adapter, FALSE);
1544         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1545 }
1546
1547 static void
1548 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1549 {
1550         struct adapter *adapter = ifp->if_softc;
1551         u_char fiber_type = IFM_1000_SX;
1552
1553         ASSERT_SERIALIZED(ifp->if_serializer);
1554
1555         em_update_link_status(adapter);
1556
1557         ifmr->ifm_status = IFM_AVALID;
1558         ifmr->ifm_active = IFM_ETHER;
1559
1560         if (!adapter->link_active)
1561                 return;
1562
1563         ifmr->ifm_status |= IFM_ACTIVE;
1564
1565         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1566             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1567                 if (adapter->hw.mac.type == e1000_82545)
1568                         fiber_type = IFM_1000_LX;
1569                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1570         } else {
1571                 switch (adapter->link_speed) {
1572                 case 10:
1573                         ifmr->ifm_active |= IFM_10_T;
1574                         break;
1575                 case 100:
1576                         ifmr->ifm_active |= IFM_100_TX;
1577                         break;
1578
1579                 case 1000:
1580                         ifmr->ifm_active |= IFM_1000_T;
1581                         break;
1582                 }
1583                 if (adapter->link_duplex == FULL_DUPLEX)
1584                         ifmr->ifm_active |= IFM_FDX;
1585                 else
1586                         ifmr->ifm_active |= IFM_HDX;
1587         }
1588 }
1589
1590 static int
1591 em_media_change(struct ifnet *ifp)
1592 {
1593         struct adapter *adapter = ifp->if_softc;
1594         struct ifmedia *ifm = &adapter->media;
1595
1596         ASSERT_SERIALIZED(ifp->if_serializer);
1597
1598         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1599                 return (EINVAL);
1600
1601         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1602         case IFM_AUTO:
1603                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1604                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1605                 break;
1606
1607         case IFM_1000_LX:
1608         case IFM_1000_SX:
1609         case IFM_1000_T:
1610                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1611                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1612                 break;
1613
1614         case IFM_100_TX:
1615                 adapter->hw.mac.autoneg = FALSE;
1616                 adapter->hw.phy.autoneg_advertised = 0;
1617                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1618                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1619                 else
1620                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1621                 break;
1622
1623         case IFM_10_T:
1624                 adapter->hw.mac.autoneg = FALSE;
1625                 adapter->hw.phy.autoneg_advertised = 0;
1626                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1627                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1628                 else
1629                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1630                 break;
1631
1632         default:
1633                 if_printf(ifp, "Unsupported media type\n");
1634                 break;
1635         }
1636
1637         /*
1638          * As the speed/duplex settings my have changed we need to
1639          * reset the PHY.
1640          */
1641         adapter->hw.phy.reset_disable = FALSE;
1642
1643         em_init(adapter);
1644
1645         return (0);
1646 }
1647
1648 static int
1649 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1650 {
1651         bus_dma_segment_t segs[EM_MAX_SCATTER];
1652         bus_dmamap_t map;
1653         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1654         struct e1000_tx_desc *ctxd = NULL;
1655         struct mbuf *m_head = *m_headp;
1656         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1657         int maxsegs, nsegs, i, j, first, last = 0, error;
1658
1659         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1660                 error = em_tso_pullup(adapter, m_headp);
1661                 if (error)
1662                         return error;
1663                 m_head = *m_headp;
1664         }
1665
1666         txd_upper = txd_lower = 0;
1667         txd_used = 0;
1668
1669         /*
1670          * Capture the first descriptor index, this descriptor
1671          * will have the index of the EOP which is the only one
1672          * that now gets a DONE bit writeback.
1673          */
1674         first = adapter->next_avail_tx_desc;
1675         tx_buffer = &adapter->tx_buffer_area[first];
1676         tx_buffer_mapped = tx_buffer;
1677         map = tx_buffer->map;
1678
1679         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1680         KASSERT(maxsegs >= adapter->spare_tx_desc,
1681                 ("not enough spare TX desc"));
1682         if (adapter->pcix_82544) {
1683                 /* Half it; see the comment in em_attach() */
1684                 maxsegs >>= 1;
1685         }
1686         if (maxsegs > EM_MAX_SCATTER)
1687                 maxsegs = EM_MAX_SCATTER;
1688
1689         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1690                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1691         if (error) {
1692                 if (error == ENOBUFS)
1693                         adapter->mbuf_alloc_failed++;
1694                 else
1695                         adapter->no_tx_dma_setup++;
1696
1697                 m_freem(*m_headp);
1698                 *m_headp = NULL;
1699                 return error;
1700         }
1701         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1702
1703         m_head = *m_headp;
1704         adapter->tx_nsegs += nsegs;
1705
1706         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1707                 /* TSO will consume one TX desc */
1708                 adapter->tx_nsegs += em_tso_setup(adapter, m_head,
1709                     &txd_upper, &txd_lower);
1710         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1711                 /* TX csum offloading will consume one TX desc */
1712                 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1713                                                &txd_upper, &txd_lower);
1714         }
1715         i = adapter->next_avail_tx_desc;
1716
1717         /* Set up our transmit descriptors */
1718         for (j = 0; j < nsegs; j++) {
1719                 /* If adapter is 82544 and on PCIX bus */
1720                 if(adapter->pcix_82544) {
1721                         DESC_ARRAY desc_array;
1722                         uint32_t array_elements, counter;
1723
1724                         /*
1725                          * Check the Address and Length combination and
1726                          * split the data accordingly
1727                          */
1728                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1729                                                 segs[j].ds_len, &desc_array);
1730                         for (counter = 0; counter < array_elements; counter++) {
1731                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1732
1733                                 tx_buffer = &adapter->tx_buffer_area[i];
1734                                 ctxd = &adapter->tx_desc_base[i];
1735
1736                                 ctxd->buffer_addr = htole64(
1737                                     desc_array.descriptor[counter].address);
1738                                 ctxd->lower.data = htole32(
1739                                     E1000_TXD_CMD_IFCS | txd_lower |
1740                                     desc_array.descriptor[counter].length);
1741                                 ctxd->upper.data = htole32(txd_upper);
1742
1743                                 last = i;
1744                                 if (++i == adapter->num_tx_desc)
1745                                         i = 0;
1746
1747                                 txd_used++;
1748                         }
1749                 } else {
1750                         tx_buffer = &adapter->tx_buffer_area[i];
1751                         ctxd = &adapter->tx_desc_base[i];
1752
1753                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1754                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1755                                                    txd_lower | segs[j].ds_len);
1756                         ctxd->upper.data = htole32(txd_upper);
1757
1758                         last = i;
1759                         if (++i == adapter->num_tx_desc)
1760                                 i = 0;
1761                 }
1762         }
1763
1764         adapter->next_avail_tx_desc = i;
1765         if (adapter->pcix_82544) {
1766                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1767                 adapter->num_tx_desc_avail -= txd_used;
1768         } else {
1769                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1770                 adapter->num_tx_desc_avail -= nsegs;
1771         }
1772
1773         /* Handle VLAN tag */
1774         if (m_head->m_flags & M_VLANTAG) {
1775                 /* Set the vlan id. */
1776                 ctxd->upper.fields.special =
1777                     htole16(m_head->m_pkthdr.ether_vlantag);
1778
1779                 /* Tell hardware to add tag */
1780                 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1781         }
1782
1783         tx_buffer->m_head = m_head;
1784         tx_buffer_mapped->map = tx_buffer->map;
1785         tx_buffer->map = map;
1786
1787         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1788                 adapter->tx_nsegs = 0;
1789
1790                 /*
1791                  * Report Status (RS) is turned on
1792                  * every tx_int_nsegs descriptors.
1793                  */
1794                 cmd = E1000_TXD_CMD_RS;
1795
1796                 /*
1797                  * Keep track of the descriptor, which will
1798                  * be written back by hardware.
1799                  */
1800                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1801                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1802                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1803         }
1804
1805         /*
1806          * Last Descriptor of Packet needs End Of Packet (EOP)
1807          */
1808         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1809
1810         /*
1811          * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1812          * that this frame is available to transmit.
1813          */
1814         if (adapter->hw.mac.type == e1000_82547 &&
1815             adapter->link_duplex == HALF_DUPLEX) {
1816                 em_82547_move_tail_serialized(adapter);
1817         } else {
1818                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1819                 if (adapter->hw.mac.type == e1000_82547) {
1820                         em_82547_update_fifo_head(adapter,
1821                             m_head->m_pkthdr.len);
1822                 }
1823         }
1824         return (0);
1825 }
1826
1827 /*
1828  * 82547 workaround to avoid controller hang in half-duplex environment.
1829  * The workaround is to avoid queuing a large packet that would span
1830  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1831  * in this case.  We do that only when FIFO is quiescent.
1832  */
1833 static void
1834 em_82547_move_tail_serialized(struct adapter *adapter)
1835 {
1836         struct e1000_tx_desc *tx_desc;
1837         uint16_t hw_tdt, sw_tdt, length = 0;
1838         bool eop = 0;
1839
1840         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1841
1842         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1843         sw_tdt = adapter->next_avail_tx_desc;
1844
1845         while (hw_tdt != sw_tdt) {
1846                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1847                 length += tx_desc->lower.flags.length;
1848                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1849                 if (++hw_tdt == adapter->num_tx_desc)
1850                         hw_tdt = 0;
1851
1852                 if (eop) {
1853                         if (em_82547_fifo_workaround(adapter, length)) {
1854                                 adapter->tx_fifo_wrk_cnt++;
1855                                 callout_reset(&adapter->tx_fifo_timer, 1,
1856                                         em_82547_move_tail, adapter);
1857                                 break;
1858                         }
1859                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1860                         em_82547_update_fifo_head(adapter, length);
1861                         length = 0;
1862                 }
1863         }
1864 }
1865
1866 static void
1867 em_82547_move_tail(void *xsc)
1868 {
1869         struct adapter *adapter = xsc;
1870         struct ifnet *ifp = &adapter->arpcom.ac_if;
1871
1872         lwkt_serialize_enter(ifp->if_serializer);
1873         em_82547_move_tail_serialized(adapter);
1874         lwkt_serialize_exit(ifp->if_serializer);
1875 }
1876
1877 static int
1878 em_82547_fifo_workaround(struct adapter *adapter, int len)
1879 {
1880         int fifo_space, fifo_pkt_len;
1881
1882         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1883
1884         if (adapter->link_duplex == HALF_DUPLEX) {
1885                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1886
1887                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1888                         if (em_82547_tx_fifo_reset(adapter))
1889                                 return (0);
1890                         else
1891                                 return (1);
1892                 }
1893         }
1894         return (0);
1895 }
1896
1897 static void
1898 em_82547_update_fifo_head(struct adapter *adapter, int len)
1899 {
1900         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1901
1902         /* tx_fifo_head is always 16 byte aligned */
1903         adapter->tx_fifo_head += fifo_pkt_len;
1904         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1905                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1906 }
1907
1908 static int
1909 em_82547_tx_fifo_reset(struct adapter *adapter)
1910 {
1911         uint32_t tctl;
1912
1913         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1914              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1915             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1916              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1917             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1918              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1919             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1920                 /* Disable TX unit */
1921                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1922                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1923                     tctl & ~E1000_TCTL_EN);
1924
1925                 /* Reset FIFO pointers */
1926                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1927                     adapter->tx_head_addr);
1928                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1929                     adapter->tx_head_addr);
1930                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1931                     adapter->tx_head_addr);
1932                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1933                     adapter->tx_head_addr);
1934
1935                 /* Re-enable TX unit */
1936                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1937                 E1000_WRITE_FLUSH(&adapter->hw);
1938
1939                 adapter->tx_fifo_head = 0;
1940                 adapter->tx_fifo_reset_cnt++;
1941
1942                 return (TRUE);
1943         } else {
1944                 return (FALSE);
1945         }
1946 }
1947
1948 static void
1949 em_set_promisc(struct adapter *adapter)
1950 {
1951         struct ifnet *ifp = &adapter->arpcom.ac_if;
1952         uint32_t reg_rctl;
1953
1954         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1955
1956         if (ifp->if_flags & IFF_PROMISC) {
1957                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1958                 /* Turn this on if you want to see bad packets */
1959                 if (em_debug_sbp)
1960                         reg_rctl |= E1000_RCTL_SBP;
1961                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1962         } else if (ifp->if_flags & IFF_ALLMULTI) {
1963                 reg_rctl |= E1000_RCTL_MPE;
1964                 reg_rctl &= ~E1000_RCTL_UPE;
1965                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1966         }
1967 }
1968
1969 static void
1970 em_disable_promisc(struct adapter *adapter)
1971 {
1972         uint32_t reg_rctl;
1973
1974         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1975
1976         reg_rctl &= ~E1000_RCTL_UPE;
1977         reg_rctl &= ~E1000_RCTL_MPE;
1978         reg_rctl &= ~E1000_RCTL_SBP;
1979         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1980 }
1981
1982 static void
1983 em_set_multi(struct adapter *adapter)
1984 {
1985         struct ifnet *ifp = &adapter->arpcom.ac_if;
1986         struct ifmultiaddr *ifma;
1987         uint32_t reg_rctl = 0;
1988         uint8_t *mta;
1989         int mcnt = 0;
1990
1991         mta = adapter->mta;
1992         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1993
1994         if (adapter->hw.mac.type == e1000_82542 &&
1995             adapter->hw.revision_id == E1000_REVISION_2) {
1996                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1997                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1998                         e1000_pci_clear_mwi(&adapter->hw);
1999                 reg_rctl |= E1000_RCTL_RST;
2000                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2001                 msec_delay(5);
2002         }
2003
2004         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2005                 if (ifma->ifma_addr->sa_family != AF_LINK)
2006                         continue;
2007
2008                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2009                         break;
2010
2011                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2012                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2013                 mcnt++;
2014         }
2015
2016         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2017                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2018                 reg_rctl |= E1000_RCTL_MPE;
2019                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2020         } else {
2021                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2022         }
2023
2024         if (adapter->hw.mac.type == e1000_82542 &&
2025             adapter->hw.revision_id == E1000_REVISION_2) {
2026                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2027                 reg_rctl &= ~E1000_RCTL_RST;
2028                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2029                 msec_delay(5);
2030                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2031                         e1000_pci_set_mwi(&adapter->hw);
2032         }
2033 }
2034
2035 /*
2036  * This routine checks for link status and updates statistics.
2037  */
2038 static void
2039 em_timer(void *xsc)
2040 {
2041         struct adapter *adapter = xsc;
2042         struct ifnet *ifp = &adapter->arpcom.ac_if;
2043
2044         lwkt_serialize_enter(ifp->if_serializer);
2045
2046         em_update_link_status(adapter);
2047         em_update_stats(adapter);
2048
2049         /* Reset LAA into RAR[0] on 82571 */
2050         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2051                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2052
2053         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2054                 em_print_hw_stats(adapter);
2055
2056         em_smartspeed(adapter);
2057
2058         callout_reset(&adapter->timer, hz, em_timer, adapter);
2059
2060         lwkt_serialize_exit(ifp->if_serializer);
2061 }
2062
2063 static void
2064 em_update_link_status(struct adapter *adapter)
2065 {
2066         struct e1000_hw *hw = &adapter->hw;
2067         struct ifnet *ifp = &adapter->arpcom.ac_if;
2068         device_t dev = adapter->dev;
2069         uint32_t link_check = 0;
2070
2071         /* Get the cached link value or read phy for real */
2072         switch (hw->phy.media_type) {
2073         case e1000_media_type_copper:
2074                 if (hw->mac.get_link_status) {
2075                         /* Do the work to read phy */
2076                         e1000_check_for_link(hw);
2077                         link_check = !hw->mac.get_link_status;
2078                         if (link_check) /* ESB2 fix */
2079                                 e1000_cfg_on_link_up(hw);
2080                 } else {
2081                         link_check = TRUE;
2082                 }
2083                 break;
2084
2085         case e1000_media_type_fiber:
2086                 e1000_check_for_link(hw);
2087                 link_check =
2088                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2089                 break;
2090
2091         case e1000_media_type_internal_serdes:
2092                 e1000_check_for_link(hw);
2093                 link_check = adapter->hw.mac.serdes_has_link;
2094                 break;
2095
2096         case e1000_media_type_unknown:
2097         default:
2098                 break;
2099         }
2100
2101         /* Now check for a transition */
2102         if (link_check && adapter->link_active == 0) {
2103                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2104                     &adapter->link_duplex);
2105
2106                 /*
2107                  * Check if we should enable/disable SPEED_MODE bit on
2108                  * 82571/82572
2109                  */
2110                 if (adapter->link_speed != SPEED_1000 &&
2111                     (hw->mac.type == e1000_82571 ||
2112                      hw->mac.type == e1000_82572)) {
2113                         int tarc0;
2114
2115                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2116                         tarc0 &= ~SPEED_MODE_BIT;
2117                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2118                 }
2119                 if (bootverbose) {
2120                         device_printf(dev, "Link is up %d Mbps %s\n",
2121                             adapter->link_speed,
2122                             ((adapter->link_duplex == FULL_DUPLEX) ?
2123                             "Full Duplex" : "Half Duplex"));
2124                 }
2125                 adapter->link_active = 1;
2126                 adapter->smartspeed = 0;
2127                 ifp->if_baudrate = adapter->link_speed * 1000000;
2128                 ifp->if_link_state = LINK_STATE_UP;
2129                 if_link_state_change(ifp);
2130         } else if (!link_check && adapter->link_active == 1) {
2131                 ifp->if_baudrate = adapter->link_speed = 0;
2132                 adapter->link_duplex = 0;
2133                 if (bootverbose)
2134                         device_printf(dev, "Link is Down\n");
2135                 adapter->link_active = 0;
2136 #if 0
2137                 /* Link down, disable watchdog */
2138                 if->if_timer = 0;
2139 #endif
2140                 ifp->if_link_state = LINK_STATE_DOWN;
2141                 if_link_state_change(ifp);
2142         }
2143 }
2144
2145 static void
2146 em_stop(struct adapter *adapter)
2147 {
2148         struct ifnet *ifp = &adapter->arpcom.ac_if;
2149         int i;
2150
2151         ASSERT_SERIALIZED(ifp->if_serializer);
2152
2153         em_disable_intr(adapter);
2154
2155         callout_stop(&adapter->timer);
2156         callout_stop(&adapter->tx_fifo_timer);
2157
2158         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2159         ifp->if_timer = 0;
2160
2161         e1000_reset_hw(&adapter->hw);
2162         if (adapter->hw.mac.type >= e1000_82544)
2163                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2164
2165         for (i = 0; i < adapter->num_tx_desc; i++) {
2166                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2167
2168                 if (tx_buffer->m_head != NULL) {
2169                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2170                         m_freem(tx_buffer->m_head);
2171                         tx_buffer->m_head = NULL;
2172                 }
2173         }
2174
2175         for (i = 0; i < adapter->num_rx_desc; i++) {
2176                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2177
2178                 if (rx_buffer->m_head != NULL) {
2179                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2180                         m_freem(rx_buffer->m_head);
2181                         rx_buffer->m_head = NULL;
2182                 }
2183         }
2184
2185         if (adapter->fmp != NULL)
2186                 m_freem(adapter->fmp);
2187         adapter->fmp = NULL;
2188         adapter->lmp = NULL;
2189
2190         adapter->csum_flags = 0;
2191         adapter->csum_lhlen = 0;
2192         adapter->csum_iphlen = 0;
2193         adapter->csum_thlen = 0;
2194         adapter->csum_mss = 0;
2195         adapter->csum_pktlen = 0;
2196
2197         adapter->tx_dd_head = 0;
2198         adapter->tx_dd_tail = 0;
2199         adapter->tx_nsegs = 0;
2200 }
2201
2202 static int
2203 em_get_hw_info(struct adapter *adapter)
2204 {
2205         device_t dev = adapter->dev;
2206
2207         /* Save off the information about this board */
2208         adapter->hw.vendor_id = pci_get_vendor(dev);
2209         adapter->hw.device_id = pci_get_device(dev);
2210         adapter->hw.revision_id = pci_get_revid(dev);
2211         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2212         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2213
2214         /* Do Shared Code Init and Setup */
2215         if (e1000_set_mac_type(&adapter->hw))
2216                 return ENXIO;
2217         return 0;
2218 }
2219
2220 static int
2221 em_alloc_pci_res(struct adapter *adapter)
2222 {
2223         device_t dev = adapter->dev;
2224         u_int intr_flags;
2225         int val, rid, msi_enable;
2226
2227         /* Enable bus mastering */
2228         pci_enable_busmaster(dev);
2229
2230         adapter->memory_rid = EM_BAR_MEM;
2231         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2232                                 &adapter->memory_rid, RF_ACTIVE);
2233         if (adapter->memory == NULL) {
2234                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2235                 return (ENXIO);
2236         }
2237         adapter->osdep.mem_bus_space_tag =
2238             rman_get_bustag(adapter->memory);
2239         adapter->osdep.mem_bus_space_handle =
2240             rman_get_bushandle(adapter->memory);
2241
2242         /* XXX This is quite goofy, it is not actually used */
2243         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2244
2245         /* Only older adapters use IO mapping */
2246         if (adapter->hw.mac.type > e1000_82543 &&
2247             adapter->hw.mac.type < e1000_82571) {
2248                 /* Figure our where our IO BAR is ? */
2249                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2250                         val = pci_read_config(dev, rid, 4);
2251                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2252                                 adapter->io_rid = rid;
2253                                 break;
2254                         }
2255                         rid += 4;
2256                         /* check for 64bit BAR */
2257                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2258                                 rid += 4;
2259                 }
2260                 if (rid >= PCIR_CARDBUSCIS) {
2261                         device_printf(dev, "Unable to locate IO BAR\n");
2262                         return (ENXIO);
2263                 }
2264                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2265                                         &adapter->io_rid, RF_ACTIVE);
2266                 if (adapter->ioport == NULL) {
2267                         device_printf(dev, "Unable to allocate bus resource: "
2268                             "ioport\n");
2269                         return (ENXIO);
2270                 }
2271                 adapter->hw.io_base = 0;
2272                 adapter->osdep.io_bus_space_tag =
2273                     rman_get_bustag(adapter->ioport);
2274                 adapter->osdep.io_bus_space_handle =
2275                     rman_get_bushandle(adapter->ioport);
2276         }
2277
2278         /*
2279          * Don't enable MSI-X on 82574, see:
2280          * 82574 specification update errata #15
2281          *
2282          * Don't enable MSI on PCI/PCI-X chips, see:
2283          * 82540 specification update errata #6
2284          * 82545 specification update errata #4
2285          *
2286          * Don't enable MSI on 82571/82572, see:
2287          * 82571/82572 specification update errata #63
2288          */
2289         msi_enable = em_msi_enable;
2290         if (msi_enable &&
2291             (!pci_is_pcie(dev) ||
2292              adapter->hw.mac.type == e1000_82571 ||
2293              adapter->hw.mac.type == e1000_82572))
2294                 msi_enable = 0;
2295
2296         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2297             &adapter->intr_rid, &intr_flags);
2298
2299         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2300                 int unshared;
2301
2302                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2303                 if (!unshared) {
2304                         adapter->flags |= EM_FLAG_SHARED_INTR;
2305                         if (bootverbose)
2306                                 device_printf(dev, "IRQ shared\n");
2307                 } else {
2308                         intr_flags &= ~RF_SHAREABLE;
2309                         if (bootverbose)
2310                                 device_printf(dev, "IRQ unshared\n");
2311                 }
2312         }
2313
2314         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2315             &adapter->intr_rid, intr_flags);
2316         if (adapter->intr_res == NULL) {
2317                 device_printf(dev, "Unable to allocate bus resource: "
2318                     "interrupt\n");
2319                 return (ENXIO);
2320         }
2321
2322         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2323         adapter->hw.back = &adapter->osdep;
2324         return (0);
2325 }
2326
2327 static void
2328 em_free_pci_res(struct adapter *adapter)
2329 {
2330         device_t dev = adapter->dev;
2331
2332         if (adapter->intr_res != NULL) {
2333                 bus_release_resource(dev, SYS_RES_IRQ,
2334                     adapter->intr_rid, adapter->intr_res);
2335         }
2336
2337         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2338                 pci_release_msi(dev);
2339
2340         if (adapter->memory != NULL) {
2341                 bus_release_resource(dev, SYS_RES_MEMORY,
2342                     adapter->memory_rid, adapter->memory);
2343         }
2344
2345         if (adapter->flash != NULL) {
2346                 bus_release_resource(dev, SYS_RES_MEMORY,
2347                     adapter->flash_rid, adapter->flash);
2348         }
2349
2350         if (adapter->ioport != NULL) {
2351                 bus_release_resource(dev, SYS_RES_IOPORT,
2352                     adapter->io_rid, adapter->ioport);
2353         }
2354 }
2355
2356 static int
2357 em_reset(struct adapter *adapter)
2358 {
2359         device_t dev = adapter->dev;
2360         uint16_t rx_buffer_size;
2361
2362         /* When hardware is reset, fifo_head is also reset */
2363         adapter->tx_fifo_head = 0;
2364
2365         /* Set up smart power down as default off on newer adapters. */
2366         if (!em_smart_pwr_down &&
2367             (adapter->hw.mac.type == e1000_82571 ||
2368              adapter->hw.mac.type == e1000_82572)) {
2369                 uint16_t phy_tmp = 0;
2370
2371                 /* Speed up time to link by disabling smart power down. */
2372                 e1000_read_phy_reg(&adapter->hw,
2373                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2374                 phy_tmp &= ~IGP02E1000_PM_SPD;
2375                 e1000_write_phy_reg(&adapter->hw,
2376                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2377         }
2378
2379         /*
2380          * These parameters control the automatic generation (Tx) and
2381          * response (Rx) to Ethernet PAUSE frames.
2382          * - High water mark should allow for at least two frames to be
2383          *   received after sending an XOFF.
2384          * - Low water mark works best when it is very near the high water mark.
2385          *   This allows the receiver to restart by sending XON when it has
2386          *   drained a bit. Here we use an arbitary value of 1500 which will
2387          *   restart after one full frame is pulled from the buffer. There
2388          *   could be several smaller frames in the buffer and if so they will
2389          *   not trigger the XON until their total number reduces the buffer
2390          *   by 1500.
2391          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2392          */
2393         rx_buffer_size =
2394                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2395
2396         adapter->hw.fc.high_water = rx_buffer_size -
2397                                     roundup2(adapter->max_frame_size, 1024);
2398         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2399
2400         if (adapter->hw.mac.type == e1000_80003es2lan)
2401                 adapter->hw.fc.pause_time = 0xFFFF;
2402         else
2403                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2404
2405         adapter->hw.fc.send_xon = TRUE;
2406
2407         adapter->hw.fc.requested_mode = e1000_fc_full;
2408
2409         /* Workaround: no TX flow ctrl for PCH */
2410         if (adapter->hw.mac.type == e1000_pchlan)
2411                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2412
2413         /* Override - settings for PCH2LAN, ya its magic :) */
2414         if (adapter->hw.mac.type == e1000_pch2lan) {
2415                 adapter->hw.fc.high_water = 0x5C20;
2416                 adapter->hw.fc.low_water = 0x5048;
2417                 adapter->hw.fc.pause_time = 0x0650;
2418                 adapter->hw.fc.refresh_time = 0x0400;
2419
2420                 /* Jumbos need adjusted PBA */
2421                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2422                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2423                 else
2424                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2425         }
2426
2427         /* Issue a global reset */
2428         e1000_reset_hw(&adapter->hw);
2429         if (adapter->hw.mac.type >= e1000_82544)
2430                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2431         em_disable_aspm(adapter);
2432
2433         if (e1000_init_hw(&adapter->hw) < 0) {
2434                 device_printf(dev, "Hardware Initialization Failed\n");
2435                 return (EIO);
2436         }
2437
2438         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2439         e1000_get_phy_info(&adapter->hw);
2440         e1000_check_for_link(&adapter->hw);
2441
2442         return (0);
2443 }
2444
2445 static void
2446 em_setup_ifp(struct adapter *adapter)
2447 {
2448         struct ifnet *ifp = &adapter->arpcom.ac_if;
2449
2450         if_initname(ifp, device_get_name(adapter->dev),
2451                     device_get_unit(adapter->dev));
2452         ifp->if_softc = adapter;
2453         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2454         ifp->if_init =  em_init;
2455         ifp->if_ioctl = em_ioctl;
2456         ifp->if_start = em_start;
2457 #ifdef IFPOLL_ENABLE
2458         ifp->if_npoll = em_npoll;
2459 #endif
2460         ifp->if_watchdog = em_watchdog;
2461         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2462         ifq_set_ready(&ifp->if_snd);
2463
2464         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2465
2466         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2467         if (adapter->hw.mac.type >= e1000_82543)
2468                 ifp->if_capabilities |= IFCAP_HWCSUM;
2469         if (adapter->flags & EM_FLAG_TSO)
2470                 ifp->if_capabilities |= IFCAP_TSO;
2471         ifp->if_capenable = ifp->if_capabilities;
2472
2473         if (ifp->if_capenable & IFCAP_TXCSUM)
2474                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2475         if (ifp->if_capenable & IFCAP_TSO)
2476                 ifp->if_hwassist |= CSUM_TSO;
2477
2478         /*
2479          * Tell the upper layer(s) we support long frames.
2480          */
2481         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2482
2483         /*
2484          * Specify the media types supported by this adapter and register
2485          * callbacks to update media and link information
2486          */
2487         ifmedia_init(&adapter->media, IFM_IMASK,
2488                      em_media_change, em_media_status);
2489         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2490             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2491                 u_char fiber_type = IFM_1000_SX; /* default type */
2492
2493                 if (adapter->hw.mac.type == e1000_82545)
2494                         fiber_type = IFM_1000_LX;
2495                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2496                             0, NULL);
2497                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2498         } else {
2499                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2500                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2501                             0, NULL);
2502                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2503                             0, NULL);
2504                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2505                             0, NULL);
2506                 if (adapter->hw.phy.type != e1000_phy_ife) {
2507                         ifmedia_add(&adapter->media,
2508                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2509                         ifmedia_add(&adapter->media,
2510                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2511                 }
2512         }
2513         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2514         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2515 }
2516
2517
2518 /*
2519  * Workaround for SmartSpeed on 82541 and 82547 controllers
2520  */
2521 static void
2522 em_smartspeed(struct adapter *adapter)
2523 {
2524         uint16_t phy_tmp;
2525
2526         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2527             adapter->hw.mac.autoneg == 0 ||
2528             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2529                 return;
2530
2531         if (adapter->smartspeed == 0) {
2532                 /*
2533                  * If Master/Slave config fault is asserted twice,
2534                  * we assume back-to-back
2535                  */
2536                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2537                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2538                         return;
2539                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2540                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2541                         e1000_read_phy_reg(&adapter->hw,
2542                             PHY_1000T_CTRL, &phy_tmp);
2543                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2544                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2545                                 e1000_write_phy_reg(&adapter->hw,
2546                                     PHY_1000T_CTRL, phy_tmp);
2547                                 adapter->smartspeed++;
2548                                 if (adapter->hw.mac.autoneg &&
2549                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2550                                     !e1000_read_phy_reg(&adapter->hw,
2551                                      PHY_CONTROL, &phy_tmp)) {
2552                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2553                                                    MII_CR_RESTART_AUTO_NEG;
2554                                         e1000_write_phy_reg(&adapter->hw,
2555                                             PHY_CONTROL, phy_tmp);
2556                                 }
2557                         }
2558                 }
2559                 return;
2560         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2561                 /* If still no link, perhaps using 2/3 pair cable */
2562                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2563                 phy_tmp |= CR_1000T_MS_ENABLE;
2564                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2565                 if (adapter->hw.mac.autoneg &&
2566                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2567                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2568                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2569                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2570                 }
2571         }
2572
2573         /* Restart process after EM_SMARTSPEED_MAX iterations */
2574         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2575                 adapter->smartspeed = 0;
2576 }
2577
2578 static int
2579 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2580               struct em_dma_alloc *dma)
2581 {
2582         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2583                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2584                                 &dma->dma_tag, &dma->dma_map,
2585                                 &dma->dma_paddr);
2586         if (dma->dma_vaddr == NULL)
2587                 return ENOMEM;
2588         else
2589                 return 0;
2590 }
2591
2592 static void
2593 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2594 {
2595         if (dma->dma_tag == NULL)
2596                 return;
2597         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2598         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2599         bus_dma_tag_destroy(dma->dma_tag);
2600 }
2601
2602 static int
2603 em_create_tx_ring(struct adapter *adapter)
2604 {
2605         device_t dev = adapter->dev;
2606         struct em_buffer *tx_buffer;
2607         int error, i;
2608
2609         adapter->tx_buffer_area =
2610                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2611                         M_DEVBUF, M_WAITOK | M_ZERO);
2612
2613         /*
2614          * Create DMA tags for tx buffers
2615          */
2616         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2617                         1, 0,                   /* alignment, bounds */
2618                         BUS_SPACE_MAXADDR,      /* lowaddr */
2619                         BUS_SPACE_MAXADDR,      /* highaddr */
2620                         NULL, NULL,             /* filter, filterarg */
2621                         EM_TSO_SIZE,            /* maxsize */
2622                         EM_MAX_SCATTER,         /* nsegments */
2623                         PAGE_SIZE,              /* maxsegsize */
2624                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2625                         BUS_DMA_ONEBPAGE,       /* flags */
2626                         &adapter->txtag);
2627         if (error) {
2628                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2629                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2630                 adapter->tx_buffer_area = NULL;
2631                 return error;
2632         }
2633
2634         /*
2635          * Create DMA maps for tx buffers
2636          */
2637         for (i = 0; i < adapter->num_tx_desc; i++) {
2638                 tx_buffer = &adapter->tx_buffer_area[i];
2639
2640                 error = bus_dmamap_create(adapter->txtag,
2641                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2642                                           &tx_buffer->map);
2643                 if (error) {
2644                         device_printf(dev, "Unable to create TX DMA map\n");
2645                         em_destroy_tx_ring(adapter, i);
2646                         return error;
2647                 }
2648         }
2649         return (0);
2650 }
2651
2652 static void
2653 em_init_tx_ring(struct adapter *adapter)
2654 {
2655         /* Clear the old ring contents */
2656         bzero(adapter->tx_desc_base,
2657             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2658
2659         /* Reset state */
2660         adapter->next_avail_tx_desc = 0;
2661         adapter->next_tx_to_clean = 0;
2662         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2663 }
2664
2665 static void
2666 em_init_tx_unit(struct adapter *adapter)
2667 {
2668         uint32_t tctl, tarc, tipg = 0;
2669         uint64_t bus_addr;
2670
2671         /* Setup the Base and Length of the Tx Descriptor Ring */
2672         bus_addr = adapter->txdma.dma_paddr;
2673         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2674             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2675         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2676             (uint32_t)(bus_addr >> 32));
2677         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2678             (uint32_t)bus_addr);
2679         /* Setup the HW Tx Head and Tail descriptor pointers */
2680         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2681         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2682
2683         /* Set the default values for the Tx Inter Packet Gap timer */
2684         switch (adapter->hw.mac.type) {
2685         case e1000_82542:
2686                 tipg = DEFAULT_82542_TIPG_IPGT;
2687                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2688                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2689                 break;
2690
2691         case e1000_80003es2lan:
2692                 tipg = DEFAULT_82543_TIPG_IPGR1;
2693                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2694                     E1000_TIPG_IPGR2_SHIFT;
2695                 break;
2696
2697         default:
2698                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2699                     adapter->hw.phy.media_type ==
2700                     e1000_media_type_internal_serdes)
2701                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2702                 else
2703                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2704                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2705                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2706                 break;
2707         }
2708
2709         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2710
2711         /* NOTE: 0 is not allowed for TIDV */
2712         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2713         if(adapter->hw.mac.type >= e1000_82540)
2714                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2715
2716         if (adapter->hw.mac.type == e1000_82571 ||
2717             adapter->hw.mac.type == e1000_82572) {
2718                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2719                 tarc |= SPEED_MODE_BIT;
2720                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2721         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2722                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2723                 tarc |= 1;
2724                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2725                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2726                 tarc |= 1;
2727                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2728         }
2729
2730         /* Program the Transmit Control Register */
2731         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2732         tctl &= ~E1000_TCTL_CT;
2733         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2734                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2735
2736         if (adapter->hw.mac.type >= e1000_82571)
2737                 tctl |= E1000_TCTL_MULR;
2738
2739         /* This write will effectively turn on the transmit unit. */
2740         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2741 }
2742
2743 static void
2744 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2745 {
2746         struct em_buffer *tx_buffer;
2747         int i;
2748
2749         if (adapter->tx_buffer_area == NULL)
2750                 return;
2751
2752         for (i = 0; i < ndesc; i++) {
2753                 tx_buffer = &adapter->tx_buffer_area[i];
2754
2755                 KKASSERT(tx_buffer->m_head == NULL);
2756                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2757         }
2758         bus_dma_tag_destroy(adapter->txtag);
2759
2760         kfree(adapter->tx_buffer_area, M_DEVBUF);
2761         adapter->tx_buffer_area = NULL;
2762 }
2763
2764 /*
2765  * The offload context needs to be set when we transfer the first
2766  * packet of a particular protocol (TCP/UDP).  This routine has been
2767  * enhanced to deal with inserted VLAN headers.
2768  *
2769  * If the new packet's ether header length, ip header length and
2770  * csum offloading type are same as the previous packet, we should
2771  * avoid allocating a new csum context descriptor; mainly to take
2772  * advantage of the pipeline effect of the TX data read request.
2773  *
2774  * This function returns number of TX descrptors allocated for
2775  * csum context.
2776  */
2777 static int
2778 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2779           uint32_t *txd_upper, uint32_t *txd_lower)
2780 {
2781         struct e1000_context_desc *TXD;
2782         int curr_txd, ehdrlen, csum_flags;
2783         uint32_t cmd, hdr_len, ip_hlen;
2784
2785         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2786         ip_hlen = mp->m_pkthdr.csum_iphlen;
2787         ehdrlen = mp->m_pkthdr.csum_lhlen;
2788
2789         if (adapter->csum_lhlen == ehdrlen &&
2790             adapter->csum_iphlen == ip_hlen &&
2791             adapter->csum_flags == csum_flags) {
2792                 /*
2793                  * Same csum offload context as the previous packets;
2794                  * just return.
2795                  */
2796                 *txd_upper = adapter->csum_txd_upper;
2797                 *txd_lower = adapter->csum_txd_lower;
2798                 return 0;
2799         }
2800
2801         /*
2802          * Setup a new csum offload context.
2803          */
2804
2805         curr_txd = adapter->next_avail_tx_desc;
2806         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2807
2808         cmd = 0;
2809
2810         /* Setup of IP header checksum. */
2811         if (csum_flags & CSUM_IP) {
2812                 /*
2813                  * Start offset for header checksum calculation.
2814                  * End offset for header checksum calculation.
2815                  * Offset of place to put the checksum.
2816                  */
2817                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2818                 TXD->lower_setup.ip_fields.ipcse =
2819                     htole16(ehdrlen + ip_hlen - 1);
2820                 TXD->lower_setup.ip_fields.ipcso =
2821                     ehdrlen + offsetof(struct ip, ip_sum);
2822                 cmd |= E1000_TXD_CMD_IP;
2823                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2824         }
2825         hdr_len = ehdrlen + ip_hlen;
2826
2827         if (csum_flags & CSUM_TCP) {
2828                 /*
2829                  * Start offset for payload checksum calculation.
2830                  * End offset for payload checksum calculation.
2831                  * Offset of place to put the checksum.
2832                  */
2833                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2834                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2835                 TXD->upper_setup.tcp_fields.tucso =
2836                     hdr_len + offsetof(struct tcphdr, th_sum);
2837                 cmd |= E1000_TXD_CMD_TCP;
2838                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2839         } else if (csum_flags & CSUM_UDP) {
2840                 /*
2841                  * Start offset for header checksum calculation.
2842                  * End offset for header checksum calculation.
2843                  * Offset of place to put the checksum.
2844                  */
2845                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2846                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2847                 TXD->upper_setup.tcp_fields.tucso =
2848                     hdr_len + offsetof(struct udphdr, uh_sum);
2849                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2850         }
2851
2852         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2853                      E1000_TXD_DTYP_D;          /* Data descr */
2854
2855         /* Save the information for this csum offloading context */
2856         adapter->csum_lhlen = ehdrlen;
2857         adapter->csum_iphlen = ip_hlen;
2858         adapter->csum_flags = csum_flags;
2859         adapter->csum_txd_upper = *txd_upper;
2860         adapter->csum_txd_lower = *txd_lower;
2861
2862         TXD->tcp_seg_setup.data = htole32(0);
2863         TXD->cmd_and_length =
2864             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2865
2866         if (++curr_txd == adapter->num_tx_desc)
2867                 curr_txd = 0;
2868
2869         KKASSERT(adapter->num_tx_desc_avail > 0);
2870         adapter->num_tx_desc_avail--;
2871
2872         adapter->next_avail_tx_desc = curr_txd;
2873         return 1;
2874 }
2875
2876 static void
2877 em_txeof(struct adapter *adapter)
2878 {
2879         struct ifnet *ifp = &adapter->arpcom.ac_if;
2880         struct em_buffer *tx_buffer;
2881         int first, num_avail;
2882
2883         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2884                 return;
2885
2886         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2887                 return;
2888
2889         num_avail = adapter->num_tx_desc_avail;
2890         first = adapter->next_tx_to_clean;
2891
2892         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2893                 struct e1000_tx_desc *tx_desc;
2894                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2895
2896                 tx_desc = &adapter->tx_desc_base[dd_idx];
2897                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2898                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2899
2900                         if (++dd_idx == adapter->num_tx_desc)
2901                                 dd_idx = 0;
2902
2903                         while (first != dd_idx) {
2904                                 logif(pkt_txclean);
2905
2906                                 num_avail++;
2907
2908                                 tx_buffer = &adapter->tx_buffer_area[first];
2909                                 if (tx_buffer->m_head) {
2910                                         ifp->if_opackets++;
2911                                         bus_dmamap_unload(adapter->txtag,
2912                                                           tx_buffer->map);
2913                                         m_freem(tx_buffer->m_head);
2914                                         tx_buffer->m_head = NULL;
2915                                 }
2916
2917                                 if (++first == adapter->num_tx_desc)
2918                                         first = 0;
2919                         }
2920                 } else {
2921                         break;
2922                 }
2923         }
2924         adapter->next_tx_to_clean = first;
2925         adapter->num_tx_desc_avail = num_avail;
2926
2927         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2928                 adapter->tx_dd_head = 0;
2929                 adapter->tx_dd_tail = 0;
2930         }
2931
2932         if (!EM_IS_OACTIVE(adapter)) {
2933                 ifp->if_flags &= ~IFF_OACTIVE;
2934
2935                 /* All clean, turn off the timer */
2936                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2937                         ifp->if_timer = 0;
2938         }
2939 }
2940
2941 static void
2942 em_tx_collect(struct adapter *adapter)
2943 {
2944         struct ifnet *ifp = &adapter->arpcom.ac_if;
2945         struct em_buffer *tx_buffer;
2946         int tdh, first, num_avail, dd_idx = -1;
2947
2948         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2949                 return;
2950
2951         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2952         if (tdh == adapter->next_tx_to_clean)
2953                 return;
2954
2955         if (adapter->tx_dd_head != adapter->tx_dd_tail)
2956                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2957
2958         num_avail = adapter->num_tx_desc_avail;
2959         first = adapter->next_tx_to_clean;
2960
2961         while (first != tdh) {
2962                 logif(pkt_txclean);
2963
2964                 num_avail++;
2965
2966                 tx_buffer = &adapter->tx_buffer_area[first];
2967                 if (tx_buffer->m_head) {
2968                         ifp->if_opackets++;
2969                         bus_dmamap_unload(adapter->txtag,
2970                                           tx_buffer->map);
2971                         m_freem(tx_buffer->m_head);
2972                         tx_buffer->m_head = NULL;
2973                 }
2974
2975                 if (first == dd_idx) {
2976                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2977                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2978                                 adapter->tx_dd_head = 0;
2979                                 adapter->tx_dd_tail = 0;
2980                                 dd_idx = -1;
2981                         } else {
2982                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2983                         }
2984                 }
2985
2986                 if (++first == adapter->num_tx_desc)
2987                         first = 0;
2988         }
2989         adapter->next_tx_to_clean = first;
2990         adapter->num_tx_desc_avail = num_avail;
2991
2992         if (!EM_IS_OACTIVE(adapter)) {
2993                 ifp->if_flags &= ~IFF_OACTIVE;
2994
2995                 /* All clean, turn off the timer */
2996                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2997                         ifp->if_timer = 0;
2998         }
2999 }
3000
3001 /*
3002  * When Link is lost sometimes there is work still in the TX ring
3003  * which will result in a watchdog, rather than allow that do an
3004  * attempted cleanup and then reinit here.  Note that this has been
3005  * seens mostly with fiber adapters.
3006  */
3007 static void
3008 em_tx_purge(struct adapter *adapter)
3009 {
3010         struct ifnet *ifp = &adapter->arpcom.ac_if;
3011
3012         if (!adapter->link_active && ifp->if_timer) {
3013                 em_tx_collect(adapter);
3014                 if (ifp->if_timer) {
3015                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3016                         ifp->if_timer = 0;
3017                         em_init(adapter);
3018                 }
3019         }
3020 }
3021
3022 static int
3023 em_newbuf(struct adapter *adapter, int i, int init)
3024 {
3025         struct mbuf *m;
3026         bus_dma_segment_t seg;
3027         bus_dmamap_t map;
3028         struct em_buffer *rx_buffer;
3029         int error, nseg;
3030
3031         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
3032         if (m == NULL) {
3033                 adapter->mbuf_cluster_failed++;
3034                 if (init) {
3035                         if_printf(&adapter->arpcom.ac_if,
3036                                   "Unable to allocate RX mbuf\n");
3037                 }
3038                 return (ENOBUFS);
3039         }
3040         m->m_len = m->m_pkthdr.len = MCLBYTES;
3041
3042         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
3043                 m_adj(m, ETHER_ALIGN);
3044
3045         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3046                         adapter->rx_sparemap, m,
3047                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3048         if (error) {
3049                 m_freem(m);
3050                 if (init) {
3051                         if_printf(&adapter->arpcom.ac_if,
3052                                   "Unable to load RX mbuf\n");
3053                 }
3054                 return (error);
3055         }
3056
3057         rx_buffer = &adapter->rx_buffer_area[i];
3058         if (rx_buffer->m_head != NULL)
3059                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3060
3061         map = rx_buffer->map;
3062         rx_buffer->map = adapter->rx_sparemap;
3063         adapter->rx_sparemap = map;
3064
3065         rx_buffer->m_head = m;
3066
3067         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3068         return (0);
3069 }
3070
3071 static int
3072 em_create_rx_ring(struct adapter *adapter)
3073 {
3074         device_t dev = adapter->dev;
3075         struct em_buffer *rx_buffer;
3076         int i, error;
3077
3078         adapter->rx_buffer_area =
3079                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3080                         M_DEVBUF, M_WAITOK | M_ZERO);
3081
3082         /*
3083          * Create DMA tag for rx buffers
3084          */
3085         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3086                         1, 0,                   /* alignment, bounds */
3087                         BUS_SPACE_MAXADDR,      /* lowaddr */
3088                         BUS_SPACE_MAXADDR,      /* highaddr */
3089                         NULL, NULL,             /* filter, filterarg */
3090                         MCLBYTES,               /* maxsize */
3091                         1,                      /* nsegments */
3092                         MCLBYTES,               /* maxsegsize */
3093                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3094                         &adapter->rxtag);
3095         if (error) {
3096                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3097                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3098                 adapter->rx_buffer_area = NULL;
3099                 return error;
3100         }
3101
3102         /*
3103          * Create spare DMA map for rx buffers
3104          */
3105         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3106                                   &adapter->rx_sparemap);
3107         if (error) {
3108                 device_printf(dev, "Unable to create spare RX DMA map\n");
3109                 bus_dma_tag_destroy(adapter->rxtag);
3110                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3111                 adapter->rx_buffer_area = NULL;
3112                 return error;
3113         }
3114
3115         /*
3116          * Create DMA maps for rx buffers
3117          */
3118         for (i = 0; i < adapter->num_rx_desc; i++) {
3119                 rx_buffer = &adapter->rx_buffer_area[i];
3120
3121                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3122                                           &rx_buffer->map);
3123                 if (error) {
3124                         device_printf(dev, "Unable to create RX DMA map\n");
3125                         em_destroy_rx_ring(adapter, i);
3126                         return error;
3127                 }
3128         }
3129         return (0);
3130 }
3131
3132 static int
3133 em_init_rx_ring(struct adapter *adapter)
3134 {
3135         int i, error;
3136
3137         /* Reset descriptor ring */
3138         bzero(adapter->rx_desc_base,
3139             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3140
3141         /* Allocate new ones. */
3142         for (i = 0; i < adapter->num_rx_desc; i++) {
3143                 error = em_newbuf(adapter, i, 1);
3144                 if (error)
3145                         return (error);
3146         }
3147
3148         /* Setup our descriptor pointers */
3149         adapter->next_rx_desc_to_check = 0;
3150
3151         return (0);
3152 }
3153
3154 static void
3155 em_init_rx_unit(struct adapter *adapter)
3156 {
3157         struct ifnet *ifp = &adapter->arpcom.ac_if;
3158         uint64_t bus_addr;
3159         uint32_t rctl;
3160
3161         /*
3162          * Make sure receives are disabled while setting
3163          * up the descriptor ring
3164          */
3165         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3166         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3167
3168         if (adapter->hw.mac.type >= e1000_82540) {
3169                 uint32_t itr;
3170
3171                 /*
3172                  * Set the interrupt throttling rate. Value is calculated
3173                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3174                  */
3175                 if (adapter->int_throttle_ceil)
3176                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3177                 else
3178                         itr = 0;
3179                 em_set_itr(adapter, itr);
3180         }
3181
3182         /* Disable accelerated ackknowledge */
3183         if (adapter->hw.mac.type == e1000_82574) {
3184                 E1000_WRITE_REG(&adapter->hw,
3185                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3186         }
3187
3188         /* Receive Checksum Offload for TCP and UDP */
3189         if (ifp->if_capenable & IFCAP_RXCSUM) {
3190                 uint32_t rxcsum;
3191
3192                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3193                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3194                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3195         }
3196
3197         /*
3198          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3199          * long latencies are observed, like Lenovo X60. This
3200          * change eliminates the problem, but since having positive
3201          * values in RDTR is a known source of problems on other
3202          * platforms another solution is being sought.
3203          */
3204         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3205                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3206                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3207         }
3208
3209         /*
3210          * Setup the Base and Length of the Rx Descriptor Ring
3211          */
3212         bus_addr = adapter->rxdma.dma_paddr;
3213         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3214             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3215         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3216             (uint32_t)(bus_addr >> 32));
3217         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3218             (uint32_t)bus_addr);
3219
3220         /*
3221          * Setup the HW Rx Head and Tail Descriptor Pointers
3222          */
3223         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3224         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3225
3226         /* Set early receive threshold on appropriate hw */
3227         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3228             (adapter->hw.mac.type == e1000_pch2lan) ||
3229             (adapter->hw.mac.type == e1000_ich10lan)) &&
3230             (ifp->if_mtu > ETHERMTU)) {
3231                 uint32_t rxdctl;
3232
3233                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3234                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3235                 E1000_WRITE_REG(&adapter->hw, E1000_ERT, 0x100 | (1 << 13));
3236         }
3237
3238         if (adapter->hw.mac.type == e1000_pch2lan) {
3239                 if (ifp->if_mtu > ETHERMTU)
3240                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3241                 else
3242                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3243         }
3244
3245         /* Setup the Receive Control Register */
3246         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3247         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3248                 E1000_RCTL_RDMTS_HALF |
3249                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3250
3251         /* Make sure VLAN Filters are off */
3252         rctl &= ~E1000_RCTL_VFE;
3253
3254         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3255                 rctl |= E1000_RCTL_SBP;
3256         else
3257                 rctl &= ~E1000_RCTL_SBP;
3258
3259         switch (adapter->rx_buffer_len) {
3260         default:
3261         case 2048:
3262                 rctl |= E1000_RCTL_SZ_2048;
3263                 break;
3264
3265         case 4096:
3266                 rctl |= E1000_RCTL_SZ_4096 |
3267                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3268                 break;
3269
3270         case 8192:
3271                 rctl |= E1000_RCTL_SZ_8192 |
3272                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3273                 break;
3274
3275         case 16384:
3276                 rctl |= E1000_RCTL_SZ_16384 |
3277                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3278                 break;
3279         }
3280
3281         if (ifp->if_mtu > ETHERMTU)
3282                 rctl |= E1000_RCTL_LPE;
3283         else
3284                 rctl &= ~E1000_RCTL_LPE;
3285
3286         /* Enable Receives */
3287         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3288 }
3289
3290 static void
3291 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3292 {
3293         struct em_buffer *rx_buffer;
3294         int i;
3295
3296         if (adapter->rx_buffer_area == NULL)
3297                 return;
3298
3299         for (i = 0; i < ndesc; i++) {
3300                 rx_buffer = &adapter->rx_buffer_area[i];
3301
3302                 KKASSERT(rx_buffer->m_head == NULL);
3303                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3304         }
3305         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3306         bus_dma_tag_destroy(adapter->rxtag);
3307
3308         kfree(adapter->rx_buffer_area, M_DEVBUF);
3309         adapter->rx_buffer_area = NULL;
3310 }
3311
3312 static void
3313 em_rxeof(struct adapter *adapter, int count)
3314 {
3315         struct ifnet *ifp = &adapter->arpcom.ac_if;
3316         uint8_t status, accept_frame = 0, eop = 0;
3317         uint16_t len, desc_len, prev_len_adj;
3318         struct e1000_rx_desc *current_desc;
3319         struct mbuf *mp;
3320         int i;
3321
3322         i = adapter->next_rx_desc_to_check;
3323         current_desc = &adapter->rx_desc_base[i];
3324
3325         if (!(current_desc->status & E1000_RXD_STAT_DD))
3326                 return;
3327
3328         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3329                 struct mbuf *m = NULL;
3330
3331                 logif(pkt_receive);
3332
3333                 mp = adapter->rx_buffer_area[i].m_head;
3334
3335                 /*
3336                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3337                  * needs to access the last received byte in the mbuf.
3338                  */
3339                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3340                                 BUS_DMASYNC_POSTREAD);
3341
3342                 accept_frame = 1;
3343                 prev_len_adj = 0;
3344                 desc_len = le16toh(current_desc->length);
3345                 status = current_desc->status;
3346                 if (status & E1000_RXD_STAT_EOP) {
3347                         count--;
3348                         eop = 1;
3349                         if (desc_len < ETHER_CRC_LEN) {
3350                                 len = 0;
3351                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3352                         } else {
3353                                 len = desc_len - ETHER_CRC_LEN;
3354                         }
3355                 } else {
3356                         eop = 0;
3357                         len = desc_len;
3358                 }
3359
3360                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3361                         uint8_t last_byte;
3362                         uint32_t pkt_len = desc_len;
3363
3364                         if (adapter->fmp != NULL)
3365                                 pkt_len += adapter->fmp->m_pkthdr.len;
3366
3367                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3368                         if (TBI_ACCEPT(&adapter->hw, status,
3369                             current_desc->errors, pkt_len, last_byte,
3370                             adapter->min_frame_size, adapter->max_frame_size)) {
3371                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3372                                     &adapter->stats, pkt_len,
3373                                     adapter->hw.mac.addr,
3374                                     adapter->max_frame_size);
3375                                 if (len > 0)
3376                                         len--;
3377                         } else {
3378                                 accept_frame = 0;
3379                         }
3380                 }
3381
3382                 if (accept_frame) {
3383                         if (em_newbuf(adapter, i, 0) != 0) {
3384                                 ifp->if_iqdrops++;
3385                                 goto discard;
3386                         }
3387
3388                         /* Assign correct length to the current fragment */
3389                         mp->m_len = len;
3390
3391                         if (adapter->fmp == NULL) {
3392                                 mp->m_pkthdr.len = len;
3393                                 adapter->fmp = mp; /* Store the first mbuf */
3394                                 adapter->lmp = mp;
3395                         } else {
3396                                 /*
3397                                  * Chain mbuf's together
3398                                  */
3399
3400                                 /*
3401                                  * Adjust length of previous mbuf in chain if
3402                                  * we received less than 4 bytes in the last
3403                                  * descriptor.
3404                                  */
3405                                 if (prev_len_adj > 0) {
3406                                         adapter->lmp->m_len -= prev_len_adj;
3407                                         adapter->fmp->m_pkthdr.len -=
3408                                             prev_len_adj;
3409                                 }
3410                                 adapter->lmp->m_next = mp;
3411                                 adapter->lmp = adapter->lmp->m_next;
3412                                 adapter->fmp->m_pkthdr.len += len;
3413                         }
3414
3415                         if (eop) {
3416                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3417                                 ifp->if_ipackets++;
3418
3419                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3420                                         em_rxcsum(adapter, current_desc,
3421                                                   adapter->fmp);
3422                                 }
3423
3424                                 if (status & E1000_RXD_STAT_VP) {
3425                                         adapter->fmp->m_pkthdr.ether_vlantag =
3426                                             (le16toh(current_desc->special) &
3427                                             E1000_RXD_SPC_VLAN_MASK);
3428                                         adapter->fmp->m_flags |= M_VLANTAG;
3429                                 }
3430                                 m = adapter->fmp;
3431                                 adapter->fmp = NULL;
3432                                 adapter->lmp = NULL;
3433                         }
3434                 } else {
3435                         ifp->if_ierrors++;
3436 discard:
3437 #ifdef foo
3438                         /* Reuse loaded DMA map and just update mbuf chain */
3439                         mp = adapter->rx_buffer_area[i].m_head;
3440                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3441                         mp->m_data = mp->m_ext.ext_buf;
3442                         mp->m_next = NULL;
3443                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3444                                 m_adj(mp, ETHER_ALIGN);
3445 #endif
3446                         if (adapter->fmp != NULL) {
3447                                 m_freem(adapter->fmp);
3448                                 adapter->fmp = NULL;
3449                                 adapter->lmp = NULL;
3450                         }
3451                         m = NULL;
3452                 }
3453
3454                 /* Zero out the receive descriptors status. */
3455                 current_desc->status = 0;
3456
3457                 if (m != NULL)
3458                         ifp->if_input(ifp, m);
3459
3460                 /* Advance our pointers to the next descriptor. */
3461                 if (++i == adapter->num_rx_desc)
3462                         i = 0;
3463                 current_desc = &adapter->rx_desc_base[i];
3464         }
3465         adapter->next_rx_desc_to_check = i;
3466
3467         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3468         if (--i < 0)
3469                 i = adapter->num_rx_desc - 1;
3470         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3471 }
3472
3473 static void
3474 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3475           struct mbuf *mp)
3476 {
3477         /* 82543 or newer only */
3478         if (adapter->hw.mac.type < e1000_82543 ||
3479             /* Ignore Checksum bit is set */
3480             (rx_desc->status & E1000_RXD_STAT_IXSM))
3481                 return;
3482
3483         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3484             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3485                 /* IP Checksum Good */
3486                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3487         }
3488
3489         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3490             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3491                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3492                                            CSUM_PSEUDO_HDR |
3493                                            CSUM_FRAG_NOT_CHECKED;
3494                 mp->m_pkthdr.csum_data = htons(0xffff);
3495         }
3496 }
3497
3498 static void
3499 em_enable_intr(struct adapter *adapter)
3500 {
3501         uint32_t ims_mask = IMS_ENABLE_MASK;
3502
3503         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3504
3505 #if 0
3506         /* XXX MSIX */
3507         if (adapter->hw.mac.type == e1000_82574) {
3508                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3509                 ims_mask |= EM_MSIX_MASK;
3510         }
3511 #endif
3512         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3513 }
3514
3515 static void
3516 em_disable_intr(struct adapter *adapter)
3517 {
3518         uint32_t clear = 0xffffffff;
3519
3520         /*
3521          * The first version of 82542 had an errata where when link was forced
3522          * it would stay up even up even if the cable was disconnected.
3523          * Sequence errors were used to detect the disconnect and then the
3524          * driver would unforce the link.  This code in the in the ISR.  For
3525          * this to work correctly the Sequence error interrupt had to be
3526          * enabled all the time.
3527          */
3528         if (adapter->hw.mac.type == e1000_82542 &&
3529             adapter->hw.revision_id == E1000_REVISION_2)
3530                 clear &= ~E1000_ICR_RXSEQ;
3531         else if (adapter->hw.mac.type == e1000_82574)
3532                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3533
3534         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3535
3536         adapter->npoll.ifpc_stcount = 0;
3537
3538         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3539 }
3540
3541 /*
3542  * Bit of a misnomer, what this really means is
3543  * to enable OS management of the system... aka
3544  * to disable special hardware management features
3545  */
3546 static void
3547 em_get_mgmt(struct adapter *adapter)
3548 {
3549         /* A shared code workaround */
3550 #define E1000_82542_MANC2H E1000_MANC2H
3551         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3552                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3553                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3554
3555                 /* disable hardware interception of ARP */
3556                 manc &= ~(E1000_MANC_ARP_EN);
3557
3558                 /* enable receiving management packets to the host */
3559                 if (adapter->hw.mac.type >= e1000_82571) {
3560                         manc |= E1000_MANC_EN_MNG2HOST;
3561 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3562 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3563                         manc2h |= E1000_MNG2HOST_PORT_623;
3564                         manc2h |= E1000_MNG2HOST_PORT_664;
3565                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3566                 }
3567
3568                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3569         }
3570 }
3571
3572 /*
3573  * Give control back to hardware management
3574  * controller if there is one.
3575  */
3576 static void
3577 em_rel_mgmt(struct adapter *adapter)
3578 {
3579         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3580                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3581
3582                 /* re-enable hardware interception of ARP */
3583                 manc |= E1000_MANC_ARP_EN;
3584
3585                 if (adapter->hw.mac.type >= e1000_82571)
3586                         manc &= ~E1000_MANC_EN_MNG2HOST;
3587
3588                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3589         }
3590 }
3591
3592 /*
3593  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3594  * For ASF and Pass Through versions of f/w this means that
3595  * the driver is loaded.  For AMT version (only with 82573)
3596  * of the f/w this means that the network i/f is open.
3597  */
3598 static void
3599 em_get_hw_control(struct adapter *adapter)
3600 {
3601         /* Let firmware know the driver has taken over */
3602         if (adapter->hw.mac.type == e1000_82573) {
3603                 uint32_t swsm;
3604
3605                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3606                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3607                     swsm | E1000_SWSM_DRV_LOAD);
3608         } else {
3609                 uint32_t ctrl_ext;
3610
3611                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3612                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3613                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3614         }
3615         adapter->flags |= EM_FLAG_HW_CTRL;
3616 }
3617
3618 /*
3619  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3620  * For ASF and Pass Through versions of f/w this means that the
3621  * driver is no longer loaded.  For AMT version (only with 82573)
3622  * of the f/w this means that the network i/f is closed.
3623  */
3624 static void
3625 em_rel_hw_control(struct adapter *adapter)
3626 {
3627         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3628                 return;
3629         adapter->flags &= ~EM_FLAG_HW_CTRL;
3630
3631         /* Let firmware taken over control of h/w */
3632         if (adapter->hw.mac.type == e1000_82573) {
3633                 uint32_t swsm;
3634
3635                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3636                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3637                     swsm & ~E1000_SWSM_DRV_LOAD);
3638         } else {
3639                 uint32_t ctrl_ext;
3640
3641                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3642                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3643                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3644         }
3645 }
3646
3647 static int
3648 em_is_valid_eaddr(const uint8_t *addr)
3649 {
3650         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3651
3652         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3653                 return (FALSE);
3654
3655         return (TRUE);
3656 }
3657
3658 /*
3659  * Enable PCI Wake On Lan capability
3660  */
3661 void
3662 em_enable_wol(device_t dev)
3663 {
3664         uint16_t cap, status;
3665         uint8_t id;
3666
3667         /* First find the capabilities pointer*/
3668         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3669
3670         /* Read the PM Capabilities */
3671         id = pci_read_config(dev, cap, 1);
3672         if (id != PCIY_PMG)     /* Something wrong */
3673                 return;
3674
3675         /*
3676          * OK, we have the power capabilities,
3677          * so now get the status register
3678          */
3679         cap += PCIR_POWER_STATUS;
3680         status = pci_read_config(dev, cap, 2);
3681         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3682         pci_write_config(dev, cap, status, 2);
3683 }
3684
3685
3686 /*
3687  * 82544 Coexistence issue workaround.
3688  *    There are 2 issues.
3689  *       1. Transmit Hang issue.
3690  *    To detect this issue, following equation can be used...
3691  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3692  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3693  *
3694  *       2. DAC issue.
3695  *    To detect this issue, following equation can be used...
3696  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3697  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3698  *
3699  *    WORKAROUND:
3700  *        Make sure we do not have ending address
3701  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3702  */
3703 static uint32_t
3704 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3705 {
3706         uint32_t safe_terminator;
3707
3708         /*
3709          * Since issue is sensitive to length and address.
3710          * Let us first check the address...
3711          */
3712         if (length <= 4) {
3713                 desc_array->descriptor[0].address = address;
3714                 desc_array->descriptor[0].length = length;
3715                 desc_array->elements = 1;
3716                 return (desc_array->elements);
3717         }
3718
3719         safe_terminator =
3720         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3721
3722         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3723         if (safe_terminator == 0 ||
3724             (safe_terminator > 4 && safe_terminator < 9) ||
3725             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3726                 desc_array->descriptor[0].address = address;
3727                 desc_array->descriptor[0].length = length;
3728                 desc_array->elements = 1;
3729                 return (desc_array->elements);
3730         }
3731
3732         desc_array->descriptor[0].address = address;
3733         desc_array->descriptor[0].length = length - 4;
3734         desc_array->descriptor[1].address = address + (length - 4);
3735         desc_array->descriptor[1].length = 4;
3736         desc_array->elements = 2;
3737         return (desc_array->elements);
3738 }
3739
3740 static void
3741 em_update_stats(struct adapter *adapter)
3742 {
3743         struct ifnet *ifp = &adapter->arpcom.ac_if;
3744
3745         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3746             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3747                 adapter->stats.symerrs +=
3748                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3749                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3750         }
3751         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3752         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3753         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3754         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3755
3756         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3757         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3758         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3759         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3760         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3761         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3762         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3763         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3764         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3765         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3766         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3767         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3768         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3769         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3770         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3771         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3772         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3773         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3774         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3775         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3776
3777         /* For the 64-bit byte counters the low dword must be read first. */
3778         /* Both registers clear on the read of the high dword */
3779
3780         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3781         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3782
3783         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3784         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3785         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3786         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3787         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3788
3789         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3790         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3791
3792         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3793         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3794         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3795         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3796         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3797         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3798         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3799         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3800         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3801         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3802
3803         if (adapter->hw.mac.type >= e1000_82543) {
3804                 adapter->stats.algnerrc +=
3805                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3806                 adapter->stats.rxerrc +=
3807                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3808                 adapter->stats.tncrs +=
3809                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3810                 adapter->stats.cexterr +=
3811                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3812                 adapter->stats.tsctc +=
3813                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3814                 adapter->stats.tsctfc +=
3815                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3816         }
3817
3818         ifp->if_collisions = adapter->stats.colc;
3819
3820         /* Rx Errors */
3821         ifp->if_ierrors =
3822             adapter->dropped_pkts + adapter->stats.rxerrc +
3823             adapter->stats.crcerrs + adapter->stats.algnerrc +
3824             adapter->stats.ruc + adapter->stats.roc +
3825             adapter->stats.mpc + adapter->stats.cexterr;
3826
3827         /* Tx Errors */
3828         ifp->if_oerrors =
3829             adapter->stats.ecol + adapter->stats.latecol +
3830             adapter->watchdog_events;
3831 }
3832
3833 static void
3834 em_print_debug_info(struct adapter *adapter)
3835 {
3836         device_t dev = adapter->dev;
3837         uint8_t *hw_addr = adapter->hw.hw_addr;
3838
3839         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3840         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3841             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3842             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3843         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3844             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3845             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3846         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3847             adapter->hw.fc.high_water,
3848             adapter->hw.fc.low_water);
3849         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3850             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3851             E1000_READ_REG(&adapter->hw, E1000_TADV));
3852         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3853             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3854             E1000_READ_REG(&adapter->hw, E1000_RADV));
3855         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3856             (long long)adapter->tx_fifo_wrk_cnt,
3857             (long long)adapter->tx_fifo_reset_cnt);
3858         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3859             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3860             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3861         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3862             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3863             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3864         device_printf(dev, "Num Tx descriptors avail = %d\n",
3865             adapter->num_tx_desc_avail);
3866         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3867             adapter->no_tx_desc_avail1);
3868         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3869             adapter->no_tx_desc_avail2);
3870         device_printf(dev, "Std mbuf failed = %ld\n",
3871             adapter->mbuf_alloc_failed);
3872         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3873             adapter->mbuf_cluster_failed);
3874         device_printf(dev, "Driver dropped packets = %ld\n",
3875             adapter->dropped_pkts);
3876         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3877             adapter->no_tx_dma_setup);
3878 }
3879
3880 static void
3881 em_print_hw_stats(struct adapter *adapter)
3882 {
3883         device_t dev = adapter->dev;
3884
3885         device_printf(dev, "Excessive collisions = %lld\n",
3886             (long long)adapter->stats.ecol);
3887 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3888         device_printf(dev, "Symbol errors = %lld\n",
3889             (long long)adapter->stats.symerrs);
3890 #endif
3891         device_printf(dev, "Sequence errors = %lld\n",
3892             (long long)adapter->stats.sec);
3893         device_printf(dev, "Defer count = %lld\n",
3894             (long long)adapter->stats.dc);
3895         device_printf(dev, "Missed Packets = %lld\n",
3896             (long long)adapter->stats.mpc);
3897         device_printf(dev, "Receive No Buffers = %lld\n",
3898             (long long)adapter->stats.rnbc);
3899         /* RLEC is inaccurate on some hardware, calculate our own. */
3900         device_printf(dev, "Receive Length Errors = %lld\n",
3901             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3902         device_printf(dev, "Receive errors = %lld\n",
3903             (long long)adapter->stats.rxerrc);
3904         device_printf(dev, "Crc errors = %lld\n",
3905             (long long)adapter->stats.crcerrs);
3906         device_printf(dev, "Alignment errors = %lld\n",
3907             (long long)adapter->stats.algnerrc);
3908         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3909             (long long)adapter->stats.cexterr);
3910         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3911         device_printf(dev, "watchdog timeouts = %ld\n",
3912             adapter->watchdog_events);
3913         device_printf(dev, "XON Rcvd = %lld\n",
3914             (long long)adapter->stats.xonrxc);
3915         device_printf(dev, "XON Xmtd = %lld\n",
3916             (long long)adapter->stats.xontxc);
3917         device_printf(dev, "XOFF Rcvd = %lld\n",
3918             (long long)adapter->stats.xoffrxc);
3919         device_printf(dev, "XOFF Xmtd = %lld\n",
3920             (long long)adapter->stats.xofftxc);
3921         device_printf(dev, "Good Packets Rcvd = %lld\n",
3922             (long long)adapter->stats.gprc);
3923         device_printf(dev, "Good Packets Xmtd = %lld\n",
3924             (long long)adapter->stats.gptc);
3925 }
3926
3927 static void
3928 em_print_nvm_info(struct adapter *adapter)
3929 {
3930         uint16_t eeprom_data;
3931         int i, j, row = 0;
3932
3933         /* Its a bit crude, but it gets the job done */
3934         kprintf("\nInterface EEPROM Dump:\n");
3935         kprintf("Offset\n0x0000  ");
3936         for (i = 0, j = 0; i < 32; i++, j++) {
3937                 if (j == 8) { /* Make the offset block */
3938                         j = 0; ++row;
3939                         kprintf("\n0x00%x0  ",row);
3940                 }
3941                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3942                 kprintf("%04x ", eeprom_data);
3943         }
3944         kprintf("\n");
3945 }
3946
3947 static int
3948 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3949 {
3950         struct adapter *adapter;
3951         struct ifnet *ifp;
3952         int error, result;
3953
3954         result = -1;
3955         error = sysctl_handle_int(oidp, &result, 0, req);
3956         if (error || !req->newptr)
3957                 return (error);
3958
3959         adapter = (struct adapter *)arg1;
3960         ifp = &adapter->arpcom.ac_if;
3961
3962         lwkt_serialize_enter(ifp->if_serializer);
3963
3964         if (result == 1)
3965                 em_print_debug_info(adapter);
3966
3967         /*
3968          * This value will cause a hex dump of the
3969          * first 32 16-bit words of the EEPROM to
3970          * the screen.
3971          */
3972         if (result == 2)
3973                 em_print_nvm_info(adapter);
3974
3975         lwkt_serialize_exit(ifp->if_serializer);
3976
3977         return (error);
3978 }
3979
3980 static int
3981 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3982 {
3983         int error, result;
3984
3985         result = -1;
3986         error = sysctl_handle_int(oidp, &result, 0, req);
3987         if (error || !req->newptr)
3988                 return (error);
3989
3990         if (result == 1) {
3991                 struct adapter *adapter = (struct adapter *)arg1;
3992                 struct ifnet *ifp = &adapter->arpcom.ac_if;
3993
3994                 lwkt_serialize_enter(ifp->if_serializer);
3995                 em_print_hw_stats(adapter);
3996                 lwkt_serialize_exit(ifp->if_serializer);
3997         }
3998         return (error);
3999 }
4000
4001 static void
4002 em_add_sysctl(struct adapter *adapter)
4003 {
4004         sysctl_ctx_init(&adapter->sysctl_ctx);
4005         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
4006                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
4007                                         device_get_nameunit(adapter->dev),
4008                                         CTLFLAG_RD, 0, "");
4009         if (adapter->sysctl_tree == NULL) {
4010                 device_printf(adapter->dev, "can't add sysctl node\n");
4011         } else {
4012                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4013                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4014                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4015                     em_sysctl_debug_info, "I", "Debug Information");
4016
4017                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4018                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4019                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4020                     em_sysctl_stats, "I", "Statistics");
4021
4022                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4023                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4024                     OID_AUTO, "rxd", CTLFLAG_RD,
4025                     &adapter->num_rx_desc, 0, NULL);
4026                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4027                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4028                     OID_AUTO, "txd", CTLFLAG_RD,
4029                     &adapter->num_tx_desc, 0, NULL);
4030
4031                 if (adapter->hw.mac.type >= e1000_82540) {
4032                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4033                             SYSCTL_CHILDREN(adapter->sysctl_tree),
4034                             OID_AUTO, "int_throttle_ceil",
4035                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4036                             em_sysctl_int_throttle, "I",
4037                             "interrupt throttling rate");
4038                 }
4039                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4040                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4041                     OID_AUTO, "int_tx_nsegs",
4042                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4043                     em_sysctl_int_tx_nsegs, "I",
4044                     "# segments per TX interrupt");
4045         }
4046 }
4047
4048 static int
4049 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4050 {
4051         struct adapter *adapter = (void *)arg1;
4052         struct ifnet *ifp = &adapter->arpcom.ac_if;
4053         int error, throttle;
4054
4055         throttle = adapter->int_throttle_ceil;
4056         error = sysctl_handle_int(oidp, &throttle, 0, req);
4057         if (error || req->newptr == NULL)
4058                 return error;
4059         if (throttle < 0 || throttle > 1000000000 / 256)
4060                 return EINVAL;
4061
4062         if (throttle) {
4063                 /*
4064                  * Set the interrupt throttling rate in 256ns increments,
4065                  * recalculate sysctl value assignment to get exact frequency.
4066                  */
4067                 throttle = 1000000000 / 256 / throttle;
4068
4069                 /* Upper 16bits of ITR is reserved and should be zero */
4070                 if (throttle & 0xffff0000)
4071                         return EINVAL;
4072         }
4073
4074         lwkt_serialize_enter(ifp->if_serializer);
4075
4076         if (throttle)
4077                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4078         else
4079                 adapter->int_throttle_ceil = 0;
4080
4081         if (ifp->if_flags & IFF_RUNNING)
4082                 em_set_itr(adapter, throttle);
4083
4084         lwkt_serialize_exit(ifp->if_serializer);
4085
4086         if (bootverbose) {
4087                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4088                           adapter->int_throttle_ceil);
4089         }
4090         return 0;
4091 }
4092
4093 static int
4094 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4095 {
4096         struct adapter *adapter = (void *)arg1;
4097         struct ifnet *ifp = &adapter->arpcom.ac_if;
4098         int error, segs;
4099
4100         segs = adapter->tx_int_nsegs;
4101         error = sysctl_handle_int(oidp, &segs, 0, req);
4102         if (error || req->newptr == NULL)
4103                 return error;
4104         if (segs <= 0)
4105                 return EINVAL;
4106
4107         lwkt_serialize_enter(ifp->if_serializer);
4108
4109         /*
4110          * Don't allow int_tx_nsegs to become:
4111          * o  Less the oact_tx_desc
4112          * o  Too large that no TX desc will cause TX interrupt to
4113          *    be generated (OACTIVE will never recover)
4114          * o  Too small that will cause tx_dd[] overflow
4115          */
4116         if (segs < adapter->oact_tx_desc ||
4117             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4118             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4119                 error = EINVAL;
4120         } else {
4121                 error = 0;
4122                 adapter->tx_int_nsegs = segs;
4123         }
4124
4125         lwkt_serialize_exit(ifp->if_serializer);
4126
4127         return error;
4128 }
4129
4130 static void
4131 em_set_itr(struct adapter *adapter, uint32_t itr)
4132 {
4133         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4134         if (adapter->hw.mac.type == e1000_82574) {
4135                 int i;
4136
4137                 /*
4138                  * When using MSIX interrupts we need to
4139                  * throttle using the EITR register
4140                  */
4141                 for (i = 0; i < 4; ++i) {
4142                         E1000_WRITE_REG(&adapter->hw,
4143                             E1000_EITR_82574(i), itr);
4144                 }
4145         }
4146 }
4147
4148 static void
4149 em_disable_aspm(struct adapter *adapter)
4150 {
4151         uint16_t link_cap, link_ctrl, disable;
4152         uint8_t pcie_ptr, reg;
4153         device_t dev = adapter->dev;
4154
4155         switch (adapter->hw.mac.type) {
4156         case e1000_82571:
4157         case e1000_82572:
4158         case e1000_82573:
4159                 /*
4160                  * 82573 specification update
4161                  * errata #8 disable L0s
4162                  * errata #41 disable L1
4163                  *
4164                  * 82571/82572 specification update
4165                  # errata #13 disable L1
4166                  * errata #68 disable L0s
4167                  */
4168                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4169                 break;
4170
4171         case e1000_82574:
4172         case e1000_82583:
4173                 /*
4174                  * 82574 specification update errata #20
4175                  * 82583 specification update errata #9
4176                  *
4177                  * There is no need to disable L1
4178                  */
4179                 disable = PCIEM_LNKCTL_ASPM_L0S;
4180                 break;
4181
4182         default:
4183                 return;
4184         }
4185
4186         pcie_ptr = pci_get_pciecap_ptr(dev);
4187         if (pcie_ptr == 0)
4188                 return;
4189
4190         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4191         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4192                 return;
4193
4194         if (bootverbose) {
4195                 if_printf(&adapter->arpcom.ac_if,
4196                     "disable ASPM %#02x\n", disable);
4197         }
4198
4199         reg = pcie_ptr + PCIER_LINKCTRL;
4200         link_ctrl = pci_read_config(dev, reg, 2);
4201         link_ctrl &= ~disable;
4202         pci_write_config(dev, reg, link_ctrl, 2);
4203 }
4204
4205 static int
4206 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4207 {
4208         int iphlen, hoff, thoff, ex = 0;
4209         struct mbuf *m;
4210         struct ip *ip;
4211
4212         m = *mp;
4213         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4214
4215         iphlen = m->m_pkthdr.csum_iphlen;
4216         thoff = m->m_pkthdr.csum_thlen;
4217         hoff = m->m_pkthdr.csum_lhlen;
4218
4219         KASSERT(iphlen > 0, ("invalid ip hlen"));
4220         KASSERT(thoff > 0, ("invalid tcp hlen"));
4221         KASSERT(hoff > 0, ("invalid ether hlen"));
4222
4223         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4224                 ex = 4;
4225
4226         if (m->m_len < hoff + iphlen + thoff + ex) {
4227                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4228                 if (m == NULL) {
4229                         *mp = NULL;
4230                         return ENOBUFS;
4231                 }
4232                 *mp = m;
4233         }
4234         ip = mtodoff(m, struct ip *, hoff);
4235         ip->ip_len = 0;
4236
4237         return 0;
4238 }
4239
4240 static int
4241 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4242     uint32_t *txd_upper, uint32_t *txd_lower)
4243 {
4244         struct e1000_context_desc *TXD;
4245         int hoff, iphlen, thoff, hlen;
4246         int mss, pktlen, curr_txd;
4247
4248         iphlen = mp->m_pkthdr.csum_iphlen;
4249         thoff = mp->m_pkthdr.csum_thlen;
4250         hoff = mp->m_pkthdr.csum_lhlen;
4251         mss = mp->m_pkthdr.tso_segsz;
4252         pktlen = mp->m_pkthdr.len;
4253
4254         if (adapter->csum_flags == CSUM_TSO &&
4255             adapter->csum_iphlen == iphlen &&
4256             adapter->csum_lhlen == hoff &&
4257             adapter->csum_thlen == thoff &&
4258             adapter->csum_mss == mss &&
4259             adapter->csum_pktlen == pktlen) {
4260                 *txd_upper = adapter->csum_txd_upper;
4261                 *txd_lower = adapter->csum_txd_lower;
4262                 return 0;
4263         }
4264         hlen = hoff + iphlen + thoff;
4265
4266         /*
4267          * Setup a new TSO context.
4268          */
4269
4270         curr_txd = adapter->next_avail_tx_desc;
4271         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4272
4273         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4274                      E1000_TXD_DTYP_D |         /* Data descr type */
4275                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4276
4277         /* IP and/or TCP header checksum calculation and insertion. */
4278         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4279
4280         /*
4281          * Start offset for header checksum calculation.
4282          * End offset for header checksum calculation.
4283          * Offset of place put the checksum.
4284          */
4285         TXD->lower_setup.ip_fields.ipcss = hoff;
4286         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4287         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4288
4289         /*
4290          * Start offset for payload checksum calculation.
4291          * End offset for payload checksum calculation.
4292          * Offset of place to put the checksum.
4293          */
4294         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4295         TXD->upper_setup.tcp_fields.tucse = 0;
4296         TXD->upper_setup.tcp_fields.tucso =
4297             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4298
4299         /*
4300          * Payload size per packet w/o any headers.
4301          * Length of all headers up to payload.
4302          */
4303         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4304         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4305         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4306                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4307                                 E1000_TXD_CMD_TSE |     /* TSE context */
4308                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4309                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4310                                 (pktlen - hlen));       /* Total len */
4311
4312         /* Save the information for this TSO context */
4313         adapter->csum_flags = CSUM_TSO;
4314         adapter->csum_lhlen = hoff;
4315         adapter->csum_iphlen = iphlen;
4316         adapter->csum_thlen = thoff;
4317         adapter->csum_mss = mss;
4318         adapter->csum_pktlen = pktlen;
4319         adapter->csum_txd_upper = *txd_upper;
4320         adapter->csum_txd_lower = *txd_lower;
4321
4322         if (++curr_txd == adapter->num_tx_desc)
4323                 curr_txd = 0;
4324
4325         KKASSERT(adapter->num_tx_desc_avail > 0);
4326         adapter->num_tx_desc_avail--;
4327
4328         adapter->next_avail_tx_desc = curr_txd;
4329         return 1;
4330 }