2 * Copyright (c) 2000 Doug Rabson
3 * Copyright (c) 2000 Ruslan Ermilov
4 * Copyright (c) 2011 The FreeBSD Foundation
7 * Portions of this software were developed by Konstantin Belousov
8 * under sponsorship from the FreeBSD Foundation.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * $FreeBSD: src/sys/dev/agp/agp_i810.c,v 1.56 2010/03/12 21:34:23 rnoland Exp $
35 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
36 * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
38 * This is generic Intel GTT handling code, morphed from the AGP
43 #define KTR_AGP_I810 KTR_DEV
45 #define KTR_AGP_I810 0
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/malloc.h>
51 #include <sys/kernel.h>
57 #include <bus/pci/pcivar.h>
58 #include <bus/pci/pcireg.h>
61 #include <drm/intel-gtt.h>
64 #include <vm/vm_object.h>
65 #include <vm/vm_page.h>
66 #include <vm/vm_pageout.h>
69 #include <machine/md_var.h>
71 #define bus_read_1(r, o) \
72 bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
73 #define bus_read_4(r, o) \
74 bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
75 #define bus_write_4(r, o, v) \
76 bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
78 MALLOC_DECLARE(M_AGP);
80 struct agp_i810_match;
82 static int agp_i810_check_active(device_t bridge_dev);
83 static int agp_i830_check_active(device_t bridge_dev);
84 static int agp_i915_check_active(device_t bridge_dev);
85 static int agp_sb_check_active(device_t bridge_dev);
87 static void agp_82852_set_desc(device_t dev,
88 const struct agp_i810_match *match);
89 static void agp_i810_set_desc(device_t dev, const struct agp_i810_match *match);
91 static void agp_i810_dump_regs(device_t dev);
92 static void agp_i830_dump_regs(device_t dev);
93 static void agp_i855_dump_regs(device_t dev);
94 static void agp_i915_dump_regs(device_t dev);
95 static void agp_i965_dump_regs(device_t dev);
96 static void agp_sb_dump_regs(device_t dev);
98 static int agp_i810_get_stolen_size(device_t dev);
99 static int agp_i830_get_stolen_size(device_t dev);
100 static int agp_i915_get_stolen_size(device_t dev);
101 static int agp_sb_get_stolen_size(device_t dev);
103 static int agp_i810_get_gtt_mappable_entries(device_t dev);
104 static int agp_i830_get_gtt_mappable_entries(device_t dev);
105 static int agp_i915_get_gtt_mappable_entries(device_t dev);
107 static int agp_i810_get_gtt_total_entries(device_t dev);
108 static int agp_i965_get_gtt_total_entries(device_t dev);
109 static int agp_gen5_get_gtt_total_entries(device_t dev);
110 static int agp_sb_get_gtt_total_entries(device_t dev);
112 static int agp_i810_install_gatt(device_t dev);
113 static int agp_i830_install_gatt(device_t dev);
115 static void agp_i810_deinstall_gatt(device_t dev);
116 static void agp_i830_deinstall_gatt(device_t dev);
118 static void agp_i810_install_gtt_pte(device_t dev, u_int index,
119 vm_offset_t physical, int flags);
120 static void agp_i830_install_gtt_pte(device_t dev, u_int index,
121 vm_offset_t physical, int flags);
122 static void agp_i915_install_gtt_pte(device_t dev, u_int index,
123 vm_offset_t physical, int flags);
124 static void agp_i965_install_gtt_pte(device_t dev, u_int index,
125 vm_offset_t physical, int flags);
126 static void agp_g4x_install_gtt_pte(device_t dev, u_int index,
127 vm_offset_t physical, int flags);
128 static void agp_sb_install_gtt_pte(device_t dev, u_int index,
129 vm_offset_t physical, int flags);
131 static void agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte);
132 static void agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte);
133 static void agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte);
134 static void agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte);
135 static void agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte);
137 static u_int32_t agp_i810_read_gtt_pte(device_t dev, u_int index);
138 static u_int32_t agp_i915_read_gtt_pte(device_t dev, u_int index);
139 static u_int32_t agp_i965_read_gtt_pte(device_t dev, u_int index);
140 static u_int32_t agp_g4x_read_gtt_pte(device_t dev, u_int index);
142 static vm_paddr_t agp_i810_read_gtt_pte_paddr(device_t dev, u_int index);
143 static vm_paddr_t agp_i915_read_gtt_pte_paddr(device_t dev, u_int index);
144 static vm_paddr_t agp_sb_read_gtt_pte_paddr(device_t dev, u_int index);
146 static int agp_i810_set_aperture(device_t dev, u_int32_t aperture);
147 static int agp_i830_set_aperture(device_t dev, u_int32_t aperture);
148 static int agp_i915_set_aperture(device_t dev, u_int32_t aperture);
150 static int agp_i810_chipset_flush_setup(device_t dev);
151 static int agp_i915_chipset_flush_setup(device_t dev);
152 static int agp_i965_chipset_flush_setup(device_t dev);
154 static void agp_i810_chipset_flush_teardown(device_t dev);
155 static void agp_i915_chipset_flush_teardown(device_t dev);
156 static void agp_i965_chipset_flush_teardown(device_t dev);
158 static void agp_i810_chipset_flush(device_t dev);
159 static void agp_i830_chipset_flush(device_t dev);
160 static void agp_i915_chipset_flush(device_t dev);
163 CHIP_I810, /* i810/i815 */
164 CHIP_I830, /* 830M/845G */
165 CHIP_I855, /* 852GM/855GM/865G */
166 CHIP_I915, /* 915G/915GM */
167 CHIP_I965, /* G965 */
168 CHIP_G33, /* G33/Q33/Q35 */
169 CHIP_IGD, /* Pineview */
170 CHIP_G4X, /* G45/Q45 */
171 CHIP_SB, /* SandyBridge */
174 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
175 * allocated by us. The i915 has registers in BAR 0 and the GATT is at the
176 * start of the stolen memory, and should only be accessed by the OS through
177 * BAR 3. The G965 has registers and GATT in the same BAR (0) -- first 512KB
178 * is registers, second 512KB is GATT.
180 static struct resource_spec agp_i810_res_spec[] = {
181 { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE },
185 static struct resource_spec agp_i915_res_spec[] = {
186 { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
187 { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
191 static struct resource_spec agp_i965_res_spec[] = {
192 { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
196 static struct resource_spec agp_g4x_res_spec[] = {
197 { SYS_RES_MEMORY, AGP_G4X_MMADR, RF_ACTIVE | RF_SHAREABLE },
198 { SYS_RES_MEMORY, AGP_G4X_GTTADR, RF_ACTIVE | RF_SHAREABLE },
202 struct agp_i810_softc {
203 struct agp_softc agp;
204 u_int32_t initial_aperture; /* aperture size at startup */
205 struct agp_gatt *gatt;
206 u_int32_t dcache_size; /* i810 only */
207 u_int32_t stolen; /* number of i830/845 gtt
208 entries for stolen memory */
209 u_int stolen_size; /* BIOS-reserved graphics memory */
210 u_int gtt_total_entries; /* Total number of gtt ptes */
211 u_int gtt_mappable_entries; /* Number of gtt ptes mappable by CPU */
212 device_t bdev; /* bridge device */
213 void *argb_cursor; /* contigmalloc area for ARGB cursor */
214 struct resource *sc_res[2];
215 const struct agp_i810_match *match;
216 int sc_flush_page_rid;
217 struct resource *sc_flush_page_res;
218 void *sc_flush_page_vaddr;
219 int sc_bios_allocated_flush_page;
222 static device_t intel_agp;
224 struct agp_i810_driver {
227 int busdma_addr_mask_sz;
228 struct resource_spec *res_spec;
229 int (*check_active)(device_t);
230 void (*set_desc)(device_t, const struct agp_i810_match *);
231 void (*dump_regs)(device_t);
232 int (*get_stolen_size)(device_t);
233 int (*get_gtt_total_entries)(device_t);
234 int (*get_gtt_mappable_entries)(device_t);
235 int (*install_gatt)(device_t);
236 void (*deinstall_gatt)(device_t);
237 void (*write_gtt)(device_t, u_int, uint32_t);
238 void (*install_gtt_pte)(device_t, u_int, vm_offset_t, int);
239 u_int32_t (*read_gtt_pte)(device_t, u_int);
240 vm_paddr_t (*read_gtt_pte_paddr)(device_t , u_int);
241 int (*set_aperture)(device_t, u_int32_t);
242 int (*chipset_flush_setup)(device_t);
243 void (*chipset_flush_teardown)(device_t);
244 void (*chipset_flush)(device_t);
248 struct intel_gtt base;
251 static const struct agp_i810_driver agp_i810_i810_driver = {
252 .chiptype = CHIP_I810,
254 .busdma_addr_mask_sz = 32,
255 .res_spec = agp_i810_res_spec,
256 .check_active = agp_i810_check_active,
257 .set_desc = agp_i810_set_desc,
258 .dump_regs = agp_i810_dump_regs,
259 .get_stolen_size = agp_i810_get_stolen_size,
260 .get_gtt_mappable_entries = agp_i810_get_gtt_mappable_entries,
261 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
262 .install_gatt = agp_i810_install_gatt,
263 .deinstall_gatt = agp_i810_deinstall_gatt,
264 .write_gtt = agp_i810_write_gtt,
265 .install_gtt_pte = agp_i810_install_gtt_pte,
266 .read_gtt_pte = agp_i810_read_gtt_pte,
267 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
268 .set_aperture = agp_i810_set_aperture,
269 .chipset_flush_setup = agp_i810_chipset_flush_setup,
270 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
271 .chipset_flush = agp_i810_chipset_flush,
274 static const struct agp_i810_driver agp_i810_i815_driver = {
275 .chiptype = CHIP_I810,
277 .busdma_addr_mask_sz = 32,
278 .res_spec = agp_i810_res_spec,
279 .check_active = agp_i810_check_active,
280 .set_desc = agp_i810_set_desc,
281 .dump_regs = agp_i810_dump_regs,
282 .get_stolen_size = agp_i810_get_stolen_size,
283 .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
284 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
285 .install_gatt = agp_i810_install_gatt,
286 .deinstall_gatt = agp_i810_deinstall_gatt,
287 .write_gtt = agp_i810_write_gtt,
288 .install_gtt_pte = agp_i810_install_gtt_pte,
289 .read_gtt_pte = agp_i810_read_gtt_pte,
290 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
291 .set_aperture = agp_i810_set_aperture,
292 .chipset_flush_setup = agp_i810_chipset_flush_setup,
293 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
294 .chipset_flush = agp_i830_chipset_flush,
297 static const struct agp_i810_driver agp_i810_i830_driver = {
298 .chiptype = CHIP_I830,
300 .busdma_addr_mask_sz = 32,
301 .res_spec = agp_i810_res_spec,
302 .check_active = agp_i830_check_active,
303 .set_desc = agp_i810_set_desc,
304 .dump_regs = agp_i830_dump_regs,
305 .get_stolen_size = agp_i830_get_stolen_size,
306 .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
307 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
308 .install_gatt = agp_i830_install_gatt,
309 .deinstall_gatt = agp_i830_deinstall_gatt,
310 .write_gtt = agp_i810_write_gtt,
311 .install_gtt_pte = agp_i830_install_gtt_pte,
312 .read_gtt_pte = agp_i810_read_gtt_pte,
313 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
314 .set_aperture = agp_i830_set_aperture,
315 .chipset_flush_setup = agp_i810_chipset_flush_setup,
316 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
317 .chipset_flush = agp_i830_chipset_flush,
320 static const struct agp_i810_driver agp_i810_i855_driver = {
321 .chiptype = CHIP_I855,
323 .busdma_addr_mask_sz = 32,
324 .res_spec = agp_i810_res_spec,
325 .check_active = agp_i830_check_active,
326 .set_desc = agp_82852_set_desc,
327 .dump_regs = agp_i855_dump_regs,
328 .get_stolen_size = agp_i915_get_stolen_size,
329 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
330 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
331 .install_gatt = agp_i830_install_gatt,
332 .deinstall_gatt = agp_i830_deinstall_gatt,
333 .write_gtt = agp_i810_write_gtt,
334 .install_gtt_pte = agp_i830_install_gtt_pte,
335 .read_gtt_pte = agp_i810_read_gtt_pte,
336 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
337 .set_aperture = agp_i830_set_aperture,
338 .chipset_flush_setup = agp_i810_chipset_flush_setup,
339 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
340 .chipset_flush = agp_i830_chipset_flush,
343 static const struct agp_i810_driver agp_i810_i865_driver = {
344 .chiptype = CHIP_I855,
346 .busdma_addr_mask_sz = 32,
347 .res_spec = agp_i810_res_spec,
348 .check_active = agp_i830_check_active,
349 .set_desc = agp_i810_set_desc,
350 .dump_regs = agp_i855_dump_regs,
351 .get_stolen_size = agp_i915_get_stolen_size,
352 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
353 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
354 .install_gatt = agp_i830_install_gatt,
355 .deinstall_gatt = agp_i830_deinstall_gatt,
356 .write_gtt = agp_i810_write_gtt,
357 .install_gtt_pte = agp_i830_install_gtt_pte,
358 .read_gtt_pte = agp_i810_read_gtt_pte,
359 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
360 .set_aperture = agp_i915_set_aperture,
361 .chipset_flush_setup = agp_i810_chipset_flush_setup,
362 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
363 .chipset_flush = agp_i830_chipset_flush,
366 static const struct agp_i810_driver agp_i810_i915_driver = {
367 .chiptype = CHIP_I915,
369 .busdma_addr_mask_sz = 32,
370 .res_spec = agp_i915_res_spec,
371 .check_active = agp_i915_check_active,
372 .set_desc = agp_i810_set_desc,
373 .dump_regs = agp_i915_dump_regs,
374 .get_stolen_size = agp_i915_get_stolen_size,
375 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
376 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
377 .install_gatt = agp_i830_install_gatt,
378 .deinstall_gatt = agp_i830_deinstall_gatt,
379 .write_gtt = agp_i915_write_gtt,
380 .install_gtt_pte = agp_i915_install_gtt_pte,
381 .read_gtt_pte = agp_i915_read_gtt_pte,
382 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
383 .set_aperture = agp_i915_set_aperture,
384 .chipset_flush_setup = agp_i915_chipset_flush_setup,
385 .chipset_flush_teardown = agp_i915_chipset_flush_teardown,
386 .chipset_flush = agp_i915_chipset_flush,
389 static const struct agp_i810_driver agp_i810_g965_driver = {
390 .chiptype = CHIP_I965,
392 .busdma_addr_mask_sz = 36,
393 .res_spec = agp_i965_res_spec,
394 .check_active = agp_i915_check_active,
395 .set_desc = agp_i810_set_desc,
396 .dump_regs = agp_i965_dump_regs,
397 .get_stolen_size = agp_i915_get_stolen_size,
398 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
399 .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
400 .install_gatt = agp_i830_install_gatt,
401 .deinstall_gatt = agp_i830_deinstall_gatt,
402 .write_gtt = agp_i965_write_gtt,
403 .install_gtt_pte = agp_i965_install_gtt_pte,
404 .read_gtt_pte = agp_i965_read_gtt_pte,
405 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
406 .set_aperture = agp_i915_set_aperture,
407 .chipset_flush_setup = agp_i965_chipset_flush_setup,
408 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
409 .chipset_flush = agp_i915_chipset_flush,
412 static const struct agp_i810_driver agp_i810_g33_driver = {
413 .chiptype = CHIP_G33,
415 .busdma_addr_mask_sz = 36,
416 .res_spec = agp_i915_res_spec,
417 .check_active = agp_i915_check_active,
418 .set_desc = agp_i810_set_desc,
419 .dump_regs = agp_i965_dump_regs,
420 .get_stolen_size = agp_i915_get_stolen_size,
421 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
422 .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
423 .install_gatt = agp_i830_install_gatt,
424 .deinstall_gatt = agp_i830_deinstall_gatt,
425 .write_gtt = agp_i915_write_gtt,
426 .install_gtt_pte = agp_i915_install_gtt_pte,
427 .read_gtt_pte = agp_i915_read_gtt_pte,
428 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
429 .set_aperture = agp_i915_set_aperture,
430 .chipset_flush_setup = agp_i965_chipset_flush_setup,
431 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
432 .chipset_flush = agp_i915_chipset_flush,
435 static const struct agp_i810_driver agp_i810_igd_driver = {
436 .chiptype = CHIP_IGD,
438 .busdma_addr_mask_sz = 36,
439 .res_spec = agp_i915_res_spec,
440 .check_active = agp_i915_check_active,
441 .set_desc = agp_i810_set_desc,
442 .dump_regs = agp_i915_dump_regs,
443 .get_stolen_size = agp_i915_get_stolen_size,
444 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
445 .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
446 .install_gatt = agp_i830_install_gatt,
447 .deinstall_gatt = agp_i830_deinstall_gatt,
448 .write_gtt = agp_i915_write_gtt,
449 .install_gtt_pte = agp_i915_install_gtt_pte,
450 .read_gtt_pte = agp_i915_read_gtt_pte,
451 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
452 .set_aperture = agp_i915_set_aperture,
453 .chipset_flush_setup = agp_i965_chipset_flush_setup,
454 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
455 .chipset_flush = agp_i915_chipset_flush,
458 static const struct agp_i810_driver agp_i810_g4x_driver = {
459 .chiptype = CHIP_G4X,
461 .busdma_addr_mask_sz = 36,
462 .res_spec = agp_i965_res_spec,
463 .check_active = agp_i915_check_active,
464 .set_desc = agp_i810_set_desc,
465 .dump_regs = agp_i965_dump_regs,
466 .get_stolen_size = agp_i915_get_stolen_size,
467 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
468 .get_gtt_total_entries = agp_gen5_get_gtt_total_entries,
469 .install_gatt = agp_i830_install_gatt,
470 .deinstall_gatt = agp_i830_deinstall_gatt,
471 .write_gtt = agp_g4x_write_gtt,
472 .install_gtt_pte = agp_g4x_install_gtt_pte,
473 .read_gtt_pte = agp_g4x_read_gtt_pte,
474 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
475 .set_aperture = agp_i915_set_aperture,
476 .chipset_flush_setup = agp_i965_chipset_flush_setup,
477 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
478 .chipset_flush = agp_i915_chipset_flush,
481 static const struct agp_i810_driver agp_i810_sb_driver = {
484 .busdma_addr_mask_sz = 40,
485 .res_spec = agp_g4x_res_spec,
486 .check_active = agp_sb_check_active,
487 .set_desc = agp_i810_set_desc,
488 .dump_regs = agp_sb_dump_regs,
489 .get_stolen_size = agp_sb_get_stolen_size,
490 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
491 .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
492 .install_gatt = agp_i830_install_gatt,
493 .deinstall_gatt = agp_i830_deinstall_gatt,
494 .write_gtt = agp_sb_write_gtt,
495 .install_gtt_pte = agp_sb_install_gtt_pte,
496 .read_gtt_pte = agp_g4x_read_gtt_pte,
497 .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
498 .set_aperture = agp_i915_set_aperture,
499 .chipset_flush_setup = agp_i810_chipset_flush_setup,
500 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
501 .chipset_flush = agp_i810_chipset_flush,
504 static const struct agp_i810_driver valleyview_gtt_driver = {
507 .busdma_addr_mask_sz = 40,
508 .res_spec = agp_g4x_res_spec,
509 .check_active = agp_sb_check_active,
510 .set_desc = agp_i810_set_desc,
511 .dump_regs = agp_sb_dump_regs,
512 .get_stolen_size = agp_sb_get_stolen_size,
513 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
514 .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
515 .install_gatt = agp_i830_install_gatt,
516 .deinstall_gatt = agp_i830_deinstall_gatt,
517 .write_gtt = agp_sb_write_gtt,
518 .install_gtt_pte = agp_sb_install_gtt_pte,
519 .read_gtt_pte = agp_g4x_read_gtt_pte,
520 .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
521 .set_aperture = agp_i915_set_aperture,
522 .chipset_flush_setup = agp_i810_chipset_flush_setup,
523 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
524 .chipset_flush = agp_i810_chipset_flush,
527 /* For adding new devices, devid is the id of the graphics controller
528 * (pci:0:2:0, for example). The placeholder (usually at pci:0:2:1) for the
529 * second head should never be added. The bridge_offset is the offset to
530 * subtract from devid to get the id of the hostb that the device is on.
532 static const struct agp_i810_match {
535 const struct agp_i810_driver *driver;
536 } agp_i810_matches[] = {
539 .name = "Intel 82810 (i810 GMCH) SVGA controller",
540 .driver = &agp_i810_i810_driver
544 .name = "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller",
545 .driver = &agp_i810_i810_driver
549 .name = "Intel 82810E (i810E GMCH) SVGA controller",
550 .driver = &agp_i810_i810_driver
554 .name = "Intel 82815 (i815 GMCH) SVGA controller",
555 .driver = &agp_i810_i815_driver
559 .name = "Intel 82830M (830M GMCH) SVGA controller",
560 .driver = &agp_i810_i830_driver
564 .name = "Intel 82845M (845M GMCH) SVGA controller",
565 .driver = &agp_i810_i830_driver
569 .name = "Intel 82852/855GM SVGA controller",
570 .driver = &agp_i810_i855_driver
574 .name = "Intel 82865G (865G GMCH) SVGA controller",
575 .driver = &agp_i810_i865_driver
579 .name = "Intel 82915G (915G GMCH) SVGA controller",
580 .driver = &agp_i810_i915_driver
584 .name = "Intel E7221 SVGA controller",
585 .driver = &agp_i810_i915_driver
589 .name = "Intel 82915GM (915GM GMCH) SVGA controller",
590 .driver = &agp_i810_i915_driver
594 .name = "Intel 82945G (945G GMCH) SVGA controller",
595 .driver = &agp_i810_i915_driver
599 .name = "Intel 82945GM (945GM GMCH) SVGA controller",
600 .driver = &agp_i810_i915_driver
604 .name = "Intel 945GME SVGA controller",
605 .driver = &agp_i810_i915_driver
609 .name = "Intel 946GZ SVGA controller",
610 .driver = &agp_i810_g965_driver
614 .name = "Intel G965 SVGA controller",
615 .driver = &agp_i810_g965_driver
619 .name = "Intel Q965 SVGA controller",
620 .driver = &agp_i810_g965_driver
624 .name = "Intel G965 SVGA controller",
625 .driver = &agp_i810_g965_driver
629 .name = "Intel Q35 SVGA controller",
630 .driver = &agp_i810_g33_driver
634 .name = "Intel G33 SVGA controller",
635 .driver = &agp_i810_g33_driver
639 .name = "Intel Q33 SVGA controller",
640 .driver = &agp_i810_g33_driver
644 .name = "Intel Pineview SVGA controller",
645 .driver = &agp_i810_igd_driver
649 .name = "Intel Pineview (M) SVGA controller",
650 .driver = &agp_i810_igd_driver
654 .name = "Intel GM965 SVGA controller",
655 .driver = &agp_i810_g965_driver
659 .name = "Intel GME965 SVGA controller",
660 .driver = &agp_i810_g965_driver
664 .name = "Intel GM45 SVGA controller",
665 .driver = &agp_i810_g4x_driver
669 .name = "Intel Eaglelake SVGA controller",
670 .driver = &agp_i810_g4x_driver
674 .name = "Intel Q45 SVGA controller",
675 .driver = &agp_i810_g4x_driver
679 .name = "Intel G45 SVGA controller",
680 .driver = &agp_i810_g4x_driver
684 .name = "Intel G41 SVGA controller",
685 .driver = &agp_i810_g4x_driver
689 .name = "Intel Ironlake (D) SVGA controller",
690 .driver = &agp_i810_g4x_driver
694 .name = "Intel Ironlake (M) SVGA controller",
695 .driver = &agp_i810_g4x_driver
699 .name = "SandyBridge desktop GT1 IG",
700 .driver = &agp_i810_sb_driver
704 .name = "SandyBridge desktop GT2 IG",
705 .driver = &agp_i810_sb_driver
709 .name = "SandyBridge desktop GT2+ IG",
710 .driver = &agp_i810_sb_driver
714 .name = "SandyBridge mobile GT1 IG",
715 .driver = &agp_i810_sb_driver
719 .name = "SandyBridge mobile GT2 IG",
720 .driver = &agp_i810_sb_driver
724 .name = "SandyBridge mobile GT2+ IG",
725 .driver = &agp_i810_sb_driver
729 .name = "SandyBridge server IG",
730 .driver = &agp_i810_sb_driver
734 .name = "IvyBridge desktop GT1 IG",
735 .driver = &agp_i810_sb_driver
739 .name = "IvyBridge desktop GT2 IG",
740 .driver = &agp_i810_sb_driver
744 .name = "IvyBridge mobile GT1 IG",
745 .driver = &agp_i810_sb_driver
749 .name = "IvyBridge mobile GT2 IG",
750 .driver = &agp_i810_sb_driver
754 .name = "IvyBridge server GT1 IG",
755 .driver = &agp_i810_sb_driver
759 .name = "IvyBridge server GT2 IG",
760 .driver = &agp_i810_sb_driver
764 .name = "ValleyView",
765 .driver = &valleyview_gtt_driver
769 .name = "Haswell desktop GT1 IG",
770 .driver = &agp_i810_sb_driver
774 .name = "Haswell desktop GT2 IG",
775 .driver = &agp_i810_sb_driver
777 { 0x041e, "Haswell", &agp_i810_sb_driver },
778 { 0x0422, "Haswell", &agp_i810_sb_driver },
781 .name = "Haswell mobile GT1 IG",
782 .driver = &agp_i810_sb_driver
786 .name = "Haswell mobile GT2 IG",
787 .driver = &agp_i810_sb_driver
789 { 0x0426, "Haswell", &agp_i810_sb_driver },
792 .name = "Haswell server GT1 IG",
793 .driver = &agp_i810_sb_driver
797 .name = "Haswell server GT2 IG",
798 .driver = &agp_i810_sb_driver
800 { 0x042a, "Haswell", &agp_i810_sb_driver },
801 { 0x0c02, "Haswell", &agp_i810_sb_driver },
802 { 0x0c12, "Haswell", &agp_i810_sb_driver },
803 { 0x0c22, "Haswell", &agp_i810_sb_driver },
804 { 0x0c06, "Haswell", &agp_i810_sb_driver },
807 .name = "Haswell SDV",
808 .driver = &agp_i810_sb_driver
810 { 0x0c26, "Haswell", &agp_i810_sb_driver },
811 { 0x0c0a, "Haswell", &agp_i810_sb_driver },
812 { 0x0c1a, "Haswell", &agp_i810_sb_driver },
813 { 0x0c2a, "Haswell", &agp_i810_sb_driver },
814 { 0x0a02, "Haswell", &agp_i810_sb_driver },
815 { 0x0a12, "Haswell", &agp_i810_sb_driver },
816 { 0x0a22, "Haswell", &agp_i810_sb_driver },
817 { 0x0a06, "Haswell", &agp_i810_sb_driver },
818 { 0x0a16, "Haswell", &agp_i810_sb_driver },
819 { 0x0a26, "Haswell", &agp_i810_sb_driver },
820 { 0x0a0a, "Haswell", &agp_i810_sb_driver },
821 { 0x0a1a, "Haswell", &agp_i810_sb_driver },
822 { 0x0a2a, "Haswell", &agp_i810_sb_driver },
823 { 0x0d12, "Haswell", &agp_i810_sb_driver },
824 { 0x0d22, "Haswell", &agp_i810_sb_driver },
825 { 0x0d32, "Haswell", &agp_i810_sb_driver },
826 { 0x0d16, "Haswell", &agp_i810_sb_driver },
827 { 0x0d26, "Haswell", &agp_i810_sb_driver },
828 { 0x0d36, "Haswell", &agp_i810_sb_driver },
829 { 0x0d1a, "Haswell", &agp_i810_sb_driver },
830 { 0x0d2a, "Haswell", &agp_i810_sb_driver },
831 { 0x0d3a, "Haswell", &agp_i810_sb_driver },
837 static const struct agp_i810_match*
838 agp_i810_match(device_t dev)
842 if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
845 devid = pci_get_device(dev);
846 for (i = 0; agp_i810_matches[i].devid != 0; i++) {
847 if (agp_i810_matches[i].devid == devid)
850 if (agp_i810_matches[i].devid == 0)
853 return (&agp_i810_matches[i]);
857 * Find bridge device.
860 agp_i810_find_bridge(device_t dev)
863 return (pci_find_dbsf(0, 0, 0, 0));
867 agp_i810_identify(driver_t *driver, device_t parent)
870 if (device_find_child(parent, "agp", -1) == NULL &&
871 agp_i810_match(parent))
872 device_add_child(parent, "agp", -1);
876 agp_i810_check_active(device_t bridge_dev)
880 smram = pci_read_config(bridge_dev, AGP_I810_SMRAM, 1);
881 if ((smram & AGP_I810_SMRAM_GMS) == AGP_I810_SMRAM_GMS_DISABLED)
887 agp_i830_check_active(device_t bridge_dev)
891 gcc1 = pci_read_config(bridge_dev, AGP_I830_GCC1, 1);
892 if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED)
898 agp_i915_check_active(device_t bridge_dev)
902 deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
903 if ((deven & AGP_I915_DEVEN_D2F0) == AGP_I915_DEVEN_D2F0_DISABLED)
909 agp_sb_check_active(device_t bridge_dev)
913 deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
914 if ((deven & AGP_SB_DEVEN_D2EN) == AGP_SB_DEVEN_D2EN_DISABLED)
920 agp_82852_set_desc(device_t dev, const struct agp_i810_match *match)
923 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
926 "Intel 82855GME (855GME GMCH) SVGA controller");
930 "Intel 82855GM (855GM GMCH) SVGA controller");
934 "Intel 82852GME (852GME GMCH) SVGA controller");
938 "Intel 82852GM (852GM GMCH) SVGA controller");
942 "Intel 8285xM (85xGM GMCH) SVGA controller");
948 agp_i810_set_desc(device_t dev, const struct agp_i810_match *match)
951 device_set_desc(dev, match->name);
955 agp_i810_probe(device_t dev)
958 const struct agp_i810_match *match;
961 if (resource_disabled("agp", device_get_unit(dev)))
963 match = agp_i810_match(dev);
967 bdev = agp_i810_find_bridge(dev);
970 kprintf("I810: can't find bridge device\n");
975 * checking whether internal graphics device has been activated.
977 err = match->driver->check_active(bdev);
980 kprintf("i810: disabled, not probing\n");
984 match->driver->set_desc(dev, match);
985 return (BUS_PROBE_DEFAULT);
989 agp_i810_dump_regs(device_t dev)
991 struct agp_i810_softc *sc = device_get_softc(dev);
993 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
994 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
995 device_printf(dev, "AGP_I810_MISCC: 0x%04x\n",
996 pci_read_config(sc->bdev, AGP_I810_MISCC, 2));
1000 agp_i830_dump_regs(device_t dev)
1002 struct agp_i810_softc *sc = device_get_softc(dev);
1004 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
1005 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
1006 device_printf(dev, "AGP_I830_GCC1: 0x%02x\n",
1007 pci_read_config(sc->bdev, AGP_I830_GCC1, 1));
1011 agp_i855_dump_regs(device_t dev)
1013 struct agp_i810_softc *sc = device_get_softc(dev);
1015 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
1016 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
1017 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
1018 pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
1022 agp_i915_dump_regs(device_t dev)
1024 struct agp_i810_softc *sc = device_get_softc(dev);
1026 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
1027 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
1028 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
1029 pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
1030 device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
1031 pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
1035 agp_i965_dump_regs(device_t dev)
1037 struct agp_i810_softc *sc = device_get_softc(dev);
1039 device_printf(dev, "AGP_I965_PGTBL_CTL2: %08x\n",
1040 bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));
1041 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
1042 pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
1043 device_printf(dev, "AGP_I965_MSAC: 0x%02x\n",
1044 pci_read_config(sc->bdev, AGP_I965_MSAC, 1));
1048 agp_sb_dump_regs(device_t dev)
1050 struct agp_i810_softc *sc = device_get_softc(dev);
1052 device_printf(dev, "AGP_SNB_GFX_MODE: %08x\n",
1053 bus_read_4(sc->sc_res[0], AGP_SNB_GFX_MODE));
1054 device_printf(dev, "AGP_SNB_GCC1: 0x%04x\n",
1055 pci_read_config(sc->bdev, AGP_SNB_GCC1, 2));
1059 agp_i810_get_stolen_size(device_t dev)
1061 struct agp_i810_softc *sc;
1063 sc = device_get_softc(dev);
1065 sc->stolen_size = 0;
1070 agp_i830_get_stolen_size(device_t dev)
1072 struct agp_i810_softc *sc;
1075 sc = device_get_softc(dev);
1077 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
1078 switch (gcc1 & AGP_I830_GCC1_GMS) {
1079 case AGP_I830_GCC1_GMS_STOLEN_512:
1080 sc->stolen = (512 - 132) * 1024 / 4096;
1081 sc->stolen_size = 512 * 1024;
1083 case AGP_I830_GCC1_GMS_STOLEN_1024:
1084 sc->stolen = (1024 - 132) * 1024 / 4096;
1085 sc->stolen_size = 1024 * 1024;
1087 case AGP_I830_GCC1_GMS_STOLEN_8192:
1088 sc->stolen = (8192 - 132) * 1024 / 4096;
1089 sc->stolen_size = 8192 * 1024;
1094 "unknown memory configuration, disabling (GCC1 %x)\n",
1102 agp_i915_get_stolen_size(device_t dev)
1104 struct agp_i810_softc *sc;
1105 unsigned int gcc1, stolen, gtt_size;
1107 sc = device_get_softc(dev);
1110 * Stolen memory is set up at the beginning of the aperture by
1111 * the BIOS, consisting of the GATT followed by 4kb for the
1114 switch (sc->match->driver->chiptype) {
1122 switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
1123 AGP_I810_PGTBL_SIZE_MASK) {
1124 case AGP_I810_PGTBL_SIZE_128KB:
1127 case AGP_I810_PGTBL_SIZE_256KB:
1130 case AGP_I810_PGTBL_SIZE_512KB:
1133 case AGP_I965_PGTBL_SIZE_1MB:
1136 case AGP_I965_PGTBL_SIZE_2MB:
1139 case AGP_I965_PGTBL_SIZE_1_5MB:
1140 gtt_size = 1024 + 512;
1143 device_printf(dev, "Bad PGTBL size\n");
1148 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
1149 switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
1150 case AGP_G33_MGGC_GGMS_SIZE_1M:
1153 case AGP_G33_MGGC_GGMS_SIZE_2M:
1157 device_printf(dev, "Bad PGTBL size\n");
1166 device_printf(dev, "Bad chiptype\n");
1170 /* GCC1 is called MGGC on i915+ */
1171 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
1172 switch (gcc1 & AGP_I855_GCC1_GMS) {
1173 case AGP_I855_GCC1_GMS_STOLEN_1M:
1176 case AGP_I855_GCC1_GMS_STOLEN_4M:
1179 case AGP_I855_GCC1_GMS_STOLEN_8M:
1182 case AGP_I855_GCC1_GMS_STOLEN_16M:
1185 case AGP_I855_GCC1_GMS_STOLEN_32M:
1188 case AGP_I915_GCC1_GMS_STOLEN_48M:
1189 stolen = sc->match->driver->gen > 2 ? 48 * 1024 : 0;
1191 case AGP_I915_GCC1_GMS_STOLEN_64M:
1192 stolen = sc->match->driver->gen > 2 ? 64 * 1024 : 0;
1194 case AGP_G33_GCC1_GMS_STOLEN_128M:
1195 stolen = sc->match->driver->gen > 2 ? 128 * 1024 : 0;
1197 case AGP_G33_GCC1_GMS_STOLEN_256M:
1198 stolen = sc->match->driver->gen > 2 ? 256 * 1024 : 0;
1200 case AGP_G4X_GCC1_GMS_STOLEN_96M:
1201 if (sc->match->driver->chiptype == CHIP_I965 ||
1202 sc->match->driver->chiptype == CHIP_G4X)
1207 case AGP_G4X_GCC1_GMS_STOLEN_160M:
1208 if (sc->match->driver->chiptype == CHIP_I965 ||
1209 sc->match->driver->chiptype == CHIP_G4X)
1210 stolen = 160 * 1024;
1214 case AGP_G4X_GCC1_GMS_STOLEN_224M:
1215 if (sc->match->driver->chiptype == CHIP_I965 ||
1216 sc->match->driver->chiptype == CHIP_G4X)
1217 stolen = 224 * 1024;
1221 case AGP_G4X_GCC1_GMS_STOLEN_352M:
1222 if (sc->match->driver->chiptype == CHIP_I965 ||
1223 sc->match->driver->chiptype == CHIP_G4X)
1224 stolen = 352 * 1024;
1230 "unknown memory configuration, disabling (GCC1 %x)\n",
1236 sc->stolen_size = stolen * 1024;
1237 sc->stolen = (stolen - gtt_size) * 1024 / 4096;
1243 agp_sb_get_stolen_size(device_t dev)
1245 struct agp_i810_softc *sc;
1248 sc = device_get_softc(dev);
1249 gmch_ctl = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1250 switch (gmch_ctl & AGP_SNB_GMCH_GMS_STOLEN_MASK) {
1251 case AGP_SNB_GMCH_GMS_STOLEN_32M:
1252 sc->stolen_size = 32 * 1024 * 1024;
1254 case AGP_SNB_GMCH_GMS_STOLEN_64M:
1255 sc->stolen_size = 64 * 1024 * 1024;
1257 case AGP_SNB_GMCH_GMS_STOLEN_96M:
1258 sc->stolen_size = 96 * 1024 * 1024;
1260 case AGP_SNB_GMCH_GMS_STOLEN_128M:
1261 sc->stolen_size = 128 * 1024 * 1024;
1263 case AGP_SNB_GMCH_GMS_STOLEN_160M:
1264 sc->stolen_size = 160 * 1024 * 1024;
1266 case AGP_SNB_GMCH_GMS_STOLEN_192M:
1267 sc->stolen_size = 192 * 1024 * 1024;
1269 case AGP_SNB_GMCH_GMS_STOLEN_224M:
1270 sc->stolen_size = 224 * 1024 * 1024;
1272 case AGP_SNB_GMCH_GMS_STOLEN_256M:
1273 sc->stolen_size = 256 * 1024 * 1024;
1275 case AGP_SNB_GMCH_GMS_STOLEN_288M:
1276 sc->stolen_size = 288 * 1024 * 1024;
1278 case AGP_SNB_GMCH_GMS_STOLEN_320M:
1279 sc->stolen_size = 320 * 1024 * 1024;
1281 case AGP_SNB_GMCH_GMS_STOLEN_352M:
1282 sc->stolen_size = 352 * 1024 * 1024;
1284 case AGP_SNB_GMCH_GMS_STOLEN_384M:
1285 sc->stolen_size = 384 * 1024 * 1024;
1287 case AGP_SNB_GMCH_GMS_STOLEN_416M:
1288 sc->stolen_size = 416 * 1024 * 1024;
1290 case AGP_SNB_GMCH_GMS_STOLEN_448M:
1291 sc->stolen_size = 448 * 1024 * 1024;
1293 case AGP_SNB_GMCH_GMS_STOLEN_480M:
1294 sc->stolen_size = 480 * 1024 * 1024;
1296 case AGP_SNB_GMCH_GMS_STOLEN_512M:
1297 sc->stolen_size = 512 * 1024 * 1024;
1300 sc->stolen = (sc->stolen_size - 4) / 4096;
1305 agp_i810_get_gtt_mappable_entries(device_t dev)
1307 struct agp_i810_softc *sc;
1311 sc = device_get_softc(dev);
1312 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1313 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
1317 sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1322 agp_i830_get_gtt_mappable_entries(device_t dev)
1324 struct agp_i810_softc *sc;
1328 sc = device_get_softc(dev);
1329 gmch_ctl = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1330 if ((gmch_ctl & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
1334 sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1339 agp_i915_get_gtt_mappable_entries(device_t dev)
1341 struct agp_i810_softc *sc;
1344 sc = device_get_softc(dev);
1345 ap = AGP_GET_APERTURE(dev);
1346 sc->gtt_mappable_entries = ap >> AGP_PAGE_SHIFT;
1351 agp_i810_get_gtt_total_entries(device_t dev)
1353 struct agp_i810_softc *sc;
1355 sc = device_get_softc(dev);
1356 sc->gtt_total_entries = sc->gtt_mappable_entries;
1361 agp_i965_get_gtt_total_entries(device_t dev)
1363 struct agp_i810_softc *sc;
1364 uint32_t pgetbl_ctl;
1367 sc = device_get_softc(dev);
1369 pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1370 switch (pgetbl_ctl & AGP_I810_PGTBL_SIZE_MASK) {
1371 case AGP_I810_PGTBL_SIZE_128KB:
1372 sc->gtt_total_entries = 128 * 1024 / 4;
1374 case AGP_I810_PGTBL_SIZE_256KB:
1375 sc->gtt_total_entries = 256 * 1024 / 4;
1377 case AGP_I810_PGTBL_SIZE_512KB:
1378 sc->gtt_total_entries = 512 * 1024 / 4;
1380 /* GTT pagetable sizes bigger than 512KB are not possible on G33! */
1381 case AGP_I810_PGTBL_SIZE_1MB:
1382 sc->gtt_total_entries = 1024 * 1024 / 4;
1384 case AGP_I810_PGTBL_SIZE_2MB:
1385 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1387 case AGP_I810_PGTBL_SIZE_1_5MB:
1388 sc->gtt_total_entries = (1024 + 512) * 1024 / 4;
1391 device_printf(dev, "Unknown page table size\n");
1398 agp_gen5_adjust_pgtbl_size(device_t dev, uint32_t sz)
1400 struct agp_i810_softc *sc;
1401 uint32_t pgetbl_ctl, pgetbl_ctl2;
1403 sc = device_get_softc(dev);
1405 /* Disable per-process page table. */
1406 pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);
1407 pgetbl_ctl2 &= ~AGP_I810_PGTBL_ENABLED;
1408 bus_write_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2, pgetbl_ctl2);
1410 /* Write the new ggtt size. */
1411 pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1412 pgetbl_ctl &= ~AGP_I810_PGTBL_SIZE_MASK;
1414 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgetbl_ctl);
1418 agp_gen5_get_gtt_total_entries(device_t dev)
1420 struct agp_i810_softc *sc;
1423 sc = device_get_softc(dev);
1425 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1426 switch (gcc1 & AGP_G4x_GCC1_SIZE_MASK) {
1427 case AGP_G4x_GCC1_SIZE_1M:
1428 case AGP_G4x_GCC1_SIZE_VT_1M:
1429 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1MB);
1431 case AGP_G4x_GCC1_SIZE_VT_1_5M:
1432 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1_5MB);
1434 case AGP_G4x_GCC1_SIZE_2M:
1435 case AGP_G4x_GCC1_SIZE_VT_2M:
1436 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_2MB);
1439 device_printf(dev, "Unknown page table size\n");
1443 return (agp_i965_get_gtt_total_entries(dev));
1447 agp_sb_get_gtt_total_entries(device_t dev)
1449 struct agp_i810_softc *sc;
1452 sc = device_get_softc(dev);
1454 gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1455 switch (gcc1 & AGP_SNB_GTT_SIZE_MASK) {
1457 case AGP_SNB_GTT_SIZE_0M:
1458 kprintf("Bad GTT size mask: 0x%04x\n", gcc1);
1460 case AGP_SNB_GTT_SIZE_1M:
1461 sc->gtt_total_entries = 1024 * 1024 / 4;
1463 case AGP_SNB_GTT_SIZE_2M:
1464 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1471 agp_i810_install_gatt(device_t dev)
1473 struct agp_i810_softc *sc;
1475 sc = device_get_softc(dev);
1477 /* Some i810s have on-chip memory called dcache. */
1478 if ((bus_read_1(sc->sc_res[0], AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
1480 sc->dcache_size = 4 * 1024 * 1024;
1482 sc->dcache_size = 0;
1484 /* According to the specs the gatt on the i810 must be 64k. */
1485 sc->gatt->ag_virtual = contigmalloc(64 * 1024, M_AGP, 0, 0, ~0,
1487 if (sc->gatt->ag_virtual == NULL) {
1489 device_printf(dev, "contiguous allocation failed\n");
1493 bzero(sc->gatt->ag_virtual, sc->gatt->ag_entries * sizeof(u_int32_t));
1494 sc->gatt->ag_physical = vtophys((vm_offset_t)sc->gatt->ag_virtual);
1496 /* Install the GATT. */
1497 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1498 sc->gatt->ag_physical | 1);
1503 agp_i830_install_gatt(device_t dev)
1505 struct agp_i810_softc *sc;
1508 sc = device_get_softc(dev);
1511 * The i830 automatically initializes the 128k gatt on boot.
1512 * GATT address is already in there, make sure it's enabled.
1514 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1516 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1518 sc->gatt->ag_physical = pgtblctl & ~1;
1523 agp_i810_attach(device_t dev)
1525 struct agp_i810_softc *sc;
1528 sc = device_get_softc(dev);
1529 sc->bdev = agp_i810_find_bridge(dev);
1530 if (sc->bdev == NULL)
1533 sc->match = agp_i810_match(dev);
1535 agp_set_aperture_resource(dev, sc->match->driver->gen <= 2 ?
1536 AGP_APBASE : AGP_I915_GMADR);
1537 error = agp_generic_attach(dev);
1541 if (ptoa((vm_paddr_t)Maxmem) >
1542 (1ULL << sc->match->driver->busdma_addr_mask_sz) - 1) {
1543 device_printf(dev, "agp_i810 does not support physical "
1544 "memory above %ju.\n", (uintmax_t)(1ULL <<
1545 sc->match->driver->busdma_addr_mask_sz) - 1);
1549 if (bus_alloc_resources(dev, sc->match->driver->res_spec, sc->sc_res)) {
1550 agp_generic_detach(dev);
1554 sc->initial_aperture = AGP_GET_APERTURE(dev);
1555 sc->gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK);
1556 sc->gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
1558 if ((error = sc->match->driver->get_stolen_size(dev)) != 0 ||
1559 (error = sc->match->driver->install_gatt(dev)) != 0 ||
1560 (error = sc->match->driver->get_gtt_mappable_entries(dev)) != 0 ||
1561 (error = sc->match->driver->get_gtt_total_entries(dev)) != 0 ||
1562 (error = sc->match->driver->chipset_flush_setup(dev)) != 0) {
1563 bus_release_resources(dev, sc->match->driver->res_spec,
1565 kfree(sc->gatt, M_AGP);
1566 agp_generic_detach(dev);
1571 device_printf(dev, "aperture size is %dM",
1572 sc->initial_aperture / 1024 / 1024);
1574 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
1578 sc->match->driver->dump_regs(dev);
1579 device_printf(dev, "Mappable GTT entries: %d\n",
1580 sc->gtt_mappable_entries);
1581 device_printf(dev, "Total GTT entries: %d\n",
1582 sc->gtt_total_entries);
1588 agp_i810_deinstall_gatt(device_t dev)
1590 struct agp_i810_softc *sc;
1592 sc = device_get_softc(dev);
1593 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0);
1594 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
1598 agp_i830_deinstall_gatt(device_t dev)
1600 struct agp_i810_softc *sc;
1601 unsigned int pgtblctl;
1603 sc = device_get_softc(dev);
1604 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1606 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1610 agp_i810_detach(device_t dev)
1612 struct agp_i810_softc *sc;
1614 sc = device_get_softc(dev);
1617 /* Clear the GATT base. */
1618 sc->match->driver->deinstall_gatt(dev);
1620 sc->match->driver->chipset_flush_teardown(dev);
1622 /* Put the aperture back the way it started. */
1623 AGP_SET_APERTURE(dev, sc->initial_aperture);
1625 kfree(sc->gatt, M_AGP);
1626 bus_release_resources(dev, sc->match->driver->res_spec, sc->sc_res);
1633 agp_i810_resume(device_t dev)
1635 struct agp_i810_softc *sc;
1636 sc = device_get_softc(dev);
1638 AGP_SET_APERTURE(dev, sc->initial_aperture);
1640 /* Install the GATT. */
1641 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1642 sc->gatt->ag_physical | 1);
1644 return (bus_generic_resume(dev));
1648 * Sets the PCI resource size of the aperture on i830-class and below chipsets,
1649 * while returning failure on later chipsets when an actual change is
1652 * This whole function is likely bogus, as the kernel would probably need to
1653 * reconfigure the placement of the AGP aperture if a larger size is requested,
1654 * which doesn't happen currently.
1657 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
1659 struct agp_i810_softc *sc;
1662 sc = device_get_softc(dev);
1664 * Double check for sanity.
1666 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
1667 device_printf(dev, "bad aperture size %d\n", aperture);
1671 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1672 miscc &= ~AGP_I810_MISCC_WINSIZE;
1673 if (aperture == 32 * 1024 * 1024)
1674 miscc |= AGP_I810_MISCC_WINSIZE_32;
1676 miscc |= AGP_I810_MISCC_WINSIZE_64;
1678 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
1683 agp_i830_set_aperture(device_t dev, u_int32_t aperture)
1685 struct agp_i810_softc *sc;
1688 sc = device_get_softc(dev);
1690 if (aperture != 64 * 1024 * 1024 &&
1691 aperture != 128 * 1024 * 1024) {
1692 device_printf(dev, "bad aperture size %d\n", aperture);
1695 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1696 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
1697 if (aperture == 64 * 1024 * 1024)
1698 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
1700 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
1702 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
1707 agp_i915_set_aperture(device_t dev, u_int32_t aperture)
1710 return (agp_generic_set_aperture(dev, aperture));
1714 agp_i810_method_set_aperture(device_t dev, u_int32_t aperture)
1716 struct agp_i810_softc *sc;
1718 sc = device_get_softc(dev);
1719 return (sc->match->driver->set_aperture(dev, aperture));
1723 * Writes a GTT entry mapping the page at the given offset from the
1724 * beginning of the aperture to the given physical address. Setup the
1725 * caching mode according to flags.
1727 * For gen 1, 2 and 3, GTT start is located at AGP_I810_GTT offset
1728 * from corresponding BAR start. For gen 4, offset is 512KB +
1729 * AGP_I810_GTT, for gen 5 and 6 it is 2MB + AGP_I810_GTT.
1731 * Also, the bits of the physical page address above 4GB needs to be
1732 * placed into bits 40-32 of PTE.
1735 agp_i810_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1740 pte = (u_int32_t)physical | I810_PTE_VALID;
1741 if (flags == AGP_DCACHE_MEMORY)
1742 pte |= I810_PTE_LOCAL;
1743 else if (flags == AGP_USER_CACHED_MEMORY)
1744 pte |= I830_PTE_SYSTEM_CACHED;
1745 agp_i810_write_gtt(dev, index, pte);
1749 agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte)
1751 struct agp_i810_softc *sc;
1753 sc = device_get_softc(dev);
1754 bus_write_4(sc->sc_res[0], AGP_I810_GTT + index * 4, pte);
1758 agp_i830_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1763 pte = (u_int32_t)physical | I810_PTE_VALID;
1764 if (flags == AGP_USER_CACHED_MEMORY)
1765 pte |= I830_PTE_SYSTEM_CACHED;
1766 agp_i810_write_gtt(dev, index, pte);
1770 agp_i915_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1775 pte = (u_int32_t)physical | I810_PTE_VALID;
1776 if (flags == AGP_USER_CACHED_MEMORY)
1777 pte |= I830_PTE_SYSTEM_CACHED;
1778 pte |= (physical & 0x0000000f00000000ull) >> 28;
1779 agp_i915_write_gtt(dev, index, pte);
1783 agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte)
1785 struct agp_i810_softc *sc;
1787 sc = device_get_softc(dev);
1788 bus_write_4(sc->sc_res[1], index * 4, pte);
1792 agp_i965_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1797 pte = (u_int32_t)physical | I810_PTE_VALID;
1798 if (flags == AGP_USER_CACHED_MEMORY)
1799 pte |= I830_PTE_SYSTEM_CACHED;
1800 pte |= (physical & 0x0000000f00000000ull) >> 28;
1801 agp_i965_write_gtt(dev, index, pte);
1805 agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte)
1807 struct agp_i810_softc *sc;
1809 sc = device_get_softc(dev);
1810 bus_write_4(sc->sc_res[0], index * 4 + (512 * 1024), pte);
1814 agp_g4x_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1819 pte = (u_int32_t)physical | I810_PTE_VALID;
1820 if (flags == AGP_USER_CACHED_MEMORY)
1821 pte |= I830_PTE_SYSTEM_CACHED;
1822 pte |= (physical & 0x0000000f00000000ull) >> 28;
1823 agp_g4x_write_gtt(dev, index, pte);
1827 agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte)
1829 struct agp_i810_softc *sc;
1831 sc = device_get_softc(dev);
1832 bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1836 agp_sb_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1839 int type_mask, gfdt;
1842 pte = (u_int32_t)physical | I810_PTE_VALID;
1843 type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1844 gfdt = (flags & AGP_USER_CACHED_MEMORY_GFDT) != 0 ? GEN6_PTE_GFDT : 0;
1846 if (type_mask == AGP_USER_MEMORY)
1847 pte |= GEN6_PTE_UNCACHED;
1848 else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1849 pte |= GEN6_PTE_LLC_MLC | gfdt;
1851 pte |= GEN6_PTE_LLC | gfdt;
1853 pte |= (physical & 0x000000ff00000000ull) >> 28;
1854 agp_sb_write_gtt(dev, index, pte);
1858 agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte)
1860 struct agp_i810_softc *sc;
1862 sc = device_get_softc(dev);
1863 bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1867 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
1869 struct agp_i810_softc *sc = device_get_softc(dev);
1872 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
1873 device_printf(dev, "failed: offset is 0x%08jx, "
1874 "shift is %d, entries is %d\n", (intmax_t)offset,
1875 AGP_PAGE_SHIFT, sc->gatt->ag_entries);
1878 index = offset >> AGP_PAGE_SHIFT;
1879 if (sc->stolen != 0 && index < sc->stolen) {
1880 device_printf(dev, "trying to bind into stolen memory\n");
1883 sc->match->driver->install_gtt_pte(dev, index, physical, 0);
1888 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
1890 struct agp_i810_softc *sc;
1893 sc = device_get_softc(dev);
1894 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
1896 index = offset >> AGP_PAGE_SHIFT;
1897 if (sc->stolen != 0 && index < sc->stolen) {
1898 device_printf(dev, "trying to unbind from stolen memory\n");
1901 sc->match->driver->install_gtt_pte(dev, index, 0, 0);
1906 agp_i810_read_gtt_pte(device_t dev, u_int index)
1908 struct agp_i810_softc *sc;
1911 sc = device_get_softc(dev);
1912 pte = bus_read_4(sc->sc_res[0], AGP_I810_GTT + index * 4);
1917 agp_i915_read_gtt_pte(device_t dev, u_int index)
1919 struct agp_i810_softc *sc;
1922 sc = device_get_softc(dev);
1923 pte = bus_read_4(sc->sc_res[1], index * 4);
1928 agp_i965_read_gtt_pte(device_t dev, u_int index)
1930 struct agp_i810_softc *sc;
1933 sc = device_get_softc(dev);
1934 pte = bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));
1939 agp_g4x_read_gtt_pte(device_t dev, u_int index)
1941 struct agp_i810_softc *sc;
1944 sc = device_get_softc(dev);
1945 pte = bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));
1950 agp_i810_read_gtt_pte_paddr(device_t dev, u_int index)
1952 struct agp_i810_softc *sc;
1956 sc = device_get_softc(dev);
1957 pte = sc->match->driver->read_gtt_pte(dev, index);
1958 res = pte & ~PAGE_MASK;
1963 agp_i915_read_gtt_pte_paddr(device_t dev, u_int index)
1965 struct agp_i810_softc *sc;
1969 sc = device_get_softc(dev);
1970 pte = sc->match->driver->read_gtt_pte(dev, index);
1971 res = (pte & ~PAGE_MASK) | ((pte & 0xf0) << 28);
1976 agp_sb_read_gtt_pte_paddr(device_t dev, u_int index)
1978 struct agp_i810_softc *sc;
1982 sc = device_get_softc(dev);
1983 pte = sc->match->driver->read_gtt_pte(dev, index);
1984 res = (pte & ~PAGE_MASK) | ((pte & 0xff0) << 28);
1989 * Writing via memory mapped registers already flushes all TLBs.
1992 agp_i810_flush_tlb(device_t dev)
1997 agp_i810_enable(device_t dev, u_int32_t mode)
2003 static struct agp_memory *
2004 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
2006 struct agp_i810_softc *sc;
2007 struct agp_memory *mem;
2010 sc = device_get_softc(dev);
2012 if ((size & (AGP_PAGE_SIZE - 1)) != 0 ||
2013 sc->agp.as_allocated + size > sc->agp.as_maxmem)
2018 * Mapping local DRAM into GATT.
2020 if (sc->match->driver->chiptype != CHIP_I810)
2022 if (size != sc->dcache_size)
2024 } else if (type == 2) {
2026 * Type 2 is the contiguous physical memory type, that hands
2027 * back a physical address. This is used for cursors on i810.
2028 * Hand back as many single pages with physical as the user
2029 * wants, but only allow one larger allocation (ARGB cursor)
2032 if (size != AGP_PAGE_SIZE) {
2033 if (sc->argb_cursor != NULL)
2036 /* Allocate memory for ARGB cursor, if we can. */
2037 sc->argb_cursor = contigmalloc(size, M_AGP,
2038 0, 0, ~0, PAGE_SIZE, 0);
2039 if (sc->argb_cursor == NULL)
2044 mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
2045 mem->am_id = sc->agp.as_nextid++;
2046 mem->am_size = size;
2047 mem->am_type = type;
2048 if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
2049 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
2050 atop(round_page(size)));
2055 if (size == AGP_PAGE_SIZE) {
2057 * Allocate and wire down the page now so that we can
2058 * get its physical address.
2060 VM_OBJECT_LOCK(mem->am_obj);
2061 m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
2065 VM_OBJECT_UNLOCK(mem->am_obj);
2066 mem->am_physical = VM_PAGE_TO_PHYS(m);
2069 /* Our allocation is already nicely wired down for us.
2070 * Just grab the physical address.
2072 mem->am_physical = vtophys(sc->argb_cursor);
2075 mem->am_physical = 0;
2078 mem->am_is_bound = 0;
2079 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
2080 sc->agp.as_allocated += size;
2086 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
2088 struct agp_i810_softc *sc;
2090 if (mem->am_is_bound)
2093 sc = device_get_softc(dev);
2095 if (mem->am_type == 2) {
2096 if (mem->am_size == AGP_PAGE_SIZE) {
2098 * Unwire the page which we wired in alloc_memory.
2102 vm_object_hold(mem->am_obj);
2103 m = vm_page_lookup_busy_wait(mem->am_obj, 0,
2105 vm_object_drop(mem->am_obj);
2106 vm_page_unwire(m, 0);
2109 contigfree(sc->argb_cursor, mem->am_size, M_AGP);
2110 sc->argb_cursor = NULL;
2114 sc->agp.as_allocated -= mem->am_size;
2115 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
2117 vm_object_deallocate(mem->am_obj);
2123 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, vm_offset_t offset)
2125 struct agp_i810_softc *sc;
2128 /* Do some sanity checks first. */
2129 if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
2130 offset + mem->am_size > AGP_GET_APERTURE(dev)) {
2131 device_printf(dev, "binding memory at bad offset %#x\n",
2136 sc = device_get_softc(dev);
2137 if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2138 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2139 if (mem->am_is_bound) {
2140 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2143 /* The memory's already wired down, just stick it in the GTT. */
2144 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2145 sc->match->driver->install_gtt_pte(dev, (offset + i) >>
2146 AGP_PAGE_SHIFT, mem->am_physical + i, 0);
2149 mem->am_offset = offset;
2150 mem->am_is_bound = 1;
2151 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2155 if (mem->am_type != 1)
2156 return (agp_generic_bind_memory(dev, mem, offset));
2159 * Mapping local DRAM into GATT.
2161 if (sc->match->driver->chiptype != CHIP_I810)
2163 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
2164 bus_write_4(sc->sc_res[0],
2165 AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
2171 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
2173 struct agp_i810_softc *sc;
2176 sc = device_get_softc(dev);
2178 if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2179 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2180 if (!mem->am_is_bound) {
2181 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2185 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2186 sc->match->driver->install_gtt_pte(dev,
2187 (mem->am_offset + i) >> AGP_PAGE_SHIFT, 0, 0);
2190 mem->am_is_bound = 0;
2191 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2195 if (mem->am_type != 1)
2196 return (agp_generic_unbind_memory(dev, mem));
2198 if (sc->match->driver->chiptype != CHIP_I810)
2200 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2201 sc->match->driver->install_gtt_pte(dev, i >> AGP_PAGE_SHIFT,
2207 static device_method_t agp_i810_methods[] = {
2208 /* Device interface */
2209 DEVMETHOD(device_identify, agp_i810_identify),
2210 DEVMETHOD(device_probe, agp_i810_probe),
2211 DEVMETHOD(device_attach, agp_i810_attach),
2212 DEVMETHOD(device_detach, agp_i810_detach),
2213 DEVMETHOD(device_suspend, bus_generic_suspend),
2214 DEVMETHOD(device_resume, agp_i810_resume),
2217 DEVMETHOD(agp_get_aperture, agp_generic_get_aperture),
2218 DEVMETHOD(agp_set_aperture, agp_i810_method_set_aperture),
2219 DEVMETHOD(agp_bind_page, agp_i810_bind_page),
2220 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
2221 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
2222 DEVMETHOD(agp_enable, agp_i810_enable),
2223 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
2224 DEVMETHOD(agp_free_memory, agp_i810_free_memory),
2225 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
2226 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
2227 DEVMETHOD(agp_chipset_flush, agp_intel_gtt_chipset_flush),
2232 static driver_t agp_i810_driver = {
2235 sizeof(struct agp_i810_softc),
2238 static devclass_t agp_devclass;
2240 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
2241 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
2242 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
2244 extern vm_page_t bogus_page;
2247 agp_intel_gtt_clear_range(device_t dev, u_int first_entry, u_int num_entries)
2249 struct agp_i810_softc *sc;
2252 sc = device_get_softc(dev);
2253 for (i = 0; i < num_entries; i++)
2254 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2255 VM_PAGE_TO_PHYS(bogus_page), 0);
2256 sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2260 agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, u_int num_entries,
2261 vm_page_t *pages, u_int flags)
2263 struct agp_i810_softc *sc;
2266 sc = device_get_softc(dev);
2267 for (i = 0; i < num_entries; i++) {
2268 KKASSERT(pages[i]->valid == VM_PAGE_BITS_ALL);
2269 KKASSERT(pages[i]->wire_count > 0);
2270 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2271 VM_PAGE_TO_PHYS(pages[i]), flags);
2273 sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2277 agp_intel_gtt_get(device_t dev)
2279 struct agp_i810_softc *sc;
2280 struct intel_gtt res;
2282 sc = device_get_softc(dev);
2283 res.stolen_size = sc->stolen_size;
2284 res.gtt_total_entries = sc->gtt_total_entries;
2285 res.gtt_mappable_entries = sc->gtt_mappable_entries;
2286 res.do_idle_maps = 0;
2287 res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
2292 agp_i810_chipset_flush_setup(device_t dev)
2299 agp_i810_chipset_flush_teardown(device_t dev)
2302 /* Nothing to do. */
2306 agp_i810_chipset_flush(device_t dev)
2309 /* Nothing to do. */
2313 agp_i830_chipset_flush(device_t dev)
2315 struct agp_i810_softc *sc;
2319 sc = device_get_softc(dev);
2320 cpu_wbinvd_on_all_cpus();
2321 hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2322 bus_write_4(sc->sc_res[0], AGP_I830_HIC, hic | (1 << 31));
2323 for (i = 0; i < 20000 /* 1 sec */; i++) {
2324 hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2325 if ((hic & (1 << 31)) != 0)
2332 agp_i915_chipset_flush_alloc_page(device_t dev, uint64_t start, uint64_t end)
2334 struct agp_i810_softc *sc;
2337 sc = device_get_softc(dev);
2338 vga = device_get_parent(dev);
2339 sc->sc_flush_page_rid = 100;
2340 sc->sc_flush_page_res = BUS_ALLOC_RESOURCE(device_get_parent(vga), dev,
2341 SYS_RES_MEMORY, &sc->sc_flush_page_rid, start, end, PAGE_SIZE,
2343 if (sc->sc_flush_page_res == NULL) {
2344 device_printf(dev, "Failed to allocate flush page at 0x%jx\n",
2348 sc->sc_flush_page_vaddr = rman_get_virtual(sc->sc_flush_page_res);
2350 device_printf(dev, "Allocated flush page phys 0x%jx virt %p\n",
2351 (uintmax_t)rman_get_start(sc->sc_flush_page_res),
2352 sc->sc_flush_page_vaddr);
2358 agp_i915_chipset_flush_free_page(device_t dev)
2360 struct agp_i810_softc *sc;
2363 sc = device_get_softc(dev);
2364 vga = device_get_parent(dev);
2365 if (sc->sc_flush_page_res == NULL)
2367 BUS_DEACTIVATE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2368 sc->sc_flush_page_rid, sc->sc_flush_page_res);
2369 BUS_RELEASE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2370 sc->sc_flush_page_rid, sc->sc_flush_page_res);
2374 agp_i915_chipset_flush_setup(device_t dev)
2376 struct agp_i810_softc *sc;
2380 sc = device_get_softc(dev);
2381 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2382 if ((temp & 1) != 0) {
2386 "Found already configured flush page at 0x%jx\n",
2388 sc->sc_bios_allocated_flush_page = 1;
2390 * In the case BIOS initialized the flush pointer (?)
2391 * register, expect that BIOS also set up the resource
2394 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2395 temp + PAGE_SIZE - 1);
2399 sc->sc_bios_allocated_flush_page = 0;
2400 error = agp_i915_chipset_flush_alloc_page(dev, 0, 0xffffffff);
2403 temp = rman_get_start(sc->sc_flush_page_res);
2404 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp | 1, 4);
2410 agp_i915_chipset_flush_teardown(device_t dev)
2412 struct agp_i810_softc *sc;
2415 sc = device_get_softc(dev);
2416 if (sc->sc_flush_page_res == NULL)
2418 if (!sc->sc_bios_allocated_flush_page) {
2419 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2421 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp, 4);
2423 agp_i915_chipset_flush_free_page(dev);
2427 agp_i965_chipset_flush_setup(device_t dev)
2429 struct agp_i810_softc *sc;
2431 uint32_t temp_hi, temp_lo;
2434 sc = device_get_softc(dev);
2436 temp_hi = pci_read_config(sc->bdev, AGP_I965_IFPADDR + 4, 4);
2437 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2439 if ((temp_lo & 1) != 0) {
2440 temp = ((uint64_t)temp_hi << 32) | (temp_lo & ~1);
2443 "Found already configured flush page at 0x%jx\n",
2445 sc->sc_bios_allocated_flush_page = 1;
2447 * In the case BIOS initialized the flush pointer (?)
2448 * register, expect that BIOS also set up the resource
2451 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2452 temp + PAGE_SIZE - 1);
2456 sc->sc_bios_allocated_flush_page = 0;
2457 error = agp_i915_chipset_flush_alloc_page(dev, 0, ~0);
2460 temp = rman_get_start(sc->sc_flush_page_res);
2461 pci_write_config(sc->bdev, AGP_I965_IFPADDR + 4,
2462 (temp >> 32) & UINT32_MAX, 4);
2463 pci_write_config(sc->bdev, AGP_I965_IFPADDR,
2464 (temp & UINT32_MAX) | 1, 4);
2470 agp_i965_chipset_flush_teardown(device_t dev)
2472 struct agp_i810_softc *sc;
2475 sc = device_get_softc(dev);
2476 if (sc->sc_flush_page_res == NULL)
2478 if (!sc->sc_bios_allocated_flush_page) {
2479 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2481 pci_write_config(sc->bdev, AGP_I965_IFPADDR, temp_lo, 4);
2483 agp_i915_chipset_flush_free_page(dev);
2487 agp_i915_chipset_flush(device_t dev)
2489 struct agp_i810_softc *sc;
2491 sc = device_get_softc(dev);
2492 *(uint32_t *)sc->sc_flush_page_vaddr = 1;
2496 agp_intel_gtt_chipset_flush(device_t dev)
2498 struct agp_i810_softc *sc;
2500 sc = device_get_softc(dev);
2501 sc->match->driver->chipset_flush(dev);
2506 agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list)
2511 agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
2512 struct sglist **sg_list)
2515 struct agp_i810_softc *sc;
2524 if (*sg_list != NULL)
2527 sc = device_get_softc(dev);
2529 sg = sglist_alloc(num_entries, M_WAITOK /* XXXKIB */);
2530 for (i = 0; i < num_entries; i++) {
2531 sg->sg_segs[i].ss_paddr = VM_PAGE_TO_PHYS(pages[i]);
2532 sg->sg_segs[i].ss_len = PAGE_SIZE;
2536 error = bus_dma_tag_create(bus_get_dma_tag(dev),
2537 1 /* alignment */, 0 /* boundary */,
2538 1ULL << sc->match->busdma_addr_mask_sz /* lowaddr */,
2539 BUS_SPACE_MAXADDR /* highaddr */,
2540 NULL /* filtfunc */, NULL /* filtfuncarg */,
2541 BUS_SPACE_MAXADDR /* maxsize */,
2542 BUS_SPACE_UNRESTRICTED /* nsegments */,
2543 BUS_SPACE_MAXADDR /* maxsegsz */,
2544 0 /* flags */, NULL /* lockfunc */, NULL /* lockfuncarg */,
2557 agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
2558 u_int first_entry, u_int flags)
2560 struct agp_i810_softc *sc;
2565 sc = device_get_softc(dev);
2566 for (i = j = 0; j < sg_list->sg_nseg; j++) {
2567 spaddr = sg_list->sg_segs[i].ss_paddr;
2568 slen = sg_list->sg_segs[i].ss_len;
2569 for (; slen > 0; i++) {
2570 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2572 spaddr += AGP_PAGE_SIZE;
2573 slen -= AGP_PAGE_SIZE;
2576 sc->match->driver->read_gtt_pte(dev, first_entry + i - 1);
2580 intel_gtt_clear_range(u_int first_entry, u_int num_entries)
2583 agp_intel_gtt_clear_range(intel_agp, first_entry, num_entries);
2587 intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2591 agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2595 struct intel_gtt *intel_gtt_get(void)
2597 intel_private.base = agp_intel_gtt_get(intel_agp);
2598 return &intel_private.base;
2602 intel_gtt_chipset_flush(void)
2605 return (agp_intel_gtt_chipset_flush(intel_agp));
2609 intel_gtt_unmap_memory(struct sglist *sg_list)
2612 agp_intel_gtt_unmap_memory(intel_agp, sg_list);
2616 intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
2617 struct sglist **sg_list)
2620 return (agp_intel_gtt_map_memory(intel_agp, pages, num_entries,
2625 intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int first_entry,
2629 agp_intel_gtt_insert_sg_entries(intel_agp, sg_list, first_entry, flags);
2633 intel_gtt_read_pte_paddr(u_int entry)
2635 struct agp_i810_softc *sc;
2637 sc = device_get_softc(intel_agp);
2638 return (sc->match->driver->read_gtt_pte_paddr(intel_agp, entry));
2642 intel_gtt_read_pte(u_int entry)
2644 struct agp_i810_softc *sc;
2646 sc = device_get_softc(intel_agp);
2647 return (sc->match->driver->read_gtt_pte(intel_agp, entry));
2651 intel_gtt_write(u_int entry, uint32_t val)
2653 struct agp_i810_softc *sc;
2655 sc = device_get_softc(intel_agp);
2656 sc->match->driver->write_gtt(intel_agp, entry, val);