2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Copyright (c) 1990 The Regents of the University of California.
35 * All rights reserved.
37 * This code is derived from software contributed to Berkeley by
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
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49 * must display the following acknowledgement:
50 * This product includes software developed by the University of
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52 * 4. Neither the name of the University nor the names of its contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
69 * $DragonFly: src/sys/platform/pc32/i386/swtch.s,v 1.47 2007/06/29 21:54:10 dillon Exp $
74 #include <sys/rtprio.h>
76 #include <machine/asmacros.h>
77 #include <machine/segments.h>
79 #include <machine/pmap.h>
80 #include <machine_base/apic/apicreg.h>
81 #include <machine/lock.h>
86 #define MPLOCKED lock ;
95 #if defined(SWTCH_OPTIM_STATS)
96 .globl swtch_optim_stats, tlb_flush_count
97 swtch_optim_stats: .long 0 /* number of _swtch_optims */
98 tlb_flush_count: .long 0
105 * cpu_heavy_switch(next_thread)
107 * Switch from the current thread to a new thread. This entry
108 * is normally called via the thread->td_switch function, and will
109 * only be called when the current thread is a heavy weight process.
111 * Some instructions have been reordered to reduce pipeline stalls.
113 * YYY disable interrupts once giant is removed.
115 ENTRY(cpu_heavy_switch)
119 movl PCPU(curthread),%ecx
120 movl (%esp),%eax /* (reorder optimization) */
121 movl TD_PCB(%ecx),%edx /* EDX = PCB */
122 movl %eax,PCB_EIP(%edx) /* return PC may be modified */
123 movl %ebx,PCB_EBX(%edx)
124 movl %esp,PCB_ESP(%edx)
125 movl %ebp,PCB_EBP(%edx)
126 movl %esi,PCB_ESI(%edx)
127 movl %edi,PCB_EDI(%edx)
128 movl 4(%esp),%edi /* EDI = newthread */
131 * Clear the cpu bit in the pmap active mask. The restore
132 * function will set the bit in the pmap active mask.
134 * Special case: when switching between threads sharing the
135 * same vmspace if we avoid clearing the bit we do not have
136 * to reload %cr3 (if we clear the bit we could race page
137 * table ops done by other threads and would have to reload
138 * %cr3, because those ops will not know to IPI us).
140 movl %ecx,%ebx /* EBX = oldthread */
141 movl TD_LWP(%ecx),%ecx /* ECX = oldlwp */
142 movl TD_LWP(%edi),%esi /* ESI = newlwp */
143 movl LWP_VMSPACE(%ecx),%ecx /* ECX = oldvmspace */
144 testl %esi,%esi /* might not be a heavy */
146 cmpl LWP_VMSPACE(%esi),%ecx /* same vmspace? */
149 movl PCPU(cpuid), %eax
150 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
153 * Push the LWKT switch restore function, which resumes a heavy
154 * weight process. Note that the LWKT switcher is based on
155 * TD_SP, while the heavy weight process switcher is based on
156 * PCB_ESP. TD_SP is usually two ints pushed relative to
157 * PCB_ESP. We push the flags for later restore by cpu_heavy_restore.
160 pushl $cpu_heavy_restore
161 movl %esp,TD_SP(%ebx)
164 * Save debug regs if necessary
166 movb PCB_FLAGS(%edx),%al
168 jz 1f /* no, skip over */
169 movl %dr7,%eax /* yes, do the save */
170 movl %eax,PCB_DR7(%edx)
171 andl $0x0000fc00, %eax /* disable all watchpoints */
174 movl %eax,PCB_DR6(%edx)
176 movl %eax,PCB_DR3(%edx)
178 movl %eax,PCB_DR2(%edx)
180 movl %eax,PCB_DR1(%edx)
182 movl %eax,PCB_DR0(%edx)
187 * Save the FP state if we have used the FP. Note that calling
188 * npxsave will NULL out PCPU(npxthread).
190 cmpl %ebx,PCPU(npxthread)
192 pushl TD_SAVEFPU(%ebx)
193 call npxsave /* do it in a big C function */
194 addl $4,%esp /* EAX, ECX, EDX trashed */
196 #endif /* NNPX > 0 */
199 * Switch to the next thread, which was passed as an argument
200 * to cpu_heavy_switch(). Due to the eflags and switch-restore
201 * function we pushed, the argument is at 12(%esp). Set the current
202 * thread, load the stack pointer, and 'ret' into the switch-restore
205 * The switch restore function expects the new thread to be in %eax
206 * and the old one to be in %ebx.
208 * There is a one-instruction window where curthread is the new
209 * thread but %esp still points to the old thread's stack, but
210 * we are protected by a critical section so it is ok.
212 movl %edi,%eax /* EAX = newtd, EBX = oldtd */
213 movl %eax,PCPU(curthread)
214 movl TD_SP(%eax),%esp
220 * The switch function is changed to this when a thread is going away
221 * for good. We have to ensure that the MMU state is not cached, and
222 * we don't bother saving the existing thread state before switching.
224 * At this point we are in a critical section and this cpu owns the
225 * thread's token, which serves as an interlock until the switchout is
228 ENTRY(cpu_exit_switch)
230 * Get us out of the vmspace
238 movl PCPU(curthread),%ebx
241 * If this is a process/lwp, deactivate the pmap after we've
244 movl TD_LWP(%ebx),%ecx
247 movl PCPU(cpuid), %eax
248 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
249 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
252 * Switch to the next thread. RET into the restore function, which
253 * expects the new thread in EAX and the old in EBX.
255 * There is a one-instruction window where curthread is the new
256 * thread but %esp still points to the old thread's stack, but
257 * we are protected by a critical section so it is ok.
260 movl %eax,PCPU(curthread)
261 movl TD_SP(%eax),%esp
265 * cpu_heavy_restore() (current thread in %eax on entry)
267 * Restore the thread after an LWKT switch. This entry is normally
268 * called via the LWKT switch restore function, which was pulled
269 * off the thread stack and jumped to.
271 * This entry is only called if the thread was previously saved
272 * using cpu_heavy_switch() (the heavy weight process thread switcher),
273 * or when a new process is initially scheduled. The first thing we
274 * do is clear the TDF_RUNNING bit in the old thread and set it in the
277 * NOTE: The lwp may be in any state, not necessarily LSRUN, because
278 * a preemption switch may interrupt the process and then return via
281 * YYY theoretically we do not have to restore everything here, a lot
282 * of this junk can wait until we return to usermode. But for now
283 * we restore everything.
285 * YYY the PCB crap is really crap, it makes startup a bitch because
286 * we can't switch away.
288 * YYY note: spl check is done in mi_switch when it splx()'s.
291 ENTRY(cpu_heavy_restore)
293 movl TD_LWP(%eax),%ecx
295 #if defined(SWTCH_OPTIM_STATS)
296 incl _swtch_optim_stats
299 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
300 * safely test/reload %cr3 until after we have set the bit in the
301 * pmap (remember, we do not hold the MP lock in the switch code).
303 * Also note that when switching between two lwps sharing the
304 * same vmspace we have already avoided clearing the cpu bit
305 * in pm_active. If we had cleared it other cpus would not know
306 * to IPI us and we would have to unconditionally reload %cr3.
308 * Also note that if the pmap is undergoing an atomic inval/mod
309 * that is unaware that our cpu has been added to it we have to
310 * wait for it to complete before we can continue.
312 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
313 movl PCPU(cpumask), %esi
314 MPLOCKED orl %esi, VM_PMAP+PM_ACTIVE(%ecx)
316 testl $CPUMASK_LOCK,VM_PMAP+PM_ACTIVE(%ecx)
320 call pmap_interlock_wait
327 * Restore the MMU address space. If it is the same as the last
328 * thread we don't have to invalidate the tlb (i.e. reload cr3).
329 * YYY which naturally also means that the PM_ACTIVE bit had better
330 * already have been set before we set it above, check? YYY
332 movl TD_PCB(%eax),%edx /* EDX = PCB */
334 movl PCB_CR3(%edx),%ecx
337 #if defined(SWTCH_OPTIM_STATS)
338 decl _swtch_optim_stats
339 incl _tlb_flush_count
344 * Clear TDF_RUNNING flag in old thread only after cleaning up
345 * %cr3. The target thread is already protected by being TDF_RUNQ
346 * so setting TDF_RUNNING isn't as big a deal.
348 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
349 orl $TDF_RUNNING,TD_FLAGS(%eax)
352 * Deal with the PCB extension, restore the private tss
354 movl PCB_EXT(%edx),%edi /* check for a PCB extension */
355 movl $1,%ebx /* maybe mark use of a private tss */
360 * Going back to the common_tss. We may need to update TSS_ESP0
361 * which sets the top of the supervisor stack when entering from
362 * usermode. The PCB is at the top of the stack but we need another
363 * 16 bytes to take vm86 into account.
366 movl %ebx, PCPU(common_tss) + TSS_ESP0
368 cmpl $0,PCPU(private_tss) /* don't have to reload if */
369 je 3f /* already using the common TSS */
371 subl %ebx,%ebx /* unmark use of private tss */
374 * Get the address of the common TSS descriptor for the ltr.
375 * There is no way to get the address of a segment-accessed variable
376 * so we store a self-referential pointer at the base of the per-cpu
377 * data area and add the appropriate offset.
379 movl $gd_common_tssd, %edi
383 * Move the correct TSS descriptor into the GDT slot, then reload
387 movl %ebx,PCPU(private_tss) /* mark/unmark private tss */
388 movl PCPU(tss_gdt), %ebx /* entry in GDT */
393 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
398 * Restore general registers.
400 movl PCB_EBX(%edx),%ebx
401 movl PCB_ESP(%edx),%esp
402 movl PCB_EBP(%edx),%ebp
403 movl PCB_ESI(%edx),%esi
404 movl PCB_EDI(%edx),%edi
405 movl PCB_EIP(%edx),%eax
409 * Restore the user LDT if we have one
411 cmpl $0, PCB_USERLDT(%edx)
413 movl _default_ldt,%eax
414 cmpl PCPU(currentldt),%eax
417 movl %eax,PCPU(currentldt)
424 * Restore the user TLS if we have one
431 * Restore the DEBUG register state if necessary.
433 movb PCB_FLAGS(%edx),%al
435 jz 1f /* no, skip over */
436 movl PCB_DR6(%edx),%eax /* yes, do the restore */
438 movl PCB_DR3(%edx),%eax
440 movl PCB_DR2(%edx),%eax
442 movl PCB_DR1(%edx),%eax
444 movl PCB_DR0(%edx),%eax
446 movl %dr7,%eax /* load dr7 so as not to disturb */
447 andl $0x0000fc00,%eax /* reserved bits */
449 movl PCB_DR7(%edx),%ebx
450 andl $~0x0000fc00,%ebx
461 * Update pcb, saving current processor state.
467 /* caller's return address - child won't execute this routine */
469 movl %eax,PCB_EIP(%ecx)
472 movl %eax,PCB_CR3(%ecx)
474 movl %ebx,PCB_EBX(%ecx)
475 movl %esp,PCB_ESP(%ecx)
476 movl %ebp,PCB_EBP(%ecx)
477 movl %esi,PCB_ESI(%ecx)
478 movl %edi,PCB_EDI(%ecx)
482 * If npxthread == NULL, then the npx h/w state is irrelevant and the
483 * state had better already be in the pcb. This is true for forks
484 * but not for dumps (the old book-keeping with FP flags in the pcb
485 * always lost for dumps because the dump pcb has 0 flags).
487 * If npxthread != NULL, then we have to save the npx h/w state to
488 * npxthread's pcb and copy it to the requested pcb, or save to the
489 * requested pcb and reload. Copying is easier because we would
490 * have to handle h/w bugs for reloading. We used to lose the
491 * parent's npx state for forks by forgetting to reload.
493 movl PCPU(npxthread),%eax
497 pushl %ecx /* target pcb */
498 movl TD_SAVEFPU(%eax),%eax /* originating savefpu area */
508 pushl $PCB_SAVEFPU_SIZE
509 leal PCB_SAVEFPU(%ecx),%ecx
514 #endif /* NNPX > 0 */
520 * cpu_idle_restore() (current thread in %eax on entry) (one-time execution)
522 * Don't bother setting up any regs other then %ebp so backtraces
523 * don't die. This restore function is used to bootstrap into the
524 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
527 * Clear TDF_RUNNING in old thread only after we've cleaned up %cr3.
529 * If we are an AP we have to call ap_init() before jumping to
530 * cpu_idle(). ap_init() will synchronize with the BP and finish
531 * setting up various ncpu-dependant globaldata fields. This may
532 * happen on UP as well as SMP if we happen to be simulating multiple
535 ENTRY(cpu_idle_restore)
541 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
542 orl $TDF_RUNNING,TD_FLAGS(%eax)
550 * ap_init can decide to enable interrupts early, but otherwise, or if
551 * we are UP, do it here.
557 * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
559 * Don't bother setting up any regs other then %ebp so backtraces
560 * don't die. This restore function is used to bootstrap into an
561 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
564 * Since all of our context is on the stack we are reentrant and
565 * we can release our critical section and enable interrupts early.
567 ENTRY(cpu_kthread_restore)
570 movl TD_PCB(%eax),%edx
573 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
574 orl $TDF_RUNNING,TD_FLAGS(%eax)
575 decl TD_CRITCOUNT(%eax)
576 popl %eax /* kthread exit function */
577 pushl PCB_EBX(%edx) /* argument to ESI function */
578 pushl %eax /* set exit func as return address */
579 movl PCB_ESI(%edx),%eax
585 * Standard LWKT switching function. Only non-scratch registers are
586 * saved and we don't bother with the MMU state or anything else.
588 * This function is always called while in a critical section.
590 * There is a one-instruction window where curthread is the new
591 * thread but %esp still points to the old thread's stack, but
592 * we are protected by a critical section so it is ok.
596 ENTRY(cpu_lwkt_switch)
597 pushl %ebp /* note: GDB hacked to locate ebp relative to td_sp */
599 movl PCPU(curthread),%ebx
603 /* warning: adjust movl into %eax below if you change the pushes */
607 * Save the FP state if we have used the FP. Note that calling
608 * npxsave will NULL out PCPU(npxthread).
610 * We have to deal with the FP state for LWKT threads in case they
611 * happen to get preempted or block while doing an optimized
612 * bzero/bcopy/memcpy.
614 cmpl %ebx,PCPU(npxthread)
616 pushl TD_SAVEFPU(%ebx)
617 call npxsave /* do it in a big C function */
618 addl $4,%esp /* EAX, ECX, EDX trashed */
620 #endif /* NNPX > 0 */
622 movl 4+20(%esp),%eax /* switch to this thread */
623 pushl $cpu_lwkt_restore
624 movl %esp,TD_SP(%ebx)
625 movl %eax,PCPU(curthread)
626 movl TD_SP(%eax),%esp
629 * eax contains new thread, ebx contains old thread.
634 * cpu_lwkt_restore() (current thread in %eax on entry)
636 * Standard LWKT restore function. This function is always called
637 * while in a critical section.
639 * Warning: due to preemption the restore function can be used to
640 * 'return' to the original thread. Interrupt disablement must be
641 * protected through the switch so we cannot run splz here.
643 * YYY we theoretically do not need to load IdlePTD into cr3, but if
644 * so we need a way to detect when the PTD we are using is being
645 * deleted due to a process exiting.
647 ENTRY(cpu_lwkt_restore)
648 movl IdlePTD,%ecx /* YYY borrow but beware desched/cpuchg/exit */
654 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
655 orl $TDF_RUNNING,TD_FLAGS(%eax)