Merge branch 'apic_io'
[dragonfly.git] / sys / platform / pc32 / icu / icu_vector.s
1 /*
2  *      from: vector.s, 386BSD 0.1 unknown origin
3  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
4  */
5 /*
6  * WARNING!  SMP builds can use the ICU now so this code must be MP safe.
7  */
8
9 #include "opt_auto_eoi.h"
10
11 #include <machine/asmacros.h>
12 #include <machine/lock.h>
13 #include <machine/psl.h>
14 #include <machine/trap.h>
15
16 #include <machine_base/icu/icu.h>
17 #include <bus/isa/isa.h>
18
19 #include "assym.s"
20 #include "icu_ipl.h"
21
22 #define ICU_IMR_OFFSET          1       /* IO_ICU{1,2} + 1 */
23
24 #define ICU_EOI                 0x20    /* XXX - define elsewhere */
25
26 #define IRQ_LBIT(irq_num)       (1 << (irq_num))
27 #define IRQ_BIT(irq_num)        (1 << ((irq_num) % 8))
28 #define IRQ_BYTE(irq_num)       ((irq_num) >> 3)
29
30 #ifdef AUTO_EOI_1
31 #define ENABLE_ICU1             /* use auto-EOI to reduce i/o */
32 #define OUTB_ICU1
33 #else
34 #define ENABLE_ICU1                                                     \
35         movb    $ICU_EOI,%al ;  /* as soon as possible send EOI ... */  \
36         OUTB_ICU1 ;             /* ... to clear in service bit */       \
37
38 #define OUTB_ICU1                                                       \
39         outb    %al,$IO_ICU1 ;                                          \
40
41 #endif
42
43 #ifdef AUTO_EOI_2
44 /*
45  * The data sheet says no auto-EOI on slave, but it sometimes works.
46  */
47 #define ENABLE_ICU1_AND_2       ENABLE_ICU1
48 #else
49 #define ENABLE_ICU1_AND_2                                               \
50         movb    $ICU_EOI,%al ;  /* as above */                          \
51         outb    %al,$IO_ICU2 ;  /* but do second icu first ... */       \
52         OUTB_ICU1 ;     /* ... then first icu (if !AUTO_EOI_1) */       \
53
54 #endif
55
56 /*
57  * Macro helpers
58  */
59 #define PUSH_FRAME                                                      \
60         pushl   $0 ;            /* dummy error code */                  \
61         pushl   $0 ;            /* dummy trap type */                   \
62         pushl   $0 ;            /* dummy xflags */                      \
63         pushal ;                /* 8 registers */                       \
64         pushl   %ds ;                                                   \
65         pushl   %es ;                                                   \
66         pushl   %fs ;                                                   \
67         pushl   %gs ;                                                   \
68         cld ;                                                           \
69         mov     $KDSEL,%ax ;                                            \
70         mov     %ax,%ds ;                                               \
71         mov     %ax,%es ;                                               \
72         mov     %ax,%gs ;                                               \
73         mov     $KPSEL,%ax ;                                            \
74         mov     %ax,%fs ;                                               \
75
76 #define PUSH_DUMMY                                                      \
77         pushfl ;                /* phys int frame / flags */            \
78         pushl %cs ;             /* phys int frame / cs */               \
79         pushl   12(%esp) ;      /* original caller eip */               \
80         pushl   $0 ;            /* dummy error code */                  \
81         pushl   $0 ;            /* dummy trap type */                   \
82         pushl   $0 ;            /* dummy xflags */                      \
83         subl    $13*4,%esp ;    /* pushal + 4 seg regs (dummy) + CPL */ \
84
85 /*
86  * Warning: POP_FRAME can only be used if there is no chance of a
87  * segment register being changed (e.g. by procfs), which is why syscalls
88  * have to use doreti.
89  */
90 #define POP_FRAME                                                       \
91         popl    %gs ;                                                   \
92         popl    %fs ;                                                   \
93         popl    %es ;                                                   \
94         popl    %ds ;                                                   \
95         popal ;                                                         \
96         addl    $2*4,%esp ;     /* dummy trap & error codes */          \
97
98 #define POP_DUMMY                                                       \
99         addl    $19*4,%esp ;                                            \
100
101 #define MASK_IRQ(icu, irq_num)                                          \
102         ICU_IMASK_LOCK ;                                                \
103         movb    icu_imen + IRQ_BYTE(irq_num),%al ;                      \
104         orb     $IRQ_BIT(irq_num),%al ;                                 \
105         movb    %al,icu_imen + IRQ_BYTE(irq_num) ;                      \
106         outb    %al,$icu+ICU_IMR_OFFSET ;                               \
107         ICU_IMASK_UNLOCK ;                                              \
108
109 #define UNMASK_IRQ(icu, irq_num)                                        \
110         cmpl    $0,%eax ;                                               \
111         jnz     8f ;                                                    \
112         ICU_IMASK_LOCK ;                                                \
113         movb    icu_imen + IRQ_BYTE(irq_num),%al ;                      \
114         andb    $~IRQ_BIT(irq_num),%al ;                                \
115         movb    %al,icu_imen + IRQ_BYTE(irq_num) ;                      \
116         outb    %al,$icu+ICU_IMR_OFFSET ;                               \
117         ICU_IMASK_UNLOCK ;                                              \
118 8: ;                                                                    \
119         
120 /*
121  * Fast interrupt call handlers run in the following sequence:
122  *
123  *      - Push the trap frame required by doreti.
124  *      - Mask the interrupt and reenable its source.
125  *      - If we cannot take the interrupt set its fpending bit and
126  *        doreti.
127  *      - If we can take the interrupt clear its fpending bit,
128  *        call the handler, then unmask the interrupt and doreti.
129  *
130  *      YYY can cache gd base pointer instead of using hidden %fs
131  *      prefixes.
132  */
133
134 #define FAST_INTR(irq_num, vec_name, icu, enable_icus)                   \
135         .text ;                                                         \
136         SUPERALIGN_TEXT ;                                               \
137 IDTVEC(vec_name) ;                                                      \
138         PUSH_FRAME ;                                                    \
139         FAKE_MCOUNT(15*4(%esp)) ;                                       \
140         MASK_IRQ(icu, irq_num) ;                                        \
141         enable_icus ;                                                   \
142         movl    PCPU(curthread),%ebx ;                                  \
143         pushl   $0 ;                    /* DUMMY CPL FOR DORETI */      \
144         testl   $-1,TD_NEST_COUNT(%ebx) ;                               \
145         jne     1f ;                                                    \
146         testl   $-1,TD_CRITCOUNT(%ebx) ;                                \
147         je      2f ;                                                    \
148 1: ;                                                                    \
149         /* set pending bit and return, leave interrupt masked */        \
150         orl     $IRQ_LBIT(irq_num),PCPU(fpending) ;                     \
151         orl     $RQF_INTPEND, PCPU(reqflags) ;                          \
152         jmp     5f ;                                                    \
153 2: ;                                                                    \
154         /* clear pending bit, run handler */                            \
155         andl    $~IRQ_LBIT(irq_num),PCPU(fpending) ;                    \
156         pushl   $irq_num ;                                              \
157         pushl   %esp ;                  /* pass frame by reference */   \
158         incl    TD_CRITCOUNT(%ebx) ;                                    \
159         sti ;                                                           \
160         call    ithread_fast_handler ;  /* returns 0 to unmask int */   \
161         decl    TD_CRITCOUNT(%ebx) ;                                    \
162         addl    $8,%esp ;                                               \
163         UNMASK_IRQ(icu, irq_num) ;                                      \
164 5: ;                                                                    \
165         MEXITCOUNT ;                                                    \
166         jmp     doreti ;                                                \
167
168 /*
169  * Unmask a slow interrupt.  This function is used by interrupt threads
170  * after they have descheduled themselves to reenable interrupts and
171  * possibly cause a reschedule to occur.
172  */
173
174 #define INTR_UNMASK(irq_num, vec_name, icu)                             \
175         .text ;                                                         \
176         SUPERALIGN_TEXT ;                                               \
177 IDTVEC(vec_name) ;                                                      \
178         pushl %ebp ;     /* frame for ddb backtrace */                  \
179         movl    %esp, %ebp ;                                            \
180         subl    %eax, %eax ;                                            \
181         UNMASK_IRQ(icu, irq_num) ;                                      \
182         popl %ebp ;                                                     \
183         ret ;                                                           \
184
185 MCOUNT_LABEL(bintr)
186         FAST_INTR(0,icu_fastintr0, IO_ICU1, ENABLE_ICU1)
187         FAST_INTR(1,icu_fastintr1, IO_ICU1, ENABLE_ICU1)
188         FAST_INTR(2,icu_fastintr2, IO_ICU1, ENABLE_ICU1)
189         FAST_INTR(3,icu_fastintr3, IO_ICU1, ENABLE_ICU1)
190         FAST_INTR(4,icu_fastintr4, IO_ICU1, ENABLE_ICU1)
191         FAST_INTR(5,icu_fastintr5, IO_ICU1, ENABLE_ICU1)
192         FAST_INTR(6,icu_fastintr6, IO_ICU1, ENABLE_ICU1)
193         FAST_INTR(7,icu_fastintr7, IO_ICU1, ENABLE_ICU1)
194         FAST_INTR(8,icu_fastintr8, IO_ICU2, ENABLE_ICU1_AND_2)
195         FAST_INTR(9,icu_fastintr9, IO_ICU2, ENABLE_ICU1_AND_2)
196         FAST_INTR(10,icu_fastintr10, IO_ICU2, ENABLE_ICU1_AND_2)
197         FAST_INTR(11,icu_fastintr11, IO_ICU2, ENABLE_ICU1_AND_2)
198         FAST_INTR(12,icu_fastintr12, IO_ICU2, ENABLE_ICU1_AND_2)
199         FAST_INTR(13,icu_fastintr13, IO_ICU2, ENABLE_ICU1_AND_2)
200         FAST_INTR(14,icu_fastintr14, IO_ICU2, ENABLE_ICU1_AND_2)
201         FAST_INTR(15,icu_fastintr15, IO_ICU2, ENABLE_ICU1_AND_2)
202 MCOUNT_LABEL(eintr)
203
204         .data
205
206         .text