sys/dev/sound/pci/hda/hda_reg.h

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/dev/sound/pci/hda/hda_reg.h,v 1.2.2.1 2007/05/13 21:09:24 ariff Exp $
  27  * $DragonFly: src/sys/dev/sound/pci/hda/hda_reg.h,v 1.2 2007/06/16 19:48:05 hasso Exp $
  28  */
  29
  30 #ifndef _HDA_REG_H_
  31 #define _HDA_REG_H_
  32
  33 /****************************************************************************
  34  * HDA Device Verbs
  35  ****************************************************************************/
  36
  37 /* HDA Command */
  38 #define HDA_CMD_VERB_MASK                               0x000fffff
  39 #define HDA_CMD_VERB_SHIFT                              0
  40 #define HDA_CMD_NID_MASK                                0x0ff00000
  41 #define HDA_CMD_NID_SHIFT                               20
  42 #define HDA_CMD_CAD_MASK                                0xf0000000
  43 #define HDA_CMD_CAD_SHIFT                               28
  44
  45 #define HDA_CMD_VERB_4BIT_SHIFT                         16
  46 #define HDA_CMD_VERB_12BIT_SHIFT                        8
  47
  48 #define HDA_CMD_VERB_4BIT(verb, payload)                                \
  49     (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload))
  50 #define HDA_CMD_4BIT(cad, nid, verb, payload)                           \
  51     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  52     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  53     (HDA_CMD_VERB_4BIT((verb), (payload))))
  54
  55 #define HDA_CMD_VERB_12BIT(verb, payload)                               \
  56     (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload))
  57 #define HDA_CMD_12BIT(cad, nid, verb, payload)                          \
  58     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  59     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  60     (HDA_CMD_VERB_12BIT((verb), (payload))))
  61
  62 /* Get Parameter */
  63 #define HDA_CMD_VERB_GET_PARAMETER                      0xf00
  64
  65 #define HDA_CMD_GET_PARAMETER(cad, nid, payload)                        \
  66     (HDA_CMD_12BIT((cad), (nid),                                        \
  67     HDA_CMD_VERB_GET_PARAMETER, (payload)))
  68
  69 /* Connection Select Control */
  70 #define HDA_CMD_VERB_GET_CONN_SELECT_CONTROL            0xf01
  71 #define HDA_CMD_VERB_SET_CONN_SELECT_CONTROL            0x701
  72
  73 #define HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid)                       \
  74     (HDA_CMD_12BIT((cad), (nid),                                        \
  75     HDA_CMD_VERB_GET_CONN_SELECT_CONTROL, 0x0))
  76 #define HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload)        \
  77     (HDA_CMD_12BIT((cad), (nid),                                        \
  78     HDA_CMD_VERB_SET_CONN_SELECT_CONTROL, (payload)))
  79
  80 /* Connection List Entry */
  81 #define HDA_CMD_VERB_GET_CONN_LIST_ENTRY                0xf02
  82
  83 #define HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload)                  \
  84     (HDA_CMD_12BIT((cad), (nid),                                        \
  85     HDA_CMD_VERB_GET_CONN_LIST_ENTRY, (payload)))
  86
  87 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT          1
  88 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG           2
  89
  90 /* Processing State */
  91 #define HDA_CMD_VERB_GET_PROCESSING_STATE               0xf03
  92 #define HDA_CMD_VERB_SET_PROCESSING_STATE               0x703
  93
  94 #define HDA_CMD_GET_PROCESSING_STATE(cad, nid)                          \
  95     (HDA_CMD_12BIT((cad), (nid),                                        \
  96     HDA_CMD_VERB_GET_PROCESSING_STATE, 0x0))
  97 #define HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload)                 \
  98     (HDA_CMD_12BIT((cad), (nid),                                        \
  99     HDA_CMD_VERB_SET_PROCESSING_STATE, (payload)))
 100
 101 #define HDA_CMD_GET_PROCESSING_STATE_STATE_OFF          0x00
 102 #define HDA_CMD_GET_PROCESSING_STATE_STATE_ON           0x01
 103 #define HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN       0x02
 104
 105 /* Coefficient Index */
 106 #define HDA_CMD_VERB_GET_COEFF_INDEX                    0xd
 107 #define HDA_CMD_VERB_SET_COEFF_INDEX                    0x5
 108
 109 #define HDA_CMD_GET_COEFF_INDEX(cad, nid)                               \
 110     (HDA_CMD_4BIT((cad), (nid),                                         \
 111     HDA_CMD_VERB_GET_COEFF_INDEX, 0x0))
 112 #define HDA_CMD_SET_COEFF_INDEX(cad, nid, payload)                      \
 113     (HDA_CMD_4BIT((cad), (nid),                                         \
 114     HDA_CMD_VERB_SET_COEFF_INDEX, (payload)))
 115
 116 /* Processing Coefficient */
 117 #define HDA_CMD_VERB_GET_PROCESSING_COEFF               0xc
 118 #define HDA_CMD_VERB_SET_PROCESSING_COEFF               0x4
 119
 120 #define HDA_CMD_GET_PROCESSING_COEFF(cad, nid)                          \
 121     (HDA_CMD_4BIT((cad), (nid),                                         \
 122     HDA_CMD_VERB_GET_PROCESSING_COEFF, 0x0))
 123 #define HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload)                 \
 124     (HDA_CMD_4BIT((cad), (nid),                                         \
 125     HDA_CMD_VERB_SET_PROCESSING_COEFF, (payload)))
 126
 127 /* Amplifier Gain/Mute */
 128 #define HDA_CMD_VERB_GET_AMP_GAIN_MUTE                  0xb
 129 #define HDA_CMD_VERB_SET_AMP_GAIN_MUTE                  0x3
 130
 131 #define HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 132     (HDA_CMD_4BIT((cad), (nid),                                         \
 133     HDA_CMD_VERB_GET_AMP_GAIN_MUTE, (payload)))
 134 #define HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 135     (HDA_CMD_4BIT((cad), (nid),                                         \
 136     HDA_CMD_VERB_SET_AMP_GAIN_MUTE, (payload)))
 137
 138 #define HDA_CMD_GET_AMP_GAIN_MUTE_INPUT         0x0000
 139 #define HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT        0x8000
 140 #define HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT         0x0000
 141 #define HDA_CMD_GET_AMP_GAIN_MUTE_LEFT          0x2000
 142
 143 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK     0x00000008
 144 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT    7
 145 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK     0x00000007
 146 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 147
 148 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp)                             \
 149     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK) >>                   \
 150     HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT)
 151 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp)                             \
 152     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK) >>                   \
 153     HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT)
 154
 155 #define HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT        0x8000
 156 #define HDA_CMD_SET_AMP_GAIN_MUTE_INPUT         0x4000
 157 #define HDA_CMD_SET_AMP_GAIN_MUTE_LEFT          0x2000
 158 #define HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT         0x1000
 159 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK    0x0f00
 160 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT   8
 161 #define HDA_CMD_SET_AMP_GAIN_MUTE_MUTE          0x0080
 162 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK     0x0007
 163 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 164
 165 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index)                          \
 166     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT) &               \
 167     HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK)
 168 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index)                           \
 169     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT) &                \
 170     HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK)
 171
 172 /* Converter format */
 173 #define HDA_CMD_VERB_GET_CONV_FMT                       0xa
 174 #define HDA_CMD_VERB_SET_CONV_FMT                       0x2
 175
 176 #define HDA_CMD_GET_CONV_FMT(cad, nid)                                  \
 177     (HDA_CMD_4BIT((cad), (nid),                                         \
 178     HDA_CMD_VERB_GET_CONV_FMT, 0x0))
 179 #define HDA_CMD_SET_CONV_FMT(cad, nid, payload)                         \
 180     (HDA_CMD_4BIT((cad), (nid),                                         \
 181     HDA_CMD_VERB_SET_CONV_FMT, (payload)))
 182
 183 /* Digital Converter Control */
 184 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT               0xf0d
 185 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1              0x70d
 186 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2              0x70e
 187
 188 #define HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid)                          \
 189     (HDA_CMD_12BIT((cad), (nid),                                        \
 190     HDA_CMD_VERB_GET_DIGITAL_CONV_FMTT, 0x0))
 191 #define HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload)                \
 192     (HDA_CMD_12BIT((cad), (nid),                                        \
 193     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1, (payload)))
 194 #define HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload)                \
 195     (HDA_CMD_12BIT((cad), (nid),                                        \
 196     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2, (payload)))
 197
 198 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK            0x7f00
 199 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT           8
 200 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK             0x0080
 201 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT            7
 202 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK           0x0040
 203 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT          6
 204 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK        0x0020
 205 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT       5
 206 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK          0x0010
 207 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT         4
 208 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK           0x0008
 209 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT          3
 210 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK          0x0004
 211 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT         2
 212 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK             0x0002
 213 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT            1
 214 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK         0x0001
 215 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT        0
 216
 217 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp)                            \
 218     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK) >>                  \
 219     HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT)
 220 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp)                             \
 221     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK) >>                   \
 222     HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT)
 223 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp)                           \
 224     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK) >>                 \
 225     HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT)
 226 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp)                        \
 227     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK) >>              \
 228     HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT)
 229 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp)                          \
 230     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK) >>                \
 231     HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT)
 232 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp)                           \
 233     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK) >>                 \
 234     HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT)
 235 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp)                          \
 236     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK) >>                \
 237     HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT)
 238 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp)                             \
 239     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK) >>                   \
 240     HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT)
 241 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp)                         \
 242     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK) >>               \
 243     HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT)
 244
 245 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_L                 0x80
 246 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO               0x40
 247 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO            0x20
 248 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY              0x10
 249 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE               0x08
 250 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG              0x04
 251 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_V                 0x02
 252 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN             0x01
 253
 254 /* Power State */
 255 #define HDA_CMD_VERB_GET_POWER_STATE                    0xf05
 256 #define HDA_CMD_VERB_SET_POWER_STATE                    0x705
 257
 258 #define HDA_CMD_GET_POWER_STATE(cad, nid)                               \
 259     (HDA_CMD_12BIT((cad), (nid),                                        \
 260     HDA_CMD_VERB_GET_POWER_STATE, 0x0))
 261 #define HDA_CMD_SET_POWER_STATE(cad, nid, payload)                      \
 262     (HDA_CMD_12BIT((cad), (nid),                                        \
 263     HDA_CMD_VERB_SET_POWER_STATE, (payload)))
 264
 265 #define HDA_CMD_POWER_STATE_D0                          0x00
 266 #define HDA_CMD_POWER_STATE_D1                          0x01
 267 #define HDA_CMD_POWER_STATE_D2                          0x02
 268 #define HDA_CMD_POWER_STATE_D3                          0x03
 269
 270 #define HDA_CMD_POWER_STATE_ACT_MASK                    0x000000f0
 271 #define HDA_CMD_POWER_STATE_ACT_SHIFT                   4
 272 #define HDA_CMD_POWER_STATE_SET_MASK                    0x0000000f
 273 #define HDA_CMD_POWER_STATE_SET_SHIFT                   0
 274
 275 #define HDA_CMD_GET_POWER_STATE_ACT(rsp)                                \
 276     (((rsp) & HDA_CMD_POWER_STATE_ACT_MASK) >>                          \
 277     HDA_CMD_POWER_STATE_ACT_SHIFT)
 278 #define HDA_CMD_GET_POWER_STATE_SET(rsp)                                \
 279     (((rsp) & HDA_CMD_POWER_STATE_SET_MASK) >>                          \
 280     HDA_CMD_POWER_STATE_SET_SHIFT)
 281
 282 #define HDA_CMD_SET_POWER_STATE_ACT(ps)                                 \
 283     (((ps) << HDA_CMD_POWER_STATE_ACT_SHIFT) &                          \
 284     HDA_CMD_POWER_STATE_ACT_MASK)
 285 #define HDA_CMD_SET_POWER_STATE_SET(ps)                                 \
 286     (((ps) << HDA_CMD_POWER_STATE_SET_SHIFT) &                          \
 287     HDA_CMD_POWER_STATE_ACT_MASK)
 288
 289 /* Converter Stream, Channel */
 290 #define HDA_CMD_VERB_GET_CONV_STREAM_CHAN               0xf06
 291 #define HDA_CMD_VERB_SET_CONV_STREAM_CHAN               0x706
 292
 293 #define HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid)                          \
 294     (HDA_CMD_12BIT((cad), (nid),                                        \
 295     HDA_CMD_VERB_GET_CONV_STREAM_CHAN, 0x0))
 296 #define HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload)                 \
 297     (HDA_CMD_12BIT((cad), (nid),                                        \
 298     HDA_CMD_VERB_SET_CONV_STREAM_CHAN, (payload)))
 299
 300 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK            0x000000f0
 301 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT           4
 302 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK              0x0000000f
 303 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT             0
 304
 305 #define HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp)                        \
 306     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) >>                  \
 307     HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT)
 308 #define HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp)                          \
 309     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) >>                    \
 310     HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT)
 311
 312 #define HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param)                      \
 313     (((param) << HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) &               \
 314     HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK)
 315 #define HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param)                        \
 316     (((param) << HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) &                 \
 317     HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK)
 318
 319 /* Input Converter SDI Select */
 320 #define HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT     0xf04
 321 #define HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT     0x704
 322
 323 #define HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid)                \
 324     (HDA_CMD_12BIT((cad), (nid),                                        \
 325     HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT, 0x0))
 326 #define HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload)       \
 327     (HDA_CMD_12BIT((cad), (nid),                                        \
 328     HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT, (payload)))
 329
 330 /* Pin Widget Control */
 331 #define HDA_CMD_VERB_GET_PIN_WIDGET_CTRL                0xf07
 332 #define HDA_CMD_VERB_SET_PIN_WIDGET_CTRL                0x707
 333
 334 #define HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid)                           \
 335     (HDA_CMD_12BIT((cad), (nid),                                        \
 336     HDA_CMD_VERB_GET_PIN_WIDGET_CTRL, 0x0))
 337 #define HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload)                  \
 338     (HDA_CMD_12BIT((cad), (nid),                                        \
 339     HDA_CMD_VERB_SET_PIN_WIDGET_CTRL, (payload)))
 340
 341 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK    0x00000080
 342 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT   7
 343 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK     0x00000040
 344 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT    6
 345 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK      0x00000020
 346 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT     5
 347 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x00000007
 348 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 349
 350 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp)                    \
 351     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK) >>          \
 352     HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT)
 353 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp)                     \
 354     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK) >>           \
 355     HDA_GET_CMD_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT)
 356 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp)                      \
 357     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK) >>            \
 358     HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT)
 359 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp)                    \
 360     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) >>          \
 361     HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT)
 362
 363 #define HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE         0x80
 364 #define HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE          0x40
 365 #define HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE           0x20
 366 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x07
 367 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 368
 369 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param)                  \
 370     (((param) << HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) &       \
 371     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK)
 372
 373 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ         0
 374 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50          1
 375 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND      2
 376 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80          4
 377 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100         5
 378
 379 /* Unsolicited Response */
 380 #define HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE           0xf08
 381 #define HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE           0x708
 382
 383 #define HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid)                      \
 384     (HDA_CMD_12BIT((cad), (nid),                                        \
 385     HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE, 0x0))
 386 #define HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload)             \
 387     (HDA_CMD_12BIT((cad), (nid),                                        \
 388     HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE, (payload)))
 389
 390 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK    0x00000080
 391 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT   7
 392 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK       0x0000001f
 393 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 394
 395 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp)                    \
 396     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK) >>          \
 397     HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT)
 398 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp)                       \
 399     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK) >>             \
 400     HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT)
 401
 402 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE         0x80
 403 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK       0x1f
 404 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 405
 406 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param)                     \
 407     (((param) << HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT) &          \
 408     HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK)
 409
 410 /* Pin Sense */
 411 #define HDA_CMD_VERB_GET_PIN_SENSE                      0xf09
 412 #define HDA_CMD_VERB_SET_PIN_SENSE                      0x709
 413
 414 #define HDA_CMD_GET_PIN_SENSE(cad, nid)                                 \
 415     (HDA_CMD_12BIT((cad), (nid),                                        \
 416     HDA_CMD_VERB_GET_PIN_SENSE, 0x0))
 417 #define HDA_CMD_SET_PIN_SENSE(cad, nid, payload)                        \
 418     (HDA_CMD_12BIT((cad), (nid),                                        \
 419     HDA_CMD_VERB_SET_PIN_SENSE, (payload)))
 420
 421 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_MASK      0x80000000
 422 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_SHIFT     31
 423 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK            0x7fffffff
 424 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT           0
 425
 426 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(rsp)                      \
 427     (((rsp) & HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_MASK) >>            \
 428     HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT_SHIFT)
 429 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp)                            \
 430     (((rsp) & HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK) >>                  \
 431     HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT)
 432
 433 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID         0x7fffffff
 434
 435 #define HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL              0x00
 436 #define HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL             0x01
 437
 438 /* EAPD/BTL Enable */
 439 #define HDA_CMD_VERB_GET_EAPD_BTL_ENABLE                0xf0c
 440 #define HDA_CMD_VERB_SET_EAPD_BTL_ENABLE                0x70c
 441
 442 #define HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid)                           \
 443     (HDA_CMD_12BIT((cad), (nid),                                        \
 444     HDA_CMD_VERB_GET_EAPD_BTL_ENABLE, 0x0))
 445 #define HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload)                  \
 446     (HDA_CMD_12BIT((cad), (nid),                                        \
 447     HDA_CMD_VERB_SET_EAPD_BTL_ENABLE, (payload)))
 448
 449 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK        0x00000004
 450 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT       2
 451 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK           0x00000002
 452 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT          1
 453 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK            0x00000001
 454 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT           0
 455
 456 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp)                        \
 457     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK) >>              \
 458     HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT)
 459 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp)                           \
 460     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK) >>                 \
 461     HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT)
 462 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp)                            \
 463     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK) >>                  \
 464     HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT)
 465
 466 #define HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP             0x04
 467 #define HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD                0x02
 468 #define HDA_CMD_SET_EAPD_BTL_ENABLE_BTL                 0x01
 469
 470 /* GPI Data */
 471 #define HDA_CMD_VERB_GET_GPI_DATA                       0xf10
 472 #define HDA_CMD_VERB_SET_GPI_DATA                       0x710
 473
 474 #define HDA_CMD_GET_GPI_DATA(cad, nid)                                  \
 475     (HDA_CMD_12BIT((cad), (nid),                                        \
 476     HDA_CMD_VERB_GET_GPI_DATA, 0x0))
 477 #define HDA_CMD_SET_GPI_DATA(cad, nid)                                  \
 478     (HDA_CMD_12BIT((cad), (nid),                                        \
 479     HDA_CMD_VERB_SET_GPI_DATA, (payload)))
 480
 481 /* GPI Wake Enable Mask */
 482 #define HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK           0xf11
 483 #define HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK           0x711
 484
 485 #define HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid)                      \
 486     (HDA_CMD_12BIT((cad), (nid),                                        \
 487     HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK, 0x0))
 488 #define HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload)             \
 489     (HDA_CMD_12BIT((cad), (nid),                                        \
 490     HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK, (payload)))
 491
 492 /* GPI Unsolicited Enable Mask */
 493 #define HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK    0xf12
 494 #define HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK    0x712
 495
 496 #define HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid)               \
 497     (HDA_CMD_12BIT((cad), (nid),                                        \
 498     HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK, 0x0))
 499 #define HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload)      \
 500     (HDA_CMD_12BIT((cad), (nid),                                        \
 501     HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK, (payload)))
 502
 503 /* GPI Sticky Mask */
 504 #define HDA_CMD_VERB_GET_GPI_STICKY_MASK                0xf13
 505 #define HDA_CMD_VERB_SET_GPI_STICKY_MASK                0x713
 506
 507 #define HDA_CMD_GET_GPI_STICKY_MASK(cad, nid)                           \
 508     (HDA_CMD_12BIT((cad), (nid),                                        \
 509     HDA_CMD_VERB_GET_GPI_STICKY_MASK, 0x0))
 510 #define HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload)                  \
 511     (HDA_CMD_12BIT((cad), (nid),                                        \
 512     HDA_CMD_VERB_SET_GPI_STICKY_MASK, (payload)))
 513
 514 /* GPO Data */
 515 #define HDA_CMD_VERB_GET_GPO_DATA                       0xf14
 516 #define HDA_CMD_VERB_SET_GPO_DATA                       0x714
 517
 518 #define HDA_CMD_GET_GPO_DATA(cad, nid)                                  \
 519     (HDA_CMD_12BIT((cad), (nid),                                        \
 520     HDA_CMD_VERB_GET_GPO_DATA, 0x0))
 521 #define HDA_CMD_SET_GPO_DATA(cad, nid, payload)                         \
 522     (HDA_CMD_12BIT((cad), (nid),                                        \
 523     HDA_CMD_VERB_SET_GPO_DATA, (payload)))
 524
 525 /* GPIO Data */
 526 #define HDA_CMD_VERB_GET_GPIO_DATA                      0xf15
 527 #define HDA_CMD_VERB_SET_GPIO_DATA                      0x715
 528
 529 #define HDA_CMD_GET_GPIO_DATA(cad, nid)                                 \
 530     (HDA_CMD_12BIT((cad), (nid),                                        \
 531     HDA_CMD_VERB_GET_GPIO_DATA, 0x0))
 532 #define HDA_CMD_SET_GPIO_DATA(cad, nid, payload)                        \
 533     (HDA_CMD_12BIT((cad), (nid),                                        \
 534     HDA_CMD_VERB_SET_GPIO_DATA, (payload)))
 535
 536 /* GPIO Enable Mask */
 537 #define HDA_CMD_VERB_GET_GPIO_ENABLE_MASK               0xf16
 538 #define HDA_CMD_VERB_SET_GPIO_ENABLE_MASK               0x716
 539
 540 #define HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid)                          \
 541     (HDA_CMD_12BIT((cad), (nid),                                        \
 542     HDA_CMD_VERB_GET_GPIO_ENABLE_MASK, 0x0))
 543 #define HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload)                 \
 544     (HDA_CMD_12BIT((cad), (nid),                                        \
 545     HDA_CMD_VERB_SET_GPIO_ENABLE_MASK, (payload)))
 546
 547 /* GPIO Direction */
 548 #define HDA_CMD_VERB_GET_GPIO_DIRECTION                 0xf17
 549 #define HDA_CMD_VERB_SET_GPIO_DIRECTION                 0x717
 550
 551 #define HDA_CMD_GET_GPIO_DIRECTION(cad, nid)                            \
 552     (HDA_CMD_12BIT((cad), (nid),                                        \
 553     HDA_CMD_VERB_GET_GPIO_DIRECTION, 0x0))
 554 #define HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload)                   \
 555     (HDA_CMD_12BIT((cad), (nid),                                        \
 556     HDA_CMD_VERB_SET_GPIO_DIRECTION, (payload)))
 557
 558 /* GPIO Wake Enable Mask */
 559 #define HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK          0xf18
 560 #define HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK          0x718
 561
 562 #define HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid)                     \
 563     (HDA_CMD_12BIT((cad), (nid),                                        \
 564     HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK, 0x0))
 565 #define HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload)            \
 566     (HDA_CMD_12BIT((cad), (nid),                                        \
 567     HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK, (payload)))
 568
 569 /* GPIO Unsolicited Enable Mask */
 570 #define HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK   0xf19
 571 #define HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK   0x719
 572
 573 #define HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid)              \
 574     (HDA_CMD_12BIT((cad), (nid),                                        \
 575     HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK, 0x0))
 576 #define HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload)     \
 577     (HDA_CMD_12BIT((cad), (nid),                                        \
 578     HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK, (payload)))
 579
 580 /* GPIO_STICKY_MASK */
 581 #define HDA_CMD_VERB_GET_GPIO_STICKY_MASK               0xf1a
 582 #define HDA_CMD_VERB_SET_GPIO_STICKY_MASK               0x71a
 583
 584 #define HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid)                          \
 585     (HDA_CMD_12BIT((cad), (nid),                                        \
 586     HDA_CMD_VERB_GET_GPIO_STICKY_MASK, 0x0))
 587 #define HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload)                 \
 588     (HDA_CMD_12BIT((cad), (nid),                                        \
 589     HDA_CMD_VERB_SET_GPIO_STICKY_MASK, (payload)))
 590
 591 /* Beep Generation */
 592 #define HDA_CMD_VERB_GET_BEEP_GENERATION                0xf0a
 593 #define HDA_CMD_VERB_SET_BEEP_GENERATION                0x70a
 594
 595 #define HDA_CMD_GET_BEEP_GENERATION(cad, nid)                           \
 596     (HDA_CMD_12BIT((cad), (nid),                                        \
 597     HDA_CMD_VERB_GET_BEEP_GENERATION, 0x0))
 598 #define HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload)                  \
 599     (HDA_CMD_12BIT((cad), (nid),                                        \
 600     HDA_CMD_VERB_SET_BEEP_GENERATION, (payload)))
 601
 602 /* Volume Knob */
 603 #define HDA_CMD_VERB_GET_VOLUME_KNOB                    0xf0f
 604 #define HDA_CMD_VERB_SET_VOLUME_KNOB                    0x70f
 605
 606 #define HDA_CMD_GET_VOLUME_KNOB(cad, nid)                               \
 607     (HDA_CMD_12BIT((cad), (nid),                                        \
 608     HDA_CMD_VERB_GET_VOLUME_KNOB, 0x0))
 609 #define HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload)                      \
 610     (HDA_CMD_12BIT((cad), (nid),                                        \
 611     HDA_CMD_VERB_SET_VOLUME_KNOB, (payload)))
 612
 613 /* Subsystem ID */
 614 #define HDA_CMD_VERB_GET_SUBSYSTEM_ID                   0xf20
 615 #define HDA_CMD_VERB_SET_SUSBYSTEM_ID1                  0x720
 616 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID2                  0x721
 617 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID3                  0x722
 618 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID4                  0x723
 619
 620 #define HDA_CMD_GET_SUBSYSTEM_ID(cad, nid)                              \
 621     (HDA_CMD_12BIT((cad), (nid),                                        \
 622     HDA_CMD_VERB_GET_SUBSYSTEM_ID, 0x0))
 623 #define HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload)                    \
 624     (HDA_CMD_12BIT((cad), (nid),                                        \
 625     HDA_CMD_VERB_SET_SUSBYSTEM_ID1, (payload)))
 626 #define HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload)                    \
 627     (HDA_CMD_12BIT((cad), (nid),                                        \
 628     HDA_CMD_VERB_SET_SUSBYSTEM_ID2, (payload)))
 629 #define HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload)                    \
 630     (HDA_CMD_12BIT((cad), (nid),                                        \
 631     HDA_CMD_VERB_SET_SUSBYSTEM_ID3, (payload)))
 632 #define HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload)                    \
 633     (HDA_CMD_12BIT((cad), (nid),                                        \
 634     HDA_CMD_VERB_SET_SUSBYSTEM_ID4, (payload)))
 635
 636 /* Configuration Default */
 637 #define HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT          0xf1c
 638 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1         0x71c
 639 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2         0x71d
 640 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3         0x71e
 641 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4         0x71f
 642
 643 #define HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid)                     \
 644     (HDA_CMD_12BIT((cad), (nid),                                        \
 645     HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT, 0x0))
 646 #define HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload)           \
 647     (HDA_CMD_12BIT((cad), (nid),                                        \
 648     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1, (payload)))
 649 #define HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload)           \
 650     (HDA_CMD_12BIT((cad), (nid),                                        \
 651     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2, (payload)))
 652 #define HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload)           \
 653     (HDA_CMD_12BIT((cad), (nid),                                        \
 654     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3, (payload)))
 655 #define HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload)           \
 656     (HDA_CMD_12BIT((cad), (nid),                                        \
 657     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4, (payload)))
 658
 659 /* Stripe Control */
 660 #define HDA_CMD_VERB_GET_STRIPE_CONTROL                 0xf24
 661 #define HDA_CMD_VERB_SET_STRIPE_CONTROL                 0x724
 662
 663 #define HDA_CMD_SET_STRIPE_CONTROL(cad, nid)                            \
 664     (HDA_CMD_12BIT((cad), (nid),                                        \
 665     HDA_CMD_VERB_GET_STRIPE_CONTROL, 0x0))
 666 #define HDA_CMD_GET_STRIPE_CONTROL(cad, nid, payload)                   \
 667     (HDA_CMD_12BIT((cad), (nid),                                        \
 668     HDA_CMD_VERB_SET_STRIPE_CONTROL, (payload)))
 669
 670 /* Function Reset */
 671 #define HDA_CMD_VERB_FUNCTION_RESET                     0x7ff
 672
 673 #define HDA_CMD_FUNCTION_RESET(cad, nid)                                \
 674     (HDA_CMD_12BIT((cad), (nid),                                        \
 675     HDA_CMD_VERB_FUNCTION_RESET, 0x0))
 676
 677
 678 /****************************************************************************
 679  * HDA Device Parameters
 680  ****************************************************************************/
 681
 682 /* Vendor ID */
 683 #define HDA_PARAM_VENDOR_ID                             0x00
 684
 685 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK              0xffff0000
 686 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT             16
 687 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK              0x0000ffff
 688 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT             0
 689
 690 #define HDA_PARAM_VENDOR_ID_VENDOR_ID(param)                            \
 691     (((param) & HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK) >>                  \
 692     HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT)
 693 #define HDA_PARAM_VENDOR_ID_DEVICE_ID(param)                            \
 694     (((param) & HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK) >>                  \
 695     HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT)
 696
 697 /* Revision ID */
 698 #define HDA_PARAM_REVISION_ID                           0x02
 699
 700 #define HDA_PARAM_REVISION_ID_MAJREV_MASK               0x00f00000
 701 #define HDA_PARAM_REVISION_ID_MAJREV_SHIFT              20
 702 #define HDA_PARAM_REVISION_ID_MINREV_MASK               0x000f0000
 703 #define HDA_PARAM_REVISION_ID_MINREV_SHIFT              16
 704 #define HDA_PARAM_REVISION_ID_REVISION_ID_MASK          0x0000ff00
 705 #define HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT         8
 706 #define HDA_PARAM_REVISION_ID_STEPPING_ID_MASK          0x000000ff
 707 #define HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT         0
 708
 709 #define HDA_PARAM_REVISION_ID_MAJREV(param)                             \
 710     (((param) & HDA_PARAM_REVISION_ID_MAJREV_MASK) >>                   \
 711     HDA_PARAM_REVISION_ID_MAJREV_SHIFT)
 712 #define HDA_PARAM_REVISION_ID_MINREV(param)                             \
 713     (((param) & HDA_PARAM_REVISION_ID_MINREV_MASK) >>                   \
 714     HDA_PARAM_REVISION_ID_MINREV_SHIFT)
 715 #define HDA_PARAM_REVISION_ID_REVISION_ID(param)                        \
 716     (((param) & HDA_PARAM_REVISION_ID_REVISION_ID_MASK) >>              \
 717     HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT)
 718 #define HDA_PARAM_REVISION_ID_STEPPING_ID(param)                        \
 719     (((param) & HDA_PARAM_REVISION_ID_STEPPING_ID_MASK) >>              \
 720     HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT)
 721
 722 /* Subordinate Node Count */
 723 #define HDA_PARAM_SUB_NODE_COUNT                        0x04
 724
 725 #define HDA_PARAM_SUB_NODE_COUNT_START_MASK             0x00ff0000
 726 #define HDA_PARAM_SUB_NODE_COUNT_START_SHIFT            16
 727 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK             0x000000ff
 728 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT            0
 729
 730 #define HDA_PARAM_SUB_NODE_COUNT_START(param)                           \
 731     (((param) & HDA_PARAM_SUB_NODE_COUNT_START_MASK) >>                 \
 732     HDA_PARAM_SUB_NODE_COUNT_START_SHIFT)
 733 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL(param)                           \
 734     (((param) & HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK) >>                 \
 735     HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT)
 736
 737 /* Function Group Type */
 738 #define HDA_PARAM_FCT_GRP_TYPE                          0x05
 739
 740 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK               0x00000100
 741 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT              8
 742 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK           0x000000ff
 743 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT  0
 744
 745 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL(param)                             \
 746     (((param) & HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK) >>                   \
 747     HDA_PARAM_FCT_GROUP_TYPE_UNSOL_SHIFT)
 748 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param)                         \
 749     (((param) & HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK) >>               \
 750     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT)
 751
 752 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO          0x01
 753 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM          0x02
 754
 755 /* Audio Function Group Capabilities */
 756 #define HDA_PARAM_AUDIO_FCT_GRP_CAP                     0x08
 757
 758 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK       0x00010000
 759 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT      16
 760 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK    0x00000f00
 761 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT   8
 762 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK   0x0000000f
 763 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT  0
 764
 765 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param)                     \
 766     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK) >>           \
 767     HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT)
 768 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param)                  \
 769     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK) >>        \
 770     HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT)
 771 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param)                 \
 772     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK) >>       \
 773     HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT)
 774
 775 /* Audio Widget Capabilities */
 776 #define HDA_PARAM_AUDIO_WIDGET_CAP                      0x09
 777
 778 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK            0x00f00000
 779 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT           20
 780 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK           0x000f0000
 781 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT          16
 782 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK         0x00000800
 783 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT        11
 784 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK      0x00000400
 785 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT     10
 786 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK         0x00000200
 787 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT        9
 788 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK       0x00000100
 789 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT      8
 790 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK       0x00000080
 791 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT      7
 792 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK     0x00000040
 793 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT    6
 794 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK          0x00000020
 795 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT         5
 796 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK      0x00000010
 797 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT     4
 798 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK         0x00000008
 799 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT        3
 800 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK         0x00000004
 801 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT        2
 802 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK          0x00000002
 803 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT         1
 804 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK          0x00000001
 805 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT         0
 806
 807 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param)                          \
 808     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK) >>                \
 809     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT)
 810 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param)                         \
 811     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK) >>               \
 812     HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT)
 813 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param)                       \
 814     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK) >>             \
 815     HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT)
 816 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param)                    \
 817     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK) >>          \
 818     HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT)
 819 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param)                       \
 820     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK) >>             \
 821     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT)
 822 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param)                     \
 823     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK) >>           \
 824     HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT)
 825 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param)                     \
 826     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK) >>           \
 827     HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT)
 828 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param)                   \
 829     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK) >>         \
 830     HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT)
 831 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param)                        \
 832     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK) >>              \
 833     HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT)
 834 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param)                    \
 835     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK) >>          \
 836     HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT)
 837 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param)                       \
 838     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK) >>             \
 839     HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT)
 840 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param)                       \
 841     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK) >>             \
 842     HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT)
 843 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param)                        \
 844     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK) >>              \
 845     HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT)
 846 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param)                        \
 847     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 848     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT)
 849
 850 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT    0x0
 851 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT     0x1
 852 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER     0x2
 853 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR  0x3
 854 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX     0x4
 855 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET    0x5
 856 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET   0x6
 857 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET     0x7
 858 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET   0xf
 859
 860 /* Supported PCM Size, Rates */
 861
 862 #define HDA_PARAM_SUPP_PCM_SIZE_RATE                    0x0a
 863
 864 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK         0x00100000
 865 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT        20
 866 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK         0x00080000
 867 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT        19
 868 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK         0x00040000
 869 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT        18
 870 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK         0x00020000
 871 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT        17
 872 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK          0x00010000
 873 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT         16
 874 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK          0x00000001
 875 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT         0
 876 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK         0x00000002
 877 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT        1
 878 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK         0x00000004
 879 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT        2
 880 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK         0x00000008
 881 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT        3
 882 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK         0x00000010
 883 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT        4
 884 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK         0x00000020
 885 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT        5
 886 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK         0x00000040
 887 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT        6
 888 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK         0x00000080
 889 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT        7
 890 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK         0x00000100
 891 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT        8
 892 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK        0x00000200
 893 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT       9
 894 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK        0x00000400
 895 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT       10
 896 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK        0x00000800
 897 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT       11
 898
 899 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param)                       \
 900     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK) >>             \
 901     HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT)
 902 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param)                       \
 903     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK) >>             \
 904     HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT)
 905 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param)                       \
 906     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK) >>             \
 907     HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT)
 908 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param)                       \
 909     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK) >>             \
 910     HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT)
 911 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param)                        \
 912     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK) >>              \
 913     HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT)
 914 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param)                        \
 915     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK) >>              \
 916     HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT)
 917 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param)                       \
 918     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK) >>             \
 919     HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT)
 920 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param)                       \
 921     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK) >>             \
 922     HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT)
 923 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param)                       \
 924     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK) >>             \
 925     HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT)
 926 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param)                       \
 927     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK) >>             \
 928     HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT)
 929 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param)                       \
 930     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK) >>             \
 931     HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT)
 932 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param)                       \
 933     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK) >>             \
 934     HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT)
 935 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param)                       \
 936     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK) >>             \
 937     HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT)
 938 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param)                       \
 939     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK) >>             \
 940     HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT)
 941 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param)                      \
 942     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK) >>            \
 943     HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT)
 944 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param)                      \
 945     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK) >>            \
 946     HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT)
 947 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param)                      \
 948     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK) >>            \
 949     HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT)
 950
 951 /* Supported Stream Formats */
 952 #define HDA_PARAM_SUPP_STREAM_FORMATS                   0x0b
 953
 954 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK          0x00000004
 955 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT         2
 956 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK      0x00000002
 957 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT     1
 958 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK          0x00000001
 959 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT         0
 960
 961 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param)                        \
 962     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK) >>              \
 963     HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT)
 964 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param)                    \
 965     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK) >>          \
 966     HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT)
 967 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param)                        \
 968     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK) >>              \
 969     HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT)
 970
 971 /* Pin Capabilities */
 972 #define HDA_PARAM_PIN_CAP                               0x0c
 973
 974 #define HDA_PARAM_PIN_CAP_EAPD_CAP_MASK                 0x00010000
 975 #define HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT                16
 976 #define HDA_PARAM_PIN_CAP_VREF_CTRL_MASK                0x0000ff00
 977 #define HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT               8
 978 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK            0x00002000
 979 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT           13
 980 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK             0x00001000
 981 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT            12
 982 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK         0x00000400
 983 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT        10
 984 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK             0x00000200
 985 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT            9
 986 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK            0x00000100
 987 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT           8
 988 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK         0x00000040
 989 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT        6
 990 #define HDA_PARAM_PIN_CAP_INPUT_CAP_MASK                0x00000020
 991 #define HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT               5
 992 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK               0x00000010
 993 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT              4
 994 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK            0x00000008
 995 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT           3
 996 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK      0x00000004
 997 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT     2
 998 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK             0x00000002
 999 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT            1
1000 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK            0x00000001
1001 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT           0
1002
1003 #define HDA_PARAM_PIN_CAP_EAPD_CAP(param)                               \
1004     (((param) & HDA_PARAM_PIN_CAP_EAPD_CAP_MASK) >>                     \
1005     HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT)
1006 #define HDA_PARAM_PIN_CAP_VREF_CTRL(param)                              \
1007     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_MASK) >>                    \
1008     HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT)
1009 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100(param)                          \
1010     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK) >>                \
1011     HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT)
1012 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80(param)                           \
1013     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK) >>                 \
1014     HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT)
1015 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param)                       \
1016     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK) >>             \
1017     HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT)
1018 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50(param)                           \
1019     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK) >>                 \
1020     HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT)
1021 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param)                          \
1022     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK) >>                \
1023     HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT)
1024 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param)                       \
1025     (((param) & HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK) >>             \
1026     HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT)
1027 #define HDA_PARAM_PIN_CAP_INPUT_CAP(param)                              \
1028     (((param) & HDA_PARAM_PIN_CAP_INPUT_CAP_MASK) >>                    \
1029     HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT)
1030 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP(param)                             \
1031     (((param) & HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK) >>                   \
1032     HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT)
1033 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param)                          \
1034     (((param) & HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK) >>                \
1035     HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT)
1036 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param)                    \
1037     (((param) & HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK) >>          \
1038     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK)
1039 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD(param)                           \
1040     (((param) & HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK) >>                 \
1041     HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT)
1042 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param)                          \
1043     (((param) & HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK) >>                \
1044     HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT)
1045
1046 /* Input Amplifier Capabilities */
1047 #define HDA_PARAM_INPUT_AMP_CAP                         0x0d
1048
1049 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK           0x80000000
1050 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT          31
1051 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK           0x007f0000
1052 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT          16
1053 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK           0x00007f00
1054 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT          8
1055 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK             0x0000007f
1056 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT            0
1057
1058 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param)                         \
1059     (((param) & HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK) >>               \
1060     HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT)
1061 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param)                         \
1062     (((param) & HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK) >>               \
1063     HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT)
1064 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param)                         \
1065     (((param) & HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK) >>               \
1066     HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT)
1067 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET(param)                           \
1068     (((param) & HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK) >>                 \
1069     HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT)
1070
1071 /* Output Amplifier Capabilities */
1072 #define HDA_PARAM_OUTPUT_AMP_CAP                        0x12
1073
1074 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK          0x80000000
1075 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT         31
1076 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK          0x007f0000
1077 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT         16
1078 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK          0x00007f00
1079 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT         8
1080 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK            0x0000007f
1081 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT           0
1082
1083 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param)                        \
1084     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK) >>              \
1085     HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT)
1086 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param)                        \
1087     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK) >>              \
1088     HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT)
1089 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param)                        \
1090     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK) >>              \
1091     HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT)
1092 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param)                          \
1093     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK) >>                \
1094     HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT)
1095
1096 /* Connection List Length */
1097 #define HDA_PARAM_CONN_LIST_LENGTH                      0x0e
1098
1099 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK       0x00000080
1100 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT      7
1101 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK     0x0000007f
1102 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT    0
1103
1104 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param)                     \
1105     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK) >>           \
1106     HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT)
1107 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param)                   \
1108     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK) >>         \
1109     HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT)
1110
1111 /* Supported Power States */
1112 #define HDA_PARAM_SUPP_POWER_STATES                     0x0f
1113
1114 #define HDA_PARAM_SUPP_POWER_STATES_D3_MASK             0x00000008
1115 #define HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT            3
1116 #define HDA_PARAM_SUPP_POWER_STATES_D2_MASK             0x00000004
1117 #define HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT            2
1118 #define HDA_PARAM_SUPP_POWER_STATES_D1_MASK             0x00000002
1119 #define HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT            1
1120 #define HDA_PARAM_SUPP_POWER_STATES_D0_MASK             0x00000001
1121 #define HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT            0
1122
1123 #define HDA_PARAM_SUPP_POWER_STATES_D3(param)                           \
1124     (((param) & HDA_PARAM_SUPP_POWER_STATES_D3_MASK) >>                 \
1125     HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT)
1126 #define HDA_PARAM_SUPP_POWER_STATES_D2(param)                           \
1127     (((param) & HDA_PARAM_SUPP_POWER_STATES_D2_MASK) >>                 \
1128     HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT)
1129 #define HDA_PARAM_SUPP_POWER_STATES_D1(param)                           \
1130     (((param) & HDA_PARAM_SUPP_POWER_STATES_D1_MASK) >>                 \
1131     HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT)
1132 #define HDA_PARAM_SUPP_POWER_STATES_D0(param)                           \
1133     (((param) & HDA_PARAM_SUPP_POWER_STATES_D0_MASK) >>                 \
1134     HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT)
1135
1136 /* Processing Capabilities */
1137 #define HDA_PARAM_PROCESSING_CAP                        0x10
1138
1139 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK          0x0000ff00
1140 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT         8
1141 #define HDA_PARAM_PROCESSING_CAP_BENIGN_MASK            0x00000001
1142 #define HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT           0
1143
1144 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param)                        \
1145     (((param) & HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK) >>              \
1146     HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT)
1147 #define HDA_PARAM_PROCESSING_CAP_BENIGN(param)                          \
1148     (((param) & HDA_PARAM_PROCESSING_CAP_BENIGN_MASK) >>                \
1149     HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT)
1150
1151 /* GPIO Count */
1152 #define HDA_PARAM_GPIO_COUNT                            0x11
1153
1154 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK              0x80000000
1155 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT             31
1156 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK             0x40000000
1157 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT            30
1158 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK               0x00ff0000
1159 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT              16
1160 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK               0x0000ff00
1161 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT              8
1162 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK              0x000000ff
1163 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT             0
1164
1165 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE(param)                            \
1166     (((param) & HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK) >>                  \
1167     HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT)
1168 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param)                           \
1169     (((param) & HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK) >>                 \
1170     HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT)
1171 #define HDA_PARAM_GPIO_COUNT_NUM_GPI(param)                             \
1172     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK) >>                   \
1173     HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT)
1174 #define HDA_PARAM_GPIO_COUNT_NUM_GPO(param)                             \
1175     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK) >>                   \
1176     HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT)
1177 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO(param)                            \
1178     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK) >>                  \
1179     HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT)
1180
1181 /* Volume Knob Capabilities */
1182 #define HDA_PARAM_VOLUME_KNOB_CAP                       0x13
1183
1184 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK            0x00000080
1185 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT           7
1186 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK        0x0000007f
1187 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT       0
1188
1189 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param)                          \
1190     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK) >>                \
1191     HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT)
1192 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param)                      \
1193     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK) >>            \
1194     HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT)
1195
1196
1197 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK            0x00000000f
1198 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK         0x0000000f0
1199 #define HDA_CONFIG_DEFAULTCONF_MISC_MASK                        0x000000f00
1200 #define HDA_CONFIG_DEFAULTCONF_COLOR_MASK                       0x00000f000
1201 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK             0x000f00000
1202 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MASK                      0x000f00000
1203 #define HDA_CONFIG_DEFAULTCONF_LOCATION_MASK            0x03f000000
1204 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK                0x0c0000000
1205
1206 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK                (0<<30)
1207 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE                (1<<30)
1208 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED               (2<<30)
1209 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH                (3<<30)
1210
1211 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT                  (0<<20)
1212 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER                   (1<<20)
1213 #define HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT                    (2<<20)
1214 #define HDA_CONFIG_DEFAULTCONF_DEVICE_CD                        (3<<20)
1215 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT                 (4<<20)
1216 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT         (5<<20)
1217 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE                (6<<20)
1218 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET             (7<<20)
1219 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN                   (8<<20)
1220 #define HDA_CONFIG_DEFAULTCONF_DEVICE_AUX                       (9<<20)
1221 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN                    (10<<20)
1222 #define HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY                 (11<<20)
1223 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN                  (12<<20)
1224 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN          (13<<20)
1225 #define HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER                     (15<<20)
1226
1227 #endif