2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 int ahci_port_init(struct ahci_port *ap);
55 int ahci_port_start(struct ahci_port *, int);
56 int ahci_port_stop(struct ahci_port *, int);
57 int ahci_port_clo(struct ahci_port *);
59 int ahci_port_signature_detect(struct ahci_port *ap);
60 int ahci_load_prdt(struct ahci_ccb *);
61 void ahci_unload_prdt(struct ahci_ccb *);
62 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
63 int nsegs, int error);
64 int ahci_poll(struct ahci_ccb *, int, void (*)(void *));
65 void ahci_start(struct ahci_ccb *);
67 static void ahci_ata_cmd_timeout_unserialized(void *arg);
68 static void ahci_ata_cmd_timeout(void *arg);
70 void ahci_issue_pending_ncq_commands(struct ahci_port *);
71 void ahci_issue_pending_commands(struct ahci_port *, int);
73 u_int32_t ahci_port_intr(struct ahci_port *, u_int32_t);
75 struct ahci_ccb *ahci_get_ccb(struct ahci_port *);
76 void ahci_put_ccb(struct ahci_ccb *);
78 struct ahci_ccb *ahci_get_err_ccb(struct ahci_port *);
79 void ahci_put_err_ccb(struct ahci_ccb *);
81 int ahci_port_read_ncq_error(struct ahci_port *, int *);
83 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
84 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
85 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
87 void ahci_empty_done(struct ahci_ccb *ccb);
88 void ahci_ata_cmd_done(struct ahci_ccb *ccb);
90 /* Wait for all bits in _b to be cleared */
91 #define ahci_pwait_clr(_ap, _r, _b) ahci_pwait_eq((_ap), (_r), (_b), 0)
93 /* Wait for all bits in _b to be set */
94 #define ahci_pwait_set(_ap, _r, _b) ahci_pwait_eq((_ap), (_r), (_b), (_b))
97 * Initialize the global AHCI hardware. This code does not set up any of
101 ahci_init(struct ahci_softc *sc)
105 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
106 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
108 /* save BIOS initialised parameters, enable staggered spin up */
109 cap = ahci_read(sc, AHCI_REG_CAP);
110 cap &= AHCI_REG_CAP_SMPS;
111 cap |= AHCI_REG_CAP_SSS;
112 pi = ahci_read(sc, AHCI_REG_PI);
114 if (AHCI_REG_GHC_AE & ahci_read(sc, AHCI_REG_GHC)) {
115 /* reset the controller */
116 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR);
117 if (ahci_wait_ne(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR,
118 AHCI_REG_GHC_HR) != 0) {
119 device_printf(sc->sc_dev,
120 "unable to reset controller\n");
125 /* enable ahci (global interrupts disabled) */
126 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
128 /* restore parameters */
129 ahci_write(sc, AHCI_REG_CAP, cap);
130 ahci_write(sc, AHCI_REG_PI, pi);
136 * Allocate and initialize an AHCI port.
139 ahci_port_alloc(struct ahci_softc *sc, u_int port)
141 struct ahci_port *ap;
142 struct ahci_ccb *ccb;
145 struct ahci_cmd_hdr *hdr;
146 struct ahci_cmd_table *table;
151 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
153 device_printf(sc->sc_dev,
154 "unable to allocate memory for port %d\n",
159 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
160 device_get_name(sc->sc_dev),
161 device_get_unit(sc->sc_dev),
163 sc->sc_ports[port] = ap;
165 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
166 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
167 device_printf(sc->sc_dev,
168 "unable to create register window for port %d\n",
175 TAILQ_INIT(&ap->ap_ccb_free);
176 TAILQ_INIT(&ap->ap_ccb_pending);
177 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
179 /* Disable port interrupts */
180 ahci_pwrite(ap, AHCI_PREG_IE, 0);
182 /* Sec 10.1.2 - deinitialise port if it is already running */
183 cmd = ahci_pread(ap, AHCI_PREG_CMD);
184 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
185 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
186 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
189 r = ahci_port_stop(ap, 1);
191 device_printf(sc->sc_dev,
192 "unable to disable %s, ignoring port %d\n",
193 ((r == 2) ? "CR" : "FR"), port);
198 /* Write DET to zero */
199 ahci_pwrite(ap, AHCI_PREG_SCTL, 0);
203 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
204 if (ap->ap_dmamem_rfis == NULL) {
209 /* Setup RFIS base address */
210 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
211 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
212 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
213 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
215 /* Enable FIS reception and activate port. */
216 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
217 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
218 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
220 /* Check whether port activated. Skip it if not. */
221 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
222 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
223 kprintf("NOT-ACTIVATED\n");
228 /* Allocate a CCB for each command slot */
229 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
231 if (ap->ap_ccbs == NULL) {
232 device_printf(sc->sc_dev,
233 "unable to allocate command list for port %d\n",
238 /* Command List Structures and Command Tables */
239 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
240 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
241 if (ap->ap_dmamem_cmd_table == NULL ||
242 ap->ap_dmamem_cmd_list == NULL) {
244 device_printf(sc->sc_dev,
245 "unable to allocate DMA memory for port %d\n",
250 /* Setup command list base address */
251 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
252 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
253 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
255 /* Split CCB allocation into CCBs and assign to command header/table */
256 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
257 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
258 for (i = 0; i < sc->sc_ncmds; i++) {
259 ccb = &ap->ap_ccbs[i];
261 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
264 device_printf(sc->sc_dev,
265 "unable to create dmamap for port %d "
266 "ccb %d\n", port, i);
270 callout_init(&ccb->ccb_timeout);
273 ccb->ccb_cmd_hdr = &hdr[i];
274 ccb->ccb_cmd_table = &table[i];
275 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
276 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
277 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
278 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
281 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
282 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
285 ccb->ccb_xa.ata_put_xfer = ahci_ata_put_xfer;
287 ccb->ccb_xa.state = ATA_S_COMPLETE;
291 /* Wait for ICC change to complete */
292 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
295 * Do device-related port initialization. A failure here does not
296 * cause the port to be deallocated as we want to receive future
302 ahci_port_free(sc, port);
308 * [re]initialize an idle port. No CCBs should be active.
310 * This function is called during the initial port allocation sequence
311 * and is also called on hot-plug insertion. We take no chances and
312 * use a portreset instead of a softreset.
314 * Returns 0 if a device is successfully detected.
317 ahci_port_init(struct ahci_port *ap)
322 * Hard-reset the port.
324 rc = ahci_port_portreset(ap);
329 * We had problems talking to the device on the port.
331 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
332 case AHCI_PREG_SSTS_DET_DEV_NE:
333 kprintf("%s: Device not communicating\n", PORTNAME(ap));
335 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
336 kprintf("%s: PHY offline\n", PORTNAME(ap));
339 kprintf("%s: No device detected\n", PORTNAME(ap));
346 * The device on the port is still telling us its busy.
348 * We try a softreset on the device.
350 kprintf("%s: Device on port did not come ready, TFD: 0x%b\n",
352 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
354 /* Try a soft reset to clear busy */
355 rc = ahci_port_softreset(ap);
357 kprintf("%s: Unable to clear busy device\n",
360 kprintf("%s: Successfully reset busy device\n",
370 * Enable command transfers on the port if a device was detected.
371 * Otherwise leave them disabled but leave the port structure
372 * intact so we get hot-plug interrupts.
375 if (ahci_port_start(ap, 0)) {
376 kprintf("%s: failed to start command DMA on port, "
377 "disabling\n", PORTNAME(ap));
378 rc = ENXIO; /* couldn't start port */
382 /* Flush interrupts for port */
383 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
384 ahci_write(ap->ap_sc, AHCI_REG_IS, 1 << ap->ap_num);
386 /* Enable port interrupts */
387 ahci_pwrite(ap, AHCI_PREG_IE,
388 AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
389 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
390 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
391 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
393 ((sc->sc_ccc_ports & (1 << port)) ?
394 0 : (AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE))
396 AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE
403 * De-initialize and detach a port.
406 ahci_port_free(struct ahci_softc *sc, u_int port)
408 struct ahci_port *ap = sc->sc_ports[port];
409 struct ahci_ccb *ccb;
411 /* Ensure port is disabled and its interrupts are flushed */
413 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
414 ahci_pwrite(ap, AHCI_PREG_IE, 0);
415 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
416 ahci_write(sc, AHCI_REG_IS, 1 << port);
420 while ((ccb = ahci_get_ccb(ap)) != NULL) {
421 if (ccb->ccb_dmamap) {
422 bus_dmamap_destroy(sc->sc_tag_data,
424 ccb->ccb_dmamap = NULL;
427 kfree(ap->ap_ccbs, M_DEVBUF);
431 if (ap->ap_dmamem_cmd_list) {
432 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
433 ap->ap_dmamem_cmd_list = NULL;
435 if (ap->ap_dmamem_rfis) {
436 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
437 ap->ap_dmamem_rfis = NULL;
439 if (ap->ap_dmamem_cmd_table) {
440 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
441 ap->ap_dmamem_cmd_table = NULL;
444 /* bus_space(9) says we dont free the subregions handle */
447 sc->sc_ports[port] = NULL;
451 * Start high-level command processing on the port
454 ahci_port_start(struct ahci_port *ap, int fre_only)
458 /* Turn on FRE (and ST) */
459 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
460 r |= AHCI_PREG_CMD_FRE;
462 r |= AHCI_PREG_CMD_ST;
463 ahci_pwrite(ap, AHCI_PREG_CMD, r);
466 /* (Re-)enable coalescing on the port. */
467 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
468 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
469 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
470 ap->ap_sc->sc_ccc_ports_cur);
474 if (!(ap->ap_sc->sc_flags & AHCI_F_IGN_FR)) {
475 /* Wait for FR to come on */
476 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR))
480 /* Wait for CR to come on */
481 if (!fre_only && ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR))
488 * Stop high-level command processing on a port
491 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
496 /* Disable coalescing on the port while it is stopped. */
497 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
498 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
499 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
500 ap->ap_sc->sc_ccc_ports_cur);
504 /* Turn off ST (and FRE) */
505 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
506 r &= ~AHCI_PREG_CMD_ST;
508 r &= ~AHCI_PREG_CMD_FRE;
509 ahci_pwrite(ap, AHCI_PREG_CMD, r);
511 /* Wait for CR to go off */
512 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR))
515 /* Wait for FR to go off */
516 if (stop_fis_rx && ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR))
523 * AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ}
526 ahci_port_clo(struct ahci_port *ap)
528 struct ahci_softc *sc = ap->ap_sc;
531 /* Only attempt CLO if supported by controller */
532 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
536 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
538 if (cmd & AHCI_PREG_CMD_ST) {
539 kprintf("%s: CLO requested while port running\n",
543 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
545 /* Wait for completion */
546 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
547 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
555 * AHCI soft reset, Section 10.4.1
557 * This function keeps port communications intact and attempts to generate
558 * a reset to the connected device.
561 ahci_port_softreset(struct ahci_port *ap)
563 struct ahci_ccb *ccb = NULL;
564 struct ahci_cmd_hdr *cmd_slot;
569 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
573 /* Save previous command register state */
574 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
577 if (ahci_port_stop(ap, 0)) {
578 kprintf("%s: failed to stop port, cannot softreset\n",
583 /* Request CLO if device appears hung */
584 if (ahci_pread(ap, AHCI_PREG_TFD) &
585 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
589 /* Clear port errors to permit TFD transfer */
590 ahci_pwrite(ap, AHCI_PREG_SERR, ahci_pread(ap, AHCI_PREG_SERR));
593 if (ahci_port_start(ap, 0)) {
594 kprintf("%s: failed to start port, cannot softreset\n",
599 /* Check whether CLO worked */
600 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
601 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
602 kprintf("%s: CLO %s, need port reset\n",
604 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
605 ? "failed" : "unsupported");
610 /* Prep first D2H command with SRST feature & clear busy/reset flags */
611 ccb = ahci_get_err_ccb(ap);
612 cmd_slot = ccb->ccb_cmd_hdr;
613 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
615 fis = ccb->ccb_cmd_table->cfis;
616 fis[0] = 0x27; /* Host to device */
617 fis[15] = 0x04; /* SRST DEVCTL */
620 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
621 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
622 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
623 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W); /* Write */
625 ccb->ccb_xa.state = ATA_S_PENDING;
626 if (ahci_poll(ccb, hz, NULL) != 0)
629 /* Prep second D2H command to read status and complete reset sequence */
630 fis[0] = 0x27; /* Host to device */
634 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
635 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
637 ccb->ccb_xa.state = ATA_S_PENDING;
638 if (ahci_poll(ccb, hz, NULL) != 0)
641 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, AHCI_PREG_TFD_STS_BSY |
642 AHCI_PREG_TFD_STS_DRQ | AHCI_PREG_TFD_STS_ERR)) {
643 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
645 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
651 * If the softreset is trying to clear a BSY condition after a
652 * normal portreset we assign the port type.
654 * If the softreset is being run first as part of the ccb error
655 * processing code then report if the device signature changed
658 if (ap->ap_ata.ap_type == ATA_PORT_T_NONE) {
659 ap->ap_ata.ap_type = ahci_port_signature_detect(ap);
661 if (ahci_port_signature_detect(ap) != ap->ap_ata.ap_type) {
662 kprintf("%s: device signature unexpectedly changed\n",
671 /* Abort our command, if it failed, by stopping command DMA. */
672 if (rc != 0 && (ap->ap_active & (1 << ccb->ccb_slot))) {
673 kprintf("%s: stopping the port, softreset slot "
674 "%d was still active.\n",
677 ahci_port_stop(ap, 0);
679 ccb->ccb_xa.state = ATA_S_ERROR;
680 ahci_put_err_ccb(ccb);
683 /* Restore saved CMD register state */
684 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
692 * AHCI port reset, Section 10.4.2
694 * This function does a hard reset of the port. Note that the device
695 * connected to the port could still end-up hung.
698 ahci_port_portreset(struct ahci_port *ap)
703 DPRINTF(AHCI_D_VERBOSE, "%s: port reset\n", PORTNAME(ap));
705 /* Save previous command register state */
706 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
708 /* Clear ST, ignoring failure */
709 ahci_port_stop(ap, 0);
711 /* Perform device detection */
712 ap->ap_ata.ap_type = ATA_PORT_T_NONE;
713 ahci_pwrite(ap, AHCI_PREG_SCTL, 0);
715 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
717 if (AhciForceGen1 & (1 << ap->ap_num)) {
718 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
719 r |= AHCI_PREG_SCTL_SPD_GEN1;
721 r |= AHCI_PREG_SCTL_SPD_ANY;
723 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
724 DELAY(10000); /* wait at least 1ms for COMRESET to be sent */
725 r &= ~AHCI_PREG_SCTL_DET_INIT;
726 r |= AHCI_PREG_SCTL_DET_NONE;
727 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
730 /* Wait for device to be detected and communications established */
731 if (ahci_pwait_eq(ap, AHCI_PREG_SSTS, AHCI_PREG_SSTS_DET,
732 AHCI_PREG_SSTS_DET_DEV)) {
737 /* Clear SERR (incl X bit), so TFD can update */
738 ahci_pwrite(ap, AHCI_PREG_SERR, ahci_pread(ap, AHCI_PREG_SERR));
740 /* Wait for device to become ready */
741 /* XXX maybe more than the default wait is appropriate here? */
742 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, AHCI_PREG_TFD_STS_BSY |
743 AHCI_PREG_TFD_STS_DRQ | AHCI_PREG_TFD_STS_ERR)) {
745 kprintf("%s: Device will not come ready 0x%b\n",
747 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
751 ap->ap_ata.ap_type = ahci_port_signature_detect(ap);
754 /* Restore preserved port state */
755 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
761 * Figure out what type of device is connected to the port, ATAPI or
765 ahci_port_signature_detect(struct ahci_port *ap)
769 sig = ahci_pread(ap, AHCI_PREG_SIG);
770 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
771 return(ATA_PORT_T_ATAPI);
773 return(ATA_PORT_T_DISK);
778 * Load the DMA descriptor table for a CCB's buffer.
781 ahci_load_prdt(struct ahci_ccb *ccb)
783 struct ahci_port *ap = ccb->ccb_port;
784 struct ahci_softc *sc = ap->ap_sc;
785 struct ata_xfer *xa = &ccb->ccb_xa;
786 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
787 bus_dmamap_t dmap = ccb->ccb_dmamap;
788 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
791 if (xa->datalen == 0) {
792 ccb->ccb_cmd_hdr->prdtl = 0;
796 error = bus_dmamap_load(sc->sc_tag_data, dmap,
797 xa->data, xa->datalen,
798 ahci_load_prdt_callback,
800 ((xa->flags & ATA_F_NOWAIT) ?
801 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
803 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
806 if (xa->flags & ATA_F_PIO)
807 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
809 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
811 bus_dmamap_sync(sc->sc_tag_data, dmap,
812 (xa->flags & ATA_F_READ) ?
813 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
819 bus_dmamap_unload(sc->sc_tag_data, dmap);
825 * Callback from BUSDMA system to load the segment list. The passed segment
826 * list is a temporary structure.
830 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
833 struct ahci_prdt *prd = *(void **)info;
836 KKASSERT(nsegs <= AHCI_MAX_PRDT);
839 addr = segs->ds_addr;
840 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
841 prd->dba_lo = htole32((u_int32_t)addr);
843 KKASSERT((addr & 1) == 0);
844 KKASSERT((segs->ds_len & 1) == 0);
846 prd->flags = htole32(segs->ds_len - 1);
852 *(void **)info = prd; /* return last valid segment */
856 ahci_unload_prdt(struct ahci_ccb *ccb)
858 struct ahci_port *ap = ccb->ccb_port;
859 struct ahci_softc *sc = ap->ap_sc;
860 struct ata_xfer *xa = &ccb->ccb_xa;
861 bus_dmamap_t dmap = ccb->ccb_dmamap;
863 if (xa->datalen != 0) {
864 bus_dmamap_sync(sc->sc_tag_data, dmap,
865 (xa->flags & ATA_F_READ) ?
866 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
868 bus_dmamap_unload(sc->sc_tag_data, dmap);
870 if (ccb->ccb_xa.flags & ATA_F_NCQ)
873 xa->resid = xa->datalen -
874 le32toh(ccb->ccb_cmd_hdr->prdbc);
879 ahci_poll(struct ahci_ccb *ccb, int timeout, void (*timeout_fn)(void *))
881 struct ahci_port *ap = ccb->ccb_port;
886 if (ahci_port_intr(ap, AHCI_PREG_CI_ALL_SLOTS) &
887 (1 << ccb->ccb_slot)) {
892 } while (--timeout > 0);
893 kprintf("timeout ccb state %d\n", ccb->ccb_xa.state);
895 if (timeout_fn != NULL)
903 ahci_start(struct ahci_ccb *ccb)
905 struct ahci_port *ap = ccb->ccb_port;
906 struct ahci_softc *sc = ap->ap_sc;
908 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
910 /* Zero transferred byte count before transfer */
911 ccb->ccb_cmd_hdr->prdbc = 0;
913 /* Sync command list entry and corresponding command table entry */
914 bus_dmamap_sync(sc->sc_tag_cmdh,
915 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
916 BUS_DMASYNC_PREWRITE);
917 bus_dmamap_sync(sc->sc_tag_cmdt,
918 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
919 BUS_DMASYNC_PREWRITE);
921 /* Prepare RFIS area for write by controller */
922 bus_dmamap_sync(sc->sc_tag_rfis,
923 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
924 BUS_DMASYNC_PREREAD);
926 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
927 /* Issue NCQ commands only when there are no outstanding
928 * standard commands. */
929 if (ap->ap_active != 0 || !TAILQ_EMPTY(&ap->ap_ccb_pending))
930 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
932 KKASSERT(ap->ap_active_cnt == 0);
933 ap->ap_sactive |= (1 << ccb->ccb_slot);
934 ccb->ccb_xa.state = ATA_S_ONCHIP;
935 ahci_pwrite(ap, AHCI_PREG_SACT, 1 << ccb->ccb_slot);
936 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
939 /* Wait for all NCQ commands to finish before issuing standard
941 if (ap->ap_sactive != 0 || ap->ap_active_cnt == 2)
942 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
943 else if (ap->ap_active_cnt < 2) {
944 ap->ap_active |= 1 << ccb->ccb_slot;
945 ccb->ccb_xa.state = ATA_S_ONCHIP;
946 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
953 ahci_issue_pending_ncq_commands(struct ahci_port *ap)
955 struct ahci_ccb *nextccb;
956 u_int32_t sact_change = 0;
958 KKASSERT(ap->ap_active_cnt == 0);
960 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
961 if (nextccb == NULL || !(nextccb->ccb_xa.flags & ATA_F_NCQ))
964 /* Start all the NCQ commands at the head of the pending list. */
966 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
967 sact_change |= 1 << nextccb->ccb_slot;
968 nextccb->ccb_xa.state = ATA_S_ONCHIP;
969 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
970 } while (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ));
972 ap->ap_sactive |= sact_change;
973 ahci_pwrite(ap, AHCI_PREG_SACT, sact_change);
974 ahci_pwrite(ap, AHCI_PREG_CI, sact_change);
980 ahci_issue_pending_commands(struct ahci_port *ap, int last_was_ncq)
982 struct ahci_ccb *nextccb;
984 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
985 if (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ)) {
986 KKASSERT(last_was_ncq == 0); /* otherwise it should have
987 * been started already. */
989 /* Issue NCQ commands only when there are no outstanding
990 * standard commands. */
992 if (ap->ap_active == 0)
993 ahci_issue_pending_ncq_commands(ap);
995 KKASSERT(ap->ap_active_cnt == 1);
996 } else if (nextccb) {
997 if (ap->ap_sactive != 0 || last_was_ncq)
998 KKASSERT(ap->ap_active_cnt == 0);
1000 /* Wait for all NCQ commands to finish before issuing standard
1002 if (ap->ap_sactive != 0)
1005 /* Keep up to 2 standard commands on-chip at a time. */
1007 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
1008 ap->ap_active |= 1 << nextccb->ccb_slot;
1009 nextccb->ccb_xa.state = ATA_S_ONCHIP;
1010 ahci_pwrite(ap, AHCI_PREG_CI, 1 << nextccb->ccb_slot);
1012 ap->ap_active_cnt++;
1013 if (ap->ap_active_cnt == 2)
1015 KKASSERT(ap->ap_active_cnt == 1);
1016 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
1017 } while (nextccb && !(nextccb->ccb_xa.flags & ATA_F_NCQ));
1018 } else if (!last_was_ncq) {
1019 KKASSERT(ap->ap_active_cnt == 1 || ap->ap_active_cnt == 2);
1021 /* Standard command finished, none waiting to start. */
1022 ap->ap_active_cnt--;
1024 KKASSERT(ap->ap_active_cnt == 0);
1026 /* NCQ command finished. */
1031 ahci_intr(void *arg)
1033 struct ahci_softc *sc = arg;
1034 u_int32_t is, ack = 0;
1037 /* Read global interrupt status */
1038 is = ahci_read(sc, AHCI_REG_IS);
1039 if (is == 0 || is == 0xffffffff)
1043 #ifdef AHCI_COALESCE
1044 /* Check coalescing interrupt first */
1045 if (is & sc->sc_ccc_mask) {
1046 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
1048 is &= ~sc->sc_ccc_mask;
1049 is |= sc->sc_ccc_ports_cur;
1053 /* Process interrupts for each port */
1056 if (sc->sc_ports[port]) {
1057 ahci_port_intr(sc->sc_ports[port],
1058 AHCI_PREG_CI_ALL_SLOTS);
1063 /* Finally, acknowledge global interrupt */
1064 ahci_write(sc, AHCI_REG_IS, ack);
1068 ahci_port_intr(struct ahci_port *ap, u_int32_t ci_mask)
1070 struct ahci_softc *sc = ap->ap_sc;
1071 u_int32_t is, ci_saved, ci_masked, processed = 0;
1072 int slot, need_restart = 0;
1073 struct ahci_ccb *ccb = NULL;
1074 volatile u_int32_t *active;
1079 is = ahci_pread(ap, AHCI_PREG_IS);
1081 /* Ack port interrupt only if checking all command slots. */
1082 if (ci_mask == AHCI_PREG_CI_ALL_SLOTS)
1083 ahci_pwrite(ap, AHCI_PREG_IS, is);
1086 DPRINTF(AHCI_D_INTR, "%s: interrupt: %b\n", PORTNAME(ap),
1089 if (ap->ap_sactive) {
1090 /* Active NCQ commands - use SActive instead of CI */
1091 KKASSERT(ap->ap_active == 0);
1092 KKASSERT(ap->ap_active_cnt == 0);
1093 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
1094 active = &ap->ap_sactive;
1097 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
1098 active = &ap->ap_active;
1101 /* Command failed. See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2. */
1102 if (is & AHCI_PREG_IS_TFES) {
1103 u_int32_t tfd, serr;
1106 tfd = ahci_pread(ap, AHCI_PREG_TFD);
1107 serr = ahci_pread(ap, AHCI_PREG_SERR);
1109 if (ap->ap_sactive == 0) {
1110 /* Errored slot is easy to determine from CMD. */
1111 err_slot = AHCI_PREG_CMD_CCS(ahci_pread(ap,
1113 ccb = &ap->ap_ccbs[err_slot];
1115 /* Preserve received taskfile data from the RFIS. */
1116 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
1117 sizeof(struct ata_fis_d2h));
1119 err_slot = -1; /* Must extract error from log page */
1121 DPRINTF(AHCI_D_VERBOSE, "%s: errored slot %d, TFD: %b, SERR:"
1122 " %b, DIAG: %b\n", PORTNAME(ap), err_slot, tfd,
1123 AHCI_PFMT_TFD_STS, AHCI_PREG_SERR_ERR(serr),
1124 AHCI_PFMT_SERR_ERR, AHCI_PREG_SERR_DIAG(serr),
1125 AHCI_PFMT_SERR_DIAG);
1127 /* Turn off ST to clear CI and SACT. */
1128 ahci_port_stop(ap, 0);
1131 /* Clear SERR to enable capturing new errors. */
1132 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
1134 /* Acknowledge the interrupts we can recover from. */
1135 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_TFES |
1137 is = ahci_pread(ap, AHCI_PREG_IS);
1139 /* If device hasn't cleared its busy status, try to idle it. */
1140 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1141 kprintf("%s: attempting to idle device\n",
1143 if (ahci_port_softreset(ap)) {
1144 kprintf("%s: failed to soft reset device\n",
1146 if (ahci_port_portreset(ap)) {
1147 kprintf("%s: failed to port reset "
1148 "device, give up on it\n",
1154 /* Had to reset device, can't gather extended info. */
1155 } else if (ap->ap_sactive) {
1156 /* Recover the NCQ error from log page 10h. */
1157 ahci_port_read_ncq_error(ap, &err_slot);
1161 DPRINTF(AHCI_D_VERBOSE, "%s: NCQ errored slot %d\n",
1162 PORTNAME(ap), err_slot);
1164 ccb = &ap->ap_ccbs[err_slot];
1166 /* Didn't reset, could gather extended info from log. */
1170 * If we couldn't determine the errored slot, reset the port
1171 * and fail all the active slots.
1173 if (err_slot == -1) {
1174 if (ahci_port_softreset(ap) != 0 &&
1175 ahci_port_portreset(ap) != 0) {
1176 kprintf("%s: couldn't reset after NCQ error, "
1177 "disabling device.\n",
1181 kprintf("%s: couldn't recover NCQ error, failing "
1182 "all outstanding commands.\n",
1187 /* Clear the failed command in saved CI so completion runs. */
1188 ci_saved &= ~(1 << err_slot);
1190 /* Note the error in the ata_xfer. */
1191 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
1192 ccb->ccb_xa.state = ATA_S_ERROR;
1195 /* There may only be one outstanding standard command now. */
1196 if (ap->ap_sactive == 0) {
1199 slot = ffs(tmp) - 1;
1200 tmp &= ~(1 << slot);
1208 * Port change (hot-plug).
1210 * A PCS interrupt will occur on hot-plug once communication is
1213 * A PRCS interrupt will occur on hot-unplug (and possibly also
1216 * We can then check the CPS (Cold Presence State) bit to determine
1217 * if a device is plugged in or not and do the right thing.
1219 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
1220 ahci_pwrite(ap, AHCI_PREG_SERR,
1221 (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X) << 16);
1222 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
1223 case AHCI_PREG_SSTS_DET_DEV:
1224 if (ap->ap_ata.ap_type == ATA_PORT_T_NONE) {
1225 kprintf("%s: HOTPLUG - Device added\n",
1227 if (ahci_port_init(ap) == 0)
1228 ahci_cam_changed(ap, 1);
1232 if (ap->ap_ata.ap_type != ATA_PORT_T_NONE) {
1233 kprintf("%s: HOTPLUG - Device removed\n",
1235 ahci_port_portreset(ap);
1236 ahci_cam_changed(ap, 0);
1242 /* Check for remaining errors - they are fatal. */
1243 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
1244 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
1245 u_int32_t serr = ahci_pread(ap, AHCI_PREG_SERR);
1246 kprintf("%s: unrecoverable errors (IS: %b, SERR: %b %b), "
1247 "disabling port.\n",
1250 AHCI_PREG_SERR_ERR(serr), AHCI_PFMT_SERR_ERR,
1251 AHCI_PREG_SERR_DIAG(serr), AHCI_PFMT_SERR_DIAG
1253 /* XXX try recovery first */
1257 /* Fail all outstanding commands if we know the port won't recover. */
1258 if (ap->ap_state == AP_S_FATAL_ERROR) {
1260 ap->ap_state = AP_S_FATAL_ERROR;
1263 /* Ensure port is shut down. */
1264 ahci_port_stop(ap, 1);
1266 /* Error all the active slots. */
1267 ci_masked = ci_saved & *active;
1269 slot = ffs(ci_masked) - 1;
1270 ccb = &ap->ap_ccbs[slot];
1271 ci_masked &= ~(1 << slot);
1272 ccb->ccb_xa.state = ATA_S_ERROR;
1275 /* Run completion for all active slots. */
1276 ci_saved &= ~*active;
1279 * Don't restart the port if our problems were deemed fatal.
1281 * Also acknowlege all fatal interrupt sources to prevent
1284 if (ap->ap_state == AP_S_FATAL_ERROR) {
1286 ahci_pwrite(ap, AHCI_PREG_IS,
1287 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
1288 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
1294 * CCB completion is detected by noticing its slot's bit in CI has
1295 * changed to zero some time after we activated it.
1296 * If we are polling, we may only be interested in particular slot(s).
1298 ci_masked = ~ci_saved & *active & ci_mask;
1300 slot = ffs(ci_masked) - 1;
1301 ccb = &ap->ap_ccbs[slot];
1302 ci_masked &= ~(1 << slot);
1304 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
1305 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
1308 bus_dmamap_sync(sc->sc_tag_cmdh,
1309 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
1310 BUS_DMASYNC_POSTWRITE);
1312 bus_dmamap_sync(sc->sc_tag_cmdt,
1313 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
1314 BUS_DMASYNC_POSTWRITE);
1316 bus_dmamap_sync(sc->sc_tag_rfis,
1317 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
1318 BUS_DMASYNC_POSTREAD);
1320 *active &= ~(1 << ccb->ccb_slot);
1323 processed |= 1 << ccb->ccb_slot;
1327 /* Restart command DMA on the port */
1328 ahci_port_start(ap, 0);
1330 /* Re-enable outstanding commands on port. */
1335 slot = ffs(tmp) - 1;
1336 tmp &= ~(1 << slot);
1337 ccb = &ap->ap_ccbs[slot];
1338 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
1339 KKASSERT((!!(ccb->ccb_xa.flags & ATA_F_NCQ)) ==
1340 (!!ap->ap_sactive));
1343 DPRINTF(AHCI_D_VERBOSE, "%s: ahci_port_intr "
1344 "re-enabling%s slots %08x\n", PORTNAME(ap),
1345 ap->ap_sactive ? " NCQ" : "", ci_saved);
1348 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
1349 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
1357 ahci_get_ccb(struct ahci_port *ap)
1359 struct ahci_ccb *ccb;
1361 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
1362 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
1364 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
1365 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
1366 ccb->ccb_xa.state = ATA_S_SETUP;
1368 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
1374 ahci_put_ccb(struct ahci_ccb *ccb)
1376 struct ahci_port *ap = ccb->ccb_port;
1379 if (ccb->ccb_xa.state != ATA_S_COMPLETE &&
1380 ccb->ccb_xa.state != ATA_S_TIMEOUT &&
1381 ccb->ccb_xa.state != ATA_S_ERROR) {
1382 kprintf("%s: invalid ata_xfer state %02x in ahci_put_ccb, "
1384 PORTNAME(ccb->ccb_port), ccb->ccb_xa.state,
1389 ccb->ccb_xa.state = ATA_S_PUT;
1390 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
1391 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
1392 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
1396 ahci_get_err_ccb(struct ahci_port *ap)
1398 struct ahci_ccb *err_ccb;
1401 /* No commands may be active on the chip. */
1402 sact = ahci_pread(ap, AHCI_PREG_SACT);
1404 kprintf("ahci_get_err_ccb but SACT %08x != 0?\n", sact);
1405 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
1408 KKASSERT(ap->ap_err_busy == 0);
1409 ap->ap_err_busy = 1;
1411 /* Save outstanding command state. */
1412 ap->ap_err_saved_active = ap->ap_active;
1413 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
1414 ap->ap_err_saved_sactive = ap->ap_sactive;
1417 * Pretend we have no commands outstanding, so that completions won't
1420 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
1423 * Grab a CCB to use for error recovery. This should never fail, as
1424 * we ask atascsi to reserve one for us at init time.
1426 err_ccb = ahci_get_ccb(ap);
1427 KKASSERT(err_ccb != NULL);
1428 err_ccb->ccb_xa.flags = 0;
1429 err_ccb->ccb_done = ahci_empty_done;
1435 ahci_put_err_ccb(struct ahci_ccb *ccb)
1437 struct ahci_port *ap = ccb->ccb_port;
1441 KKASSERT(ap->ap_err_busy);
1443 /* No commands may be active on the chip */
1444 sact = ahci_pread(ap, AHCI_PREG_SACT);
1446 kprintf("ahci_port_err_ccb_restore but SACT %08x != 0?\n",
1449 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
1451 /* Done with the CCB */
1454 /* Restore outstanding command state */
1455 ap->ap_sactive = ap->ap_err_saved_sactive;
1456 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
1457 ap->ap_active = ap->ap_err_saved_active;
1460 ap->ap_err_busy = 0;
1465 ahci_port_read_ncq_error(struct ahci_port *ap, int *err_slotp)
1467 struct ahci_ccb *ccb;
1468 struct ahci_cmd_hdr *cmd_slot;
1470 struct ata_fis_h2d *fis;
1473 DPRINTF(AHCI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap));
1475 /* Save command register state. */
1476 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1478 /* Port should have been idled already. Start it. */
1479 KKASSERT((cmd & AHCI_PREG_CMD_CR) == 0);
1480 ahci_port_start(ap, 0);
1482 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */
1483 ccb = ahci_get_err_ccb(ap);
1484 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL;
1485 ccb->ccb_xa.data = ap->ap_err_scratch;
1486 ccb->ccb_xa.datalen = 512;
1487 cmd_slot = ccb->ccb_cmd_hdr;
1488 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
1490 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
1491 fis->type = ATA_FIS_TYPE_H2D;
1492 fis->flags = ATA_H2D_FLAGS_CMD;
1493 fis->command = ATA_C_READ_LOG_EXT;
1494 fis->lba_low = 0x10; /* queued error log page (10h) */
1495 fis->sector_count = 1; /* number of sectors (1) */
1496 fis->sector_count_exp = 0;
1497 fis->lba_mid = 0; /* starting offset */
1498 fis->lba_mid_exp = 0;
1501 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1503 if (ahci_load_prdt(ccb) != 0) {
1504 rc = ENOMEM; /* XXX caller must abort all commands */
1508 ccb->ccb_xa.state = ATA_S_PENDING;
1509 if (ahci_poll(ccb, hz, NULL) != 0)
1514 /* Abort our command, if it failed, by stopping command DMA. */
1515 if (rc != 0 && (ap->ap_active & (1 << ccb->ccb_slot))) {
1516 kprintf("%s: log page read failed, slot %d was still active.\n",
1517 PORTNAME(ap), ccb->ccb_slot);
1518 ahci_port_stop(ap, 0);
1521 /* Done with the error CCB now. */
1522 ahci_unload_prdt(ccb);
1523 ahci_put_err_ccb(ccb);
1525 /* Extract failed register set and tags from the scratch space. */
1527 struct ata_log_page_10h *log;
1530 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
1531 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
1532 /* Not queued bit was set - wasn't an NCQ error? */
1533 kprintf("%s: read NCQ error page, but not an NCQ "
1538 /* Copy back the log record as a D2H register FIS. */
1539 *err_slotp = err_slot = log->err_regs.type &
1540 ATA_LOG_10H_TYPE_TAG_MASK;
1542 ccb = &ap->ap_ccbs[err_slot];
1543 memcpy(&ccb->ccb_xa.rfis, &log->err_regs,
1544 sizeof(struct ata_fis_d2h));
1545 ccb->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
1546 ccb->ccb_xa.rfis.flags = 0;
1550 /* Restore saved CMD register state */
1551 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1557 * Allocate memory for various structures DMAd by hardware. The maximum
1558 * number of segments for these tags is 1 so the DMA memory will have a
1559 * single physical base address.
1561 struct ahci_dmamem *
1562 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
1564 struct ahci_dmamem *adm;
1567 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
1569 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
1570 BUS_DMA_ZERO, &adm->adm_map);
1573 error = bus_dmamap_load(tag, adm->adm_map,
1575 bus_dma_tag_getmaxsize(tag),
1576 ahci_dmamem_saveseg, &adm->adm_busaddr,
1581 bus_dmamap_destroy(tag, adm->adm_map);
1582 adm->adm_map = NULL;
1583 adm->adm_tag = NULL;
1584 adm->adm_kva = NULL;
1586 kfree(adm, M_DEVBUF);
1594 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
1596 KKASSERT(error == 0);
1597 KKASSERT(nsegs == 1);
1598 *(bus_addr_t *)info = segs->ds_addr;
1603 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
1606 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
1607 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
1608 adm->adm_map = NULL;
1609 adm->adm_tag = NULL;
1610 adm->adm_kva = NULL;
1612 kfree(adm, M_DEVBUF);
1616 ahci_read(struct ahci_softc *sc, bus_size_t r)
1618 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1619 BUS_SPACE_BARRIER_READ);
1620 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
1624 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
1626 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
1627 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1628 BUS_SPACE_BARRIER_WRITE);
1632 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
1637 for (i = 0; i < 1000; i++) {
1638 if ((ahci_read(sc, r) & mask) != target)
1647 ahci_pread(struct ahci_port *ap, bus_size_t r)
1649 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
1650 BUS_SPACE_BARRIER_READ);
1651 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
1655 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
1657 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
1658 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
1659 BUS_SPACE_BARRIER_WRITE);
1663 ahci_pwait_eq(struct ahci_port *ap, bus_size_t r, u_int32_t mask,
1668 for (i = 0; i < 1000; i++) {
1669 if ((ahci_pread(ap, r) & mask) == target)
1678 ahci_ata_get_xfer(struct ahci_port *ap)
1680 /*struct ahci_softc *sc = ap->ap_sc;*/
1681 struct ahci_ccb *ccb;
1683 ccb = ahci_get_ccb(ap);
1685 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
1690 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
1691 PORTNAME(ap), ccb->ccb_slot);
1693 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
1695 return (&ccb->ccb_xa);
1699 ahci_ata_put_xfer(struct ata_xfer *xa)
1701 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
1703 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
1709 ahci_ata_cmd(struct ata_xfer *xa)
1711 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
1712 struct ahci_cmd_hdr *cmd_slot;
1714 KKASSERT(xa->state == ATA_S_SETUP);
1717 kprintf("ahci_ata_cmd xa->flags %08x type %08x cmd=%08x\n",
1723 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
1726 ccb->ccb_done = ahci_ata_cmd_done;
1728 cmd_slot = ccb->ccb_cmd_hdr;
1729 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
1731 if (xa->flags & ATA_F_WRITE)
1732 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
1734 if (xa->flags & ATA_F_PACKET)
1735 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
1737 if (ahci_load_prdt(ccb) != 0)
1740 xa->state = ATA_S_PENDING;
1742 if (xa->flags & ATA_F_POLL) {
1743 ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout);
1744 return (ATA_COMPLETE);
1748 xa->flags |= ATA_F_TIMEOUT_RUNNING;
1749 callout_reset(&ccb->ccb_timeout, xa->timeout,
1750 ahci_ata_cmd_timeout_unserialized, ccb);
1753 return (ATA_QUEUED);
1757 xa->state = ATA_S_ERROR;
1764 ahci_ata_cmd_done(struct ahci_ccb *ccb)
1766 struct ata_xfer *xa = &ccb->ccb_xa;
1768 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
1769 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
1770 callout_stop(&ccb->ccb_timeout);
1773 if (xa->state == ATA_S_ONCHIP || xa->state == ATA_S_ERROR)
1774 ahci_issue_pending_commands(ccb->ccb_port,
1775 xa->flags & ATA_F_NCQ);
1777 ahci_unload_prdt(ccb);
1779 if (xa->state == ATA_S_ONCHIP)
1780 xa->state = ATA_S_COMPLETE;
1782 else if (xa->state != ATA_S_ERROR && xa->state != ATA_S_TIMEOUT)
1783 kprintf("%s: invalid ata_xfer state %02x in ahci_ata_cmd_done, "
1785 PORTNAME(ccb->ccb_port), xa->state, ccb->ccb_slot);
1787 if (xa->state != ATA_S_TIMEOUT)
1792 ahci_ata_cmd_timeout_unserialized(void *arg)
1794 struct ahci_ccb *ccb = arg;
1795 struct ahci_port *ap = ccb->ccb_port;
1797 lwkt_serialize_enter(&ap->ap_sc->sc_serializer);
1798 ahci_ata_cmd_timeout(arg);
1799 lwkt_serialize_exit(&ap->ap_sc->sc_serializer);
1803 ahci_ata_cmd_timeout(void *arg)
1805 struct ahci_ccb *ccb = arg;
1806 struct ata_xfer *xa = &ccb->ccb_xa;
1807 struct ahci_port *ap = ccb->ccb_port;
1808 volatile u_int32_t *active;
1809 int ccb_was_started, ncq_cmd;
1812 kprintf("CMD TIMEOUT port-cmd-reg 0x%b\n"
1813 "\tactive=%08x sactive=%08x\n"
1814 "\t sact=%08x ci=%08x\n",
1815 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
1816 ap->ap_active, ap->ap_sactive,
1817 ahci_pread(ap, AHCI_PREG_SACT),
1818 ahci_pread(ap, AHCI_PREG_CI));
1820 KKASSERT(xa->flags & ATA_F_TIMEOUT_RUNNING);
1821 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
1822 ncq_cmd = (xa->flags & ATA_F_NCQ);
1823 active = ncq_cmd ? &ap->ap_sactive : &ap->ap_active;
1825 if (ccb->ccb_xa.state == ATA_S_PENDING) {
1826 DPRINTF(AHCI_D_TIMEOUT, "%s: command for slot %d timed out "
1827 "before it got on chip\n", PORTNAME(ap), ccb->ccb_slot);
1828 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1829 ccb_was_started = 0;
1830 } else if (ccb->ccb_xa.state == ATA_S_ONCHIP && ahci_port_intr(ap,
1831 1 << ccb->ccb_slot)) {
1832 DPRINTF(AHCI_D_TIMEOUT, "%s: final poll of port completed "
1833 "command in slot %d\n", PORTNAME(ap), ccb->ccb_slot);
1835 } else if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
1836 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d already "
1837 "handled%s\n", PORTNAME(ap), ccb->ccb_slot,
1838 (*active & (1 << ccb->ccb_slot)) ?
1839 " but slot is still active?" : ".");
1841 } else if ((ahci_pread(ap, ncq_cmd ? AHCI_PREG_SACT : AHCI_PREG_CI) &
1842 (1 << ccb->ccb_slot)) == 0 &&
1843 (*active & (1 << ccb->ccb_slot))) {
1844 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d completed but "
1845 "IRQ handler didn't detect it. Why?\n", PORTNAME(ap),
1847 *active &= ~(1 << ccb->ccb_slot);
1851 ccb_was_started = 1;
1854 /* Complete the slot with a timeout error. */
1855 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1856 *active &= ~(1 << ccb->ccb_slot);
1857 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (1)\n", PORTNAME(ap));
1858 ccb->ccb_done(ccb); /* This won't issue pending commands or run the
1859 atascsi completion. */
1861 /* Reset port to abort running command. */
1862 if (ccb_was_started) {
1863 DPRINTF(AHCI_D_TIMEOUT, "%s: resetting port to abort%s command "
1864 "in slot %d, active %08x\n", PORTNAME(ap), ncq_cmd ? " NCQ"
1865 : "", ccb->ccb_slot, *active);
1866 if (ahci_port_softreset(ap) != 0 && ahci_port_portreset(ap)
1868 kprintf("%s: failed to reset port during timeout "
1869 "handling, disabling it\n",
1871 ap->ap_state = AP_S_FATAL_ERROR;
1874 /* Restart any other commands that were aborted by the reset. */
1876 DPRINTF(AHCI_D_TIMEOUT, "%s: re-enabling%s slots "
1877 "%08x\n", PORTNAME(ap), ncq_cmd ? " NCQ" : "",
1880 ahci_pwrite(ap, AHCI_PREG_SACT, *active);
1881 ahci_pwrite(ap, AHCI_PREG_CI, *active);
1885 /* Issue any pending commands now. */
1886 DPRINTF(AHCI_D_TIMEOUT, "%s: issue pending\n", PORTNAME(ap));
1887 if (ccb_was_started)
1888 ahci_issue_pending_commands(ap, ncq_cmd);
1889 else if (ap->ap_active == 0)
1890 ahci_issue_pending_ncq_commands(ap);
1892 /* Complete the timed out ata_xfer I/O (may generate new I/O). */
1893 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (2)\n", PORTNAME(ap));
1896 DPRINTF(AHCI_D_TIMEOUT, "%s: splx\n", PORTNAME(ap));
1902 ahci_empty_done(struct ahci_ccb *ccb)
1904 ccb->ccb_xa.state = ATA_S_COMPLETE;