2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
30 #include <sys/cdefs.h>
33 * Driver for the Atheros Wireless LAN controller.
35 * This software is derived from work of Atsushi Onoe; his contribution
36 * is greatly appreciated.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sysctl.h>
47 #include <sys/malloc.h>
49 #include <sys/mutex.h>
50 #include <sys/kernel.h>
51 #include <sys/socket.h>
52 #include <sys/sockio.h>
53 #include <sys/errno.h>
54 #include <sys/callout.h>
56 #include <sys/endian.h>
57 #include <sys/kthread.h>
58 #include <sys/taskqueue.h>
61 #include <machine/bus.h>
64 #include <net/if_var.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_types.h>
68 #include <net/if_arp.h>
69 #include <net/ethernet.h>
70 #include <net/if_llc.h>
72 #include <net80211/ieee80211_var.h>
73 #include <net80211/ieee80211_regdomain.h>
74 #ifdef IEEE80211_SUPPORT_SUPERG
75 #include <net80211/ieee80211_superg.h>
77 #ifdef IEEE80211_SUPPORT_TDMA
78 #include <net80211/ieee80211_tdma.h>
84 #include <netinet/in.h>
85 #include <netinet/if_ether.h>
88 #include <dev/ath/if_athvar.h>
89 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
90 #include <dev/ath/ath_hal/ah_diagcodes.h>
92 #include <dev/ath/if_ath_debug.h>
93 #include <dev/ath/if_ath_led.h>
94 #include <dev/ath/if_ath_misc.h>
95 #include <dev/ath/if_ath_tx.h>
96 #include <dev/ath/if_ath_sysctl.h>
99 #include <dev/ath/ath_tx99/ath_tx99.h>
103 #include <dev/ath/if_ath_alq.h>
107 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS)
109 struct ath_softc *sc = arg1;
110 u_int slottime = ath_hal_getslottime(sc->sc_ah);
113 error = sysctl_handle_int(oidp, &slottime, 0, req);
114 if (error || !req->newptr)
116 return !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0;
120 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS)
122 struct ath_softc *sc = arg1;
123 u_int acktimeout = ath_hal_getacktimeout(sc->sc_ah);
126 error = sysctl_handle_int(oidp, &acktimeout, 0, req);
127 if (error || !req->newptr)
129 return !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0;
133 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS)
135 struct ath_softc *sc = arg1;
136 u_int ctstimeout = ath_hal_getctstimeout(sc->sc_ah);
139 error = sysctl_handle_int(oidp, &ctstimeout, 0, req);
140 if (error || !req->newptr)
142 return !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0;
146 ath_sysctl_softled(SYSCTL_HANDLER_ARGS)
148 struct ath_softc *sc = arg1;
149 int softled = sc->sc_softled;
152 error = sysctl_handle_int(oidp, &softled, 0, req);
153 if (error || !req->newptr)
155 softled = (softled != 0);
156 if (softled != sc->sc_softled) {
158 /* NB: handle any sc_ledpin change */
161 sc->sc_softled = softled;
167 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS)
169 struct ath_softc *sc = arg1;
170 int ledpin = sc->sc_ledpin;
173 error = sysctl_handle_int(oidp, &ledpin, 0, req);
174 if (error || !req->newptr)
176 if (ledpin != sc->sc_ledpin) {
177 sc->sc_ledpin = ledpin;
178 if (sc->sc_softled) {
186 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS)
188 struct ath_softc *sc = arg1;
189 int hardled = sc->sc_hardled;
192 error = sysctl_handle_int(oidp, &hardled, 0, req);
193 if (error || !req->newptr)
195 hardled = (hardled != 0);
196 if (hardled != sc->sc_hardled) {
198 /* NB: handle any sc_ledpin change */
201 sc->sc_hardled = hardled;
207 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS)
209 struct ath_softc *sc = arg1;
210 u_int txantenna = ath_hal_getantennaswitch(sc->sc_ah);
213 error = sysctl_handle_int(oidp, &txantenna, 0, req);
214 if (!error && req->newptr) {
215 /* XXX assumes 2 antenna ports */
216 if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B)
218 ath_hal_setantennaswitch(sc->sc_ah, txantenna);
220 * NB: with the switch locked this isn't meaningful,
221 * but set it anyway so things like radiotap get
222 * consistent info in their data.
224 sc->sc_txantenna = txantenna;
230 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS)
232 struct ath_softc *sc = arg1;
233 u_int defantenna = ath_hal_getdefantenna(sc->sc_ah);
236 error = sysctl_handle_int(oidp, &defantenna, 0, req);
237 if (!error && req->newptr)
238 ath_hal_setdefantenna(sc->sc_ah, defantenna);
243 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS)
245 struct ath_softc *sc = arg1;
246 u_int diversity = ath_hal_getdiversity(sc->sc_ah);
249 error = sysctl_handle_int(oidp, &diversity, 0, req);
250 if (error || !req->newptr)
252 if (!ath_hal_setdiversity(sc->sc_ah, diversity))
254 sc->sc_diversity = diversity;
259 ath_sysctl_diag(SYSCTL_HANDLER_ARGS)
261 struct ath_softc *sc = arg1;
265 if (!ath_hal_getdiag(sc->sc_ah, &diag))
267 error = sysctl_handle_int(oidp, &diag, 0, req);
268 if (error || !req->newptr)
270 return !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0;
274 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS)
276 struct ath_softc *sc = arg1;
277 struct ifnet *ifp = sc->sc_ifp;
281 (void) ath_hal_gettpscale(sc->sc_ah, &scale);
282 error = sysctl_handle_int(oidp, &scale, 0, req);
283 if (error || !req->newptr)
285 return !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL :
286 (ifp->if_drv_flags & IFF_DRV_RUNNING) ?
287 ath_reset(ifp, ATH_RESET_NOLOSS) : 0;
291 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS)
293 struct ath_softc *sc = arg1;
294 u_int tpc = ath_hal_gettpc(sc->sc_ah);
297 error = sysctl_handle_int(oidp, &tpc, 0, req);
298 if (error || !req->newptr)
300 return !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0;
304 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS)
306 struct ath_softc *sc = arg1;
307 struct ifnet *ifp = sc->sc_ifp;
308 struct ath_hal *ah = sc->sc_ah;
309 u_int rfkill = ath_hal_getrfkill(ah);
312 error = sysctl_handle_int(oidp, &rfkill, 0, req);
313 if (error || !req->newptr)
315 if (rfkill == ath_hal_getrfkill(ah)) /* unchanged */
317 if (!ath_hal_setrfkill(ah, rfkill))
319 return (ifp->if_drv_flags & IFF_DRV_RUNNING) ?
320 ath_reset(ifp, ATH_RESET_FULL) : 0;
324 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS)
326 struct ath_softc *sc = arg1;
331 error = sysctl_handle_int(oidp, ¶m, 0, req);
332 if (error || !req->newptr)
338 printf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf);
339 printf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf);
341 printf("aggr single packet: %d\n",
342 sc->sc_aggr_stats.aggr_single_pkt);
343 printf("aggr single packet w/ BAW closed: %d\n",
344 sc->sc_aggr_stats.aggr_baw_closed_single_pkt);
345 printf("aggr non-baw packet: %d\n",
346 sc->sc_aggr_stats.aggr_nonbaw_pkt);
347 printf("aggr aggregate packet: %d\n",
348 sc->sc_aggr_stats.aggr_aggr_pkt);
349 printf("aggr single packet low hwq: %d\n",
350 sc->sc_aggr_stats.aggr_low_hwq_single_pkt);
351 printf("aggr single packet RTS aggr limited: %d\n",
352 sc->sc_aggr_stats.aggr_rts_aggr_limited);
353 printf("aggr sched, no work: %d\n",
354 sc->sc_aggr_stats.aggr_sched_nopkt);
355 for (i = 0; i < 64; i++) {
356 printf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]);
362 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
363 if (ATH_TXQ_SETUP(sc, i)) {
364 printf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, "
365 "axq_fifo_depth=%d, holdingbf=%p\n",
367 sc->sc_txq[i].axq_depth,
368 sc->sc_txq[i].axq_aggr_depth,
369 sc->sc_txq[i].axq_fifo_depth,
370 sc->sc_txq[i].axq_holdingbf);
376 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) {
377 if (bf->bf_flags & ATH_BUF_BUSY) {
378 printf("Busy: %d\n", t);
383 ATH_TXBUF_UNLOCK(sc);
384 printf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n",
385 t, i, sc->sc_txbuf_cnt);
389 TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) {
390 if (bf->bf_flags & ATH_BUF_BUSY) {
391 printf("Busy: %d\n", t);
396 ATH_TXBUF_UNLOCK(sc);
397 printf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n",
401 for (i = 0; i < 2; i++) {
402 printf("%d: fifolen: %d/%d; head=%d; tail=%d\n",
404 sc->sc_rxedma[i].m_fifo_depth,
405 sc->sc_rxedma[i].m_fifolen,
406 sc->sc_rxedma[i].m_fifo_head,
407 sc->sc_rxedma[i].m_fifo_tail);
410 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
413 printf("Total RX buffers in free list: %d buffers\n",
421 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS)
423 struct ath_softc *sc = arg1;
427 (void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent);
428 error = sysctl_handle_int(oidp, &rfsilent, 0, req);
429 if (error || !req->newptr)
431 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent))
433 sc->sc_rfsilentpin = rfsilent & 0x1c;
434 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0;
439 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS)
441 struct ath_softc *sc = arg1;
445 (void) ath_hal_gettpack(sc->sc_ah, &tpack);
446 error = sysctl_handle_int(oidp, &tpack, 0, req);
447 if (error || !req->newptr)
449 return !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0;
453 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS)
455 struct ath_softc *sc = arg1;
459 (void) ath_hal_gettpcts(sc->sc_ah, &tpcts);
460 error = sysctl_handle_int(oidp, &tpcts, 0, req);
461 if (error || !req->newptr)
463 return !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0;
467 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)
469 struct ath_softc *sc = arg1;
472 intmit = ath_hal_getintmit(sc->sc_ah);
473 error = sysctl_handle_int(oidp, &intmit, 0, req);
474 if (error || !req->newptr)
477 /* reusing error; 1 here means "good"; 0 means "fail" */
478 error = ath_hal_setintmit(sc->sc_ah, intmit);
483 * Reset the hardware here - disabling ANI in the HAL
484 * doesn't reset ANI related registers, so it'll leave
485 * things in an inconsistent state.
487 if (sc->sc_ifp->if_drv_flags & IFF_DRV_RUNNING)
488 ath_reset(sc->sc_ifp, ATH_RESET_NOLOSS);
493 #ifdef IEEE80211_SUPPORT_TDMA
495 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
497 struct ath_softc *sc = arg1;
500 setcca = sc->sc_setcca;
501 error = sysctl_handle_int(oidp, &setcca, 0, req);
502 if (error || !req->newptr)
504 sc->sc_setcca = (setcca != 0);
507 #endif /* IEEE80211_SUPPORT_TDMA */
510 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS)
512 struct ath_softc *sc = arg1;
516 error = sysctl_handle_int(oidp, &val, 0, req);
517 if (error || !req->newptr)
522 taskqueue_enqueue_fast(sc->sc_tq, &sc->sc_bstucktask);
528 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS)
530 struct ath_softc *sc = arg1;
533 uint32_t mask = 0xffffffff;
536 struct ath_hal *ah = sc->sc_ah;
538 error = sysctl_handle_int(oidp, &val, 0, req);
539 if (error || !req->newptr)
544 /* Do a hang check */
545 if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS,
547 (void *) &sp, &rsize))
549 device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp);
557 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS)
559 struct ath_softc *sc = arg1;
562 enable = (sc->sc_alq.sc_alq_isactive);
564 error = sysctl_handle_int(oidp, &enable, 0, req);
565 if (error || !req->newptr)
568 error = if_ath_alq_start(&sc->sc_alq);
570 error = if_ath_alq_stop(&sc->sc_alq);
575 * Attach the ALQ debugging if required.
578 ath_sysctl_alq_attach(struct ath_softc *sc)
580 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
581 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
582 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
584 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq", CTLFLAG_RD,
585 NULL, "Atheros ALQ logging parameters");
586 child = SYSCTL_CHILDREN(tree);
588 SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename",
589 CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename");
591 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
592 "enable", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
593 ath_sysctl_alq_log, "I", "");
595 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
596 "debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0,
599 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
600 "numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0,
603 #endif /* ATH_DEBUG_ALQ */
606 ath_sysctlattach(struct ath_softc *sc)
608 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
609 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
610 struct ath_hal *ah = sc->sc_ah;
612 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
613 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0,
614 "EEPROM country code");
615 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
616 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0,
617 "EEPROM regdomain code");
619 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
620 "debug", CTLFLAG_RW, &sc->sc_debug,
621 "control debugging printfs");
624 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
625 "ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug,
626 "control debugging KTR");
627 #endif /* ATH_DEBUG_ALQ */
628 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
629 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
630 ath_sysctl_slottime, "I", "802.11 slot time (us)");
631 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
632 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
633 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)");
634 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
635 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
636 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)");
638 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
639 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
640 ath_sysctl_softled, "I", "enable/disable software LED support");
641 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
642 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
643 ath_sysctl_ledpin, "I", "GPIO pin connected to LED");
644 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
645 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0,
646 "setting to turn LED on");
647 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
648 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0,
649 "idle time for inactivity LED (ticks)");
651 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
652 "hardled", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
653 ath_sysctl_hardled, "I", "enable/disable hardware LED support");
654 /* XXX Laziness - configure pins, then flip hardled off/on */
655 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
656 "led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0,
657 "MAC Network LED pin, or -1 to disable");
658 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
659 "led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0,
660 "MAC Power LED pin, or -1 to disable");
662 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
663 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
664 ath_sysctl_txantenna, "I", "antenna switch");
665 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
666 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
667 ath_sysctl_rxantenna, "I", "default/rx antenna");
668 if (ath_hal_hasdiversity(ah))
669 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
670 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
671 ath_sysctl_diversity, "I", "antenna diversity");
672 sc->sc_txintrperiod = ATH_TXINTR_PERIOD;
673 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
674 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0,
675 "tx descriptor batching");
676 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
677 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
678 ath_sysctl_diag, "I", "h/w diagnostic control");
679 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
680 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
681 ath_sysctl_tpscale, "I", "tx power scaling");
682 if (ath_hal_hastpc(ah)) {
683 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
684 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
685 ath_sysctl_tpc, "I", "enable/disable per-packet TPC");
686 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
687 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
688 ath_sysctl_tpack, "I", "tx power for ack frames");
689 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
690 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
691 ath_sysctl_tpcts, "I", "tx power for cts frames");
693 if (ath_hal_hasrfsilent(ah)) {
694 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
695 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
696 ath_sysctl_rfsilent, "I", "h/w RF silent config");
697 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
698 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
699 ath_sysctl_rfkill, "I", "enable/disable RF kill switch");
702 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
703 "txagg", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
704 ath_sysctl_txagg, "I", "");
706 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
707 "forcebstuck", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
708 ath_sysctl_forcebstuck, "I", "");
710 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
711 "hangcheck", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
712 ath_sysctl_hangcheck, "I", "");
714 if (ath_hal_hasintmit(ah)) {
715 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
716 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
717 ath_sysctl_intmit, "I", "interference mitigation");
719 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC;
720 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
721 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0,
722 "mask of error frames to pass when monitoring");
724 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
725 "hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0,
726 "Hardware non-AMPDU queue depth before software-queuing TX frames");
727 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
728 "hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0,
729 "Hardware AMPDU queue depth before software-queuing TX frames");
730 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
731 "tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0,
733 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
734 "tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0,
737 /* Aggregate length twiddles */
738 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
739 "aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0,
740 "Maximum A-MPDU size, or 0 for 'default'");
741 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
742 "rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0,
743 "Maximum A-MPDU size for RTS-protected frames, or '0' "
745 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
746 "delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0,
747 "Enforce a minimum number of delimiters per A-MPDU "
750 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
751 "txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree,
752 0, "Minimum free buffers before adding a data frame"
754 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
755 "txq_mcastq_maxdepth", CTLFLAG_RW,
756 &sc->sc_txq_mcastq_maxdepth, 0,
757 "Maximum buffer depth for multicast/broadcast frames");
758 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
759 "txq_node_maxdepth", CTLFLAG_RW,
760 &sc->sc_txq_node_maxdepth, 0,
761 "Maximum buffer depth for a single node");
764 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
765 "cabq_enable", CTLFLAG_RW,
766 &sc->sc_cabq_enable, 0,
767 "Whether to transmit on the CABQ or not");
770 #ifdef IEEE80211_SUPPORT_TDMA
771 if (ath_hal_macversion(ah) > 0x78) {
772 sc->sc_tdmadbaprep = 2;
773 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
774 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0,
775 "TDMA DBA preparation time");
776 sc->sc_tdmaswbaprep = 10;
777 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
778 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0,
779 "TDMA SWBA preparation time");
780 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
781 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0,
782 "TDMA slot guard time");
783 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
784 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0,
785 "TDMA calculated super frame");
786 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
787 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
788 ath_sysctl_setcca, "I", "enable CCA control");
793 ath_sysctl_alq_attach(sc);
798 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS)
800 struct ath_softc *sc = arg1;
804 error = sysctl_handle_int(oidp, &val, 0, req);
805 if (error || !req->newptr)
808 return 0; /* Not clearing the stats is still valid */
809 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats));
810 memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats));
811 memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats));
818 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent)
820 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
821 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
822 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
826 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err", CTLFLAG_RD, NULL, "Per-code RX PHY Errors");
827 child = SYSCTL_CHILDREN(tree);
828 for (i = 0; i < 64; i++) {
829 snprintf(sn, sizeof(sn), "%d", i);
830 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, "");
835 ath_sysctl_stats_attach_intr(struct ath_softc *sc,
836 struct sysctl_oid_list *parent)
838 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
839 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
840 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
844 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr",
845 CTLFLAG_RD, NULL, "Sync interrupt statistics");
846 child = SYSCTL_CHILDREN(tree);
847 for (i = 0; i < 32; i++) {
848 snprintf(sn, sizeof(sn), "%d", i);
849 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD,
850 &sc->sc_intr_stats.sync_intr[i], 0, "");
855 ath_sysctl_stats_attach(struct ath_softc *sc)
857 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
858 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
859 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
861 /* Create "clear" node */
862 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
863 "clear_stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
864 ath_sysctl_clearstats, "I", "clear stats");
866 /* Create stats node */
867 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
869 child = SYSCTL_CHILDREN(tree);
871 /* This was generated from if_athioctl.h */
873 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD,
874 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog");
875 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD,
876 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts");
877 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD,
878 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts");
879 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD,
880 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts");
881 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD,
882 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts");
883 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD,
884 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts");
885 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD,
886 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts");
887 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD,
888 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts");
889 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD,
890 &sc->sc_stats.ast_mib, 0, "mib interrupts");
891 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD,
892 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced");
893 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD,
894 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface");
895 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD,
896 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted");
897 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD,
898 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc");
899 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD,
900 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer");
901 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD,
902 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed");
903 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD,
904 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node");
905 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD,
906 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf");
907 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD,
908 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster");
909 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD,
910 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster");
911 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD,
912 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame");
913 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD,
914 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs");
915 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD,
916 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries");
917 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD,
918 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun");
919 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD,
920 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered");
921 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD,
922 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)");
923 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD,
924 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)");
925 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD,
926 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate");
927 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD,
928 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked");
929 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD,
930 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled");
931 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD,
932 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled");
933 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD,
934 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble");
935 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD,
936 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate");
937 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD,
938 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection");
939 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD,
940 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting");
941 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD,
942 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension");
943 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD,
944 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf");
945 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD,
946 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs");
947 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD,
948 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun");
949 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD,
950 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC");
951 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD,
952 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun");
953 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD,
954 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption");
955 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD,
956 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure");
957 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD,
958 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err");
959 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD,
960 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short");
961 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD,
962 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large");
963 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD,
964 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface");
965 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD,
966 &sc->sc_stats.ast_rx_mgt, 0, "management frames received");
967 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD,
968 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame");
969 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD,
970 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted");
971 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD,
972 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf");
973 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD,
974 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls");
975 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD,
976 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed");
977 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD,
978 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset");
979 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD,
980 &sc->sc_stats.ast_rate_calls, 0, "rate control checks");
981 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD,
982 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate");
983 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD,
984 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate");
985 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD,
986 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches");
987 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD,
988 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches");
989 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD,
990 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted");
991 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD,
992 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy");
993 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD,
994 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api");
995 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD,
996 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully");
997 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD,
998 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error");
999 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD,
1000 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd");
1001 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD,
1002 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q");
1003 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD,
1004 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit");
1005 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD,
1006 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer");
1007 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD,
1008 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates");
1009 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD,
1010 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers");
1011 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD,
1012 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF");
1013 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD,
1014 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required");
1015 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD,
1016 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down");
1017 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD,
1018 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer");
1019 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD,
1020 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons");
1021 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD,
1022 &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls");
1023 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD,
1024 &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received");
1026 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD,
1027 &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI");
1028 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD,
1029 &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received");
1030 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD,
1031 &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimeter-CRC errors detected");
1032 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD,
1033 &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected");
1034 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD,
1035 &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine");
1036 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD,
1037 &sc->sc_stats.ast_rx_hi_rx_chain, 0, "");
1038 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD,
1039 &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection");
1040 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD,
1041 &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end");
1042 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD,
1043 &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout");
1044 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD,
1045 &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout");
1046 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD,
1047 &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP");
1048 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD,
1049 &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register");
1050 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD,
1051 &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error");
1052 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD,
1053 &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count");
1054 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD,
1055 &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached");
1057 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD,
1058 &sc->sc_stats.ast_tx_data_underrun, 0, "");
1059 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD,
1060 &sc->sc_stats.ast_tx_delim_underrun, 0, "");
1061 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD,
1062 &sc->sc_stats.ast_tx_aggr_failall, 0,
1063 "Number of aggregate TX failures (whole frame)");
1064 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD,
1065 &sc->sc_stats.ast_tx_aggr_ok, 0,
1066 "Number of aggregate TX OK completions (subframe)");
1067 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD,
1068 &sc->sc_stats.ast_tx_aggr_fail, 0,
1069 "Number of aggregate TX failures (subframe)");
1071 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD,
1072 &sc->sc_stats.ast_rx_intr, 0, "RX interrupts");
1073 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD,
1074 &sc->sc_stats.ast_tx_intr, 0, "TX interrupts");
1075 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow",
1076 CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0,
1077 "Number of multicast frames exceeding maximum mcast queue depth");
1078 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD,
1079 &sc->sc_stats.ast_rx_keymiss, 0, "");
1080 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD,
1081 &sc->sc_stats.ast_tx_swfiltered, 0, "");
1082 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc",
1083 CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0,
1084 "Number of STBC frames received");
1086 /* Attach the RX phy error array */
1087 ath_sysctl_stats_attach_rxphyerr(sc, child);
1089 /* Attach the interrupt statistics array */
1090 ath_sysctl_stats_attach_intr(sc, child);
1094 * This doesn't necessarily belong here (because it's HAL related, not
1098 ath_sysctl_hal_attach(struct ath_softc *sc)
1100 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1101 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1102 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
1104 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal", CTLFLAG_RD,
1105 NULL, "Atheros HAL parameters");
1106 child = SYSCTL_CHILDREN(tree);
1108 sc->sc_ah->ah_config.ah_debug = 0;
1109 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW,
1110 &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs");
1112 sc->sc_ah->ah_config.ah_ar5416_biasadj = 0;
1113 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW,
1114 &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0,
1115 "Enable 2GHz AR5416 direction sensitivity bias adjust");
1117 sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2;
1118 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW,
1119 &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0,
1120 "Atheros HAL DMA beacon response time");
1122 sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10;
1123 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW,
1124 &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0,
1125 "Atheros HAL software beacon response time");
1127 sc->sc_ah->ah_config.ah_additional_swba_backoff = 0;
1128 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW,
1129 &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0,
1130 "Atheros HAL additional SWBA backoff time");
1132 sc->sc_ah->ah_config.ah_force_full_reset = 0;
1133 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW,
1134 &sc->sc_ah->ah_config.ah_force_full_reset, 0,
1135 "Force full chip reset rather than a warm reset");
1138 * This is initialised by the driver.
1140 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW,
1141 &sc->sc_ah->ah_config.ah_serialise_reg_war, 0,
1142 "Force register access serialisation");