3 * Joerg Sonnenberger <joerg@bec.de>. All rights reserved.
5 * Copyright (c) 1997, 1998-2003
6 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Bill Paul.
19 * 4. Neither the name of the author nor the names of any co-contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGE.
35 * $FreeBSD: src/sys/pci/if_rlreg.h,v 1.42 2004/05/24 19:39:23 jhb Exp $
36 * $DragonFly: src/sys/dev/netif/re/if_revar.h,v 1.31 2008/10/21 12:31:01 sephe Exp $
39 #define RE_RX_DESC_CNT_8139CP 64
40 #define RE_TX_DESC_CNT_8139CP 64
42 #define RE_RX_DESC_CNT_DEF 256
43 #define RE_TX_DESC_CNT_DEF 256
44 #define RE_RX_DESC_CNT_MAX 1024
45 #define RE_TX_DESC_CNT_MAX 1024
47 #define RE_RX_LIST_SZ(sc) ((sc)->re_rx_desc_cnt * sizeof(struct re_desc))
48 #define RE_TX_LIST_SZ(sc) ((sc)->re_tx_desc_cnt * sizeof(struct re_desc))
49 #define RE_RING_ALIGN 256
50 #define RE_IFQ_MAXLEN 512
52 #define RE_TXDESC_SPARE 5
53 #define RE_JBUF_COUNT(sc) (((sc)->re_rx_desc_cnt * 3) / 2)
55 #define RE_RXDESC_INC(sc, x) (x = (x + 1) % (sc)->re_rx_desc_cnt)
56 #define RE_TXDESC_INC(sc, x) (x = (x + 1) % (sc)->re_tx_desc_cnt)
57 #define RE_OWN(x) (le32toh((x)->re_cmdstat) & RE_RDESC_STAT_OWN)
58 #define RE_RXBYTES(x) (le32toh((x)->re_cmdstat) & sc->re_rxlenmask)
59 #define RE_PKTSZ(x) ((x)/* >> 3*/)
61 #define RE_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF)
62 #define RE_ADDR_HI(y) ((uint64_t) (y) >> 32)
64 #define RE_MTU_6K (6 * 1024)
65 #define RE_MTU_9K (9 * 1024)
67 #define RE_ETHER_EXTRA (ETHER_HDR_LEN + ETHER_CRC_LEN + EVL_ENCAPLEN)
68 #define RE_FRAMELEN(mtu) ((mtu) + RE_ETHER_EXTRA)
70 #define RE_FRAMELEN_6K RE_FRAMELEN(RE_MTU_6K)
71 #define RE_FRAMELEN_9K RE_FRAMELEN(RE_MTU_9K)
72 #define RE_FRAMELEN_MAX RE_FRAMELEN_9K
74 #define RE_RXBUF_ALIGN 8
75 #define RE_JBUF_SIZE roundup2(RE_FRAMELEN_MAX, RE_RXBUF_ALIGN)
77 #define RE_TIMEOUT 1000
81 uint32_t re_macver; /* see RE_MACVER_ */
83 uint32_t re_caps; /* see RE_C_ */
86 #define RE_MACVER_UNKN 0
87 #define RE_MACVER_03 0x03
88 #define RE_MACVER_04 0x04
89 #define RE_MACVER_05 0x05
90 #define RE_MACVER_06 0x06
91 #define RE_MACVER_11 0x11
92 #define RE_MACVER_12 0x12
93 #define RE_MACVER_13 0x13
94 #define RE_MACVER_14 0x14
95 #define RE_MACVER_15 0x15
96 #define RE_MACVER_16 0x16
97 #define RE_MACVER_21 0x21
98 #define RE_MACVER_22 0x22
99 #define RE_MACVER_23 0x23
100 #define RE_MACVER_24 0x24
101 #define RE_MACVER_25 0x25
102 #define RE_MACVER_26 0x26
103 #define RE_MACVER_27 0x27
104 #define RE_MACVER_28 0x28
105 #define RE_MACVER_29 0x29
106 #define RE_MACVER_2A 0x2a
107 #define RE_MACVER_2B 0x2b
108 #define RE_MACVER_2C 0x2c
109 #define RE_MACVER_2D 0x2d
110 #define RE_MACVER_2E 0x2e
111 #define RE_MACVER_2F 0x2f
112 #define RE_MACVER_30 0x30
113 #define RE_MACVER_31 0x31
117 struct re_softc *re_sc;
122 SLIST_ENTRY(re_jbuf) re_link;
125 struct re_list_data {
126 struct mbuf **re_tx_mbuf;
127 struct mbuf **re_rx_mbuf;
128 bus_addr_t *re_rx_paddr;
133 bus_dmamap_t *re_tx_dmamap;
134 bus_dmamap_t *re_rx_dmamap;
135 bus_dmamap_t re_rx_spare;
136 bus_dma_tag_t re_rx_mtag; /* RX mbuf mapping tag */
137 bus_dma_tag_t re_tx_mtag; /* TX mbuf mapping tag */
138 bus_dma_tag_t re_stag; /* stats mapping tag */
139 bus_dmamap_t re_smap; /* stats map */
140 struct re_stats *re_stats;
141 bus_addr_t re_stats_addr;
142 bus_dma_tag_t re_rx_list_tag;
143 bus_dmamap_t re_rx_list_map;
144 struct re_desc *re_rx_list;
145 bus_addr_t re_rx_list_addr;
146 bus_dma_tag_t re_tx_list_tag;
147 bus_dmamap_t re_tx_list_map;
148 struct re_desc *re_tx_list;
149 bus_addr_t re_tx_list_addr;
151 bus_dma_tag_t re_jpool_tag;
152 bus_dmamap_t re_jpool_map;
154 struct re_jbuf *re_jbuf;
155 struct lwkt_serialize re_jbuf_serializer;
156 SLIST_HEAD(, re_jbuf) re_jbuf_free;
160 struct arpcom arpcom; /* interface info */
162 bus_space_handle_t re_bhandle; /* bus space handle */
163 bus_space_tag_t re_btag; /* bus space tag */
164 struct resource *re_res;
165 struct resource *re_irq;
168 bus_dma_tag_t re_parent_tag;
169 bus_dma_tag_t re_tag;
171 struct re_list_data re_ldata;
172 struct callout re_timer;
173 struct mbuf *re_head;
174 struct mbuf *re_tail;
175 uint32_t re_caps; /* see RE_C_ */
176 uint32_t re_macver; /* see RE_MACVER_ */
177 uint32_t re_rxlenmask;
186 int (*re_newbuf)(struct re_softc *, int, int);
188 uint32_t re_flags; /* see RE_F_ */
189 int re_if_flags; /* saved ifnet.if_flags */
191 struct sysctl_ctx_list re_sysctl_ctx;
192 struct sysctl_oid *re_sysctl_tree;
199 int re_imtype; /* see RE_IMTYPE_ */
201 uint32_t saved_maps[5]; /* pci data */
202 uint32_t saved_biosaddr;
203 uint8_t saved_intline;
204 uint8_t saved_cachelnsz;
205 uint8_t saved_lattimer;
208 #define RE_C_PCIE 0x1 /* PCI-E */
209 #define RE_C_PCI64 0x2 /* PCI64 */
210 #define RE_C_HWIM 0x4 /* hardware interrupt moderation */
211 #define RE_C_HWCSUM 0x8 /* hardware csum offload */
212 #define RE_C_8139CP 0x20 /* is 8139C+ */
213 #define RE_C_MAC2 0x40 /* MAC style 2 */
214 #define RE_C_PHYPMGT 0x80 /* PHY supports power mgmt */
215 #define RE_C_8169 0x100 /* is 8110/8169 */
216 #define RE_C_AUTOPAD 0x200 /* hardware auto-pad short frames */
217 #define RE_C_CONTIGRX 0x400 /* need contig buf to RX jumbo frames */
218 #define RE_C_STOP_RXTX 0x800 /* could stop RX/TX engine */
219 #define RE_C_FASTE 0x1000 /* 10/100 only NIC */
221 #define RE_IS_8139CP(sc) ((sc)->re_caps & RE_C_8139CP)
222 #define RE_IS_8169(sc) ((sc)->re_caps & RE_C_8169)
224 /* Interrupt moderation types */
225 #define RE_IMTYPE_NONE 0
226 #define RE_IMTYPE_SIM 1 /* simulated */
227 #define RE_IMTYPE_HW 2 /* hardware based */
229 #define RE_F_TIMER_INTR 0x1
230 #define RE_F_USE_JPOOL 0x2
231 #define RE_F_DROP_RXFRAG 0x4
232 #define RE_F_LINKED 0x8
233 #define RE_F_SUSPENDED 0x10
234 #define RE_F_TESTMODE 0x20
237 * register space access macros
239 #define CSR_WRITE_STREAM_4(sc, reg, val) \
240 bus_space_write_stream_4(sc->re_btag, sc->re_bhandle, reg, val)
241 #define CSR_WRITE_4(sc, reg, val) \
242 bus_space_write_4(sc->re_btag, sc->re_bhandle, reg, val)
243 #define CSR_WRITE_2(sc, reg, val) \
244 bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val)
245 #define CSR_WRITE_1(sc, reg, val) \
246 bus_space_write_1(sc->re_btag, sc->re_bhandle, reg, val)
248 #define CSR_READ_4(sc, reg) \
249 bus_space_read_4(sc->re_btag, sc->re_bhandle, reg)
250 #define CSR_READ_2(sc, reg) \
251 bus_space_read_2(sc->re_btag, sc->re_bhandle, reg)
252 #define CSR_READ_1(sc, reg) \
253 bus_space_read_1(sc->re_btag, sc->re_bhandle, reg)
255 #define CSR_SETBIT_1(sc, reg, val) \
256 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (val))
257 #define CSR_CLRBIT_1(sc, reg, val) \
258 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(val))