2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 //#include "use_npx.h"
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_msgbuf.h"
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/kernel.h>
60 #include <sys/linker.h>
61 #include <sys/malloc.h>
65 #include <sys/reboot.h>
67 #include <sys/msgbuf.h>
68 #include <sys/sysent.h>
69 #include <sys/sysctl.h>
70 #include <sys/vmmeter.h>
72 #include <sys/upcall.h>
73 #include <sys/usched.h>
77 #include <vm/vm_param.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_extern.h>
86 #include <sys/thread2.h>
87 #include <sys/mplock2.h>
88 #include <sys/mutex2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/metadata.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/globaldata.h> /* CPU_prvspace */
107 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
112 #include <machine/intr_machdep.h>
115 #include <bus/isa/isa_device.h>
117 #include <machine_base/isa/isa_intr.h>
118 #include <bus/isa/rtc.h>
119 #include <sys/random.h>
120 #include <sys/ptrace.h>
121 #include <machine/sigframe.h>
123 #include <sys/machintr.h>
124 #include <machine_base/icu/icu_abi.h>
125 #include <machine_base/icu/elcr_var.h>
126 #include <machine_base/apic/lapic.h>
127 #include <machine_base/apic/ioapic.h>
128 #include <machine_base/apic/ioapic_abi.h>
129 #include <machine/mptable.h>
131 #define PHYSMAP_ENTRIES 10
133 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
135 extern void printcpuinfo(void); /* XXX header file */
136 extern void identify_cpu(void);
138 extern void finishidentcpu(void);
140 extern void panicifcpuunsupported(void);
142 static void cpu_startup(void *);
143 static void pic_finish(void *);
144 static void cpu_finish(void *);
146 #ifndef CPU_DISABLE_SSE
147 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
148 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
149 #endif /* CPU_DISABLE_SSE */
151 extern void ffs_rawread_setup(void);
152 #endif /* DIRECTIO */
153 static void init_locks(void);
155 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
156 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
157 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
160 extern vm_offset_t ksym_start, ksym_end;
163 struct privatespace CPU_prvspace[MAXCPU] __aligned(4096); /* XXX */
165 int _udatasel, _ucodesel, _ucode32sel;
168 int64_t tsc_offsets[MAXCPU];
170 int64_t tsc_offsets[1];
173 #if defined(SWTCH_OPTIM_STATS)
174 extern int swtch_optim_stats;
175 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
176 CTLFLAG_RD, &swtch_optim_stats, 0, "");
177 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
178 CTLFLAG_RD, &tlb_flush_count, 0, "");
183 u_long ebda_addr = 0;
185 int imcr_present = 0;
187 int naps = 0; /* # of Applications processors */
190 struct mtx dt_lock; /* lock for GDT and LDT */
193 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
195 u_long pmem = ctob(physmem);
197 int error = sysctl_handle_long(oidp, &pmem, 0, req);
201 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
202 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
205 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
207 int error = sysctl_handle_int(oidp, 0,
208 ctob(physmem - vmstats.v_wire_count), req);
212 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
213 0, 0, sysctl_hw_usermem, "IU", "");
216 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
218 int error = sysctl_handle_int(oidp, 0,
219 x86_64_btop(avail_end - avail_start), req);
223 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
224 0, 0, sysctl_hw_availpages, "I", "");
230 * The number of PHYSMAP entries must be one less than the number of
231 * PHYSSEG entries because the PHYSMAP entry that spans the largest
232 * physical address that is accessible by ISA DMA is split into two
235 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
237 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
238 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
240 /* must be 2 less so 0 0 can signal end of chunks */
241 #define PHYS_AVAIL_ARRAY_END (NELEM(phys_avail) - 2)
242 #define DUMP_AVAIL_ARRAY_END (NELEM(dump_avail) - 2)
244 static vm_offset_t buffer_sva, buffer_eva;
245 vm_offset_t clean_sva, clean_eva;
246 static vm_offset_t pager_sva, pager_eva;
247 static struct trapframe proc0_tf;
250 cpu_startup(void *dummy)
254 vm_offset_t firstaddr;
257 * Good {morning,afternoon,evening,night}.
259 kprintf("%s", version);
262 panicifcpuunsupported();
266 kprintf("real memory = %ju (%ju MB)\n",
268 (intmax_t)Realmem / 1024 / 1024);
270 * Display any holes after the first chunk of extended memory.
275 kprintf("Physical memory chunk(s):\n");
276 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
277 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
279 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
280 (intmax_t)phys_avail[indx],
281 (intmax_t)phys_avail[indx + 1] - 1,
283 (intmax_t)(size1 / PAGE_SIZE));
288 * Allocate space for system data structures.
289 * The first available kernel virtual address is in "v".
290 * As pages of kernel virtual memory are allocated, "v" is incremented.
291 * As pages of memory are allocated and cleared,
292 * "firstaddr" is incremented.
293 * An index into the kernel page table corresponding to the
294 * virtual memory address maintained in "v" is kept in "mapaddr".
298 * Make two passes. The first pass calculates how much memory is
299 * needed and allocates it. The second pass assigns virtual
300 * addresses to the various data structures.
304 v = (caddr_t)firstaddr;
306 #define valloc(name, type, num) \
307 (name) = (type *)v; v = (caddr_t)((name)+(num))
308 #define valloclim(name, type, num, lim) \
309 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
312 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
313 * For the first 64MB of ram nominally allocate sufficient buffers to
314 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
315 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
316 * the buffer cache we limit the eventual kva reservation to
319 * factor represents the 1/4 x ram conversion.
322 int factor = 4 * BKVASIZE / 1024;
323 int kbytes = physmem * (PAGE_SIZE / 1024);
327 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
329 nbuf += (kbytes - 65536) * 2 / (factor * 5);
330 if (maxbcache && nbuf > maxbcache / BKVASIZE)
331 nbuf = maxbcache / BKVASIZE;
335 * Do not allow the buffer_map to be more then 1/2 the size of the
338 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
339 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
340 kprintf("Warning: nbufs capped at %d\n", nbuf);
343 nswbuf = max(min(nbuf/4, 256), 16);
345 if (nswbuf < NSWBUF_MIN)
352 valloc(swbuf, struct buf, nswbuf);
353 valloc(buf, struct buf, nbuf);
356 * End of first pass, size has been calculated so allocate memory
358 if (firstaddr == 0) {
359 size = (vm_size_t)(v - firstaddr);
360 firstaddr = kmem_alloc(&kernel_map, round_page(size));
362 panic("startup: no room for tables");
367 * End of second pass, addresses have been assigned
369 if ((vm_size_t)(v - firstaddr) != size)
370 panic("startup: table size inconsistency");
372 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
373 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
374 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
376 buffer_map.system_map = 1;
377 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
378 (nswbuf*MAXPHYS) + pager_map_size);
379 pager_map.system_map = 1;
381 #if defined(USERCONFIG)
383 cninit(); /* the preferred console may have changed */
386 kprintf("avail memory = %ju (%ju MB)\n",
387 (uintmax_t)ptoa(vmstats.v_free_count),
388 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
391 * Set up buffers, so they can be used to read disk labels.
394 vm_pager_bufferinit();
398 cpu_finish(void *dummy __unused)
404 pic_finish(void *dummy __unused)
406 /* Log ELCR information */
409 /* Log MPTABLE information */
410 mptable_pci_int_dump();
413 MachIntrABI.finalize();
417 * Send an interrupt to process.
419 * Stack is set up to allow sigcode stored
420 * at top to call routine, followed by kcall
421 * to sigreturn routine below. After sigreturn
422 * resets the signal mask, the stack, and the
423 * frame pointer, it returns to the user
427 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
429 struct lwp *lp = curthread->td_lwp;
430 struct proc *p = lp->lwp_proc;
431 struct trapframe *regs;
432 struct sigacts *psp = p->p_sigacts;
433 struct sigframe sf, *sfp;
437 regs = lp->lwp_md.md_regs;
438 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
440 /* Save user context */
441 bzero(&sf, sizeof(struct sigframe));
442 sf.sf_uc.uc_sigmask = *mask;
443 sf.sf_uc.uc_stack = lp->lwp_sigstk;
444 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
445 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
446 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
448 /* Make the size of the saved context visible to userland */
449 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
451 /* Save mailbox pending state for syscall interlock semantics */
452 if (p->p_flag & P_MAILBOX)
453 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
455 /* Allocate and validate space for the signal handler context. */
456 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
457 SIGISMEMBER(psp->ps_sigonstack, sig)) {
458 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
459 sizeof(struct sigframe));
460 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
462 /* We take red zone into account */
463 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
466 /* Align to 16 bytes */
467 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
469 /* Translate the signal is appropriate */
470 if (p->p_sysent->sv_sigtbl) {
471 if (sig <= p->p_sysent->sv_sigsize)
472 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
476 * Build the argument list for the signal handler.
478 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
480 regs->tf_rdi = sig; /* argument 1 */
481 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
483 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
485 * Signal handler installed with SA_SIGINFO.
487 * action(signo, siginfo, ucontext)
489 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
490 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
491 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
493 /* fill siginfo structure */
494 sf.sf_si.si_signo = sig;
495 sf.sf_si.si_code = code;
496 sf.sf_si.si_addr = (void *)regs->tf_addr;
499 * Old FreeBSD-style arguments.
501 * handler (signo, code, [uc], addr)
503 regs->tf_rsi = (register_t)code; /* argument 2 */
504 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
505 sf.sf_ahu.sf_handler = catcher;
509 * If we're a vm86 process, we want to save the segment registers.
510 * We also change eflags to be our emulated eflags, not the actual
514 if (regs->tf_eflags & PSL_VM) {
515 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
516 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
518 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
519 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
520 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
521 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
523 if (vm86->vm86_has_vme == 0)
524 sf.sf_uc.uc_mcontext.mc_eflags =
525 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
526 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
529 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
530 * syscalls made by the signal handler. This just avoids
531 * wasting time for our lazy fixup of such faults. PSL_NT
532 * does nothing in vm86 mode, but vm86 programs can set it
533 * almost legitimately in probes for old cpu types.
535 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
540 * Save the FPU state and reinit the FP unit
542 npxpush(&sf.sf_uc.uc_mcontext);
545 * Copy the sigframe out to the user's stack.
547 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
549 * Something is wrong with the stack pointer.
550 * ...Kill the process.
555 regs->tf_rsp = (register_t)sfp;
556 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
559 * i386 abi specifies that the direction flag must be cleared
562 regs->tf_rflags &= ~(PSL_T|PSL_D);
565 * 64 bit mode has a code and stack selector but
566 * no data or extra selector. %fs and %gs are not
569 regs->tf_cs = _ucodesel;
570 regs->tf_ss = _udatasel;
574 * Sanitize the trapframe for a virtual kernel passing control to a custom
575 * VM context. Remove any items that would otherwise create a privilage
578 * XXX at the moment we allow userland to set the resume flag. Is this a
582 cpu_sanitize_frame(struct trapframe *frame)
584 frame->tf_cs = _ucodesel;
585 frame->tf_ss = _udatasel;
586 /* XXX VM (8086) mode not supported? */
587 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
588 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
594 * Sanitize the tls so loading the descriptor does not blow up
595 * on us. For x86_64 we don't have to do anything.
598 cpu_sanitize_tls(struct savetls *tls)
604 * sigreturn(ucontext_t *sigcntxp)
606 * System call to cleanup state after a signal
607 * has been taken. Reset signal mask and
608 * stack state from context left by sendsig (above).
609 * Return to previous pc and psl as specified by
610 * context left by sendsig. Check carefully to
611 * make sure that the user has not modified the
612 * state to gain improper privileges.
616 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
617 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
620 sys_sigreturn(struct sigreturn_args *uap)
622 struct lwp *lp = curthread->td_lwp;
623 struct proc *p = lp->lwp_proc;
624 struct trapframe *regs;
632 * We have to copy the information into kernel space so userland
633 * can't modify it while we are sniffing it.
635 regs = lp->lwp_md.md_regs;
636 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
640 rflags = ucp->uc_mcontext.mc_rflags;
642 /* VM (8086) mode not supported */
643 rflags &= ~PSL_VM_UNSUPP;
646 if (eflags & PSL_VM) {
647 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
648 struct vm86_kernel *vm86;
651 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
652 * set up the vm86 area, and we can't enter vm86 mode.
654 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
656 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
657 if (vm86->vm86_inited == 0)
660 /* go back to user mode if both flags are set */
661 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
662 trapsignal(lp, SIGBUS, 0);
664 if (vm86->vm86_has_vme) {
665 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
666 (eflags & VME_USERCHANGE) | PSL_VM;
668 vm86->vm86_eflags = eflags; /* save VIF, VIP */
669 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
670 (eflags & VM_USERCHANGE) | PSL_VM;
672 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
673 tf->tf_eflags = eflags;
674 tf->tf_vm86_ds = tf->tf_ds;
675 tf->tf_vm86_es = tf->tf_es;
676 tf->tf_vm86_fs = tf->tf_fs;
677 tf->tf_vm86_gs = tf->tf_gs;
678 tf->tf_ds = _udatasel;
679 tf->tf_es = _udatasel;
680 tf->tf_fs = _udatasel;
681 tf->tf_gs = _udatasel;
686 * Don't allow users to change privileged or reserved flags.
689 * XXX do allow users to change the privileged flag PSL_RF.
690 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
691 * should sometimes set it there too. tf_eflags is kept in
692 * the signal context during signal handling and there is no
693 * other place to remember it, so the PSL_RF bit may be
694 * corrupted by the signal handler without us knowing.
695 * Corruption of the PSL_RF bit at worst causes one more or
696 * one less debugger trap, so allowing it is fairly harmless.
698 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
699 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
704 * Don't allow users to load a valid privileged %cs. Let the
705 * hardware check for invalid selectors, excess privilege in
706 * other selectors, invalid %eip's and invalid %esp's.
708 cs = ucp->uc_mcontext.mc_cs;
709 if (!CS_SECURE(cs)) {
710 kprintf("sigreturn: cs = 0x%x\n", cs);
711 trapsignal(lp, SIGBUS, T_PROTFLT);
714 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
718 * Restore the FPU state from the frame
721 npxpop(&ucp->uc_mcontext);
724 * Merge saved signal mailbox pending flag to maintain interlock
725 * semantics against system calls.
727 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
728 p->p_flag |= P_MAILBOX;
730 if (ucp->uc_mcontext.mc_onstack & 1)
731 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
733 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
735 lp->lwp_sigmask = ucp->uc_sigmask;
736 SIG_CANTMASK(lp->lwp_sigmask);
742 * Stack frame on entry to function. %rax will contain the function vector,
743 * %rcx will contain the function data. flags, rcx, and rax will have
744 * already been pushed on the stack.
755 sendupcall(struct vmupcall *vu, int morepending)
757 struct lwp *lp = curthread->td_lwp;
758 struct trapframe *regs;
759 struct upcall upcall;
760 struct upc_frame upc_frame;
764 * If we are a virtual kernel running an emulated user process
765 * context, switch back to the virtual kernel context before
766 * trying to post the signal.
768 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
769 lp->lwp_md.md_regs->tf_trapno = 0;
770 vkernel_trap(lp, lp->lwp_md.md_regs);
774 * Get the upcall data structure
776 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
777 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
780 kprintf("bad upcall address\n");
785 * If the data structure is already marked pending or has a critical
786 * section count, mark the data structure as pending and return
787 * without doing an upcall. vu_pending is left set.
789 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
790 if (upcall.upc_pending < vu->vu_pending) {
791 upcall.upc_pending = vu->vu_pending;
792 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
793 sizeof(upcall.upc_pending));
799 * We can run this upcall now, clear vu_pending.
801 * Bump our critical section count and set or clear the
802 * user pending flag depending on whether more upcalls are
803 * pending. The user will be responsible for calling
804 * upc_dispatch(-1) to process remaining upcalls.
807 upcall.upc_pending = morepending;
809 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
810 sizeof(upcall.upc_pending));
811 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
815 * Construct a stack frame and issue the upcall
817 regs = lp->lwp_md.md_regs;
818 upc_frame.rax = regs->tf_rax;
819 upc_frame.rcx = regs->tf_rcx;
820 upc_frame.rdx = regs->tf_rdx;
821 upc_frame.flags = regs->tf_rflags;
822 upc_frame.oldip = regs->tf_rip;
823 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
824 sizeof(upc_frame)) != 0) {
825 kprintf("bad stack on upcall\n");
827 regs->tf_rax = (register_t)vu->vu_func;
828 regs->tf_rcx = (register_t)vu->vu_data;
829 regs->tf_rdx = (register_t)lp->lwp_upcall;
830 regs->tf_rip = (register_t)vu->vu_ctx;
831 regs->tf_rsp -= sizeof(upc_frame);
836 * fetchupcall occurs in the context of a system call, which means that
837 * we have to return EJUSTRETURN in order to prevent eax and edx from
838 * being overwritten by the syscall return value.
840 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
841 * and the function pointer in %eax.
844 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
846 struct upc_frame upc_frame;
847 struct lwp *lp = curthread->td_lwp;
848 struct trapframe *regs;
850 struct upcall upcall;
853 regs = lp->lwp_md.md_regs;
855 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
859 * This jumps us to the next ready context.
862 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
865 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
868 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
869 regs->tf_rax = (register_t)vu->vu_func;
870 regs->tf_rcx = (register_t)vu->vu_data;
871 regs->tf_rdx = (register_t)lp->lwp_upcall;
872 regs->tf_rip = (register_t)vu->vu_ctx;
873 regs->tf_rsp = (register_t)rsp;
876 * This returns us to the originally interrupted code.
878 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
879 regs->tf_rax = upc_frame.rax;
880 regs->tf_rcx = upc_frame.rcx;
881 regs->tf_rdx = upc_frame.rdx;
882 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
883 (upc_frame.flags & PSL_USERCHANGE);
884 regs->tf_rip = upc_frame.oldip;
885 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
894 * Machine dependent boot() routine
896 * I haven't seen anything to put here yet
897 * Possibly some stuff might be grafted back here from boot()
905 * Shutdown the CPU as much as possible
911 __asm__ __volatile("hlt");
915 * cpu_idle() represents the idle LWKT. You cannot return from this function
916 * (unless you want to blow things up!). Instead we look for runnable threads
917 * and loop or halt as appropriate. Giant is not held on entry to the thread.
919 * The main loop is entered with a critical section held, we must release
920 * the critical section before doing anything else. lwkt_switch() will
921 * check for pending interrupts due to entering and exiting its own
924 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
925 * However, there are cases where the idlethread will be entered with
926 * the possibility that no IPI will occur and in such cases
927 * lwkt_switch() sets TDF_IDLE_NOHLT.
929 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
930 * 1 to just use hlt and for debugging purposes.
932 * NOTE: cpu_idle_repeat determines how many entries into the idle thread
933 * must occur before it starts using ACPI halt.
935 static int cpu_idle_hlt = 2;
936 static int cpu_idle_hltcnt;
937 static int cpu_idle_spincnt;
938 static u_int cpu_idle_repeat = 4;
939 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
940 &cpu_idle_hlt, 0, "Idle loop HLT enable");
941 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
942 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
943 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
944 &cpu_idle_spincnt, 0, "Idle loop entry spins");
945 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
946 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
949 cpu_idle_default_hook(void)
952 * We must guarentee that hlt is exactly the instruction
955 __asm __volatile("sti; hlt");
958 /* Other subsystems (e.g., ACPI) can hook this later. */
959 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
964 globaldata_t gd = mycpu;
965 struct thread *td __debugvar = gd->gd_curthread;
970 KKASSERT(td->td_critcount == 0);
973 * See if there are any LWKTs ready to go.
978 * When halting inside a cli we must check for reqflags
979 * races, particularly [re]schedule requests. Running
980 * splz() does the job.
983 * 0 Never halt, just spin
985 * 1 Always use HLT (or MONITOR/MWAIT if avail).
986 * This typically eats more power than the
989 * 2 Use HLT/MONITOR/MWAIT up to a point and then
990 * use the ACPI halt (default). This is a hybrid
991 * approach. See machdep.cpu_idle_repeat.
993 * 3 Always use the ACPI halt. This typically
994 * eats the least amount of power but the cpu
995 * will be slow waking up. Slows down e.g.
996 * compiles and other pipe/event oriented stuff.
998 * NOTE: Interrupts are enabled and we are not in a critical
1001 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
1002 * don't bother capping gd_idle_repeat, it is ok if
1005 ++gd->gd_idle_repeat;
1006 reqflags = gd->gd_reqflags;
1007 quick = (cpu_idle_hlt == 1) ||
1008 (cpu_idle_hlt < 3 &&
1009 gd->gd_idle_repeat < cpu_idle_repeat);
1011 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
1012 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1013 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
1015 } else if (cpu_idle_hlt) {
1016 __asm __volatile("cli");
1018 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1020 cpu_idle_default_hook();
1024 __asm __volatile("sti");
1028 __asm __volatile("sti");
1037 * This routine is called if a spinlock has been held through the
1038 * exponential backoff period and is seriously contested. On a real cpu
1042 cpu_spinlock_contested(void)
1050 * Clear registers on exec
1053 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1055 struct thread *td = curthread;
1056 struct lwp *lp = td->td_lwp;
1057 struct pcb *pcb = td->td_pcb;
1058 struct trapframe *regs = lp->lwp_md.md_regs;
1060 /* was i386_user_cleanup() in NetBSD */
1063 bzero((char *)regs, sizeof(struct trapframe));
1064 regs->tf_rip = entry;
1065 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1066 regs->tf_rdi = stack; /* argv */
1067 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1068 regs->tf_ss = _udatasel;
1069 regs->tf_cs = _ucodesel;
1070 regs->tf_rbx = ps_strings;
1073 * Reset the hardware debug registers if they were in use.
1074 * They won't have any meaning for the newly exec'd process.
1076 if (pcb->pcb_flags & PCB_DBREGS) {
1082 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1083 if (pcb == td->td_pcb) {
1085 * Clear the debug registers on the running
1086 * CPU, otherwise they will end up affecting
1087 * the next process we switch to.
1091 pcb->pcb_flags &= ~PCB_DBREGS;
1095 * Initialize the math emulator (if any) for the current process.
1096 * Actually, just clear the bit that says that the emulator has
1097 * been initialized. Initialization is delayed until the process
1098 * traps to the emulator (if it is done at all) mainly because
1099 * emulators don't provide an entry point for initialization.
1101 pcb->pcb_flags &= ~FP_SOFTFP;
1104 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1105 * gd_npxthread. Otherwise a preemptive interrupt thread
1106 * may panic in npxdna().
1109 load_cr0(rcr0() | CR0_MP);
1112 * NOTE: The MSR values must be correct so we can return to
1113 * userland. gd_user_fs/gs must be correct so the switch
1114 * code knows what the current MSR values are.
1116 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1117 pcb->pcb_gsbase = 0;
1118 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1119 mdcpu->gd_user_gs = 0;
1120 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1121 wrmsr(MSR_KGSBASE, 0);
1123 /* Initialize the npx (if any) for the current process. */
1124 npxinit(__INITIAL_NPXCW__);
1127 pcb->pcb_ds = _udatasel;
1128 pcb->pcb_es = _udatasel;
1129 pcb->pcb_fs = _udatasel;
1130 pcb->pcb_gs = _udatasel;
1139 cr0 |= CR0_NE; /* Done by npxinit() */
1140 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1141 cr0 |= CR0_WP | CR0_AM;
1147 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1150 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1152 if (!error && req->newptr)
1157 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1158 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1160 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1161 CTLFLAG_RW, &disable_rtc_set, 0, "");
1164 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1165 CTLFLAG_RD, &bootinfo, bootinfo, "");
1168 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1169 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1171 extern u_long bootdev; /* not a cdev_t - encoding is different */
1172 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1173 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1176 * Initialize 386 and configure to run kernel
1180 * Initialize segments & interrupt table
1184 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1185 static struct gate_descriptor idt0[NIDT];
1186 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1188 union descriptor ldt[NLDT]; /* local descriptor table */
1191 /* table descriptors - used to load tables by cpu */
1192 struct region_descriptor r_gdt, r_idt;
1194 /* JG proc0paddr is a virtual address */
1197 char proc0paddr_buff[LWKT_THREAD_STACK];
1200 /* software prototypes -- in more palatable form */
1201 struct soft_segment_descriptor gdt_segs[] = {
1202 /* GNULL_SEL 0 Null Descriptor */
1203 { 0x0, /* segment base address */
1205 0, /* segment type */
1206 0, /* segment descriptor priority level */
1207 0, /* segment descriptor present */
1209 0, /* default 32 vs 16 bit size */
1210 0 /* limit granularity (byte/page units)*/ },
1211 /* GCODE_SEL 1 Code Descriptor for kernel */
1212 { 0x0, /* segment base address */
1213 0xfffff, /* length - all address space */
1214 SDT_MEMERA, /* segment type */
1215 SEL_KPL, /* segment descriptor priority level */
1216 1, /* segment descriptor present */
1218 0, /* default 32 vs 16 bit size */
1219 1 /* limit granularity (byte/page units)*/ },
1220 /* GDATA_SEL 2 Data Descriptor for kernel */
1221 { 0x0, /* segment base address */
1222 0xfffff, /* length - all address space */
1223 SDT_MEMRWA, /* segment type */
1224 SEL_KPL, /* segment descriptor priority level */
1225 1, /* segment descriptor present */
1227 0, /* default 32 vs 16 bit size */
1228 1 /* limit granularity (byte/page units)*/ },
1229 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1230 { 0x0, /* segment base address */
1231 0xfffff, /* length - all address space */
1232 SDT_MEMERA, /* segment type */
1233 SEL_UPL, /* segment descriptor priority level */
1234 1, /* segment descriptor present */
1236 1, /* default 32 vs 16 bit size */
1237 1 /* limit granularity (byte/page units)*/ },
1238 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1239 { 0x0, /* segment base address */
1240 0xfffff, /* length - all address space */
1241 SDT_MEMRWA, /* segment type */
1242 SEL_UPL, /* segment descriptor priority level */
1243 1, /* segment descriptor present */
1245 1, /* default 32 vs 16 bit size */
1246 1 /* limit granularity (byte/page units)*/ },
1247 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1248 { 0x0, /* segment base address */
1249 0xfffff, /* length - all address space */
1250 SDT_MEMERA, /* segment type */
1251 SEL_UPL, /* segment descriptor priority level */
1252 1, /* segment descriptor present */
1254 0, /* default 32 vs 16 bit size */
1255 1 /* limit granularity (byte/page units)*/ },
1256 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1258 0x0, /* segment base address */
1259 sizeof(struct x86_64tss)-1,/* length - all address space */
1260 SDT_SYSTSS, /* segment type */
1261 SEL_KPL, /* segment descriptor priority level */
1262 1, /* segment descriptor present */
1264 0, /* unused - default 32 vs 16 bit size */
1265 0 /* limit granularity (byte/page units)*/ },
1266 /* Actually, the TSS is a system descriptor which is double size */
1267 { 0x0, /* segment base address */
1269 0, /* segment type */
1270 0, /* segment descriptor priority level */
1271 0, /* segment descriptor present */
1273 0, /* default 32 vs 16 bit size */
1274 0 /* limit granularity (byte/page units)*/ },
1275 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1276 { 0x0, /* segment base address */
1277 0xfffff, /* length - all address space */
1278 SDT_MEMRWA, /* segment type */
1279 SEL_UPL, /* segment descriptor priority level */
1280 1, /* segment descriptor present */
1282 1, /* default 32 vs 16 bit size */
1283 1 /* limit granularity (byte/page units)*/ },
1287 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1289 struct gate_descriptor *ip;
1292 ip->gd_looffset = (uintptr_t)func;
1293 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1299 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1302 #define IDTVEC(name) __CONCAT(X,name)
1305 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1306 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1307 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1308 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1309 IDTVEC(xmm), IDTVEC(dblfault),
1310 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1312 #ifdef DEBUG_INTERRUPTS
1313 extern inthand_t *Xrsvdary[256];
1317 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1319 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1320 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1321 ssd->ssd_type = sd->sd_type;
1322 ssd->ssd_dpl = sd->sd_dpl;
1323 ssd->ssd_p = sd->sd_p;
1324 ssd->ssd_def32 = sd->sd_def32;
1325 ssd->ssd_gran = sd->sd_gran;
1329 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1332 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1333 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1334 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1335 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1336 sd->sd_type = ssd->ssd_type;
1337 sd->sd_dpl = ssd->ssd_dpl;
1338 sd->sd_p = ssd->ssd_p;
1339 sd->sd_long = ssd->ssd_long;
1340 sd->sd_def32 = ssd->ssd_def32;
1341 sd->sd_gran = ssd->ssd_gran;
1345 ssdtosyssd(struct soft_segment_descriptor *ssd,
1346 struct system_segment_descriptor *sd)
1349 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1350 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1351 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1352 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1353 sd->sd_type = ssd->ssd_type;
1354 sd->sd_dpl = ssd->ssd_dpl;
1355 sd->sd_p = ssd->ssd_p;
1356 sd->sd_gran = ssd->ssd_gran;
1360 * Populate the (physmap) array with base/bound pairs describing the
1361 * available physical memory in the system, then test this memory and
1362 * build the phys_avail array describing the actually-available memory.
1364 * If we cannot accurately determine the physical memory map, then use
1365 * value from the 0xE801 call, and failing that, the RTC.
1367 * Total memory size may be set by the kernel environment variable
1368 * hw.physmem or the compile-time define MAXMEM.
1370 * Memory is aligned to PHYSMAP_ALIGN which must be a multiple
1371 * of PAGE_SIZE. This also greatly reduces the memory test time
1372 * which would otherwise be excessive on machines with > 8G of ram.
1374 * XXX first should be vm_paddr_t.
1377 #define PHYSMAP_ALIGN (vm_paddr_t)(128 * 1024)
1378 #define PHYSMAP_ALIGN_MASK (vm_paddr_t)(PHYSMAP_ALIGN - 1)
1381 getmemsize(caddr_t kmdp, u_int64_t first)
1383 int off, physmap_idx, pa_indx, da_indx;
1385 vm_paddr_t physmap[PHYSMAP_SIZE];
1387 vm_paddr_t msgbuf_size;
1388 u_long physmem_tunable;
1390 struct bios_smap *smapbase, *smap, *smapend;
1392 quad_t dcons_addr, dcons_size;
1394 bzero(physmap, sizeof(physmap));
1398 * get memory map from INT 15:E820, kindly supplied by the loader.
1400 * subr_module.c says:
1401 * "Consumer may safely assume that size value precedes data."
1402 * ie: an int32_t immediately precedes smap.
1404 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1405 MODINFO_METADATA | MODINFOMD_SMAP);
1406 if (smapbase == NULL)
1407 panic("No BIOS smap info from loader!");
1409 smapsize = *((u_int32_t *)smapbase - 1);
1410 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1412 for (smap = smapbase; smap < smapend; smap++) {
1413 if (boothowto & RB_VERBOSE)
1414 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1415 smap->type, smap->base, smap->length);
1417 if (smap->type != SMAP_TYPE_MEMORY)
1420 if (smap->length == 0)
1423 for (i = 0; i <= physmap_idx; i += 2) {
1424 if (smap->base < physmap[i + 1]) {
1425 if (boothowto & RB_VERBOSE) {
1426 kprintf("Overlapping or non-monotonic "
1427 "memory region, ignoring "
1433 Realmem += smap->length;
1435 if (smap->base == physmap[physmap_idx + 1]) {
1436 physmap[physmap_idx + 1] += smap->length;
1441 if (physmap_idx == PHYSMAP_SIZE) {
1442 kprintf("Too many segments in the physical "
1443 "address map, giving up\n");
1446 physmap[physmap_idx] = smap->base;
1447 physmap[physmap_idx + 1] = smap->base + smap->length;
1450 base_memory = physmap[1] / 1024;
1452 /* make hole for AP bootstrap code */
1453 physmap[1] = mp_bootaddress(base_memory);
1456 /* Save EBDA address, if any */
1457 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1461 * Maxmem isn't the "maximum memory", it's one larger than the
1462 * highest page of the physical address space. It should be
1463 * called something like "Maxphyspage". We may adjust this
1464 * based on ``hw.physmem'' and the results of the memory test.
1466 Maxmem = atop(physmap[physmap_idx + 1]);
1469 Maxmem = MAXMEM / 4;
1472 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1473 Maxmem = atop(physmem_tunable);
1476 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1479 if (Maxmem > atop(physmap[physmap_idx + 1]))
1480 Maxmem = atop(physmap[physmap_idx + 1]);
1483 * Blowing out the DMAP will blow up the system.
1485 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) {
1486 kprintf("Limiting Maxmem due to DMAP size\n");
1487 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS);
1490 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1491 (boothowto & RB_VERBOSE)) {
1492 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1496 * Call pmap initialization to make new kernel address space
1500 pmap_bootstrap(&first);
1501 physmap[0] = PAGE_SIZE;
1504 * Align the physmap to PHYSMAP_ALIGN and cut out anything
1507 for (i = j = 0; i <= physmap_idx; i += 2) {
1508 if (physmap[i+1] > ptoa((vm_paddr_t)Maxmem))
1509 physmap[i+1] = ptoa((vm_paddr_t)Maxmem);
1510 physmap[i] = (physmap[i] + PHYSMAP_ALIGN_MASK) &
1511 ~PHYSMAP_ALIGN_MASK;
1512 physmap[i+1] = physmap[i+1] & ~PHYSMAP_ALIGN_MASK;
1514 physmap[j] = physmap[i];
1515 physmap[j+1] = physmap[i+1];
1517 if (physmap[i] < physmap[i+1])
1520 physmap_idx = j - 2;
1523 * Align anything else used in the validation loop.
1525 first = (first + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1528 * Size up each available chunk of physical memory.
1532 phys_avail[pa_indx++] = physmap[0];
1533 phys_avail[pa_indx] = physmap[0];
1534 dump_avail[da_indx] = physmap[0];
1538 * Get dcons buffer address
1540 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1541 kgetenv_quad("dcons.size", &dcons_size) == 0)
1545 * Validate the physical memory. The physical memory segments
1546 * have already been aligned to PHYSMAP_ALIGN which is a multiple
1549 for (i = 0; i <= physmap_idx; i += 2) {
1552 end = physmap[i + 1];
1554 for (pa = physmap[i]; pa < end; pa += PHYSMAP_ALIGN) {
1555 int tmp, page_bad, full;
1556 int *ptr = (int *)CADDR1;
1560 * block out kernel memory as not available.
1562 if (pa >= 0x100000 && pa < first)
1566 * block out dcons buffer
1569 && pa >= trunc_page(dcons_addr)
1570 && pa < dcons_addr + dcons_size) {
1577 * map page into kernel: valid, read/write,non-cacheable
1579 *pte = pa | PG_V | PG_RW | PG_N;
1584 * Test for alternating 1's and 0's
1586 *(volatile int *)ptr = 0xaaaaaaaa;
1588 if (*(volatile int *)ptr != 0xaaaaaaaa)
1591 * Test for alternating 0's and 1's
1593 *(volatile int *)ptr = 0x55555555;
1595 if (*(volatile int *)ptr != 0x55555555)
1600 *(volatile int *)ptr = 0xffffffff;
1602 if (*(volatile int *)ptr != 0xffffffff)
1607 *(volatile int *)ptr = 0x0;
1609 if (*(volatile int *)ptr != 0x0)
1612 * Restore original value.
1617 * Adjust array of valid/good pages.
1619 if (page_bad == TRUE)
1622 * If this good page is a continuation of the
1623 * previous set of good pages, then just increase
1624 * the end pointer. Otherwise start a new chunk.
1625 * Note that "end" points one higher than end,
1626 * making the range >= start and < end.
1627 * If we're also doing a speculative memory
1628 * test and we at or past the end, bump up Maxmem
1629 * so that we keep going. The first bad page
1630 * will terminate the loop.
1632 if (phys_avail[pa_indx] == pa) {
1633 phys_avail[pa_indx] += PHYSMAP_ALIGN;
1636 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1638 "Too many holes in the physical address space, giving up\n");
1643 phys_avail[pa_indx++] = pa;
1644 phys_avail[pa_indx] = pa + PHYSMAP_ALIGN;
1646 physmem += PHYSMAP_ALIGN / PAGE_SIZE;
1648 if (dump_avail[da_indx] == pa) {
1649 dump_avail[da_indx] += PHYSMAP_ALIGN;
1652 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1656 dump_avail[da_indx++] = pa;
1657 dump_avail[da_indx] = pa + PHYSMAP_ALIGN;
1668 * The last chunk must contain at least one page plus the message
1669 * buffer to avoid complicating other code (message buffer address
1670 * calculation, etc.).
1672 msgbuf_size = (MSGBUF_SIZE + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1674 while (phys_avail[pa_indx - 1] + PHYSMAP_ALIGN +
1675 msgbuf_size >= phys_avail[pa_indx]) {
1676 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1677 phys_avail[pa_indx--] = 0;
1678 phys_avail[pa_indx--] = 0;
1681 Maxmem = atop(phys_avail[pa_indx]);
1683 /* Trim off space for the message buffer. */
1684 phys_avail[pa_indx] -= msgbuf_size;
1686 avail_end = phys_avail[pa_indx];
1688 /* Map the message buffer. */
1689 for (off = 0; off < msgbuf_size; off += PAGE_SIZE) {
1690 pmap_kenter((vm_offset_t)msgbufp + off,
1691 phys_avail[pa_indx] + off);
1695 struct machintr_abi MachIntrABI;
1706 * 7 Device Not Available (x87)
1708 * 9 Coprocessor Segment overrun (unsupported, reserved)
1710 * 11 Segment not present
1712 * 13 General Protection
1715 * 16 x87 FP Exception pending
1716 * 17 Alignment Check
1718 * 19 SIMD floating point
1720 * 32-255 INTn/external sources
1723 hammer_time(u_int64_t modulep, u_int64_t physfree)
1728 int metadata_missing, off;
1730 struct mdglobaldata *gd;
1734 * Prevent lowering of the ipl if we call tsleep() early.
1736 gd = &CPU_prvspace[0].mdglobaldata;
1737 bzero(gd, sizeof(*gd));
1740 * Note: on both UP and SMP curthread must be set non-NULL
1741 * early in the boot sequence because the system assumes
1742 * that 'curthread' is never NULL.
1745 gd->mi.gd_curthread = &thread0;
1746 thread0.td_gd = &gd->mi;
1748 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1751 metadata_missing = 0;
1752 if (bootinfo.bi_modulep) {
1753 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1754 preload_bootstrap_relocate(KERNBASE);
1756 metadata_missing = 1;
1758 if (bootinfo.bi_envp)
1759 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1762 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1763 preload_bootstrap_relocate(PTOV_OFFSET);
1764 kmdp = preload_search_by_type("elf kernel");
1766 kmdp = preload_search_by_type("elf64 kernel");
1767 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1768 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1770 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1771 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1774 if (boothowto & RB_VERBOSE)
1778 * Default MachIntrABI to ICU
1780 MachIntrABI = MachIntrABI_ICU;
1782 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1783 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1784 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1787 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1788 * and ncpus_fit_mask remain 0.
1793 /* Init basic tunables, hz etc */
1797 * make gdt memory segments
1799 gdt_segs[GPROC0_SEL].ssd_base =
1800 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1802 gd->mi.gd_prvspace = &CPU_prvspace[0];
1804 for (x = 0; x < NGDT; x++) {
1805 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1806 ssdtosd(&gdt_segs[x], &gdt[x]);
1808 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1809 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1811 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1812 r_gdt.rd_base = (long) gdt;
1815 wrmsr(MSR_FSBASE, 0); /* User value */
1816 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1817 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1819 mi_gdinit(&gd->mi, 0);
1821 proc0paddr = proc0paddr_buff;
1822 mi_proc0init(&gd->mi, proc0paddr);
1823 safepri = TDPRI_MAX;
1825 /* spinlocks and the BGL */
1829 for (x = 0; x < NIDT; x++)
1830 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1831 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1832 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1833 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1834 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1835 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1836 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1837 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1838 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1839 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1840 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1841 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1842 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1843 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1844 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1845 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1846 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1847 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1848 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1849 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1851 r_idt.rd_limit = sizeof(idt0) - 1;
1852 r_idt.rd_base = (long) idt;
1856 * Initialize the console before we print anything out.
1861 if (metadata_missing)
1862 kprintf("WARNING: loader(8) metadata is missing!\n");
1872 * Initialize IRQ mapping
1875 * SHOULD be after elcr_probe()
1877 MachIntrABI_ICU.initmap();
1879 MachIntrABI_IOAPIC.initmap();
1884 if (boothowto & RB_KDB)
1885 Debugger("Boot flags requested debugger");
1889 finishidentcpu(); /* Final stage of CPU initialization */
1890 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1891 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1893 identify_cpu(); /* Final stage of CPU initialization */
1894 initializecpu(); /* Initialize CPU registers */
1896 /* make an initial tss so cpu can get interrupt stack on syscall! */
1897 gd->gd_common_tss.tss_rsp0 =
1898 (register_t)(thread0.td_kstack +
1899 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1900 /* Ensure the stack is aligned to 16 bytes */
1901 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1903 /* double fault stack */
1904 gd->gd_common_tss.tss_ist1 =
1905 (long)&gd->mi.gd_prvspace->idlestack[
1906 sizeof(gd->mi.gd_prvspace->idlestack)];
1908 /* Set the IO permission bitmap (empty due to tss seg limit) */
1909 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1911 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1912 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1913 gd->gd_common_tssd = *gd->gd_tss_gdt;
1916 /* Set up the fast syscall stuff */
1917 msr = rdmsr(MSR_EFER) | EFER_SCE;
1918 wrmsr(MSR_EFER, msr);
1919 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1920 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1921 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1922 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1923 wrmsr(MSR_STAR, msr);
1924 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1926 getmemsize(kmdp, physfree);
1927 init_param2(physmem);
1929 /* now running on new page tables, configured,and u/iom is accessible */
1931 /* Map the message buffer. */
1933 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1934 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1937 msgbufinit(msgbufp, MSGBUF_SIZE);
1940 /* transfer to user mode */
1942 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1943 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1944 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1950 /* setup proc 0's pcb */
1951 thread0.td_pcb->pcb_flags = 0;
1952 thread0.td_pcb->pcb_cr3 = KPML4phys;
1953 thread0.td_pcb->pcb_ext = 0;
1954 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */
1956 /* Location of kernel stack for locore */
1957 return ((u_int64_t)thread0.td_pcb);
1961 * Initialize machine-dependant portions of the global data structure.
1962 * Note that the global data area and cpu0's idlestack in the private
1963 * data space were allocated in locore.
1965 * Note: the idlethread's cpl is 0
1967 * WARNING! Called from early boot, 'mycpu' may not work yet.
1970 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1973 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1975 lwkt_init_thread(&gd->mi.gd_idlethread,
1976 gd->mi.gd_prvspace->idlestack,
1977 sizeof(gd->mi.gd_prvspace->idlestack),
1979 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1980 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1981 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1982 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1986 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1988 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1989 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1996 globaldata_find(int cpu)
1998 KKASSERT(cpu >= 0 && cpu < ncpus);
1999 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2003 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2005 lp->lwp_md.md_regs->tf_rip = addr;
2010 ptrace_single_step(struct lwp *lp)
2012 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
2017 fill_regs(struct lwp *lp, struct reg *regs)
2019 struct trapframe *tp;
2021 tp = lp->lwp_md.md_regs;
2022 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
2027 set_regs(struct lwp *lp, struct reg *regs)
2029 struct trapframe *tp;
2031 tp = lp->lwp_md.md_regs;
2032 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
2033 !CS_SECURE(regs->r_cs))
2035 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
2039 #ifndef CPU_DISABLE_SSE
2041 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2043 struct env87 *penv_87 = &sv_87->sv_env;
2044 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2047 /* FPU control/status */
2048 penv_87->en_cw = penv_xmm->en_cw;
2049 penv_87->en_sw = penv_xmm->en_sw;
2050 penv_87->en_tw = penv_xmm->en_tw;
2051 penv_87->en_fip = penv_xmm->en_fip;
2052 penv_87->en_fcs = penv_xmm->en_fcs;
2053 penv_87->en_opcode = penv_xmm->en_opcode;
2054 penv_87->en_foo = penv_xmm->en_foo;
2055 penv_87->en_fos = penv_xmm->en_fos;
2058 for (i = 0; i < 8; ++i)
2059 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2063 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2065 struct env87 *penv_87 = &sv_87->sv_env;
2066 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2069 /* FPU control/status */
2070 penv_xmm->en_cw = penv_87->en_cw;
2071 penv_xmm->en_sw = penv_87->en_sw;
2072 penv_xmm->en_tw = penv_87->en_tw;
2073 penv_xmm->en_fip = penv_87->en_fip;
2074 penv_xmm->en_fcs = penv_87->en_fcs;
2075 penv_xmm->en_opcode = penv_87->en_opcode;
2076 penv_xmm->en_foo = penv_87->en_foo;
2077 penv_xmm->en_fos = penv_87->en_fos;
2080 for (i = 0; i < 8; ++i)
2081 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2083 #endif /* CPU_DISABLE_SSE */
2086 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2088 #ifndef CPU_DISABLE_SSE
2090 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2091 (struct save87 *)fpregs);
2094 #endif /* CPU_DISABLE_SSE */
2095 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2100 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2102 #ifndef CPU_DISABLE_SSE
2104 set_fpregs_xmm((struct save87 *)fpregs,
2105 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2108 #endif /* CPU_DISABLE_SSE */
2109 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2114 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2117 dbregs->dr[0] = rdr0();
2118 dbregs->dr[1] = rdr1();
2119 dbregs->dr[2] = rdr2();
2120 dbregs->dr[3] = rdr3();
2121 dbregs->dr[4] = rdr4();
2122 dbregs->dr[5] = rdr5();
2123 dbregs->dr[6] = rdr6();
2124 dbregs->dr[7] = rdr7();
2128 pcb = lp->lwp_thread->td_pcb;
2129 dbregs->dr[0] = pcb->pcb_dr0;
2130 dbregs->dr[1] = pcb->pcb_dr1;
2131 dbregs->dr[2] = pcb->pcb_dr2;
2132 dbregs->dr[3] = pcb->pcb_dr3;
2135 dbregs->dr[6] = pcb->pcb_dr6;
2136 dbregs->dr[7] = pcb->pcb_dr7;
2142 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2145 load_dr0(dbregs->dr[0]);
2146 load_dr1(dbregs->dr[1]);
2147 load_dr2(dbregs->dr[2]);
2148 load_dr3(dbregs->dr[3]);
2149 load_dr4(dbregs->dr[4]);
2150 load_dr5(dbregs->dr[5]);
2151 load_dr6(dbregs->dr[6]);
2152 load_dr7(dbregs->dr[7]);
2155 struct ucred *ucred;
2157 uint64_t mask1, mask2;
2160 * Don't let an illegal value for dr7 get set. Specifically,
2161 * check for undefined settings. Setting these bit patterns
2162 * result in undefined behaviour and can lead to an unexpected
2165 /* JG this loop looks unreadable */
2166 /* Check 4 2-bit fields for invalid patterns.
2167 * These fields are R/Wi, for i = 0..3
2169 /* Is 10 in LENi allowed when running in compatibility mode? */
2170 /* Pattern 10 in R/Wi might be used to indicate
2171 * breakpoint on I/O. Further analysis should be
2172 * carried to decide if it is safe and useful to
2173 * provide access to that capability
2175 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2176 i++, mask1 <<= 4, mask2 <<= 4)
2177 if ((dbregs->dr[7] & mask1) == mask2)
2180 pcb = lp->lwp_thread->td_pcb;
2181 ucred = lp->lwp_proc->p_ucred;
2184 * Don't let a process set a breakpoint that is not within the
2185 * process's address space. If a process could do this, it
2186 * could halt the system by setting a breakpoint in the kernel
2187 * (if ddb was enabled). Thus, we need to check to make sure
2188 * that no breakpoints are being enabled for addresses outside
2189 * process's address space, unless, perhaps, we were called by
2192 * XXX - what about when the watched area of the user's
2193 * address space is written into from within the kernel
2194 * ... wouldn't that still cause a breakpoint to be generated
2195 * from within kernel mode?
2198 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2199 if (dbregs->dr[7] & 0x3) {
2200 /* dr0 is enabled */
2201 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2205 if (dbregs->dr[7] & (0x3<<2)) {
2206 /* dr1 is enabled */
2207 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2211 if (dbregs->dr[7] & (0x3<<4)) {
2212 /* dr2 is enabled */
2213 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2217 if (dbregs->dr[7] & (0x3<<6)) {
2218 /* dr3 is enabled */
2219 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2224 pcb->pcb_dr0 = dbregs->dr[0];
2225 pcb->pcb_dr1 = dbregs->dr[1];
2226 pcb->pcb_dr2 = dbregs->dr[2];
2227 pcb->pcb_dr3 = dbregs->dr[3];
2228 pcb->pcb_dr6 = dbregs->dr[6];
2229 pcb->pcb_dr7 = dbregs->dr[7];
2231 pcb->pcb_flags |= PCB_DBREGS;
2238 * Return > 0 if a hardware breakpoint has been hit, and the
2239 * breakpoint was in user space. Return 0, otherwise.
2242 user_dbreg_trap(void)
2244 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2245 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2246 int nbp; /* number of breakpoints that triggered */
2247 caddr_t addr[4]; /* breakpoint addresses */
2251 if ((dr7 & 0xff) == 0) {
2253 * all GE and LE bits in the dr7 register are zero,
2254 * thus the trap couldn't have been caused by the
2255 * hardware debug registers
2266 * None of the breakpoint bits are set meaning this
2267 * trap was not caused by any of the debug registers
2273 * at least one of the breakpoints were hit, check to see
2274 * which ones and if any of them are user space addresses
2278 addr[nbp++] = (caddr_t)rdr0();
2281 addr[nbp++] = (caddr_t)rdr1();
2284 addr[nbp++] = (caddr_t)rdr2();
2287 addr[nbp++] = (caddr_t)rdr3();
2290 for (i=0; i<nbp; i++) {
2292 (caddr_t)VM_MAX_USER_ADDRESS) {
2294 * addr[i] is in user space
2301 * None of the breakpoints are in user space.
2309 Debugger(const char *msg)
2311 kprintf("Debugger(\"%s\") called.\n", msg);
2318 * Provide inb() and outb() as functions. They are normally only
2319 * available as macros calling inlined functions, thus cannot be
2320 * called inside DDB.
2322 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2328 /* silence compiler warnings */
2330 void outb(u_int, u_char);
2337 * We use %%dx and not %1 here because i/o is done at %dx and not at
2338 * %edx, while gcc generates inferior code (movw instead of movl)
2339 * if we tell it to load (u_short) port.
2341 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2346 outb(u_int port, u_char data)
2350 * Use an unnecessary assignment to help gcc's register allocator.
2351 * This make a large difference for gcc-1.40 and a tiny difference
2352 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2353 * best results. gcc-2.6.0 can't handle this.
2356 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2363 #include "opt_cpu.h"
2367 * initialize all the SMP locks
2370 /* critical region when masking or unmasking interupts */
2371 struct spinlock_deprecated imen_spinlock;
2373 /* critical region for old style disable_intr/enable_intr */
2374 struct spinlock_deprecated mpintr_spinlock;
2376 /* critical region around INTR() routines */
2377 struct spinlock_deprecated intr_spinlock;
2379 /* lock region used by kernel profiling */
2380 struct spinlock_deprecated mcount_spinlock;
2382 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2383 struct spinlock_deprecated com_spinlock;
2385 /* lock regions around the clock hardware */
2386 struct spinlock_deprecated clock_spinlock;
2393 * Get the initial mplock with a count of 1 for the BSP.
2394 * This uses a LOGICAL cpu ID, ie BSP == 0.
2396 cpu_get_initial_mplock();
2399 spin_lock_init(&mcount_spinlock);
2400 spin_lock_init(&intr_spinlock);
2401 spin_lock_init(&mpintr_spinlock);
2402 spin_lock_init(&imen_spinlock);
2403 spin_lock_init(&com_spinlock);
2404 spin_lock_init(&clock_spinlock);
2406 /* our token pool needs to work early */
2407 lwkt_token_pool_init();