2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
34 #include <sys/queue.h>
35 #include <sys/callout.h>
36 #include <sys/taskqueue.h>
39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
40 * descriptors should be multiple of JME_NDESC_ALIGN.
42 #define JME_TX_DESC_CNT_DEF 384
43 #define JME_RX_DESC_CNT_DEF 256
45 #define JME_NDESC_ALIGN 16
46 #define JME_NDESC_MAX 1024
48 #define JME_NRXRING_1 1
49 #define JME_NRXRING_2 2
50 #define JME_NRXRING_4 4
52 #define JME_NRXRING_DEF JME_NRXRING_1
53 #define JME_NRXRING_MIN JME_NRXRING_1
54 #define JME_NRXRING_MAX JME_NRXRING_4
56 #define JME_NSERIALIZE (JME_NRXRING_MAX + 2)
58 #define JME_NMSIX (JME_NRXRING_MAX + 1)
61 * Tx/Rx descriptor queue base should be 16bytes aligned and
62 * should not cross 4G bytes boundary on the 64bits address
65 #define JME_TX_RING_ALIGN 16
66 #define JME_RX_RING_ALIGN 16
67 #define JME_MAXSEGSIZE 4096
68 #define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
69 #define JME_MAXTXSEGS 32
70 #define JME_RX_BUF_ALIGN sizeof(uint64_t)
71 #define JME_SSB_ALIGN 16
73 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
74 #define JME_RING_BOUNDARY 0x100000000ULL
76 #define JME_RING_BOUNDARY 0
79 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
80 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
82 #define JME_MSI_MESSAGES 8
83 #define JME_MSIX_MESSAGES 8
85 /* Water mark to kick reclaiming Tx buffers. */
86 #define JME_TX_DESC_HIWAT(sc) \
87 ((sc)->jme_tx_desc_cnt - (((sc)->jme_tx_desc_cnt * 3) / 10))
90 * JMC250 can send 9K jumbo frame on Tx path and can receive
93 #define JME_JUMBO_FRAMELEN 9216
94 #define JME_JUMBO_MTU \
95 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
96 ETHER_HDR_LEN - ETHER_CRC_LEN)
98 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
99 ETHER_HDR_LEN - ETHER_CRC_LEN)
101 * JMC250 can't handle Tx checksum offload/TSO if frame length
102 * is larger than its FIFO size(2K). It's also good idea to not
103 * use jumbo frame if hardware is running at half-duplex media.
104 * Because the jumbo frame may not fit into the Tx FIFO,
105 * collisions make hardware fetch frame from host memory with
106 * DMA again which in turn slows down Tx performance
109 #define JME_TX_FIFO_SIZE 2000
111 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
112 * larger than 4K bytes in length, Rx FIFO threshold should be
113 * adjusted to minimize Rx FIFO overrun.
115 #define JME_RX_FIFO_SIZE 4000
117 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
121 bus_dmamap_t tx_dmamap;
123 struct jme_desc *tx_desc;
128 bus_dmamap_t rx_dmamap;
129 struct jme_desc *rx_desc;
138 struct lwkt_serialize jme_rx_serialize;
139 struct jme_softc *jme_sc;
140 uint32_t jme_rx_coal;
141 uint32_t jme_rx_comp;
142 uint32_t jme_rx_empty;
144 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */
145 bus_dmamap_t jme_rx_sparemap;
146 struct jme_rxdesc *jme_rxdesc;
148 struct jme_desc *jme_rx_ring;
149 bus_addr_t jme_rx_ring_paddr;
150 bus_dma_tag_t jme_rx_ring_tag;
151 bus_dmamap_t jme_rx_ring_map;
156 struct mbuf *jme_rxhead;
157 struct mbuf *jme_rxtail;
160 struct jme_chain_data {
164 bus_dma_tag_t jme_ring_tag; /* parent ring tag */
165 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */
168 * Shadow status block
170 struct jme_ssb *jme_ssb_block;
171 bus_addr_t jme_ssb_block_paddr;
172 bus_dma_tag_t jme_ssb_tag;
173 bus_dmamap_t jme_ssb_map;
178 struct lwkt_serialize jme_tx_serialize;
179 struct jme_softc *jme_sc;
180 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */
181 struct jme_txdesc *jme_txdesc;
183 struct jme_desc *jme_tx_ring;
184 bus_addr_t jme_tx_ring_paddr;
185 bus_dma_tag_t jme_tx_ring_tag;
186 bus_dmamap_t jme_tx_ring_map;
192 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX];
195 struct jme_msix_data {
198 u_int jme_msix_vector;
199 uint32_t jme_msix_intrs;
200 struct resource *jme_msix_res;
201 void *jme_msix_handle;
202 struct lwkt_serialize *jme_msix_serialize;
203 char jme_msix_desc[64];
205 driver_intr_t *jme_msix_func;
209 #define JME_TX_RING_SIZE(sc) \
210 (sizeof(struct jme_desc) * (sc)->jme_tx_desc_cnt)
211 #define JME_RX_RING_SIZE(sc) \
212 (sizeof(struct jme_desc) * (sc)->jme_rx_desc_cnt)
213 #define JME_SSB_SIZE sizeof(struct jme_ssb)
216 * Software state per device.
219 struct arpcom arpcom;
223 struct resource *jme_mem_res;
224 bus_space_tag_t jme_mem_bt;
225 bus_space_handle_t jme_mem_bh;
229 struct resource *jme_irq_res;
230 void *jme_irq_handle;
231 struct jme_msix_data jme_msix[JME_NMSIX];
233 uint32_t jme_msinum[JME_MSINUM_CNT];
237 bus_addr_t jme_lowaddr;
240 uint32_t jme_clksrc_1000;
241 uint32_t jme_tx_dma_size;
242 uint32_t jme_rx_dma_size;
245 #define JME_CAP_FPGA 0x0001
246 #define JME_CAP_PCIE 0x0002
247 #define JME_CAP_PMCAP 0x0004
248 #define JME_CAP_FASTETH 0x0008
249 #define JME_CAP_JUMBO 0x0010
251 uint32_t jme_workaround;
252 #define JME_WA_EXTFIFO 0x0001
253 #define JME_WA_HDX 0x0002
256 #define JME_FLAG_MSI 0x0001
257 #define JME_FLAG_MSIX 0x0002
258 #define JME_FLAG_DETACH 0x0004
259 #define JME_FLAG_LINK 0x0008
261 struct lwkt_serialize jme_serialize;
262 struct lwkt_serialize *jme_serialize_arr[JME_NSERIALIZE];
263 int jme_serialize_cnt;
265 struct callout jme_tick_ch;
266 struct jme_chain_data jme_cdata;
273 struct sysctl_ctx_list jme_sysctl_ctx;
274 struct sysctl_oid *jme_sysctl_tree;
286 int jme_rx_ring_inuse;
288 u_int jme_rx_ring_pkt[JME_NRXRING_MAX];
291 /* Register access macros. */
292 #define CSR_WRITE_4(_sc, reg, val) \
293 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
294 #define CSR_READ_4(_sc, reg) \
295 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
299 #define JME_RXCHAIN_RESET(sc, ring) \
301 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxhead = NULL; \
302 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxtail = NULL; \
303 (sc)->jme_cdata.jme_rx_data[(ring)].jme_rxlen = 0; \
306 #define JME_TX_TIMEOUT 5
307 #define JME_TIMEOUT 1000
308 #define JME_PHY_TIMEOUT 1000
309 #define JME_EEPROM_TIMEOUT 1000
311 #define JME_TXD_RSVD 1