2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 static int ahci_vt8251_attach(device_t);
55 static int ahci_ati_sb600_attach(device_t);
56 static int ahci_nvidia_mcp_attach(device_t);
57 static int ahci_pci_attach(device_t);
58 static int ahci_pci_detach(device_t);
60 static const struct ahci_device ahci_devices[] = {
61 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA,
62 ahci_vt8251_attach, ahci_pci_detach, "ViaTech-VT8251-SATA" },
63 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_SATA,
64 ahci_ati_sb600_attach, ahci_pci_detach, "ATI-SB600-SATA" },
65 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_2,
66 ahci_nvidia_mcp_attach, ahci_pci_detach, "NVidia-MCP65-SATA" },
67 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_1,
68 ahci_nvidia_mcp_attach, ahci_pci_detach, "NVidia-MCP67-SATA" },
69 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_5,
70 ahci_nvidia_mcp_attach, ahci_pci_detach, "NVidia-MCP77-SATA" },
72 ahci_pci_attach, ahci_pci_detach, "AHCI-PCI-SATA" }
75 u_int32_t AhciForceGen1 = 0; /* XXX add sysctl/kenv support */
78 * Match during probe and attach. The device does not yet have a softc.
80 const struct ahci_device *
81 ahci_lookup_device(device_t dev)
83 const struct ahci_device *ad;
84 u_int16_t vendor = pci_get_vendor(dev);
85 u_int16_t product = pci_get_device(dev);
86 u_int8_t class = pci_get_class(dev);
87 u_int8_t subclass = pci_get_subclass(dev);
88 u_int8_t progif = pci_read_config(dev, PCIR_PROGIF, 1);
90 for (ad = &ahci_devices[0]; ad->ad_vendor; ++ad) {
91 if (ad->ad_vendor == vendor && ad->ad_product == product)
96 * Last ad is the default match if the PCI device matches SATA.
98 if (class == PCIC_STORAGE && subclass == PCIS_STORAGE_SATA &&
99 progif == PCIP_STORAGE_SATA_AHCI_1_0) {
100 kprintf("match generic sata\n");
108 * Attach functions. They all eventually fall through to ahci_pci_attach().
111 ahci_vt8251_attach(device_t dev)
113 struct ahci_softc *sc = device_get_softc(dev);
115 sc->sc_flags |= AHCI_F_NO_NCQ;
116 return (ahci_pci_attach(dev));
120 ahci_ati_sb600_attach(device_t dev)
122 struct ahci_softc *sc = device_get_softc(dev);
124 u_int8_t subclass = pci_get_subclass(dev);
127 if (subclass == PCIS_STORAGE_IDE) {
128 revid = pci_read_config(dev, PCIR_REVID, 1);
129 magic = pci_read_config(dev, AHCI_PCI_ATI_SB600_MAGIC, 4);
130 pci_write_config(dev, AHCI_PCI_ATI_SB600_MAGIC,
131 magic | AHCI_PCI_ATI_SB600_LOCKED, 4);
132 pci_write_config(dev, PCIR_REVID,
133 (PCIC_STORAGE << 24) |
134 (PCIS_STORAGE_SATA << 16) |
135 (PCIP_STORAGE_SATA_AHCI_1_0 << 8) |
137 pci_write_config(dev, AHCI_PCI_ATI_SB600_MAGIC, magic, 4);
140 sc->sc_flags |= AHCI_F_IGN_FR;
141 return (ahci_pci_attach(dev));
145 ahci_nvidia_mcp_attach(device_t dev)
147 struct ahci_softc *sc = device_get_softc(dev);
149 sc->sc_flags |= AHCI_F_IGN_FR;
150 return (ahci_pci_attach(dev));
154 ahci_pci_attach(device_t dev)
156 struct ahci_softc *sc = device_get_softc(dev);
158 u_int32_t cap, pi, reg;
162 const char *revision;
165 * Map the AHCI controller's IRQ and BAR(5) (hardware registers)
168 sc->sc_rid_irq = AHCI_IRQ_RID;
169 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_rid_irq,
170 RF_SHAREABLE | RF_ACTIVE);
171 lwkt_serialize_init(&sc->sc_serializer);
172 lwkt_serialize_enter(&sc->sc_serializer);
173 if (sc->sc_irq == NULL) {
174 device_printf(dev, "unable to map interrupt\n");
175 lwkt_serialize_exit(&sc->sc_serializer);
176 ahci_pci_detach(dev);
181 * When mapping the register window store the tag and handle
182 * separately so we can use the tag with per-port bus handle
185 sc->sc_rid_regs = PCIR_BAR(5);
186 sc->sc_regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
187 &sc->sc_rid_regs, RF_ACTIVE);
188 if (sc->sc_regs == NULL) {
189 device_printf(dev, "unable to map registers\n");
190 lwkt_serialize_exit(&sc->sc_serializer);
191 ahci_pci_detach(dev);
194 sc->sc_iot = rman_get_bustag(sc->sc_regs);
195 sc->sc_ioh = rman_get_bushandle(sc->sc_regs);
198 * Initialize the chipset and then set the interrupt vector up
200 error = ahci_init(sc);
202 lwkt_serialize_exit(&sc->sc_serializer);
203 ahci_pci_detach(dev);
208 * Get the AHCI capabilities and max number of concurrent
209 * command tags and set up the DMA tags.
211 cap = ahci_read(sc, AHCI_REG_CAP);
212 if (sc->sc_flags & AHCI_F_NO_NCQ)
213 cap &= ~AHCI_REG_CAP_SNCQ;
215 sc->sc_ncmds = AHCI_REG_CAP_NCS(cap);
217 addr = (cap & AHCI_REG_CAP_S64A) ?
218 BUS_SPACE_MAXADDR : BUS_SPACE_MAXADDR_32BIT;
221 * DMA tags for allocation of DMA memory buffers, lists, and so
222 * forth. These are typically per-port.
225 error += bus_dma_tag_create(
226 NULL, /* parent tag */
228 PAGE_SIZE, /* boundary */
230 BUS_SPACE_MAXADDR, /* hiaddr */
232 NULL, /* filterarg */
233 sizeof(struct ahci_rfis), /* [max]size */
235 sizeof(struct ahci_rfis), /* maxsegsz */
237 &sc->sc_tag_rfis); /* return tag */
239 error += bus_dma_tag_create(
240 NULL, /* parent tag */
242 4096 * 1024, /* boundary */
244 BUS_SPACE_MAXADDR, /* hiaddr */
246 NULL, /* filterarg */
247 sc->sc_ncmds * sizeof(struct ahci_cmd_hdr),
249 sc->sc_ncmds * sizeof(struct ahci_cmd_hdr),
251 &sc->sc_tag_cmdh); /* return tag */
254 * NOTE: ahci_cmd_table is sized to a power of 2
256 error += bus_dma_tag_create(
257 NULL, /* parent tag */
258 sizeof(struct ahci_cmd_table), /* alignment */
259 4096 * 1024, /* boundary */
261 BUS_SPACE_MAXADDR, /* hiaddr */
263 NULL, /* filterarg */
264 sc->sc_ncmds * sizeof(struct ahci_cmd_table),
266 sc->sc_ncmds * sizeof(struct ahci_cmd_table),
268 &sc->sc_tag_cmdt); /* return tag */
271 * The data tag is used for later dmamaps and not immediately
274 error += bus_dma_tag_create(
275 NULL, /* parent tag */
279 BUS_SPACE_MAXADDR, /* hiaddr */
281 NULL, /* filterarg */
282 4096 * 1024, /* maxiosize */
283 AHCI_MAX_PRDT, /* maxsegs */
284 65536, /* maxsegsz */
286 &sc->sc_tag_data); /* return tag */
289 device_printf(dev, "unable to create dma tags\n");
290 lwkt_serialize_exit(&sc->sc_serializer);
291 ahci_pci_detach(dev);
295 switch (cap & AHCI_REG_CAP_ISS) {
296 case AHCI_REG_CAP_ISS_G1:
299 case AHCI_REG_CAP_ISS_G1_2:
300 gen = "1 (1.5Gbps) and 2 (3Gbps)";
307 /* check the revision */
308 reg = ahci_read(sc, AHCI_REG_VS);
310 case AHCI_REG_VS_0_95:
311 revision = "AHCI 0.95";
313 case AHCI_REG_VS_1_0:
314 revision = "AHCI 1.0";
316 case AHCI_REG_VS_1_1:
317 revision = "AHCI 1.1";
319 case AHCI_REG_VS_1_2:
320 revision = "AHCI 1.2";
323 device_printf(sc->sc_dev,
324 "Warning: Unknown AHCI revision 0x%08x\n", reg);
325 revision = "AHCI <unknown>";
330 "%s capabilities 0x%b, %d ports, %d tags/port, gen %s\n",
333 AHCI_REG_CAP_NP(cap), sc->sc_ncmds, gen);
335 pi = ahci_read(sc, AHCI_REG_PI);
336 DPRINTF(AHCI_D_VERBOSE, "%s: ports implemented: 0x%08x\n",
340 /* Naive coalescing support - enable for all ports. */
341 if (cap & AHCI_REG_CAP_CCCS) {
342 u_int16_t ccc_timeout = 20;
343 u_int8_t ccc_numcomplete = 12;
346 /* disable coalescing during reconfiguration. */
347 ccc_ctl = ahci_read(sc, AHCI_REG_CCC_CTL);
348 ccc_ctl &= ~0x00000001;
349 ahci_write(sc, AHCI_REG_CCC_CTL, ccc_ctl);
351 sc->sc_ccc_mask = 1 << AHCI_REG_CCC_CTL_INT(ccc_ctl);
352 if (pi & sc->sc_ccc_mask) {
353 /* A conflict with the implemented port list? */
354 printf("%s: coalescing interrupt/implemented port list "
355 "conflict, PI: %08x, ccc_mask: %08x\n",
356 DEVNAME(sc), pi, sc->sc_ccc_mask);
361 /* ahci_port_start will enable each port when it starts. */
362 sc->sc_ccc_ports = pi;
363 sc->sc_ccc_ports_cur = 0;
365 /* program thresholds and enable overall coalescing. */
366 ccc_ctl &= ~0xffffff00;
367 ccc_ctl |= (ccc_timeout << 16) | (ccc_numcomplete << 8);
368 ahci_write(sc, AHCI_REG_CCC_CTL, ccc_ctl);
369 ahci_write(sc, AHCI_REG_CCC_PORTS, 0);
370 ahci_write(sc, AHCI_REG_CCC_CTL, ccc_ctl | 1);
375 * Allocate per-port resources
377 * Ignore attach errors, leave the port intact for
378 * rescan and continue the loop.
380 for (i = 0; error == 0 && i < AHCI_MAX_PORTS; i++) {
381 if ((pi & (1 << i)) == 0) {
382 /* dont allocate stuff if the port isnt implemented */
385 error = ahci_port_alloc(sc, i);
387 if (ahci_cam_attach(sc->sc_ports[i]) == 0)
388 ahci_cam_changed(sc->sc_ports[i], NULL, -1);
395 * Setup the interrupt vector and enable interrupts. Note that
396 * since the irq may be shared we do not set it up until we are
400 error = bus_setup_intr(dev, sc->sc_irq, 0, ahci_intr, sc,
401 &sc->sc_irq_handle, &sc->sc_serializer);
405 device_printf(dev, "unable to install interrupt\n");
406 lwkt_serialize_exit(&sc->sc_serializer);
407 ahci_pci_detach(dev);
410 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE | AHCI_REG_GHC_IE);
411 lwkt_serialize_exit(&sc->sc_serializer);
417 * Device unload / detachment
420 ahci_pci_detach(device_t dev)
422 struct ahci_softc *sc = device_get_softc(dev);
423 struct ahci_port *ap;
427 * Disable the controller and de-register the interrupt, if any.
429 * XXX interlock serializer against interrupt
431 lwkt_serialize_handler_disable(&sc->sc_serializer);
433 ahci_write(sc, AHCI_REG_GHC, 0);
435 if (sc->sc_irq_handle) {
436 bus_teardown_intr(dev, sc->sc_irq, sc->sc_irq_handle);
437 sc->sc_irq_handle = NULL;
441 * Free port structures and DMA memory
443 for (i = 0; i < AHCI_MAX_PORTS; i++) {
444 ap = sc->sc_ports[i];
447 ahci_port_free(sc, i);
452 * Clean up the bus space
455 bus_release_resource(dev, SYS_RES_IRQ,
456 sc->sc_rid_irq, sc->sc_irq);
460 bus_release_resource(dev, SYS_RES_MEMORY,
461 sc->sc_rid_regs, sc->sc_regs);
465 if (sc->sc_tag_rfis) {
466 bus_dma_tag_destroy(sc->sc_tag_rfis);
467 sc->sc_tag_rfis = NULL;
469 if (sc->sc_tag_cmdh) {
470 bus_dma_tag_destroy(sc->sc_tag_cmdh);
471 sc->sc_tag_cmdh = NULL;
473 if (sc->sc_tag_cmdt) {
474 bus_dma_tag_destroy(sc->sc_tag_cmdt);
475 sc->sc_tag_cmdt = NULL;
477 if (sc->sc_tag_data) {
478 bus_dma_tag_destroy(sc->sc_tag_data);
479 sc->sc_tag_data = NULL;