2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
47 #include "opt_directio.h"
50 #include "opt_maxmem.h"
51 #include "opt_msgbuf.h"
52 #include "opt_perfmon.h"
54 #include "opt_userconfig.h"
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/sysproto.h>
59 #include <sys/signalvar.h>
60 #include <sys/kernel.h>
61 #include <sys/linker.h>
62 #include <sys/malloc.h>
66 #include <sys/reboot.h>
68 #include <sys/msgbuf.h>
69 #include <sys/sysent.h>
70 #include <sys/sysctl.h>
71 #include <sys/vmmeter.h>
73 #include <sys/upcall.h>
74 #include <sys/usched.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
88 #include <sys/mplock2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/md_var.h>
101 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
102 #include <machine/globaldata.h> /* CPU_prvspace */
103 #include <machine/smp.h>
105 #include <machine/perfmon.h>
107 #include <machine/cputypes.h>
108 #include <machine/intr_machdep.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/isa_intr.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #include <sys/machintr.h>
121 #include <machine_base/icu/icu_abi.h>
122 #include <machine_base/icu/elcr_var.h>
123 #include <machine_base/apic/lapic.h>
124 #include <machine_base/apic/ioapic.h>
125 #include <machine_base/apic/ioapic_abi.h>
127 #define PHYSMAP_ENTRIES 10
129 extern void init386(int first);
130 extern void dblfault_handler(void);
132 extern void printcpuinfo(void); /* XXX header file */
133 extern void finishidentcpu(void);
134 extern void panicifcpuunsupported(void);
135 extern void initializecpu(void);
137 static void cpu_startup(void *);
138 static void pic_finish(void *);
139 static void cpu_finish(void *);
140 #ifndef CPU_DISABLE_SSE
141 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
142 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
143 #endif /* CPU_DISABLE_SSE */
145 extern void ffs_rawread_setup(void);
146 #endif /* DIRECTIO */
147 static void init_locks(void);
149 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
150 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
151 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
153 int _udatasel, _ucodesel;
156 int64_t tsc_offsets[MAXCPU];
158 int64_t tsc_offsets[1];
161 #if defined(SWTCH_OPTIM_STATS)
162 extern int swtch_optim_stats;
163 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
164 CTLFLAG_RD, &swtch_optim_stats, 0, "");
165 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
166 CTLFLAG_RD, &tlb_flush_count, 0, "");
171 u_long ebda_addr = 0;
173 int imcr_present = 0;
175 int naps = 0; /* # of Applications processors */
180 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
182 u_long pmem = ctob(physmem);
184 int error = sysctl_handle_long(oidp, &pmem, 0, req);
188 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
189 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
192 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
194 int error = sysctl_handle_int(oidp, 0,
195 ctob(physmem - vmstats.v_wire_count), req);
199 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
200 0, 0, sysctl_hw_usermem, "IU", "");
203 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
205 int error = sysctl_handle_int(oidp, 0,
206 i386_btop(avail_end - avail_start), req);
210 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
211 0, 0, sysctl_hw_availpages, "I", "");
216 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
217 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
220 static vm_offset_t buffer_sva, buffer_eva;
221 vm_offset_t clean_sva, clean_eva;
222 static vm_offset_t pager_sva, pager_eva;
223 static struct trapframe proc0_tf;
226 cpu_startup(void *dummy)
230 vm_offset_t firstaddr;
233 * Good {morning,afternoon,evening,night}.
235 kprintf("%s", version);
238 panicifcpuunsupported();
242 kprintf("real memory = %ju (%ju MB)\n",
244 (intmax_t)Realmem / 1024 / 1024);
246 * Display any holes after the first chunk of extended memory.
251 kprintf("Physical memory chunk(s):\n");
252 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
253 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
255 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
256 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
262 * Allocate space for system data structures.
263 * The first available kernel virtual address is in "v".
264 * As pages of kernel virtual memory are allocated, "v" is incremented.
265 * As pages of memory are allocated and cleared,
266 * "firstaddr" is incremented.
267 * An index into the kernel page table corresponding to the
268 * virtual memory address maintained in "v" is kept in "mapaddr".
272 * Make two passes. The first pass calculates how much memory is
273 * needed and allocates it. The second pass assigns virtual
274 * addresses to the various data structures.
278 v = (caddr_t)firstaddr;
280 #define valloc(name, type, num) \
281 (name) = (type *)v; v = (caddr_t)((name)+(num))
282 #define valloclim(name, type, num, lim) \
283 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
286 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
287 * For the first 64MB of ram nominally allocate sufficient buffers to
288 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
289 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
290 * the buffer cache we limit the eventual kva reservation to
293 * factor represents the 1/4 x ram conversion.
296 int factor = 4 * BKVASIZE / 1024;
297 int kbytes = physmem * (PAGE_SIZE / 1024);
301 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
303 nbuf += (kbytes - 65536) * 2 / (factor * 5);
304 if (maxbcache && nbuf > maxbcache / BKVASIZE)
305 nbuf = maxbcache / BKVASIZE;
309 * Do not allow the buffer_map to be more then 1/2 the size of the
312 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
313 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
314 kprintf("Warning: nbufs capped at %d\n", nbuf);
317 /* limit to 128 on i386 */
318 nswbuf = max(min(nbuf/4, 128), 16);
320 if (nswbuf < NSWBUF_MIN)
327 valloc(swbuf, struct buf, nswbuf);
328 valloc(buf, struct buf, nbuf);
331 * End of first pass, size has been calculated so allocate memory
333 if (firstaddr == 0) {
334 size = (vm_size_t)(v - firstaddr);
335 firstaddr = kmem_alloc(&kernel_map, round_page(size));
337 panic("startup: no room for tables");
342 * End of second pass, addresses have been assigned
344 if ((vm_size_t)(v - firstaddr) != size)
345 panic("startup: table size inconsistency");
347 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
348 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
349 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
351 buffer_map.system_map = 1;
352 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
353 (nswbuf*MAXPHYS) + pager_map_size);
354 pager_map.system_map = 1;
356 #if defined(USERCONFIG)
358 cninit(); /* the preferred console may have changed */
361 kprintf("avail memory = %ju (%ju MB)\n",
362 (intmax_t)ptoa(vmstats.v_free_count),
363 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
366 * Set up buffers, so they can be used to read disk labels.
369 vm_pager_bufferinit();
373 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
375 mp_start(); /* fire up the APs and APICs */
381 cpu_finish(void *dummy __unused)
387 pic_finish(void *dummy __unused)
389 /* Log ELCR information */
393 MachIntrABI.finalize();
397 * Send an interrupt to process.
399 * Stack is set up to allow sigcode stored
400 * at top to call routine, followed by kcall
401 * to sigreturn routine below. After sigreturn
402 * resets the signal mask, the stack, and the
403 * frame pointer, it returns to the user
407 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
409 struct lwp *lp = curthread->td_lwp;
410 struct proc *p = lp->lwp_proc;
411 struct trapframe *regs;
412 struct sigacts *psp = p->p_sigacts;
413 struct sigframe sf, *sfp;
416 regs = lp->lwp_md.md_regs;
417 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
419 /* save user context */
420 bzero(&sf, sizeof(struct sigframe));
421 sf.sf_uc.uc_sigmask = *mask;
422 sf.sf_uc.uc_stack = lp->lwp_sigstk;
423 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
424 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
426 /* make the size of the saved context visible to userland */
427 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
429 /* save mailbox pending state for syscall interlock semantics */
430 if (p->p_flag & P_MAILBOX)
431 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
433 /* Allocate and validate space for the signal handler context. */
434 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
435 SIGISMEMBER(psp->ps_sigonstack, sig)) {
436 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
437 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
438 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
440 sfp = (struct sigframe *)regs->tf_esp - 1;
443 /* Translate the signal is appropriate */
444 if (p->p_sysent->sv_sigtbl) {
445 if (sig <= p->p_sysent->sv_sigsize)
446 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
449 /* Build the argument list for the signal handler. */
451 sf.sf_ucontext = (register_t)&sfp->sf_uc;
452 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
453 /* Signal handler installed with SA_SIGINFO. */
454 sf.sf_siginfo = (register_t)&sfp->sf_si;
455 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
457 /* fill siginfo structure */
458 sf.sf_si.si_signo = sig;
459 sf.sf_si.si_code = code;
460 sf.sf_si.si_addr = (void*)regs->tf_err;
463 /* Old FreeBSD-style arguments. */
464 sf.sf_siginfo = code;
465 sf.sf_addr = regs->tf_err;
466 sf.sf_ahu.sf_handler = catcher;
470 * If we're a vm86 process, we want to save the segment registers.
471 * We also change eflags to be our emulated eflags, not the actual
474 if (regs->tf_eflags & PSL_VM) {
475 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
476 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
478 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
479 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
480 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
481 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
483 if (vm86->vm86_has_vme == 0)
484 sf.sf_uc.uc_mcontext.mc_eflags =
485 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
486 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
489 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
490 * syscalls made by the signal handler. This just avoids
491 * wasting time for our lazy fixup of such faults. PSL_NT
492 * does nothing in vm86 mode, but vm86 programs can set it
493 * almost legitimately in probes for old cpu types.
495 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
499 * Save the FPU state and reinit the FP unit
501 npxpush(&sf.sf_uc.uc_mcontext);
504 * Copy the sigframe out to the user's stack.
506 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
508 * Something is wrong with the stack pointer.
509 * ...Kill the process.
514 regs->tf_esp = (int)sfp;
515 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
518 * i386 abi specifies that the direction flag must be cleared
521 regs->tf_eflags &= ~(PSL_T|PSL_D);
523 regs->tf_cs = _ucodesel;
524 regs->tf_ds = _udatasel;
525 regs->tf_es = _udatasel;
528 * Allow the signal handler to inherit %fs in addition to %gs as
529 * the userland program might be using both.
531 * However, if a T_PROTFLT occured the segment registers could be
532 * totally broken. They must be reset in order to be able to
533 * return to userland.
535 if (regs->tf_trapno == T_PROTFLT) {
536 regs->tf_fs = _udatasel;
537 regs->tf_gs = _udatasel;
539 regs->tf_ss = _udatasel;
543 * Sanitize the trapframe for a virtual kernel passing control to a custom
544 * VM context. Remove any items that would otherwise create a privilage
547 * XXX at the moment we allow userland to set the resume flag. Is this a
551 cpu_sanitize_frame(struct trapframe *frame)
553 frame->tf_cs = _ucodesel;
554 frame->tf_ds = _udatasel;
555 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
557 frame->tf_fs = _udatasel;
558 frame->tf_gs = _udatasel;
560 frame->tf_ss = _udatasel;
561 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
562 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
567 cpu_sanitize_tls(struct savetls *tls)
569 struct segment_descriptor *desc;
572 for (i = 0; i < NGTLS; ++i) {
574 if (desc->sd_dpl == 0 && desc->sd_type == 0)
576 if (desc->sd_def32 == 0)
578 if (desc->sd_type != SDT_MEMRWA)
580 if (desc->sd_dpl != SEL_UPL)
582 if (desc->sd_xx != 0 || desc->sd_p != 1)
589 * sigreturn(ucontext_t *sigcntxp)
591 * System call to cleanup state after a signal
592 * has been taken. Reset signal mask and
593 * stack state from context left by sendsig (above).
594 * Return to previous pc and psl as specified by
595 * context left by sendsig. Check carefully to
596 * make sure that the user has not modified the
597 * state to gain improper privileges.
601 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
602 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
605 sys_sigreturn(struct sigreturn_args *uap)
607 struct lwp *lp = curthread->td_lwp;
608 struct proc *p = lp->lwp_proc;
609 struct trapframe *regs;
617 * We have to copy the information into kernel space so userland
618 * can't modify it while we are sniffing it.
620 regs = lp->lwp_md.md_regs;
621 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
625 eflags = ucp->uc_mcontext.mc_eflags;
627 if (eflags & PSL_VM) {
628 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
629 struct vm86_kernel *vm86;
632 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
633 * set up the vm86 area, and we can't enter vm86 mode.
635 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
637 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
638 if (vm86->vm86_inited == 0)
641 /* go back to user mode if both flags are set */
642 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
643 trapsignal(lp, SIGBUS, 0);
645 if (vm86->vm86_has_vme) {
646 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
647 (eflags & VME_USERCHANGE) | PSL_VM;
649 vm86->vm86_eflags = eflags; /* save VIF, VIP */
650 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
651 (eflags & VM_USERCHANGE) | PSL_VM;
653 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
654 tf->tf_eflags = eflags;
655 tf->tf_vm86_ds = tf->tf_ds;
656 tf->tf_vm86_es = tf->tf_es;
657 tf->tf_vm86_fs = tf->tf_fs;
658 tf->tf_vm86_gs = tf->tf_gs;
659 tf->tf_ds = _udatasel;
660 tf->tf_es = _udatasel;
662 tf->tf_fs = _udatasel;
663 tf->tf_gs = _udatasel;
667 * Don't allow users to change privileged or reserved flags.
670 * XXX do allow users to change the privileged flag PSL_RF.
671 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
672 * should sometimes set it there too. tf_eflags is kept in
673 * the signal context during signal handling and there is no
674 * other place to remember it, so the PSL_RF bit may be
675 * corrupted by the signal handler without us knowing.
676 * Corruption of the PSL_RF bit at worst causes one more or
677 * one less debugger trap, so allowing it is fairly harmless.
679 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
680 kprintf("sigreturn: eflags = 0x%x\n", eflags);
685 * Don't allow users to load a valid privileged %cs. Let the
686 * hardware check for invalid selectors, excess privilege in
687 * other selectors, invalid %eip's and invalid %esp's.
689 cs = ucp->uc_mcontext.mc_cs;
690 if (!CS_SECURE(cs)) {
691 kprintf("sigreturn: cs = 0x%x\n", cs);
692 trapsignal(lp, SIGBUS, T_PROTFLT);
695 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
699 * Restore the FPU state from the frame
702 npxpop(&ucp->uc_mcontext);
705 * Merge saved signal mailbox pending flag to maintain interlock
706 * semantics against system calls.
708 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
709 p->p_flag |= P_MAILBOX;
711 if (ucp->uc_mcontext.mc_onstack & 1)
712 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
714 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
716 lp->lwp_sigmask = ucp->uc_sigmask;
717 SIG_CANTMASK(lp->lwp_sigmask);
723 * Stack frame on entry to function. %eax will contain the function vector,
724 * %ecx will contain the function data. flags, ecx, and eax will have
725 * already been pushed on the stack.
736 sendupcall(struct vmupcall *vu, int morepending)
738 struct lwp *lp = curthread->td_lwp;
739 struct trapframe *regs;
740 struct upcall upcall;
741 struct upc_frame upc_frame;
745 * If we are a virtual kernel running an emulated user process
746 * context, switch back to the virtual kernel context before
747 * trying to post the signal.
749 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
750 lp->lwp_md.md_regs->tf_trapno = 0;
751 vkernel_trap(lp, lp->lwp_md.md_regs);
755 * Get the upcall data structure
757 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
758 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
761 kprintf("bad upcall address\n");
766 * If the data structure is already marked pending or has a critical
767 * section count, mark the data structure as pending and return
768 * without doing an upcall. vu_pending is left set.
770 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
771 if (upcall.upc_pending < vu->vu_pending) {
772 upcall.upc_pending = vu->vu_pending;
773 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
774 sizeof(upcall.upc_pending));
780 * We can run this upcall now, clear vu_pending.
782 * Bump our critical section count and set or clear the
783 * user pending flag depending on whether more upcalls are
784 * pending. The user will be responsible for calling
785 * upc_dispatch(-1) to process remaining upcalls.
788 upcall.upc_pending = morepending;
790 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
791 sizeof(upcall.upc_pending));
792 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
796 * Construct a stack frame and issue the upcall
798 regs = lp->lwp_md.md_regs;
799 upc_frame.eax = regs->tf_eax;
800 upc_frame.ecx = regs->tf_ecx;
801 upc_frame.edx = regs->tf_edx;
802 upc_frame.flags = regs->tf_eflags;
803 upc_frame.oldip = regs->tf_eip;
804 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
805 sizeof(upc_frame)) != 0) {
806 kprintf("bad stack on upcall\n");
808 regs->tf_eax = (register_t)vu->vu_func;
809 regs->tf_ecx = (register_t)vu->vu_data;
810 regs->tf_edx = (register_t)lp->lwp_upcall;
811 regs->tf_eip = (register_t)vu->vu_ctx;
812 regs->tf_esp -= sizeof(upc_frame);
817 * fetchupcall occurs in the context of a system call, which means that
818 * we have to return EJUSTRETURN in order to prevent eax and edx from
819 * being overwritten by the syscall return value.
821 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
822 * and the function pointer in %eax.
825 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
827 struct upc_frame upc_frame;
828 struct lwp *lp = curthread->td_lwp;
829 struct trapframe *regs;
831 struct upcall upcall;
834 regs = lp->lwp_md.md_regs;
836 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
840 * This jumps us to the next ready context.
843 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
846 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
849 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
850 regs->tf_eax = (register_t)vu->vu_func;
851 regs->tf_ecx = (register_t)vu->vu_data;
852 regs->tf_edx = (register_t)lp->lwp_upcall;
853 regs->tf_eip = (register_t)vu->vu_ctx;
854 regs->tf_esp = (register_t)rsp;
857 * This returns us to the originally interrupted code.
859 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
860 regs->tf_eax = upc_frame.eax;
861 regs->tf_ecx = upc_frame.ecx;
862 regs->tf_edx = upc_frame.edx;
863 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
864 (upc_frame.flags & PSL_USERCHANGE);
865 regs->tf_eip = upc_frame.oldip;
866 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
875 * Machine dependent boot() routine
877 * I haven't seen anything to put here yet
878 * Possibly some stuff might be grafted back here from boot()
886 * Shutdown the CPU as much as possible
892 __asm__ __volatile("hlt");
896 * cpu_idle() represents the idle LWKT. You cannot return from this function
897 * (unless you want to blow things up!). Instead we look for runnable threads
898 * and loop or halt as appropriate. Giant is not held on entry to the thread.
900 * The main loop is entered with a critical section held, we must release
901 * the critical section before doing anything else. lwkt_switch() will
902 * check for pending interrupts due to entering and exiting its own
905 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
906 * However, there are cases where the idlethread will be entered with
907 * the possibility that no IPI will occur and in such cases
908 * lwkt_switch() sets RQF_WAKEUP. We usually check
909 * RQF_IDLECHECK_WK_MASK.
911 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
912 * 1 to just use hlt and for debugging purposes.
914 static int cpu_idle_hlt = 2;
915 static int cpu_idle_hltcnt;
916 static int cpu_idle_spincnt;
917 static u_int cpu_idle_repeat = 4;
918 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
919 &cpu_idle_hlt, 0, "Idle loop HLT enable");
920 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
921 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
922 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
923 &cpu_idle_spincnt, 0, "Idle loop entry spins");
924 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
925 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
928 cpu_idle_default_hook(void)
931 * We must guarentee that hlt is exactly the instruction
934 __asm __volatile("sti; hlt");
937 /* Other subsystems (e.g., ACPI) can hook this later. */
938 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
943 globaldata_t gd = mycpu;
944 struct thread *td __debugvar = gd->gd_curthread;
949 KKASSERT(td->td_critcount == 0);
952 * See if there are any LWKTs ready to go.
957 * When halting inside a cli we must check for reqflags
958 * races, particularly [re]schedule requests. Running
959 * splz() does the job.
962 * 0 Never halt, just spin
964 * 1 Always use HLT (or MONITOR/MWAIT if avail).
965 * This typically eats more power than the
968 * 2 Use HLT/MONITOR/MWAIT up to a point and then
969 * use the ACPI halt (default). This is a hybrid
970 * approach. See machdep.cpu_idle_repeat.
972 * 3 Always use the ACPI halt. This typically
973 * eats the least amount of power but the cpu
974 * will be slow waking up. Slows down e.g.
975 * compiles and other pipe/event oriented stuff.
978 * NOTE: Interrupts are enabled and we are not in a critical
981 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
982 * don't bother capping gd_idle_repeat, it is ok if
985 ++gd->gd_idle_repeat;
986 reqflags = gd->gd_reqflags;
987 quick = (cpu_idle_hlt == 1) ||
989 gd->gd_idle_repeat < cpu_idle_repeat);
991 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
992 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
993 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
995 } else if (cpu_idle_hlt) {
996 __asm __volatile("cli");
998 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1000 cpu_idle_default_hook();
1004 __asm __volatile("sti");
1008 __asm __volatile("sti");
1017 * This routine is called if a spinlock has been held through the
1018 * exponential backoff period and is seriously contested. On a real cpu
1022 cpu_spinlock_contested(void)
1030 * Clear registers on exec
1033 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1035 struct thread *td = curthread;
1036 struct lwp *lp = td->td_lwp;
1037 struct pcb *pcb = td->td_pcb;
1038 struct trapframe *regs = lp->lwp_md.md_regs;
1040 /* was i386_user_cleanup() in NetBSD */
1043 bzero((char *)regs, sizeof(struct trapframe));
1044 regs->tf_eip = entry;
1045 regs->tf_esp = stack;
1046 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1047 regs->tf_ss = _udatasel;
1048 regs->tf_ds = _udatasel;
1049 regs->tf_es = _udatasel;
1050 regs->tf_fs = _udatasel;
1051 regs->tf_gs = _udatasel;
1052 regs->tf_cs = _ucodesel;
1054 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1055 regs->tf_ebx = ps_strings;
1058 * Reset the hardware debug registers if they were in use.
1059 * They won't have any meaning for the newly exec'd process.
1061 if (pcb->pcb_flags & PCB_DBREGS) {
1068 if (pcb == td->td_pcb) {
1070 * Clear the debug registers on the running
1071 * CPU, otherwise they will end up affecting
1072 * the next process we switch to.
1076 pcb->pcb_flags &= ~PCB_DBREGS;
1080 * Initialize the math emulator (if any) for the current process.
1081 * Actually, just clear the bit that says that the emulator has
1082 * been initialized. Initialization is delayed until the process
1083 * traps to the emulator (if it is done at all) mainly because
1084 * emulators don't provide an entry point for initialization.
1086 pcb->pcb_flags &= ~FP_SOFTFP;
1089 * note: do not set CR0_TS here. npxinit() must do it after clearing
1090 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1094 load_cr0(rcr0() | CR0_MP);
1097 /* Initialize the npx (if any) for the current process. */
1098 npxinit(__INITIAL_NPXCW__);
1103 * note: linux emulator needs edx to be 0x0 on entry, which is
1104 * handled in execve simply by setting the 64 bit syscall
1105 * return value to 0.
1115 cr0 |= CR0_NE; /* Done by npxinit() */
1116 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1117 cr0 |= CR0_WP | CR0_AM;
1123 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1126 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1128 if (!error && req->newptr)
1133 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1134 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1136 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1137 CTLFLAG_RW, &disable_rtc_set, 0, "");
1139 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1140 CTLFLAG_RD, &bootinfo, bootinfo, "");
1142 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1143 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1145 extern u_long bootdev; /* not a cdev_t - encoding is different */
1146 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1147 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1150 * Initialize 386 and configure to run kernel
1154 * Initialize segments & interrupt table
1158 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1159 static struct gate_descriptor idt0[NIDT];
1160 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1161 union descriptor ldt[NLDT]; /* local descriptor table */
1163 /* table descriptors - used to load tables by cpu */
1164 struct region_descriptor r_gdt, r_idt;
1166 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1167 extern int has_f00f_bug;
1170 static struct i386tss dblfault_tss;
1171 static char dblfault_stack[PAGE_SIZE];
1173 extern struct user *proc0paddr;
1176 /* software prototypes -- in more palatable form */
1177 struct soft_segment_descriptor gdt_segs[] = {
1178 /* GNULL_SEL 0 Null Descriptor */
1179 { 0x0, /* segment base address */
1181 0, /* segment type */
1182 0, /* segment descriptor priority level */
1183 0, /* segment descriptor present */
1185 0, /* default 32 vs 16 bit size */
1186 0 /* limit granularity (byte/page units)*/ },
1187 /* GCODE_SEL 1 Code Descriptor for kernel */
1188 { 0x0, /* segment base address */
1189 0xfffff, /* length - all address space */
1190 SDT_MEMERA, /* segment type */
1191 0, /* segment descriptor priority level */
1192 1, /* segment descriptor present */
1194 1, /* default 32 vs 16 bit size */
1195 1 /* limit granularity (byte/page units)*/ },
1196 /* GDATA_SEL 2 Data Descriptor for kernel */
1197 { 0x0, /* segment base address */
1198 0xfffff, /* length - all address space */
1199 SDT_MEMRWA, /* segment type */
1200 0, /* segment descriptor priority level */
1201 1, /* segment descriptor present */
1203 1, /* default 32 vs 16 bit size */
1204 1 /* limit granularity (byte/page units)*/ },
1205 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1206 { 0x0, /* segment base address */
1207 0xfffff, /* length - all address space */
1208 SDT_MEMRWA, /* segment type */
1209 0, /* segment descriptor priority level */
1210 1, /* segment descriptor present */
1212 1, /* default 32 vs 16 bit size */
1213 1 /* limit granularity (byte/page units)*/ },
1214 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1216 0x0, /* segment base address */
1217 sizeof(struct i386tss)-1,/* length - all address space */
1218 SDT_SYS386TSS, /* segment type */
1219 0, /* segment descriptor priority level */
1220 1, /* segment descriptor present */
1222 0, /* unused - default 32 vs 16 bit size */
1223 0 /* limit granularity (byte/page units)*/ },
1224 /* GLDT_SEL 5 LDT Descriptor */
1225 { (int) ldt, /* segment base address */
1226 sizeof(ldt)-1, /* length - all address space */
1227 SDT_SYSLDT, /* segment type */
1228 SEL_UPL, /* segment descriptor priority level */
1229 1, /* segment descriptor present */
1231 0, /* unused - default 32 vs 16 bit size */
1232 0 /* limit granularity (byte/page units)*/ },
1233 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1234 { (int) ldt, /* segment base address */
1235 (512 * sizeof(union descriptor)-1), /* length */
1236 SDT_SYSLDT, /* segment type */
1237 0, /* segment descriptor priority level */
1238 1, /* segment descriptor present */
1240 0, /* unused - default 32 vs 16 bit size */
1241 0 /* limit granularity (byte/page units)*/ },
1242 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1243 { 0x0, /* segment base address */
1244 0x0, /* length - all address space */
1245 0, /* segment type */
1246 0, /* segment descriptor priority level */
1247 0, /* segment descriptor present */
1249 0, /* default 32 vs 16 bit size */
1250 0 /* limit granularity (byte/page units)*/ },
1251 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1252 { 0x400, /* segment base address */
1253 0xfffff, /* length */
1254 SDT_MEMRWA, /* segment type */
1255 0, /* segment descriptor priority level */
1256 1, /* segment descriptor present */
1258 1, /* default 32 vs 16 bit size */
1259 1 /* limit granularity (byte/page units)*/ },
1260 /* GPANIC_SEL 9 Panic Tss Descriptor */
1261 { (int) &dblfault_tss, /* segment base address */
1262 sizeof(struct i386tss)-1,/* length - all address space */
1263 SDT_SYS386TSS, /* segment type */
1264 0, /* segment descriptor priority level */
1265 1, /* segment descriptor present */
1267 0, /* unused - default 32 vs 16 bit size */
1268 0 /* limit granularity (byte/page units)*/ },
1269 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1270 { 0, /* segment base address (overwritten) */
1271 0xfffff, /* length */
1272 SDT_MEMERA, /* segment type */
1273 0, /* segment descriptor priority level */
1274 1, /* segment descriptor present */
1276 0, /* default 32 vs 16 bit size */
1277 1 /* limit granularity (byte/page units)*/ },
1278 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1279 { 0, /* segment base address (overwritten) */
1280 0xfffff, /* length */
1281 SDT_MEMERA, /* segment type */
1282 0, /* segment descriptor priority level */
1283 1, /* segment descriptor present */
1285 0, /* default 32 vs 16 bit size */
1286 1 /* limit granularity (byte/page units)*/ },
1287 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1288 { 0, /* segment base address (overwritten) */
1289 0xfffff, /* length */
1290 SDT_MEMRWA, /* segment type */
1291 0, /* segment descriptor priority level */
1292 1, /* segment descriptor present */
1294 1, /* default 32 vs 16 bit size */
1295 1 /* limit granularity (byte/page units)*/ },
1296 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1297 { 0, /* segment base address (overwritten) */
1298 0xfffff, /* length */
1299 SDT_MEMRWA, /* segment type */
1300 0, /* segment descriptor priority level */
1301 1, /* segment descriptor present */
1303 0, /* default 32 vs 16 bit size */
1304 1 /* limit granularity (byte/page units)*/ },
1305 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1306 { 0, /* segment base address (overwritten) */
1307 0xfffff, /* length */
1308 SDT_MEMRWA, /* segment type */
1309 0, /* segment descriptor priority level */
1310 1, /* segment descriptor present */
1312 0, /* default 32 vs 16 bit size */
1313 1 /* limit granularity (byte/page units)*/ },
1314 /* GTLS_START 15 TLS */
1315 { 0x0, /* segment base address */
1317 0, /* segment type */
1318 0, /* segment descriptor priority level */
1319 0, /* segment descriptor present */
1321 0, /* default 32 vs 16 bit size */
1322 0 /* limit granularity (byte/page units)*/ },
1323 /* GTLS_START+1 16 TLS */
1324 { 0x0, /* segment base address */
1326 0, /* segment type */
1327 0, /* segment descriptor priority level */
1328 0, /* segment descriptor present */
1330 0, /* default 32 vs 16 bit size */
1331 0 /* limit granularity (byte/page units)*/ },
1332 /* GTLS_END 17 TLS */
1333 { 0x0, /* segment base address */
1335 0, /* segment type */
1336 0, /* segment descriptor priority level */
1337 0, /* segment descriptor present */
1339 0, /* default 32 vs 16 bit size */
1340 0 /* limit granularity (byte/page units)*/ },
1343 static struct soft_segment_descriptor ldt_segs[] = {
1344 /* Null Descriptor - overwritten by call gate */
1345 { 0x0, /* segment base address */
1346 0x0, /* length - all address space */
1347 0, /* segment type */
1348 0, /* segment descriptor priority level */
1349 0, /* segment descriptor present */
1351 0, /* default 32 vs 16 bit size */
1352 0 /* limit granularity (byte/page units)*/ },
1353 /* Null Descriptor - overwritten by call gate */
1354 { 0x0, /* segment base address */
1355 0x0, /* length - all address space */
1356 0, /* segment type */
1357 0, /* segment descriptor priority level */
1358 0, /* segment descriptor present */
1360 0, /* default 32 vs 16 bit size */
1361 0 /* limit granularity (byte/page units)*/ },
1362 /* Null Descriptor - overwritten by call gate */
1363 { 0x0, /* segment base address */
1364 0x0, /* length - all address space */
1365 0, /* segment type */
1366 0, /* segment descriptor priority level */
1367 0, /* segment descriptor present */
1369 0, /* default 32 vs 16 bit size */
1370 0 /* limit granularity (byte/page units)*/ },
1371 /* Code Descriptor for user */
1372 { 0x0, /* segment base address */
1373 0xfffff, /* length - all address space */
1374 SDT_MEMERA, /* segment type */
1375 SEL_UPL, /* segment descriptor priority level */
1376 1, /* segment descriptor present */
1378 1, /* default 32 vs 16 bit size */
1379 1 /* limit granularity (byte/page units)*/ },
1380 /* Null Descriptor - overwritten by call gate */
1381 { 0x0, /* segment base address */
1382 0x0, /* length - all address space */
1383 0, /* segment type */
1384 0, /* segment descriptor priority level */
1385 0, /* segment descriptor present */
1387 0, /* default 32 vs 16 bit size */
1388 0 /* limit granularity (byte/page units)*/ },
1389 /* Data Descriptor for user */
1390 { 0x0, /* segment base address */
1391 0xfffff, /* length - all address space */
1392 SDT_MEMRWA, /* segment type */
1393 SEL_UPL, /* segment descriptor priority level */
1394 1, /* segment descriptor present */
1396 1, /* default 32 vs 16 bit size */
1397 1 /* limit granularity (byte/page units)*/ },
1401 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1403 struct gate_descriptor *ip;
1406 ip->gd_looffset = (int)func;
1407 ip->gd_selector = selec;
1413 ip->gd_hioffset = ((int)func)>>16 ;
1416 #define IDTVEC(name) __CONCAT(X,name)
1419 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1420 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1421 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1422 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1423 IDTVEC(xmm), IDTVEC(syscall),
1426 IDTVEC(int0x80_syscall);
1428 #ifdef DEBUG_INTERRUPTS
1429 extern inthand_t *Xrsvdary[256];
1433 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1435 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1436 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1437 ssd->ssd_type = sd->sd_type;
1438 ssd->ssd_dpl = sd->sd_dpl;
1439 ssd->ssd_p = sd->sd_p;
1440 ssd->ssd_def32 = sd->sd_def32;
1441 ssd->ssd_gran = sd->sd_gran;
1445 * Populate the (physmap) array with base/bound pairs describing the
1446 * available physical memory in the system, then test this memory and
1447 * build the phys_avail array describing the actually-available memory.
1449 * If we cannot accurately determine the physical memory map, then use
1450 * value from the 0xE801 call, and failing that, the RTC.
1452 * Total memory size may be set by the kernel environment variable
1453 * hw.physmem or the compile-time define MAXMEM.
1456 getmemsize(int first)
1458 int i, physmap_idx, pa_indx, da_indx;
1460 u_int basemem, extmem;
1461 struct vm86frame vmf;
1462 struct vm86context vmc;
1464 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1472 quad_t dcons_addr, dcons_size;
1474 bzero(&vmf, sizeof(struct vm86frame));
1475 bzero(physmap, sizeof(physmap));
1479 * Some newer BIOSes has broken INT 12H implementation which cause
1480 * kernel panic immediately. In this case, we need to scan SMAP
1481 * with INT 15:E820 first, then determine base memory size.
1484 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1485 if (hasbrokenint12) {
1490 * Perform "base memory" related probes & setup. If we get a crazy
1491 * value give the bios some scribble space just in case.
1493 vm86_intcall(0x12, &vmf);
1494 basemem = vmf.vmf_ax;
1495 if (basemem > 640) {
1496 kprintf("Preposterous BIOS basemem of %uK, "
1497 "truncating to < 640K\n", basemem);
1502 * XXX if biosbasemem is now < 640, there is a `hole'
1503 * between the end of base memory and the start of
1504 * ISA memory. The hole may be empty or it may
1505 * contain BIOS code or data. Map it read/write so
1506 * that the BIOS can write to it. (Memory from 0 to
1507 * the physical end of the kernel is mapped read-only
1508 * to begin with and then parts of it are remapped.
1509 * The parts that aren't remapped form holes that
1510 * remain read-only and are unused by the kernel.
1511 * The base memory area is below the physical end of
1512 * the kernel and right now forms a read-only hole.
1513 * The part of it from PAGE_SIZE to
1514 * (trunc_page(biosbasemem * 1024) - 1) will be
1515 * remapped and used by the kernel later.)
1517 * This code is similar to the code used in
1518 * pmap_mapdev, but since no memory needs to be
1519 * allocated we simply change the mapping.
1521 for (pa = trunc_page(basemem * 1024);
1522 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1523 pte = vtopte(pa + KERNBASE);
1524 *pte = pa | PG_RW | PG_V;
1528 * if basemem != 640, map pages r/w into vm86 page table so
1529 * that the bios can scribble on it.
1532 for (i = basemem / 4; i < 160; i++)
1533 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1537 * map page 1 R/W into the kernel page table so we can use it
1538 * as a buffer. The kernel will unmap this page later.
1540 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1541 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1544 * get memory map with INT 15:E820
1546 #define SMAPSIZ sizeof(*smap)
1547 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1550 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1551 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1556 vmf.vmf_eax = 0xE820;
1557 vmf.vmf_edx = SMAP_SIG;
1558 vmf.vmf_ecx = SMAPSIZ;
1559 i = vm86_datacall(0x15, &vmf, &vmc);
1560 if (i || vmf.vmf_eax != SMAP_SIG)
1562 if (boothowto & RB_VERBOSE)
1563 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1565 *(u_int32_t *)((char *)&smap->base + 4),
1566 (u_int32_t)smap->base,
1567 *(u_int32_t *)((char *)&smap->length + 4),
1568 (u_int32_t)smap->length);
1570 if (smap->type != 0x01)
1573 if (smap->length == 0)
1576 Realmem += smap->length;
1578 if (smap->base >= 0xffffffffLLU) {
1579 kprintf("%ju MB of memory above 4GB ignored\n",
1580 (uintmax_t)(smap->length / 1024 / 1024));
1584 for (i = 0; i <= physmap_idx; i += 2) {
1585 if (smap->base < physmap[i + 1]) {
1586 if (boothowto & RB_VERBOSE) {
1587 kprintf("Overlapping or non-montonic "
1588 "memory region, ignoring "
1591 Realmem -= smap->length;
1596 if (smap->base == physmap[physmap_idx + 1]) {
1597 physmap[physmap_idx + 1] += smap->length;
1602 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1603 kprintf("Too many segments in the physical "
1604 "address map, giving up\n");
1607 physmap[physmap_idx] = smap->base;
1608 physmap[physmap_idx + 1] = smap->base + smap->length;
1610 ; /* fix GCC3.x warning */
1611 } while (vmf.vmf_ebx != 0);
1614 * Perform "base memory" related probes & setup based on SMAP
1617 for (i = 0; i <= physmap_idx; i += 2) {
1618 if (physmap[i] == 0x00000000) {
1619 basemem = physmap[i + 1] / 1024;
1628 if (basemem > 640) {
1629 kprintf("Preposterous BIOS basemem of %uK, "
1630 "truncating to 640K\n", basemem);
1634 for (pa = trunc_page(basemem * 1024);
1635 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1636 pte = vtopte(pa + KERNBASE);
1637 *pte = pa | PG_RW | PG_V;
1641 for (i = basemem / 4; i < 160; i++)
1642 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1645 if (physmap[1] != 0)
1649 * If we failed above, try memory map with INT 15:E801
1651 vmf.vmf_ax = 0xE801;
1652 if (vm86_intcall(0x15, &vmf) == 0) {
1653 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1657 vm86_intcall(0x15, &vmf);
1658 extmem = vmf.vmf_ax;
1661 * Prefer the RTC value for extended memory.
1663 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1668 * Special hack for chipsets that still remap the 384k hole when
1669 * there's 16MB of memory - this really confuses people that
1670 * are trying to use bus mastering ISA controllers with the
1671 * "16MB limit"; they only have 16MB, but the remapping puts
1672 * them beyond the limit.
1674 * If extended memory is between 15-16MB (16-17MB phys address range),
1677 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1681 physmap[1] = basemem * 1024;
1683 physmap[physmap_idx] = 0x100000;
1684 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1688 * Now, physmap contains a map of physical memory.
1691 base_memory = physmap[1];
1693 /* make hole for AP bootstrap code YYY */
1694 physmap[1] = mp_bootaddress(base_memory);
1697 /* Save EBDA address, if any */
1698 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1702 * Maxmem isn't the "maximum memory", it's one larger than the
1703 * highest page of the physical address space. It should be
1704 * called something like "Maxphyspage". We may adjust this
1705 * based on ``hw.physmem'' and the results of the memory test.
1707 Maxmem = atop(physmap[physmap_idx + 1]);
1710 Maxmem = MAXMEM / 4;
1713 if (kgetenv_quad("hw.physmem", &maxmem))
1714 Maxmem = atop(maxmem);
1716 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1717 (boothowto & RB_VERBOSE))
1718 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1721 * If Maxmem has been increased beyond what the system has detected,
1722 * extend the last memory segment to the new limit.
1724 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1725 physmap[physmap_idx + 1] = ptoa(Maxmem);
1727 /* call pmap initialization to make new kernel address space */
1728 pmap_bootstrap(first, 0);
1731 * Size up each available chunk of physical memory.
1733 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1736 phys_avail[pa_indx++] = physmap[0];
1737 phys_avail[pa_indx] = physmap[0];
1738 dump_avail[da_indx] = physmap[0];
1743 * Get dcons buffer address
1745 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1746 kgetenv_quad("dcons.size", &dcons_size) == 0)
1750 * physmap is in bytes, so when converting to page boundaries,
1751 * round up the start address and round down the end address.
1753 for (i = 0; i <= physmap_idx; i += 2) {
1757 if (physmap[i + 1] < end)
1758 end = trunc_page(physmap[i + 1]);
1759 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1760 int tmp, page_bad, full;
1764 int *ptr = (int *)CADDR1;
1769 * block out kernel memory as not available.
1771 if (pa >= 0x100000 && pa < first)
1775 * block out dcons buffer
1778 && pa >= trunc_page(dcons_addr)
1779 && pa < dcons_addr + dcons_size)
1785 * map page into kernel: valid, read/write,non-cacheable
1787 *pte = pa | PG_V | PG_RW | PG_N;
1792 * Test for alternating 1's and 0's
1794 *(volatile int *)ptr = 0xaaaaaaaa;
1795 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1799 * Test for alternating 0's and 1's
1801 *(volatile int *)ptr = 0x55555555;
1802 if (*(volatile int *)ptr != 0x55555555) {
1808 *(volatile int *)ptr = 0xffffffff;
1809 if (*(volatile int *)ptr != 0xffffffff) {
1815 *(volatile int *)ptr = 0x0;
1816 if (*(volatile int *)ptr != 0x0) {
1820 * Restore original value.
1825 * Adjust array of valid/good pages.
1827 if (page_bad == TRUE) {
1831 * If this good page is a continuation of the
1832 * previous set of good pages, then just increase
1833 * the end pointer. Otherwise start a new chunk.
1834 * Note that "end" points one higher than end,
1835 * making the range >= start and < end.
1836 * If we're also doing a speculative memory
1837 * test and we at or past the end, bump up Maxmem
1838 * so that we keep going. The first bad page
1839 * will terminate the loop.
1841 if (phys_avail[pa_indx] == pa) {
1842 phys_avail[pa_indx] += PAGE_SIZE;
1845 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1846 kprintf("Too many holes in the physical address space, giving up\n");
1851 phys_avail[pa_indx++] = pa; /* start */
1852 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1856 if (dump_avail[da_indx] == pa) {
1857 dump_avail[da_indx] += PAGE_SIZE;
1860 if (da_indx >= PHYSMAP_ENTRIES*2) {
1864 dump_avail[da_indx++] = pa; /* start */
1865 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1878 * The last chunk must contain at least one page plus the message
1879 * buffer to avoid complicating other code (message buffer address
1880 * calculation, etc.).
1882 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1883 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1884 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1885 phys_avail[pa_indx--] = 0;
1886 phys_avail[pa_indx--] = 0;
1889 Maxmem = atop(phys_avail[pa_indx]);
1891 /* Trim off space for the message buffer. */
1892 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1894 avail_end = phys_avail[pa_indx];
1897 struct machintr_abi MachIntrABI;
1908 * 7 Device Not Available (x87)
1910 * 9 Coprocessor Segment overrun (unsupported, reserved)
1912 * 11 Segment not present
1914 * 13 General Protection
1917 * 16 x87 FP Exception pending
1918 * 17 Alignment Check
1920 * 19 SIMD floating point
1922 * 32-255 INTn/external sources
1927 struct gate_descriptor *gdp;
1928 int gsel_tss, metadata_missing, off, x;
1929 struct mdglobaldata *gd;
1932 * Prevent lowering of the ipl if we call tsleep() early.
1934 gd = &CPU_prvspace[0].mdglobaldata;
1935 bzero(gd, sizeof(*gd));
1937 gd->mi.gd_curthread = &thread0;
1938 thread0.td_gd = &gd->mi;
1940 atdevbase = ISA_HOLE_START + KERNBASE;
1942 metadata_missing = 0;
1943 if (bootinfo.bi_modulep) {
1944 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1945 preload_bootstrap_relocate(KERNBASE);
1947 metadata_missing = 1;
1949 if (bootinfo.bi_envp)
1950 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1952 if (boothowto & RB_VERBOSE)
1956 * Default MachIntrABI to ICU
1958 MachIntrABI = MachIntrABI_ICU;
1960 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1961 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1962 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1966 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1967 * and ncpus_fit_mask remain 0.
1972 /* Init basic tunables, hz etc */
1976 * make gdt memory segments, the code segment goes up to end of the
1977 * page with etext in it, the data segment goes to the end of
1981 * XXX text protection is temporarily (?) disabled. The limit was
1982 * i386_btop(round_page(etext)) - 1.
1984 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1985 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1987 gdt_segs[GPRIV_SEL].ssd_limit =
1988 atop(sizeof(struct privatespace) - 1);
1989 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1990 gdt_segs[GPROC0_SEL].ssd_base =
1991 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1993 gd->mi.gd_prvspace = &CPU_prvspace[0];
1996 * Note: on both UP and SMP curthread must be set non-NULL
1997 * early in the boot sequence because the system assumes
1998 * that 'curthread' is never NULL.
2001 for (x = 0; x < NGDT; x++) {
2003 /* avoid overwriting db entries with APM ones */
2004 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
2007 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2010 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2011 r_gdt.rd_base = (int) gdt;
2014 mi_gdinit(&gd->mi, 0);
2016 mi_proc0init(&gd->mi, proc0paddr);
2017 safepri = TDPRI_MAX;
2019 /* make ldt memory segments */
2021 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2022 * should be spelled ...MAX_USER...
2024 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2025 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2026 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2027 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2029 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2031 gd->gd_currentldt = _default_ldt;
2032 /* spinlocks and the BGL */
2036 * Setup the hardware exception table. Most exceptions use
2037 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2038 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2039 * an 'interrupt trap gate', which disables interrupts on entry,
2040 * in order to be able to poll the appropriate CRn register to
2041 * determine the fault address.
2043 for (x = 0; x < NIDT; x++) {
2044 #ifdef DEBUG_INTERRUPTS
2045 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2050 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2051 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2052 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2053 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2054 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2055 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2056 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2057 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2058 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2059 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2060 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2061 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2062 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2063 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2064 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2065 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2066 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2067 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2068 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2069 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2070 setidt(0x80, &IDTVEC(int0x80_syscall),
2071 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2073 r_idt.rd_limit = sizeof(idt0) - 1;
2074 r_idt.rd_base = (int) idt;
2078 * Initialize the console before we print anything out.
2082 if (metadata_missing)
2083 kprintf("WARNING: loader(8) metadata is missing!\n");
2092 * Initialize IRQ mapping
2095 * SHOULD be after elcr_probe()
2097 MachIntrABI_ICU.initmap();
2099 MachIntrABI_IOAPIC.initmap();
2104 if (boothowto & RB_KDB)
2105 Debugger("Boot flags requested debugger");
2108 finishidentcpu(); /* Final stage of CPU initialization */
2109 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2110 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2111 initializecpu(); /* Initialize CPU registers */
2114 * make an initial tss so cpu can get interrupt stack on syscall!
2115 * The 16 bytes is to save room for a VM86 context.
2117 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2118 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2119 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2120 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2121 gd->gd_common_tssd = *gd->gd_tss_gdt;
2122 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2125 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2126 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2127 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2128 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2129 dblfault_tss.tss_cr3 = (int)IdlePTD;
2130 dblfault_tss.tss_eip = (int) dblfault_handler;
2131 dblfault_tss.tss_eflags = PSL_KERNEL;
2132 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2133 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2134 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2135 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2136 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2140 init_param2(physmem);
2142 /* now running on new page tables, configured,and u/iom is accessible */
2144 /* Map the message buffer. */
2145 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2146 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2148 msgbufinit(msgbufp, MSGBUF_SIZE);
2150 /* make a call gate to reenter kernel with */
2151 gdp = &ldt[LSYS5CALLS_SEL].gd;
2153 x = (int) &IDTVEC(syscall);
2154 gdp->gd_looffset = x++;
2155 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2157 gdp->gd_type = SDT_SYS386CGT;
2158 gdp->gd_dpl = SEL_UPL;
2160 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2162 /* XXX does this work? */
2163 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2164 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2166 /* transfer to user mode */
2168 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2169 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2171 /* setup proc 0's pcb */
2172 thread0.td_pcb->pcb_flags = 0;
2173 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2174 thread0.td_pcb->pcb_ext = 0;
2175 lwp0.lwp_md.md_regs = &proc0_tf;
2179 * Initialize machine-dependant portions of the global data structure.
2180 * Note that the global data area and cpu0's idlestack in the private
2181 * data space were allocated in locore.
2183 * Note: the idlethread's cpl is 0
2185 * WARNING! Called from early boot, 'mycpu' may not work yet.
2188 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2191 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2193 lwkt_init_thread(&gd->mi.gd_idlethread,
2194 gd->mi.gd_prvspace->idlestack,
2195 sizeof(gd->mi.gd_prvspace->idlestack),
2197 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2198 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2199 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2200 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2204 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2206 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2207 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2214 globaldata_find(int cpu)
2216 KKASSERT(cpu >= 0 && cpu < ncpus);
2217 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2220 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2221 static void f00f_hack(void *unused);
2222 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2225 f00f_hack(void *unused)
2227 struct gate_descriptor *new_idt;
2233 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2235 r_idt.rd_limit = sizeof(idt0) - 1;
2237 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2239 panic("kmem_alloc returned 0");
2240 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2241 panic("kmem_alloc returned non-page-aligned memory");
2242 /* Put the first seven entries in the lower page */
2243 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2244 bcopy(idt, new_idt, sizeof(idt0));
2245 r_idt.rd_base = (int)new_idt;
2248 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2249 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2250 panic("vm_map_protect failed");
2253 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2256 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2258 lp->lwp_md.md_regs->tf_eip = addr;
2263 ptrace_single_step(struct lwp *lp)
2265 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2270 fill_regs(struct lwp *lp, struct reg *regs)
2272 struct trapframe *tp;
2274 tp = lp->lwp_md.md_regs;
2275 regs->r_gs = tp->tf_gs;
2276 regs->r_fs = tp->tf_fs;
2277 regs->r_es = tp->tf_es;
2278 regs->r_ds = tp->tf_ds;
2279 regs->r_edi = tp->tf_edi;
2280 regs->r_esi = tp->tf_esi;
2281 regs->r_ebp = tp->tf_ebp;
2282 regs->r_ebx = tp->tf_ebx;
2283 regs->r_edx = tp->tf_edx;
2284 regs->r_ecx = tp->tf_ecx;
2285 regs->r_eax = tp->tf_eax;
2286 regs->r_eip = tp->tf_eip;
2287 regs->r_cs = tp->tf_cs;
2288 regs->r_eflags = tp->tf_eflags;
2289 regs->r_esp = tp->tf_esp;
2290 regs->r_ss = tp->tf_ss;
2295 set_regs(struct lwp *lp, struct reg *regs)
2297 struct trapframe *tp;
2299 tp = lp->lwp_md.md_regs;
2300 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2301 !CS_SECURE(regs->r_cs))
2303 tp->tf_gs = regs->r_gs;
2304 tp->tf_fs = regs->r_fs;
2305 tp->tf_es = regs->r_es;
2306 tp->tf_ds = regs->r_ds;
2307 tp->tf_edi = regs->r_edi;
2308 tp->tf_esi = regs->r_esi;
2309 tp->tf_ebp = regs->r_ebp;
2310 tp->tf_ebx = regs->r_ebx;
2311 tp->tf_edx = regs->r_edx;
2312 tp->tf_ecx = regs->r_ecx;
2313 tp->tf_eax = regs->r_eax;
2314 tp->tf_eip = regs->r_eip;
2315 tp->tf_cs = regs->r_cs;
2316 tp->tf_eflags = regs->r_eflags;
2317 tp->tf_esp = regs->r_esp;
2318 tp->tf_ss = regs->r_ss;
2322 #ifndef CPU_DISABLE_SSE
2324 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2326 struct env87 *penv_87 = &sv_87->sv_env;
2327 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2330 /* FPU control/status */
2331 penv_87->en_cw = penv_xmm->en_cw;
2332 penv_87->en_sw = penv_xmm->en_sw;
2333 penv_87->en_tw = penv_xmm->en_tw;
2334 penv_87->en_fip = penv_xmm->en_fip;
2335 penv_87->en_fcs = penv_xmm->en_fcs;
2336 penv_87->en_opcode = penv_xmm->en_opcode;
2337 penv_87->en_foo = penv_xmm->en_foo;
2338 penv_87->en_fos = penv_xmm->en_fos;
2341 for (i = 0; i < 8; ++i)
2342 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2346 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2348 struct env87 *penv_87 = &sv_87->sv_env;
2349 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2352 /* FPU control/status */
2353 penv_xmm->en_cw = penv_87->en_cw;
2354 penv_xmm->en_sw = penv_87->en_sw;
2355 penv_xmm->en_tw = penv_87->en_tw;
2356 penv_xmm->en_fip = penv_87->en_fip;
2357 penv_xmm->en_fcs = penv_87->en_fcs;
2358 penv_xmm->en_opcode = penv_87->en_opcode;
2359 penv_xmm->en_foo = penv_87->en_foo;
2360 penv_xmm->en_fos = penv_87->en_fos;
2363 for (i = 0; i < 8; ++i)
2364 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2366 #endif /* CPU_DISABLE_SSE */
2369 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2371 #ifndef CPU_DISABLE_SSE
2373 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2374 (struct save87 *)fpregs);
2377 #endif /* CPU_DISABLE_SSE */
2378 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2383 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2385 #ifndef CPU_DISABLE_SSE
2387 set_fpregs_xmm((struct save87 *)fpregs,
2388 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2391 #endif /* CPU_DISABLE_SSE */
2392 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2397 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2400 dbregs->dr0 = rdr0();
2401 dbregs->dr1 = rdr1();
2402 dbregs->dr2 = rdr2();
2403 dbregs->dr3 = rdr3();
2404 dbregs->dr4 = rdr4();
2405 dbregs->dr5 = rdr5();
2406 dbregs->dr6 = rdr6();
2407 dbregs->dr7 = rdr7();
2411 pcb = lp->lwp_thread->td_pcb;
2412 dbregs->dr0 = pcb->pcb_dr0;
2413 dbregs->dr1 = pcb->pcb_dr1;
2414 dbregs->dr2 = pcb->pcb_dr2;
2415 dbregs->dr3 = pcb->pcb_dr3;
2418 dbregs->dr6 = pcb->pcb_dr6;
2419 dbregs->dr7 = pcb->pcb_dr7;
2425 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2428 load_dr0(dbregs->dr0);
2429 load_dr1(dbregs->dr1);
2430 load_dr2(dbregs->dr2);
2431 load_dr3(dbregs->dr3);
2432 load_dr4(dbregs->dr4);
2433 load_dr5(dbregs->dr5);
2434 load_dr6(dbregs->dr6);
2435 load_dr7(dbregs->dr7);
2438 struct ucred *ucred;
2440 uint32_t mask1, mask2;
2443 * Don't let an illegal value for dr7 get set. Specifically,
2444 * check for undefined settings. Setting these bit patterns
2445 * result in undefined behaviour and can lead to an unexpected
2448 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2449 i++, mask1 <<= 2, mask2 <<= 2)
2450 if ((dbregs->dr7 & mask1) == mask2)
2453 pcb = lp->lwp_thread->td_pcb;
2454 ucred = lp->lwp_proc->p_ucred;
2457 * Don't let a process set a breakpoint that is not within the
2458 * process's address space. If a process could do this, it
2459 * could halt the system by setting a breakpoint in the kernel
2460 * (if ddb was enabled). Thus, we need to check to make sure
2461 * that no breakpoints are being enabled for addresses outside
2462 * process's address space, unless, perhaps, we were called by
2465 * XXX - what about when the watched area of the user's
2466 * address space is written into from within the kernel
2467 * ... wouldn't that still cause a breakpoint to be generated
2468 * from within kernel mode?
2471 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2472 if (dbregs->dr7 & 0x3) {
2473 /* dr0 is enabled */
2474 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2478 if (dbregs->dr7 & (0x3<<2)) {
2479 /* dr1 is enabled */
2480 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2484 if (dbregs->dr7 & (0x3<<4)) {
2485 /* dr2 is enabled */
2486 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2490 if (dbregs->dr7 & (0x3<<6)) {
2491 /* dr3 is enabled */
2492 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2497 pcb->pcb_dr0 = dbregs->dr0;
2498 pcb->pcb_dr1 = dbregs->dr1;
2499 pcb->pcb_dr2 = dbregs->dr2;
2500 pcb->pcb_dr3 = dbregs->dr3;
2501 pcb->pcb_dr6 = dbregs->dr6;
2502 pcb->pcb_dr7 = dbregs->dr7;
2504 pcb->pcb_flags |= PCB_DBREGS;
2511 * Return > 0 if a hardware breakpoint has been hit, and the
2512 * breakpoint was in user space. Return 0, otherwise.
2515 user_dbreg_trap(void)
2517 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2518 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2519 int nbp; /* number of breakpoints that triggered */
2520 caddr_t addr[4]; /* breakpoint addresses */
2524 if ((dr7 & 0x000000ff) == 0) {
2526 * all GE and LE bits in the dr7 register are zero,
2527 * thus the trap couldn't have been caused by the
2528 * hardware debug registers
2535 bp = dr6 & 0x0000000f;
2539 * None of the breakpoint bits are set meaning this
2540 * trap was not caused by any of the debug registers
2546 * at least one of the breakpoints were hit, check to see
2547 * which ones and if any of them are user space addresses
2551 addr[nbp++] = (caddr_t)rdr0();
2554 addr[nbp++] = (caddr_t)rdr1();
2557 addr[nbp++] = (caddr_t)rdr2();
2560 addr[nbp++] = (caddr_t)rdr3();
2563 for (i=0; i<nbp; i++) {
2565 (caddr_t)VM_MAX_USER_ADDRESS) {
2567 * addr[i] is in user space
2574 * None of the breakpoints are in user space.
2582 Debugger(const char *msg)
2584 kprintf("Debugger(\"%s\") called.\n", msg);
2591 * Provide inb() and outb() as functions. They are normally only
2592 * available as macros calling inlined functions, thus cannot be
2593 * called inside DDB.
2595 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2601 /* silence compiler warnings */
2603 void outb(u_int, u_char);
2610 * We use %%dx and not %1 here because i/o is done at %dx and not at
2611 * %edx, while gcc generates inferior code (movw instead of movl)
2612 * if we tell it to load (u_short) port.
2614 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2619 outb(u_int port, u_char data)
2623 * Use an unnecessary assignment to help gcc's register allocator.
2624 * This make a large difference for gcc-1.40 and a tiny difference
2625 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2626 * best results. gcc-2.6.0 can't handle this.
2629 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2636 #include "opt_cpu.h"
2640 * initialize all the SMP locks
2643 /* critical region when masking or unmasking interupts */
2644 struct spinlock_deprecated imen_spinlock;
2646 /* critical region for old style disable_intr/enable_intr */
2647 struct spinlock_deprecated mpintr_spinlock;
2649 /* critical region around INTR() routines */
2650 struct spinlock_deprecated intr_spinlock;
2652 /* lock region used by kernel profiling */
2653 struct spinlock_deprecated mcount_spinlock;
2655 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2656 struct spinlock_deprecated com_spinlock;
2658 /* lock regions around the clock hardware */
2659 struct spinlock_deprecated clock_spinlock;
2661 /* lock around the MP rendezvous */
2662 struct spinlock_deprecated smp_rv_spinlock;
2669 * Get the initial mplock with a count of 1 for the BSP.
2670 * This uses a LOGICAL cpu ID, ie BSP == 0.
2672 cpu_get_initial_mplock();
2675 spin_lock_init(&mcount_spinlock);
2676 spin_lock_init(&intr_spinlock);
2677 spin_lock_init(&mpintr_spinlock);
2678 spin_lock_init(&imen_spinlock);
2679 spin_lock_init(&smp_rv_spinlock);
2680 spin_lock_init(&com_spinlock);
2681 spin_lock_init(&clock_spinlock);
2683 /* our token pool needs to work early */
2684 lwkt_token_pool_init();